All of lore.kernel.org
 help / color / mirror / Atom feed
* [U-Boot] [PATCH v2] arm: socfpga: Fix QSPI doesn't work on socdk board
@ 2015-12-18  8:48 圣江 吴
  2015-12-18  9:45 ` Pavel Machek
  0 siblings, 1 reply; 4+ messages in thread
From: 圣江 吴 @ 2015-12-18  8:48 UTC (permalink / raw)
  To: u-boot



On Dec 18, 2015, at 12:47 AM, Chin Liang See <clsee@altera.com> wrote:

Hi Shangjiang

On Fri, 2015-12-18 at 16:43 +0800, shengjiangwu wrote:
Updated pinmux group MIXED1IO[15-20] for QSPI.
Updated QSPI clock.

Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
---
Changes for v2:
- fixed wrong perpll for QSPI
---
board/altera/cyclone5-socdk/qts/pll_config.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)


I believe you forget to put back the pinmux change here.

Thanks
Chin Liang

Understand, I need to generate the?whole patch.?


diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h
b/board/altera/cyclone5-socdk/qts/pll_config.h
index 5b754ac..4abd2e0 100644
--- a/board/altera/cyclone5-socdk/qts/pll_config.h
+++ b/board/altera/cyclone5-socdk/qts/pll_config.h
@@ -32,7 +32,7 @@
#define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0
#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 3
#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 3
-#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 1
+#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511
#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 4
#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4
#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT 511

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* [U-Boot] [PATCH v2] arm: socfpga: Fix QSPI doesn't work on socdk board
  2015-12-18  8:48 [U-Boot] [PATCH v2] arm: socfpga: Fix QSPI doesn't work on socdk board 圣江 吴
@ 2015-12-18  9:45 ` Pavel Machek
  0 siblings, 0 replies; 4+ messages in thread
From: Pavel Machek @ 2015-12-18  9:45 UTC (permalink / raw)
  To: u-boot

On Fri 2015-12-18 08:48:39, ?? ? wrote:
> 
> 
> On Dec 18, 2015, at 12:47 AM, Chin Liang See <clsee@altera.com> wrote:
> 
> Hi Shangjiang
> 
> On Fri, 2015-12-18 at 16:43 +0800, shengjiangwu wrote:
> Updated pinmux group MIXED1IO[15-20] for QSPI.
> Updated QSPI clock.
> 
> Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Dinh Nguyen <dinh.linux@gmail.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> ---
> Changes for v2:
> - fixed wrong perpll for QSPI
> ---
> board/altera/cyclone5-socdk/qts/pll_config.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> 
> 
> I believe you forget to put back the pinmux change here.
> 
> Thanks
> Chin Liang
> 
> Understand, I need to generate the?whole patch.?
> 
> 

Can you also do something with your email setup? Normally, you'd want
to have in-reply-to headers, and quote email you are replying to with
"> " at begining of line..

Thanks
								Pavel

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [U-Boot] [PATCH v2] arm: socfpga: Fix QSPI doesn't work on socdk board
  2015-12-18  8:43 shengjiangwu
@ 2015-12-18  8:47 ` Chin Liang See
  0 siblings, 0 replies; 4+ messages in thread
From: Chin Liang See @ 2015-12-18  8:47 UTC (permalink / raw)
  To: u-boot

Hi Shangjiang

On Fri, 2015-12-18 at 16:43 +0800, shengjiangwu wrote:
> Updated pinmux group MIXED1IO[15-20] for QSPI.
> Updated QSPI clock.
> 
> Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Dinh Nguyen <dinh.linux@gmail.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> ---
> Changes for v2:
>    - fixed wrong perpll for QSPI
> ---
>  board/altera/cyclone5-socdk/qts/pll_config.h |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

I believe you forget to put back the pinmux change here.

Thanks
Chin Liang

> diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h
> b/board/altera/cyclone5-socdk/qts/pll_config.h
> index 5b754ac..4abd2e0 100644
> --- a/board/altera/cyclone5-socdk/qts/pll_config.h
> +++ b/board/altera/cyclone5-socdk/qts/pll_config.h
> @@ -32,7 +32,7 @@
>  #define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0
>  #define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 3
>  #define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 3
> -#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 1
> +#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511
>  #define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 4
>  #define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4
>  #define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT 511

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [U-Boot] [PATCH v2] arm: socfpga: Fix QSPI doesn't work on socdk board
@ 2015-12-18  8:43 shengjiangwu
  2015-12-18  8:47 ` Chin Liang See
  0 siblings, 1 reply; 4+ messages in thread
From: shengjiangwu @ 2015-12-18  8:43 UTC (permalink / raw)
  To: u-boot

Updated pinmux group MIXED1IO[15-20] for QSPI.
Updated QSPI clock.

Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
---
Changes for v2:
   - fixed wrong perpll for QSPI
---
 board/altera/cyclone5-socdk/qts/pll_config.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h b/board/altera/cyclone5-socdk/qts/pll_config.h
index 5b754ac..4abd2e0 100644
--- a/board/altera/cyclone5-socdk/qts/pll_config.h
+++ b/board/altera/cyclone5-socdk/qts/pll_config.h
@@ -32,7 +32,7 @@
 #define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0
 #define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 3
 #define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 3
-#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 1
+#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511
 #define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 4
 #define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4
 #define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT 511
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2015-12-18  9:45 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-12-18  8:48 [U-Boot] [PATCH v2] arm: socfpga: Fix QSPI doesn't work on socdk board 圣江 吴
2015-12-18  9:45 ` Pavel Machek
  -- strict thread matches above, loose matches on Subject: below --
2015-12-18  8:43 shengjiangwu
2015-12-18  8:47 ` Chin Liang See

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.