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From: Rob Herring <robh@kernel.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>,
	linux-omap@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	rogerq@ti.com, nsekhar@ti.com
Subject: Re: [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie phy
Date: Wed, 6 Jan 2016 07:28:35 -0600	[thread overview]
Message-ID: <20160106132835.GA20318@rob-hp-laptop> (raw)
In-Reply-To: <1452077948-26232-3-git-send-email-kishon@ti.com>

On Wed, Jan 06, 2016 at 04:29:08PM +0530, Kishon Vijay Abraham I wrote:
> DRA72 uses USB3 PHY for the 2nd lane of PCIE. The configuration
> required to make USB3 PHY used for the 2nd lane of PCIe is done
> here.
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>  Documentation/devicetree/bindings/phy/ti-phy.txt |    2 ++
>  drivers/phy/phy-ti-pipe3.c                       |   30 +++++++++++++++++++++-
>  2 files changed, 31 insertions(+), 1 deletion(-)

Acked-by: Rob Herring <robh@kernel.org>

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
Cc: Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Ian Campbell
	<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
	Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	rogerq-l0cyMroinI0@public.gmane.org,
	nsekhar-l0cyMroinI0@public.gmane.org
Subject: Re: [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie phy
Date: Wed, 6 Jan 2016 07:28:35 -0600	[thread overview]
Message-ID: <20160106132835.GA20318@rob-hp-laptop> (raw)
In-Reply-To: <1452077948-26232-3-git-send-email-kishon-l0cyMroinI0@public.gmane.org>

On Wed, Jan 06, 2016 at 04:29:08PM +0530, Kishon Vijay Abraham I wrote:
> DRA72 uses USB3 PHY for the 2nd lane of PCIE. The configuration
> required to make USB3 PHY used for the 2nd lane of PCIe is done
> here.
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/phy/ti-phy.txt |    2 ++
>  drivers/phy/phy-ti-pipe3.c                       |   30 +++++++++++++++++++++-
>  2 files changed, 31 insertions(+), 1 deletion(-)

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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  reply	other threads:[~2016-01-06 13:28 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-06 10:59 [PATCH 0/2] dra72: add support for PCIE 2 lane mode Kishon Vijay Abraham I
2016-01-06 10:59 ` Kishon Vijay Abraham I
2016-01-06 10:59 ` [PATCH 1/2] phy: ti-pipe3: get tx and rx MEM resource Kishon Vijay Abraham I
2016-01-06 10:59   ` Kishon Vijay Abraham I
2016-01-06 10:59 ` [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie phy Kishon Vijay Abraham I
2016-01-06 10:59   ` Kishon Vijay Abraham I
2016-01-06 13:28   ` Rob Herring [this message]
2016-01-06 13:28     ` Rob Herring
2017-12-19  9:45 [PATCH 0/2] ti-pipe3: PCIe x2 lane mode configuration in dra72 Kishon Vijay Abraham I
2017-12-19  9:45 ` [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie phy Kishon Vijay Abraham I
2017-12-19  9:45   ` Kishon Vijay Abraham I

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