* [U-Boot] [PATCH v2] ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined
@ 2016-01-18 3:02 Dongsheng Wang
2016-01-19 15:57 ` Tom Rini
0 siblings, 1 reply; 4+ messages in thread
From: Dongsheng Wang @ 2016-01-18 3:02 UTC (permalink / raw)
To: u-boot
From: Wang Dongsheng <dongsheng.wang@nxp.com>
"DISCARD" will remove ._secure.text relocate, but PSCI framework
has already used some absolute address those need to relocate.
Use readelf -t -r u-boot show us:
.__secure_start addr: 601408e4
.__secure_end addr: 60141460
60141140 00000017 R_ARM_RELATIVE
46 _secure_monitor:
47 #ifdef CONFIG_ARMV7_PSCI
48 ldr r5, =_psci_vectors
60141194 00000017 R_ARM_RELATIVE
6014119c 00000017 R_ARM_RELATIVE
601411a4 00000017 R_ARM_RELATIVE
601411ac 00000017 R_ARM_RELATIVE
64 _psci_table:
66 .word psci_cpu_suspend
...
72 .word psci_migrate
60141344 00000017 R_ARM_RELATIVE
6014145c 00000017 R_ARM_RELATIVE
202 ldr r5, =psci_text_end
Solutions:
1. Change absolute address to RelAdr.
Based on LDR (immediate, ARM), we only have 4K offset to jump.
Now PSCI code size is close to 4K size that is LDR limit jump size,
so even if the LDR is based on the current instruction address,
there is also have a risk for RelAdr. If we use two jump steps I
think we can fix this issue, but looks too hack, so give up this way.
2. Enable "DISCARD" only for CONFIG_ARMV7_SECURE_BASE has defined.
If CONFIG_ARMV7_SECURE_BASE is defined in platform, all of secure
will in the BASE address that is absolute.
Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index d48a905..e148ab7 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -14,23 +14,24 @@ OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
+#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
/*
- * Discard the relocation entries for secure text.
- * The secure code is bundled with u-boot image, so there will
- * be relocations entries for the secure code, since we use
- * "-mword-relocations" to compile and "-pie" to link into the
- * final image. We do not need the relocation entries for secure
- * code, because secure code will not be relocated, it only needs
- * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
- * which is the linking and running address for secure code.
- * If keep the relocation entries in .rel.dyn section,
- * "relocation offset + linking address" may locates into an
- * address that is reserved by SoC, then will trigger data abort.
+ * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
+ * bundle with u-boot, and code offsets are fixed. Secure zone
+ * only needs to be copied from the loading address to
+ * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
+ * address for secure code.
*
- * The reason that move .rel._secure at the beginning, is to
- * avoid hole in the final image.
+ * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
+ * be included in u-boot address space, and some absolute address
+ * were used in secure code. The absolute addresses of the secure
+ * code also needs to be relocated along with the accompanying u-boot
+ * code.
+ *
+ * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
*/
/DISCARD/ : { *(.rel._secure*) }
+#endif
. = 0x00000000;
. = ALIGN(4);
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 4+ messages in thread* [U-Boot] [PATCH v2] ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined
2016-01-18 3:02 [U-Boot] [PATCH v2] ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined Dongsheng Wang
@ 2016-01-19 15:57 ` Tom Rini
2016-01-29 16:21 ` Albert ARIBAUD
0 siblings, 1 reply; 4+ messages in thread
From: Tom Rini @ 2016-01-19 15:57 UTC (permalink / raw)
To: u-boot
On Mon, Jan 18, 2016 at 11:02:40AM +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng <dongsheng.wang@nxp.com>
>
> "DISCARD" will remove ._secure.text relocate, but PSCI framework
> has already used some absolute address those need to relocate.
>
> Use readelf -t -r u-boot show us:
> .__secure_start addr: 601408e4
> .__secure_end addr: 60141460
>
> 60141140 00000017 R_ARM_RELATIVE
> 46 _secure_monitor:
> 47 #ifdef CONFIG_ARMV7_PSCI
> 48 ldr r5, =_psci_vectors
>
> 60141194 00000017 R_ARM_RELATIVE
> 6014119c 00000017 R_ARM_RELATIVE
> 601411a4 00000017 R_ARM_RELATIVE
> 601411ac 00000017 R_ARM_RELATIVE
> 64 _psci_table:
> 66 .word psci_cpu_suspend
> ...
> 72 .word psci_migrate
>
> 60141344 00000017 R_ARM_RELATIVE
> 6014145c 00000017 R_ARM_RELATIVE
> 202 ldr r5, =psci_text_end
>
> Solutions:
> 1. Change absolute address to RelAdr.
> Based on LDR (immediate, ARM), we only have 4K offset to jump.
> Now PSCI code size is close to 4K size that is LDR limit jump size,
> so even if the LDR is based on the current instruction address,
> there is also have a risk for RelAdr. If we use two jump steps I
> think we can fix this issue, but looks too hack, so give up this way.
>
> 2. Enable "DISCARD" only for CONFIG_ARMV7_SECURE_BASE has defined.
> If CONFIG_ARMV7_SECURE_BASE is defined in platform, all of secure
> will in the BASE address that is absolute.
>
> Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
>
> diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
> index d48a905..e148ab7 100644
Reviewed-by: Tom Rini <trini@konsulko.com>
--
Tom
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH v2] ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined
2016-01-19 15:57 ` Tom Rini
@ 2016-01-29 16:21 ` Albert ARIBAUD
2016-02-24 3:20 ` Dongsheng Wang
0 siblings, 1 reply; 4+ messages in thread
From: Albert ARIBAUD @ 2016-01-29 16:21 UTC (permalink / raw)
To: u-boot
Hello Tom,
On Tue, 19 Jan 2016 10:57:11 -0500, Tom Rini <trini@konsulko.com> wrote:
> On Mon, Jan 18, 2016 at 11:02:40AM +0800, Dongsheng Wang wrote:
>
> > From: Wang Dongsheng <dongsheng.wang@nxp.com>
> >
> > "DISCARD" will remove ._secure.text relocate, but PSCI framework
> > has already used some absolute address those need to relocate.
> >
> > Use readelf -t -r u-boot show us:
> > .__secure_start addr: 601408e4
> > .__secure_end addr: 60141460
> >
> > 60141140 00000017 R_ARM_RELATIVE
> > 46 _secure_monitor:
> > 47 #ifdef CONFIG_ARMV7_PSCI
> > 48 ldr r5, =_psci_vectors
> >
> > 60141194 00000017 R_ARM_RELATIVE
> > 6014119c 00000017 R_ARM_RELATIVE
> > 601411a4 00000017 R_ARM_RELATIVE
> > 601411ac 00000017 R_ARM_RELATIVE
> > 64 _psci_table:
> > 66 .word psci_cpu_suspend
> > ...
> > 72 .word psci_migrate
> >
> > 60141344 00000017 R_ARM_RELATIVE
> > 6014145c 00000017 R_ARM_RELATIVE
> > 202 ldr r5, =psci_text_end
> >
> > Solutions:
> > 1. Change absolute address to RelAdr.
> > Based on LDR (immediate, ARM), we only have 4K offset to jump.
> > Now PSCI code size is close to 4K size that is LDR limit jump size,
> > so even if the LDR is based on the current instruction address,
> > there is also have a risk for RelAdr. If we use two jump steps I
> > think we can fix this issue, but looks too hack, so give up this way.
> >
> > 2. Enable "DISCARD" only for CONFIG_ARMV7_SECURE_BASE has defined.
> > If CONFIG_ARMV7_SECURE_BASE is defined in platform, all of secure
> > will in the BASE address that is absolute.
> >
> > Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
> >
> > diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
> > index d48a905..e148ab7 100644
>
> Reviewed-by: Tom Rini <trini@konsulko.com>
>
> --
> Tom
Applied to u-boot-arm/master, thanks!
Amicalement,
--
Albert.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH v2] ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined
2016-01-29 16:21 ` Albert ARIBAUD
@ 2016-02-24 3:20 ` Dongsheng Wang
0 siblings, 0 replies; 4+ messages in thread
From: Dongsheng Wang @ 2016-02-24 3:20 UTC (permalink / raw)
To: u-boot
Thanks, Albert.
Regards,
-Dongsheng
> -----Original Message-----
> From: Albert ARIBAUD [mailto:albert.u.boot at aribaud.net]
> Sent: Saturday, January 30, 2016 12:21 AM
> To: Tom Rini <trini@konsulko.com>
> Cc: Dongsheng Wang <dongsheng.wang@nxp.com>;
> alison.wang at freescale.com; jan.kiszka at siemens.com; oss at buserror.net; u-
> boot at lists.denx.de; twarren at nvidia.com; ijc at hellion.org.uk;
> yorksun at freescale.com
> Subject: Re: [U-Boot] [PATCH v2] ARM: Disable "DISCARD" for secure section if
> CONFIG_ARMV7_SECURE_BASE isn't defined
>
> Hello Tom,
>
> On Tue, 19 Jan 2016 10:57:11 -0500, Tom Rini <trini@konsulko.com> wrote:
> > On Mon, Jan 18, 2016 at 11:02:40AM +0800, Dongsheng Wang wrote:
> >
> > > From: Wang Dongsheng <dongsheng.wang@nxp.com>
> > >
> > > "DISCARD" will remove ._secure.text relocate, but PSCI framework has
> > > already used some absolute address those need to relocate.
> > >
> > > Use readelf -t -r u-boot show us:
> > > .__secure_start addr: 601408e4
> > > .__secure_end addr: 60141460
> > >
> > > 60141140 00000017 R_ARM_RELATIVE
> > > 46 _secure_monitor:
> > > 47 #ifdef CONFIG_ARMV7_PSCI
> > > 48 ldr r5, =_psci_vectors
> > >
> > > 60141194 00000017 R_ARM_RELATIVE
> > > 6014119c 00000017 R_ARM_RELATIVE
> > > 601411a4 00000017 R_ARM_RELATIVE
> > > 601411ac 00000017 R_ARM_RELATIVE
> > > 64 _psci_table:
> > > 66 .word psci_cpu_suspend
> > > ...
> > > 72 .word psci_migrate
> > >
> > > 60141344 00000017 R_ARM_RELATIVE
> > > 6014145c 00000017 R_ARM_RELATIVE
> > > 202 ldr r5, =psci_text_end
> > >
> > > Solutions:
> > > 1. Change absolute address to RelAdr.
> > > Based on LDR (immediate, ARM), we only have 4K offset to jump.
> > > Now PSCI code size is close to 4K size that is LDR limit jump size,
> > > so even if the LDR is based on the current instruction address,
> > > there is also have a risk for RelAdr. If we use two jump steps I
> > > think we can fix this issue, but looks too hack, so give up this way.
> > >
> > > 2. Enable "DISCARD" only for CONFIG_ARMV7_SECURE_BASE has defined.
> > > If CONFIG_ARMV7_SECURE_BASE is defined in platform, all of secure
> > > will in the BASE address that is absolute.
> > >
> > > Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
> > >
> > > diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index
> > > d48a905..e148ab7 100644
> >
> > Reviewed-by: Tom Rini <trini@konsulko.com>
> >
> > --
> > Tom
>
> Applied to u-boot-arm/master, thanks!
>
> Amicalement,
> --
> Albert.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-02-24 3:20 UTC | newest]
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2016-01-18 3:02 [U-Boot] [PATCH v2] ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined Dongsheng Wang
2016-01-19 15:57 ` Tom Rini
2016-01-29 16:21 ` Albert ARIBAUD
2016-02-24 3:20 ` Dongsheng Wang
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