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* [PATCH] drm/i915: Check DDI max lanes after applying BXT workaround
@ 2016-01-28 23:09 Matt Roper
  2016-01-29 11:17 ` ✓ Fi.CI.BAT: success for " Patchwork
  2016-01-29 14:49 ` [PATCH] " Ville Syrjälä
  0 siblings, 2 replies; 4+ messages in thread
From: Matt Roper @ 2016-01-28 23:09 UTC (permalink / raw)
  To: intel-gfx

In commit bfb9faab8 we added a workaround for some BXT BIOS that fail to
properly initialize the DDI_A_4_LANES bit of the control register (4
lanes is the only valid configuration on BXT since there is no DDI E to
share with).  A recent patch added some additional checks on this
register bit before the workaround gets applied; this breaks eDP on BXT
in some settings.  Some minor code shuffling is all we need to restore
the workaround.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fixes: 7cd87cb80 ("drm/i915: Check max number of lanes when registering DDI ports")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 75b57a8..6ac80cd 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3288,7 +3288,6 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
 	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
 					  (DDI_BUF_PORT_REVERSAL |
 					   DDI_A_4_LANES);
-	intel_dig_port->max_lanes = max_lanes;
 
 	/*
 	 * Bspec says that DDI_A_4_LANES is the only supported configuration
@@ -3301,9 +3300,12 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
 		if (!(intel_dig_port->saved_port_bits & DDI_A_4_LANES)) {
 			DRM_DEBUG_KMS("BXT BIOS forgot to set DDI_A_4_LANES for port A; fixing\n");
 			intel_dig_port->saved_port_bits |= DDI_A_4_LANES;
+			max_lanes = 4;
 		}
 	}
 
+	intel_dig_port->max_lanes = max_lanes;
+
 	intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
 	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 	intel_encoder->cloneable = 0;
-- 
2.1.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Check DDI max lanes after applying BXT workaround
  2016-01-28 23:09 [PATCH] drm/i915: Check DDI max lanes after applying BXT workaround Matt Roper
@ 2016-01-29 11:17 ` Patchwork
  2016-01-29 14:49 ` [PATCH] " Ville Syrjälä
  1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2016-01-29 11:17 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx

== Summary ==

Series 2907v1 drm/i915: Check DDI max lanes after applying BXT workaround
http://patchwork.freedesktop.org/api/1.0/series/2907/revisions/1/mbox/

Test kms_pipe_crc_basic:
        Subgroup nonblocking-crc-pipe-a:
                skip       -> PASS       (byt-nuc)

bdw-nuci7        total:156  pass:147  dwarn:0   dfail:0   fail:0   skip:9  
bdw-ultra        total:159  pass:147  dwarn:0   dfail:0   fail:0   skip:12 
bsw-nuc-2        total:159  pass:129  dwarn:0   dfail:0   fail:0   skip:30 
byt-nuc          total:159  pass:136  dwarn:0   dfail:0   fail:0   skip:23 
hsw-brixbox      total:159  pass:146  dwarn:0   dfail:0   fail:0   skip:13 
hsw-gt2          total:159  pass:149  dwarn:0   dfail:0   fail:0   skip:10 
ilk-hp8440p      total:159  pass:111  dwarn:0   dfail:0   fail:0   skip:48 
ivb-t430s        total:159  pass:145  dwarn:0   dfail:0   fail:0   skip:14 
skl-i5k-2        total:159  pass:144  dwarn:1   dfail:0   fail:0   skip:14 
snb-dellxps      total:159  pass:137  dwarn:0   dfail:0   fail:0   skip:22 
snb-x220t        total:159  pass:137  dwarn:0   dfail:0   fail:1   skip:21 

Results at /archive/results/CI_IGT_test/Patchwork_1316/

5de97b25e5f3c5a63ee243a9d3b22d30792f7d3e drm-intel-nightly: 2016y-01m-29d-07h-32m-09s UTC integration manifest
cd1230ad5beadb9ae06d21c73b48887e26840663 drm/i915: Check DDI max lanes after applying BXT workaround

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Check DDI max lanes after applying BXT workaround
  2016-01-28 23:09 [PATCH] drm/i915: Check DDI max lanes after applying BXT workaround Matt Roper
  2016-01-29 11:17 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2016-01-29 14:49 ` Ville Syrjälä
  2016-02-03  1:56   ` Matt Roper
  1 sibling, 1 reply; 4+ messages in thread
From: Ville Syrjälä @ 2016-01-29 14:49 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx

On Thu, Jan 28, 2016 at 03:09:37PM -0800, Matt Roper wrote:
> In commit bfb9faab8 we added a workaround for some BXT BIOS that fail to
> properly initialize the DDI_A_4_LANES bit of the control register (4
> lanes is the only valid configuration on BXT since there is no DDI E to
> share with).  A recent patch added some additional checks on this
> register bit before the workaround gets applied; this breaks eDP on BXT
> in some settings.  Some minor code shuffling is all we need to restore
> the workaround.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Fixes: 7cd87cb80 ("drm/i915: Check max number of lanes when registering DDI ports")
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 75b57a8..6ac80cd 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -3288,7 +3288,6 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
>  	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
>  					  (DDI_BUF_PORT_REVERSAL |
>  					   DDI_A_4_LANES);
> -	intel_dig_port->max_lanes = max_lanes;
>  
>  	/*
>  	 * Bspec says that DDI_A_4_LANES is the only supported configuration
> @@ -3301,9 +3300,12 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
>  		if (!(intel_dig_port->saved_port_bits & DDI_A_4_LANES)) {
>  			DRM_DEBUG_KMS("BXT BIOS forgot to set DDI_A_4_LANES for port A; fixing\n");
>  			intel_dig_port->saved_port_bits |= DDI_A_4_LANES;
> +			max_lanes = 4;
>  		}
>  	}
>  
> +	intel_dig_port->max_lanes = max_lanes;
> +

Oops, my bad.

Might be a bit nicer to really fixup the register value before
determining max_lanes, but since there's no port E on BXT it doesn't
really matter I suppose. So this fix should be fine as is.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  	intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
>  	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
>  	intel_encoder->cloneable = 0;
> -- 
> 2.1.4

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Check DDI max lanes after applying BXT workaround
  2016-01-29 14:49 ` [PATCH] " Ville Syrjälä
@ 2016-02-03  1:56   ` Matt Roper
  0 siblings, 0 replies; 4+ messages in thread
From: Matt Roper @ 2016-02-03  1:56 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

On Fri, Jan 29, 2016 at 04:49:29PM +0200, Ville Syrjälä wrote:
> On Thu, Jan 28, 2016 at 03:09:37PM -0800, Matt Roper wrote:
> > In commit bfb9faab8 we added a workaround for some BXT BIOS that fail to
> > properly initialize the DDI_A_4_LANES bit of the control register (4
> > lanes is the only valid configuration on BXT since there is no DDI E to
> > share with).  A recent patch added some additional checks on this
> > register bit before the workaround gets applied; this breaks eDP on BXT
> > in some settings.  Some minor code shuffling is all we need to restore
> > the workaround.
> > 
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Fixes: 7cd87cb80 ("drm/i915: Check max number of lanes when registering DDI ports")
> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c | 4 +++-
> >  1 file changed, 3 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > index 75b57a8..6ac80cd 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -3288,7 +3288,6 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
> >  	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
> >  					  (DDI_BUF_PORT_REVERSAL |
> >  					   DDI_A_4_LANES);
> > -	intel_dig_port->max_lanes = max_lanes;
> >  
> >  	/*
> >  	 * Bspec says that DDI_A_4_LANES is the only supported configuration
> > @@ -3301,9 +3300,12 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
> >  		if (!(intel_dig_port->saved_port_bits & DDI_A_4_LANES)) {
> >  			DRM_DEBUG_KMS("BXT BIOS forgot to set DDI_A_4_LANES for port A; fixing\n");
> >  			intel_dig_port->saved_port_bits |= DDI_A_4_LANES;
> > +			max_lanes = 4;
> >  		}
> >  	}
> >  
> > +	intel_dig_port->max_lanes = max_lanes;
> > +
> 
> Oops, my bad.
> 
> Might be a bit nicer to really fixup the register value before
> determining max_lanes, but since there's no port E on BXT it doesn't
> really matter I suppose. So this fix should be fine as is.
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pushed to dinq; thanks for the review.


Matt

> 
> >  	intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
> >  	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> >  	intel_encoder->cloneable = 0;
> > -- 
> > 2.1.4
> 
> -- 
> Ville Syrjälä
> Intel OTC

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-02-03  1:56 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-01-28 23:09 [PATCH] drm/i915: Check DDI max lanes after applying BXT workaround Matt Roper
2016-01-29 11:17 ` ✓ Fi.CI.BAT: success for " Patchwork
2016-01-29 14:49 ` [PATCH] " Ville Syrjälä
2016-02-03  1:56   ` Matt Roper

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