[PATCH 1/2] drm/i915: Update VBT fields for child devices

[PATCH 1/2] drm/i915: Update VBT fields for child devices

[Shubhangi Shrivastava]

This patch adds new fields that are not yet added in drm code
in child devices struct

Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c | 15 ++++++++++++++-
 drivers/gpu/drm/i915/intel_bios.h | 20 +++++++++++++-------
 2 files changed, 27 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index bf62a19..a26d4b4 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1124,7 +1124,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 	}
 
 	/* Parse the I_boost config for SKL and above */
-	if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
+	if (bdb->version >= 196 && child->common.iboost) {
 		info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
 		DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
 			      port_name(port), info->dp_boost_level);
@@ -1250,6 +1250,19 @@ parse_device_mapping(struct drm_i915_private *dev_priv,
 		 */
 		memcpy(child_dev_ptr, p_child,
 		       min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
+
+		/*
+		 * copied full block, now init values when they are not
+		 * available in current version
+		 */
+		if (bdb->version < 196) {
+			/* Set default values for bits added from v196 */
+			child_dev_ptr->common.iboost = 0;
+			child_dev_ptr->common.hpd_invert = 0;
+		}
+
+		if (bdb->version < 192)
+			child_dev_ptr->common.lspcon = 0;
 	}
 	return;
 }
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 350d4e0..833b82b 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -250,9 +250,6 @@ struct old_child_dev_config {
  * versions. Notice that the meaning of the contents contents may still change,
  * but at least the offsets are consistent. */
 
-/* Definitions for flags_1 */
-#define IBOOST_ENABLE (1<<3)
-
 struct common_child_dev_config {
 	u16 handle;
 	u16 device_type;
@@ -261,10 +258,19 @@ struct common_child_dev_config {
 	u8 not_common2[2];
 	u8 ddc_pin;
 	u16 edid_ptr;
-	u8 obsolete;
-	u8 flags_1;
-	u8 not_common3[13];
-	u8 iboost_level;
+	u8  dvo_cfg; /* See DEVICE_CFG_* above */
+	u8  efp_routed:1;
+	u8  lane_reversal:1;
+	u8  lspcon:1;
+	u8  iboost:1;
+	u8  hpd_invert:1;
+	u8  flag_reserved:3;
+	u8  hdmi_support:1;
+	u8  dp_support:1;
+	u8  tmds_support:1;
+	u8  support_reserved:5;
+	u8  not_common3[13];
+	u8  iboost_level;
 } __packed;
 
 
-- 
2.6.1

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[PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT

[Shubhangi Shrivastava]

This patch sets the invert bit for hpd detection for each port
based on vbt configuration. since each AOB can be designed to
depend on invert bit or not, it is expected if an AOB requires
invert bit, the user will set respective bit in VBT.

Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 49 +++++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_reg.h |  9 ++++++++
 2 files changed, 58 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 25a8937..305e6dd 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3424,6 +3424,54 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
 	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
 }
 
+/*
+ * For BXT invert bit has to be set based on AOB design
+ * for HPD detection logic, update it based on VBT fields.
+ */
+static void bxt_hpd_set_invert(struct drm_device *dev, u32 hotplug_port)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	int i, reg_val, val = 0;
+
+	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
+
+		/* Proceed only if invert bit is set */
+		if (dev_priv->vbt.child_dev[i].common.hpd_invert == 0)
+			continue;
+
+		/*
+		 * Convert dvo_port to PORT_X and set appropriate bit
+		 * only if hotplug is enabled on that port
+		 */
+		switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
+		case DVO_PORT_DPA:
+		case DVO_PORT_HDMIA:
+			if (hotplug_port & BXT_DE_PORT_HP_DDIA)
+				val |= BXT_DDIA_HPD_INVERT;
+			break;
+		case DVO_PORT_DPB:
+		case DVO_PORT_HDMIB:
+			if (hotplug_port & BXT_DE_PORT_HP_DDIB)
+				val |= BXT_DDIB_HPD_INVERT;
+			break;
+		case DVO_PORT_DPC:
+		case DVO_PORT_HDMIC:
+			if (hotplug_port & BXT_DE_PORT_HP_DDIC)
+				val |= BXT_DDIC_HPD_INVERT;
+			break;
+		default:
+			DRM_ERROR("HPD invert set for invalid dvo port %d\n",
+				   dev_priv->vbt.child_dev[i].common.dvo_port);
+			break;
+		}
+	}
+	reg_val = I915_READ(BXT_HOTPLUG_CTL);
+	DRM_DEBUG_KMS("Invert bit setting: hp_ctl:%x hp_port:%x val:%x\n",
+				reg_val, hotplug_port, val);
+	reg_val &= ~BXT_DDI_HPD_INVERT_MASK;
+	I915_WRITE(BXT_HOTPLUG_CTL, reg_val | val);
+}
+
 static void spt_hpd_irq_setup(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -3494,6 +3542,7 @@ static void bxt_hpd_irq_setup(struct drm_device *dev)
 	hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
 		PORTA_HOTPLUG_ENABLE;
 	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
+	bxt_hpd_set_invert(dev, enabled_irqs);
 }
 
 static void ibx_irq_postinstall(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0a98889..01bd3c5 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5936,6 +5936,15 @@ enum skl_disp_power_wells {
 #define GEN8_PCU_IIR _MMIO(0x444e8)
 #define GEN8_PCU_IER _MMIO(0x444ec)
 
+/* BXT hotplug control */
+#define BXT_HOTPLUG_CTL			_MMIO(0xC4030)
+#define BXT_DDIA_HPD_INVERT		(1 << 27)
+#define BXT_DDIC_HPD_INVERT		(1 << 11)
+#define BXT_DDIB_HPD_INVERT		(1 << 3)
+#define BXT_DDI_HPD_INVERT_MASK		(BXT_DDIA_HPD_INVERT | \
+					 BXT_DDIB_HPD_INVERT | \
+					 BXT_DDIC_HPD_INVERT)
+
 #define ILK_DISPLAY_CHICKEN2	_MMIO(0x42004)
 /* Required on all Ironlake and Sandybridge according to the B-Spec. */
 #define  ILK_ELPIN_409_SELECT	(1 << 25)
-- 
2.6.1

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✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Update VBT fields for child devices

[Patchwork]

== Summary ==

Series 3072v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/3072/revisions/1/mbox/


snb-x220t        total:159  pass:137  dwarn:0   dfail:0   fail:1   skip:21 

Results at /archive/results/CI_IGT_test/Patchwork_1362/

1ff67c58aa3d7cacd37451397c740b8df27994e6 drm-intel-nightly: 2016y-02m-03d-18h-22m-38s UTC integration manifest
607142c11ea11f694601877dd92f913e07a7d8eb drm/i915: Set invert bit for hpd based on VBT
cf5f717af3923677cc525a82183ad287a99f84f0 drm/i915: Update VBT fields for child devices

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Update VBT fields for child devices

[Patchwork]

== Summary ==

Series 3072v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/3072/revisions/1/mbox/

Test core_auth:
        Subgroup basic-auth:
                pass       -> SKIP       (bsw-nuc-2)
Test core_prop_blob:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test drv_getparams_basic:
        Subgroup basic-eu-total:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-subslice-total:
                pass       -> SKIP       (bsw-nuc-2)
Test drv_hangman:
        Subgroup error-state-basic:
                pass       -> SKIP       (bsw-nuc-2)
Test drv_module_reload_basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_basic:
        Subgroup bad-close:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup create-close:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup create-fd-close:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_cpu_reloc:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_ctx_basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_ctx_create:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_ctx_exec:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_ctx_param_basic:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-default:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup invalid-ctx-get:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup invalid-ctx-set:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup invalid-param-get:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup invalid-param-set:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup invalid-size-get:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup invalid-size-set:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup non-root-set:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup non-root-set-no-zeromap:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup root-set:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup root-set-no-zeromap-disabled:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup root-set-no-zeromap-enabled:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_exec_basic:
        Subgroup basic-blt:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-bsd:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-default:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-render:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-vebox:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_flink_basic:
        Subgroup bad-flink:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-open:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup double-flink:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup flink-lifetime:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_linear_blits:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_mmap:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-small-bo:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_mmap_gtt:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-copy:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-read:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-read-no-prefault:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-read-write:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-read-write-distinct:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-short:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-small-bo:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-small-bo-tiledx:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-small-bo-tiledy:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-small-copy:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-small-copy-xy:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-write:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-write-gtt:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-write-gtt-no-prefault:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-write-no-prefault:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-write-read:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-write-read-distinct:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_pread:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_pwrite:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_render_linear_blits:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_render_tiled_blits:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_ringfill:
        Subgroup basic-default:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_storedw_loop:
        Subgroup basic-blt:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-bsd:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-default:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-render:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-vebox:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_sync:
        Subgroup basic-blt:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-bsd:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-default:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-render:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-vebox:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_tiled_blits:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_tiled_fence_blits:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_tiled_pread_basic:
                pass       -> SKIP       (bsw-nuc-2)
Test kms_addfb_basic:
        Subgroup addfb25-bad-modifier:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup addfb25-framebuffer-vs-set-tiling:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup addfb25-modifier-no-flag:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup addfb25-x-tiled:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup addfb25-x-tiled-mismatch:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup addfb25-y-tiled:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup addfb25-yf-tiled:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-pitch-0:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-pitch-1024:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-pitch-128:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-pitch-256:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-pitch-32:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-pitch-63:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-pitch-65536:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-pitch-999:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-x-tiled:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-y-tiled:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bo-too-small:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bo-too-small-due-to-tiling:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup clobberred-modifier:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup framebuffer-vs-set-tiling:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup no-handle:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup size-max:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup small-bo:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup tile-pitch-mismatch:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup too-high:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup too-wide:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup unused-handle:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup unused-modifier:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup unused-offsets:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup unused-pitches:
                pass       -> SKIP       (bsw-nuc-2)
Test kms_flip:
        Subgroup basic-flip-vs-dpms:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-flip-vs-modeset:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-flip-vs-wf_vblank:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-plain-flip:
                pass       -> SKIP       (bsw-nuc-2)
Test kms_pipe_crc_basic:
        Subgroup bad-nb-words-1:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-nb-words-3:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-pipe:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup bad-source:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup hang-read-crc-pipe-c:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup nonblocking-crc-pipe-c:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup nonblocking-crc-pipe-c-frame-sequence:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup read-crc-pipe-c:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup read-crc-pipe-c-frame-sequence:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup suspend-read-crc-pipe-c:
                pass       -> SKIP       (bsw-nuc-2)
Test kms_setmode:
        Subgroup basic-clone-single-crtc:
                pass       -> SKIP       (bsw-nuc-2)
Test pm_rpm:
        Subgroup basic-pci-d3-state:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-rte:
                pass       -> SKIP       (bsw-nuc-2)
Test pm_rps:
        Subgroup basic-api:
                pass       -> SKIP       (bsw-nuc-2)
Test prime_self_import:
        Subgroup basic-llseek-bad:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-llseek-size:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-with_fd_dup:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-with_one_bo:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-with_one_bo_two_files:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-with_two_bos:
                pass       -> SKIP       (bsw-nuc-2)

bdw-nuci7        total:156  pass:147  dwarn:0   dfail:0   fail:0   skip:9  
bdw-ultra        total:159  pass:147  dwarn:0   dfail:0   fail:0   skip:12 
bsw-nuc-2        total:159  pass:0    dwarn:0   dfail:0   fail:0   skip:159
byt-nuc          total:159  pass:136  dwarn:0   dfail:0   fail:0   skip:23 
hsw-brixbox      total:159  pass:146  dwarn:0   dfail:0   fail:0   skip:13 
hsw-gt2          total:159  pass:149  dwarn:0   dfail:0   fail:0   skip:10 
ilk-hp8440p      total:159  pass:111  dwarn:0   dfail:0   fail:0   skip:48 
ivb-t430s        total:159  pass:145  dwarn:0   dfail:0   fail:0   skip:14 
skl-i5k-2        total:159  pass:144  dwarn:1   dfail:0   fail:0   skip:14 
skl-i7k-2        total:159  pass:144  dwarn:1   dfail:0   fail:0   skip:14 
snb-dellxps      total:159  pass:137  dwarn:0   dfail:0   fail:0   skip:22 
snb-x220t        total:159  pass:137  dwarn:0   dfail:0   fail:1   skip:21 

Results at /archive/results/CI_IGT_test/Patchwork_1362/

1ff67c58aa3d7cacd37451397c740b8df27994e6 drm-intel-nightly: 2016y-02m-03d-18h-22m-38s UTC integration manifest
607142c11ea11f694601877dd92f913e07a7d8eb drm/i915: Set invert bit for hpd based on VBT
cf5f717af3923677cc525a82183ad287a99f84f0 drm/i915: Update VBT fields for child devices

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Re: [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT

[Jani Nikula]

On Thu, 04 Feb 2016, Shubhangi Shrivastava <shubhangi.shrivastava@intel.com> wrote:
> This patch sets the invert bit for hpd detection for each port
> based on vbt configuration. since each AOB can be designed to
> depend on invert bit or not, it is expected if an AOB requires
> invert bit, the user will set respective bit in VBT.
>
> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
> Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
> Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 49 +++++++++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/i915_reg.h |  9 ++++++++
>  2 files changed, 58 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 25a8937..305e6dd 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3424,6 +3424,54 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
>  	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
>  }
>  
> +/*
> + * For BXT invert bit has to be set based on AOB design
> + * for HPD detection logic, update it based on VBT fields.
> + */
> +static void bxt_hpd_set_invert(struct drm_device *dev, u32 hotplug_port)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	int i, reg_val, val = 0;
> +
> +	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> +
> +		/* Proceed only if invert bit is set */
> +		if (dev_priv->vbt.child_dev[i].common.hpd_invert == 0)
> +			continue;
> +
> +		/*
> +		 * Convert dvo_port to PORT_X and set appropriate bit
> +		 * only if hotplug is enabled on that port
> +		 */
> +		switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
> +		case DVO_PORT_DPA:
> +		case DVO_PORT_HDMIA:
> +			if (hotplug_port & BXT_DE_PORT_HP_DDIA)
> +				val |= BXT_DDIA_HPD_INVERT;
> +			break;
> +		case DVO_PORT_DPB:
> +		case DVO_PORT_HDMIB:
> +			if (hotplug_port & BXT_DE_PORT_HP_DDIB)
> +				val |= BXT_DDIB_HPD_INVERT;
> +			break;
> +		case DVO_PORT_DPC:
> +		case DVO_PORT_HDMIC:
> +			if (hotplug_port & BXT_DE_PORT_HP_DDIC)
> +				val |= BXT_DDIC_HPD_INVERT;
> +			break;
> +		default:
> +			DRM_ERROR("HPD invert set for invalid dvo port %d\n",
> +				   dev_priv->vbt.child_dev[i].common.dvo_port);
> +			break;
> +		}
> +	}
> +	reg_val = I915_READ(BXT_HOTPLUG_CTL);
> +	DRM_DEBUG_KMS("Invert bit setting: hp_ctl:%x hp_port:%x val:%x\n",
> +				reg_val, hotplug_port, val);
> +	reg_val &= ~BXT_DDI_HPD_INVERT_MASK;
> +	I915_WRITE(BXT_HOTPLUG_CTL, reg_val | val);
> +}

No, we don't want this here. Separate VBT parsing from the rest of the
logic. See [1] for some directions where I want to take this type of
things.

BR,
Jani.

[1] http://mid.gmane.org/cover.1452541881.git.jani.nikula@intel.com



> +
>  static void spt_hpd_irq_setup(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -3494,6 +3542,7 @@ static void bxt_hpd_irq_setup(struct drm_device *dev)
>  	hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
>  		PORTA_HOTPLUG_ENABLE;
>  	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
> +	bxt_hpd_set_invert(dev, enabled_irqs);
>  }
>  
>  static void ibx_irq_postinstall(struct drm_device *dev)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 0a98889..01bd3c5 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5936,6 +5936,15 @@ enum skl_disp_power_wells {
>  #define GEN8_PCU_IIR _MMIO(0x444e8)
>  #define GEN8_PCU_IER _MMIO(0x444ec)
>  
> +/* BXT hotplug control */
> +#define BXT_HOTPLUG_CTL			_MMIO(0xC4030)
> +#define BXT_DDIA_HPD_INVERT		(1 << 27)
> +#define BXT_DDIC_HPD_INVERT		(1 << 11)
> +#define BXT_DDIB_HPD_INVERT		(1 << 3)
> +#define BXT_DDI_HPD_INVERT_MASK		(BXT_DDIA_HPD_INVERT | \
> +					 BXT_DDIB_HPD_INVERT | \
> +					 BXT_DDIC_HPD_INVERT)
> +
>  #define ILK_DISPLAY_CHICKEN2	_MMIO(0x42004)
>  /* Required on all Ironlake and Sandybridge according to the B-Spec. */
>  #define  ILK_ELPIN_409_SELECT	(1 << 25)

-- 
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Re: [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT

[Thulasimani, Sivakumar]

On 2/4/2016 5:59 PM, Jani Nikula wrote:
> On Thu, 04 Feb 2016, Shubhangi Shrivastava <shubhangi.shrivastava@intel.com> wrote:
>> This patch sets the invert bit for hpd detection for each port
>> based on vbt configuration. since each AOB can be designed to
>> depend on invert bit or not, it is expected if an AOB requires
>> invert bit, the user will set respective bit in VBT.
>>
>> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
>> Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
>> Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_irq.c | 49 +++++++++++++++++++++++++++++++++++++++++
>>   drivers/gpu/drm/i915/i915_reg.h |  9 ++++++++
>>   2 files changed, 58 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index 25a8937..305e6dd 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -3424,6 +3424,54 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
>>   	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
>>   }
>>   
>> +/*
>> + * For BXT invert bit has to be set based on AOB design
>> + * for HPD detection logic, update it based on VBT fields.
>> + */
>> +static void bxt_hpd_set_invert(struct drm_device *dev, u32 hotplug_port)
>> +{
>> +	struct drm_i915_private *dev_priv = dev->dev_private;
>> +	int i, reg_val, val = 0;
>> +
>> +	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
>> +
>> +		/* Proceed only if invert bit is set */
>> +		if (dev_priv->vbt.child_dev[i].common.hpd_invert == 0)
>> +			continue;
>> +
>> +		/*
>> +		 * Convert dvo_port to PORT_X and set appropriate bit
>> +		 * only if hotplug is enabled on that port
>> +		 */
>> +		switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
>> +		case DVO_PORT_DPA:
>> +		case DVO_PORT_HDMIA:
>> +			if (hotplug_port & BXT_DE_PORT_HP_DDIA)
>> +				val |= BXT_DDIA_HPD_INVERT;
>> +			break;
>> +		case DVO_PORT_DPB:
>> +		case DVO_PORT_HDMIB:
>> +			if (hotplug_port & BXT_DE_PORT_HP_DDIB)
>> +				val |= BXT_DDIB_HPD_INVERT;
>> +			break;
>> +		case DVO_PORT_DPC:
>> +		case DVO_PORT_HDMIC:
>> +			if (hotplug_port & BXT_DE_PORT_HP_DDIC)
>> +				val |= BXT_DDIC_HPD_INVERT;
>> +			break;
>> +		default:
>> +			DRM_ERROR("HPD invert set for invalid dvo port %d\n",
>> +				   dev_priv->vbt.child_dev[i].common.dvo_port);
>> +			break;
>> +		}
>> +	}
>> +	reg_val = I915_READ(BXT_HOTPLUG_CTL);
>> +	DRM_DEBUG_KMS("Invert bit setting: hp_ctl:%x hp_port:%x val:%x\n",
>> +				reg_val, hotplug_port, val);
>> +	reg_val &= ~BXT_DDI_HPD_INVERT_MASK;
>> +	I915_WRITE(BXT_HOTPLUG_CTL, reg_val | val);
>> +}
> No, we don't want this here. Separate VBT parsing from the rest of the
> logic. See [1] for some directions where I want to take this type of
> things.
hmm understood, will add intel_bios_requires_invert(dev, port)
and change the logic above to
if (intel_bios_requires_invert(dev,port)
     val |= port;
hope this should be fine.
> BR,
> Jani.
>
> [1] http://mid.gmane.org/cover.1452541881.git.jani.nikula@intel.com
>
>
>
>> +
>>   static void spt_hpd_irq_setup(struct drm_device *dev)
>>   {
>>   	struct drm_i915_private *dev_priv = dev->dev_private;
>> @@ -3494,6 +3542,7 @@ static void bxt_hpd_irq_setup(struct drm_device *dev)
>>   	hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
>>   		PORTA_HOTPLUG_ENABLE;
>>   	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
>> +	bxt_hpd_set_invert(dev, enabled_irqs);
>>   }
>>   
>>   static void ibx_irq_postinstall(struct drm_device *dev)
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index 0a98889..01bd3c5 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -5936,6 +5936,15 @@ enum skl_disp_power_wells {
>>   #define GEN8_PCU_IIR _MMIO(0x444e8)
>>   #define GEN8_PCU_IER _MMIO(0x444ec)
>>   
>> +/* BXT hotplug control */
>> +#define BXT_HOTPLUG_CTL			_MMIO(0xC4030)
>> +#define BXT_DDIA_HPD_INVERT		(1 << 27)
>> +#define BXT_DDIC_HPD_INVERT		(1 << 11)
>> +#define BXT_DDIB_HPD_INVERT		(1 << 3)
>> +#define BXT_DDI_HPD_INVERT_MASK		(BXT_DDIA_HPD_INVERT | \
>> +					 BXT_DDIB_HPD_INVERT | \
>> +					 BXT_DDIC_HPD_INVERT)
>> +
>>   #define ILK_DISPLAY_CHICKEN2	_MMIO(0x42004)
>>   /* Required on all Ironlake and Sandybridge according to the B-Spec. */
>>   #define  ILK_ELPIN_409_SELECT	(1 << 25)

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Re: [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT

[Jani Nikula]

On Fri, 05 Feb 2016, "Thulasimani, Sivakumar" <sivakumar.thulasimani@intel.com> wrote:
> On 2/4/2016 5:59 PM, Jani Nikula wrote:
>> On Thu, 04 Feb 2016, Shubhangi Shrivastava <shubhangi.shrivastava@intel.com> wrote:
>>> This patch sets the invert bit for hpd detection for each port
>>> based on vbt configuration. since each AOB can be designed to
>>> depend on invert bit or not, it is expected if an AOB requires
>>> invert bit, the user will set respective bit in VBT.
>>>
>>> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
>>> Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
>>> Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/i915_irq.c | 49 +++++++++++++++++++++++++++++++++++++++++
>>>   drivers/gpu/drm/i915/i915_reg.h |  9 ++++++++
>>>   2 files changed, 58 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>>> index 25a8937..305e6dd 100644
>>> --- a/drivers/gpu/drm/i915/i915_irq.c
>>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>>> @@ -3424,6 +3424,54 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
>>>   	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
>>>   }
>>>   
>>> +/*
>>> + * For BXT invert bit has to be set based on AOB design
>>> + * for HPD detection logic, update it based on VBT fields.
>>> + */
>>> +static void bxt_hpd_set_invert(struct drm_device *dev, u32 hotplug_port)
>>> +{
>>> +	struct drm_i915_private *dev_priv = dev->dev_private;
>>> +	int i, reg_val, val = 0;
>>> +
>>> +	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
>>> +
>>> +		/* Proceed only if invert bit is set */
>>> +		if (dev_priv->vbt.child_dev[i].common.hpd_invert == 0)
>>> +			continue;
>>> +
>>> +		/*
>>> +		 * Convert dvo_port to PORT_X and set appropriate bit
>>> +		 * only if hotplug is enabled on that port
>>> +		 */
>>> +		switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
>>> +		case DVO_PORT_DPA:
>>> +		case DVO_PORT_HDMIA:
>>> +			if (hotplug_port & BXT_DE_PORT_HP_DDIA)
>>> +				val |= BXT_DDIA_HPD_INVERT;
>>> +			break;
>>> +		case DVO_PORT_DPB:
>>> +		case DVO_PORT_HDMIB:
>>> +			if (hotplug_port & BXT_DE_PORT_HP_DDIB)
>>> +				val |= BXT_DDIB_HPD_INVERT;
>>> +			break;
>>> +		case DVO_PORT_DPC:
>>> +		case DVO_PORT_HDMIC:
>>> +			if (hotplug_port & BXT_DE_PORT_HP_DDIC)
>>> +				val |= BXT_DDIC_HPD_INVERT;
>>> +			break;
>>> +		default:
>>> +			DRM_ERROR("HPD invert set for invalid dvo port %d\n",
>>> +				   dev_priv->vbt.child_dev[i].common.dvo_port);
>>> +			break;
>>> +		}
>>> +	}
>>> +	reg_val = I915_READ(BXT_HOTPLUG_CTL);
>>> +	DRM_DEBUG_KMS("Invert bit setting: hp_ctl:%x hp_port:%x val:%x\n",
>>> +				reg_val, hotplug_port, val);
>>> +	reg_val &= ~BXT_DDI_HPD_INVERT_MASK;
>>> +	I915_WRITE(BXT_HOTPLUG_CTL, reg_val | val);
>>> +}
>> No, we don't want this here. Separate VBT parsing from the rest of the
>> logic. See [1] for some directions where I want to take this type of
>> things.
> hmm understood, will add intel_bios_requires_invert(dev, port)
> and change the logic above to
> if (intel_bios_requires_invert(dev,port)
>      val |= port;
> hope this should be fine.

I'd make it

bool intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv, enum port port);

BR,
Jani.



>> BR,
>> Jani.
>>
>> [1] http://mid.gmane.org/cover.1452541881.git.jani.nikula@intel.com
>>
>>
>>
>>> +
>>>   static void spt_hpd_irq_setup(struct drm_device *dev)
>>>   {
>>>   	struct drm_i915_private *dev_priv = dev->dev_private;
>>> @@ -3494,6 +3542,7 @@ static void bxt_hpd_irq_setup(struct drm_device *dev)
>>>   	hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
>>>   		PORTA_HOTPLUG_ENABLE;
>>>   	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
>>> +	bxt_hpd_set_invert(dev, enabled_irqs);
>>>   }
>>>   
>>>   static void ibx_irq_postinstall(struct drm_device *dev)
>>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>>> index 0a98889..01bd3c5 100644
>>> --- a/drivers/gpu/drm/i915/i915_reg.h
>>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>>> @@ -5936,6 +5936,15 @@ enum skl_disp_power_wells {
>>>   #define GEN8_PCU_IIR _MMIO(0x444e8)
>>>   #define GEN8_PCU_IER _MMIO(0x444ec)
>>>   
>>> +/* BXT hotplug control */
>>> +#define BXT_HOTPLUG_CTL			_MMIO(0xC4030)
>>> +#define BXT_DDIA_HPD_INVERT		(1 << 27)
>>> +#define BXT_DDIC_HPD_INVERT		(1 << 11)
>>> +#define BXT_DDIB_HPD_INVERT		(1 << 3)
>>> +#define BXT_DDI_HPD_INVERT_MASK		(BXT_DDIA_HPD_INVERT | \
>>> +					 BXT_DDIB_HPD_INVERT | \
>>> +					 BXT_DDIC_HPD_INVERT)
>>> +
>>>   #define ILK_DISPLAY_CHICKEN2	_MMIO(0x42004)
>>>   /* Required on all Ironlake and Sandybridge according to the B-Spec. */
>>>   #define  ILK_ELPIN_409_SELECT	(1 << 25)
>

-- 
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[PATCH] drm/i915: Set invert bit for hpd based on VBT

[Shubhangi Shrivastava]

This patch sets the invert bit for hpd detection for each port
based on VBT configuration. Since each AOB can be designed to
depend on invert bit or not, it is expected if an AOB requires
invert bit, the user will set respective bit in VBT.

v2: Separated VBT parsing from the rest of the logic. (Jani)

Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h   |  1 +
 drivers/gpu/drm/i915/i915_irq.c   | 43 +++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_reg.h   |  9 ++++++++
 drivers/gpu/drm/i915/intel_bios.c | 42 ++++++++++++++++++++++++++++++++++++++
 4 files changed, 95 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8216665..457f175 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3393,6 +3393,7 @@ extern void intel_i2c_reset(struct drm_device *dev);
 /* intel_bios.c */
 int intel_bios_init(struct drm_i915_private *dev_priv);
 bool intel_bios_is_valid_vbt(const void *buf, size_t size);
+bool intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port);
 
 /* intel_opregion.c */
 #ifdef CONFIG_ACPI
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 25a8937..fb95fb0 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -36,6 +36,7 @@
 #include "i915_drv.h"
 #include "i915_trace.h"
 #include "intel_drv.h"
+#include "intel_bios.h"
 
 /**
  * DOC: interrupt handling
@@ -3424,6 +3425,47 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
 	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
 }
 
+/*
+ * For BXT invert bit has to be set based on AOB design
+ * for HPD detection logic, update it based on VBT fields.
+ */
+static void bxt_hpd_set_invert(struct drm_device *dev, u32 hotplug_port)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	int reg_val, val = 0;
+	enum port port;
+
+	for (port = PORT_A; port <= PORT_C; port++) {
+
+		/* Proceed only if invert bit is set */
+		if (intel_bios_is_port_hpd_inverted(dev, port)) {
+			switch (port) {
+			case PORT_A:
+				if (hotplug_port & BXT_DE_PORT_HP_DDIA)
+					val |= BXT_DDIA_HPD_INVERT;
+				break;
+			case PORT_B:
+				if (hotplug_port & BXT_DE_PORT_HP_DDIB)
+					val |= BXT_DDIB_HPD_INVERT;
+				break;
+			case PORT_C:
+				if (hotplug_port & BXT_DE_PORT_HP_DDIC)
+					val |= BXT_DDIC_HPD_INVERT;
+				break;
+			default:
+				DRM_ERROR("HPD invert set for invalid port %d\n",
+						port);
+				break;
+			}
+		}
+	}
+	reg_val = I915_READ(BXT_HOTPLUG_CTL);
+	DRM_DEBUG_KMS("Invert bit setting: hp_ctl:%x hp_port:%x val:%x\n",
+				reg_val, hotplug_port, val);
+	reg_val &= ~BXT_DDI_HPD_INVERT_MASK;
+	I915_WRITE(BXT_HOTPLUG_CTL, reg_val | val);
+}
+
 static void spt_hpd_irq_setup(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -3494,6 +3536,7 @@ static void bxt_hpd_irq_setup(struct drm_device *dev)
 	hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
 		PORTA_HOTPLUG_ENABLE;
 	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
+	bxt_hpd_set_invert(dev, enabled_irqs);
 }
 
 static void ibx_irq_postinstall(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6732fc1..66cf92e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5940,6 +5940,15 @@ enum skl_disp_power_wells {
 #define GEN8_PCU_IIR _MMIO(0x444e8)
 #define GEN8_PCU_IER _MMIO(0x444ec)
 
+/* BXT hotplug control */
+#define BXT_HOTPLUG_CTL			_MMIO(0xC4030)
+#define BXT_DDIA_HPD_INVERT		(1 << 27)
+#define BXT_DDIC_HPD_INVERT		(1 << 11)
+#define BXT_DDIB_HPD_INVERT		(1 << 3)
+#define BXT_DDI_HPD_INVERT_MASK		(BXT_DDIA_HPD_INVERT | \
+					 BXT_DDIB_HPD_INVERT | \
+					 BXT_DDIC_HPD_INVERT)
+
 #define ILK_DISPLAY_CHICKEN2	_MMIO(0x42004)
 /* Required on all Ironlake and Sandybridge according to the B-Spec. */
 #define  ILK_ELPIN_409_SELECT	(1 << 25)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index a26d4b4..24d0077 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -105,6 +105,48 @@ find_section(const void *_bdb, int section_id)
 	return NULL;
 }
 
+bool
+intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	int i;
+
+	if (!IS_BROXTON(dev)) {
+		DRM_ERROR("Bit inversion is not required in this platform\n");
+		return false;
+	}
+
+	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
+
+		if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
+
+			switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
+			case DVO_PORT_DPA:
+			case DVO_PORT_HDMIA:
+				if (port == PORT_A)
+					return true;
+				break;
+			case DVO_PORT_DPB:
+			case DVO_PORT_HDMIB:
+				if (port == PORT_B)
+					return true;
+				break;
+			case DVO_PORT_DPC:
+			case DVO_PORT_HDMIC:
+				if (port == PORT_C)
+					return true;
+				break;
+			default:
+				DRM_DEBUG_KMS("This dvo port %d doesn't need invert\n",
+					dev_priv->vbt.child_dev[i].common.dvo_port);
+				break;
+			}
+		}
+	}
+
+	return false;
+}
+
 static void
 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
 			const struct lvds_dvo_timing *dvo_timing)
-- 
2.6.1

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Re: [PATCH] drm/i915: Set invert bit for hpd based on VBT

[kbuild test robot]

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Hi Shubhangi,

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20160212]
[cannot apply to v4.5-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]

url:    https://github.com/0day-ci/linux/commits/Shubhangi-Shrivastava/drm-i915-Set-invert-bit-for-hpd-based-on-VBT/20160212-203937
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x011-201606 (attached as .config)
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All errors (new ones prefixed by >>):

   drivers/gpu/drm/i915/intel_bios.c: In function 'intel_bios_is_port_hpd_inverted':
>> drivers/gpu/drm/i915/intel_bios.c:121:40: error: 'struct common_child_dev_config' has no member named 'hpd_invert'
      if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
                                           ^

vim +121 drivers/gpu/drm/i915/intel_bios.c

   115			DRM_ERROR("Bit inversion is not required in this platform\n");
   116			return false;
   117		}
   118	
   119		for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
   120	
 > 121			if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
   122	
   123				switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
   124				case DVO_PORT_DPA:

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
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[-- Attachment #3: Type: text/plain, Size: 160 bytes --]

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✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Update VBT fields for child devices (rev2)

[Patchwork]

== Summary ==

Series 3072v2 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/3072/revisions/2/mbox/

Test gem_sync:
        Subgroup basic-vebox:
                dmesg-fail -> PASS       (hsw-brixbox)
Test kms_flip:
        Subgroup basic-flip-vs-dpms:
                dmesg-warn -> PASS       (ilk-hp8440p) UNSTABLE
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-c:
                dmesg-warn -> PASS       (ivb-t430s)
Test pm_rpm:
        Subgroup basic-pci-d3-state:
                dmesg-warn -> PASS       (bsw-nuc-2)
                pass       -> DMESG-WARN (byt-nuc)

bdw-nuci7        total:162  pass:152  dwarn:0   dfail:0   fail:0   skip:10 
bdw-ultra        total:165  pass:152  dwarn:0   dfail:0   fail:0   skip:13 
bsw-nuc-2        total:165  pass:136  dwarn:0   dfail:0   fail:0   skip:29 
byt-nuc          total:165  pass:140  dwarn:1   dfail:0   fail:0   skip:24 
hsw-brixbox      total:165  pass:151  dwarn:0   dfail:0   fail:0   skip:14 
hsw-gt2          total:165  pass:154  dwarn:0   dfail:0   fail:1   skip:10 
ilk-hp8440p      total:165  pass:115  dwarn:0   dfail:1   fail:1   skip:48 
ivb-t430s        total:165  pass:150  dwarn:0   dfail:0   fail:1   skip:14 
skl-i5k-2        total:165  pass:150  dwarn:0   dfail:0   fail:0   skip:15 
snb-dellxps      total:165  pass:142  dwarn:0   dfail:0   fail:1   skip:22 

Results at /archive/results/CI_IGT_test/Patchwork_1400/

a4474d338aa8156348cebe58a329a18c8560da1e drm-intel-nightly: 2016y-02m-15d-17h-27m-11s UTC integration manifest
5115e2bfd78c5851ea3d1da5a7fdff83c9e9e2ad drm/i915: Set invert bit for hpd based on VBT
7d689d61215e2877fb214bae19e2589fef4abcfb drm/i915: Update VBT fields for child devices

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✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Update VBT fields for child devices

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Update VBT fields for child devices
URL   : https://patchwork.freedesktop.org/series/4858/
State : success

== Summary ==

Series 4858v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/4858/revisions/1/mbox/

Test gem_exec_suspend:
        Subgroup basic-s3:
                dmesg-warn -> PASS       (bsw-nuc-2)
Test pm_rpm:
        Subgroup basic-pci-d3-state:
                dmesg-warn -> PASS       (bsw-nuc-2)
        Subgroup basic-rte:
                dmesg-warn -> PASS       (byt-nuc) UNSTABLE

bdw-nuci7        total:192  pass:179  dwarn:0   dfail:0   fail:1   skip:12 
bdw-ultra        total:192  pass:170  dwarn:0   dfail:0   fail:1   skip:21 
bsw-nuc-2        total:192  pass:155  dwarn:0   dfail:0   fail:0   skip:37 
byt-nuc          total:192  pass:157  dwarn:0   dfail:0   fail:0   skip:35 
hsw-brixbox      total:192  pass:170  dwarn:0   dfail:0   fail:0   skip:22 
hsw-gt2          total:192  pass:175  dwarn:0   dfail:0   fail:0   skip:17 
ivb-t430s        total:192  pass:167  dwarn:0   dfail:0   fail:0   skip:25 
skl-i7k-2        total:192  pass:169  dwarn:0   dfail:0   fail:0   skip:23 
skl-nuci5        total:192  pass:181  dwarn:0   dfail:0   fail:0   skip:11 
snb-dellxps      total:192  pass:158  dwarn:0   dfail:0   fail:0   skip:34 
snb-x220t        total:192  pass:158  dwarn:0   dfail:0   fail:1   skip:33 

Results at /archive/results/CI_IGT_test/Patchwork_1706/

83ec122b900baae1aca2bc11eedc28f2d9ea5060 drm-intel-nightly: 2016y-03m-24d-12h-48m-43s UTC integration manifest
031e9198b73186de00abd4fe545ac0a6cef01446 drm/i915: Set invert bit for hpd based on VBT
3a12d0a0a5a7c274d631b3e767008035139c6e99 drm/i915: Update VBT fields for child devices

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