[Qemu-devel] [PATCH 0/4] vfio-pci: pass the aer error to guest, part1

[Qemu-devel] [PATCH 0/4] vfio-pci: pass the aer error to guest, part1

[Cao jin]

From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>

this patchset are splited out from my aer series patches,
this part of aer patches is harmless, and have been reviewed-by.
In order to avoid blocking it to merge, so I send it out independently
as part1. the part2 is under discussion. Thanks

Chen Fan (4):
  pcie: modify the capability size assert
  vfio: make the 4 bytes aligned for capability size
  aer: impove pcie_aer_init to support vfio device
  pcie_aer: expose pcie_aer_msg() interface

 hw/pci-bridge/ioh3420.c            | 2 +-
 hw/pci-bridge/xio3130_downstream.c | 2 +-
 hw/pci-bridge/xio3130_upstream.c   | 2 +-
 hw/pci/pcie.c                      | 2 +-
 hw/pci/pcie_aer.c                  | 6 +++---
 hw/vfio/pci.c                      | 3 ++-
 include/hw/pci/pcie_aer.h          | 3 ++-
 7 files changed, 11 insertions(+), 9 deletions(-)

-- 
1.9.3

[Qemu-devel] [PATCH 1/4] pcie: modify the capability size assert

[Cao jin]

From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>

 Device's Offset and size can reach PCIE_CONFIG_SPACE_SIZE,
 fix the corresponding assert.

Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
---
 hw/pci/pcie.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 435a6cf..4aca0c5 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -608,7 +608,7 @@ void pcie_add_capability(PCIDevice *dev,
 
     assert(offset >= PCI_CONFIG_SPACE_SIZE);
     assert(offset < offset + size);
-    assert(offset + size < PCIE_CONFIG_SPACE_SIZE);
+    assert(offset + size <= PCIE_CONFIG_SPACE_SIZE);
     assert(size >= 8);
     assert(pci_is_express(dev));
 
-- 
1.9.3

[Qemu-devel] [PATCH 2/4] vfio: make the 4 bytes aligned for capability size

[Cao jin]

From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>

this function search the capability from the end, the last
size should 0x100 - pos, not 0xff - pos.

Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
---
 hw/vfio/pci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 49f3d2d..e671506 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -1505,7 +1505,8 @@ static void vfio_unmap_bars(VFIOPCIDevice *vdev)
  */
 static uint8_t vfio_std_cap_max_size(PCIDevice *pdev, uint8_t pos)
 {
-    uint8_t tmp, next = 0xff;
+    uint8_t tmp;
+    uint16_t next = PCI_CONFIG_SPACE_SIZE;
 
     for (tmp = pdev->config[PCI_CAPABILITY_LIST]; tmp;
          tmp = pdev->config[tmp + 1]) {
-- 
1.9.3

[Qemu-devel] [PATCH 3/4] aer: impove pcie_aer_init to support vfio device

[Cao jin]

From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>

pcie_aer_init was used to emulate an aer capability for pcie device,
but for vfio device, the aer config space size is mutable and is not
always equal to PCI_ERR_SIZEOF(0x48). it depends on where the TLP Prefix
register required, so here we add a size argument.

Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
---
 hw/pci-bridge/ioh3420.c            | 2 +-
 hw/pci-bridge/xio3130_downstream.c | 2 +-
 hw/pci-bridge/xio3130_upstream.c   | 2 +-
 hw/pci/pcie_aer.c                  | 4 ++--
 include/hw/pci/pcie_aer.h          | 2 +-
 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c
index 8ac4240..e62eefb 100644
--- a/hw/pci-bridge/ioh3420.c
+++ b/hw/pci-bridge/ioh3420.c
@@ -130,7 +130,7 @@ static int ioh3420_initfn(PCIDevice *d)
         goto err_pcie_cap;
     }
     pcie_cap_root_init(d);
-    rc = pcie_aer_init(d, IOH_EP_AER_OFFSET);
+    rc = pcie_aer_init(d, IOH_EP_AER_OFFSET, PCI_ERR_SIZEOF);
     if (rc < 0) {
         goto err;
     }
diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c
index 9eb3d88..8458790 100644
--- a/hw/pci-bridge/xio3130_downstream.c
+++ b/hw/pci-bridge/xio3130_downstream.c
@@ -93,7 +93,7 @@ static int xio3130_downstream_initfn(PCIDevice *d)
         goto err_pcie_cap;
     }
     pcie_cap_arifwd_init(d);
-    rc = pcie_aer_init(d, XIO3130_AER_OFFSET);
+    rc = pcie_aer_init(d, XIO3130_AER_OFFSET, PCI_ERR_SIZEOF);
     if (rc < 0) {
         goto err;
     }
diff --git a/hw/pci-bridge/xio3130_upstream.c b/hw/pci-bridge/xio3130_upstream.c
index 7d255a6..c7fd397 100644
--- a/hw/pci-bridge/xio3130_upstream.c
+++ b/hw/pci-bridge/xio3130_upstream.c
@@ -82,7 +82,7 @@ static int xio3130_upstream_initfn(PCIDevice *d)
     }
     pcie_cap_flr_init(d);
     pcie_cap_deverr_init(d);
-    rc = pcie_aer_init(d, XIO3130_AER_OFFSET);
+    rc = pcie_aer_init(d, XIO3130_AER_OFFSET, PCI_ERR_SIZEOF);
     if (rc < 0) {
         goto err;
     }
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index a9d9d06..8043020 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -95,12 +95,12 @@ static void aer_log_clear_all_err(PCIEAERLog *aer_log)
     aer_log->log_num = 0;
 }
 
-int pcie_aer_init(PCIDevice *dev, uint16_t offset)
+int pcie_aer_init(PCIDevice *dev, uint16_t offset, uint16_t size)
 {
     PCIExpressDevice *exp;
 
     pcie_add_capability(dev, PCI_EXT_CAP_ID_ERR, PCI_ERR_VER,
-                        offset, PCI_ERR_SIZEOF);
+                        offset, size);
     exp = &dev->exp;
     exp->aer_cap = offset;
 
diff --git a/include/hw/pci/pcie_aer.h b/include/hw/pci/pcie_aer.h
index 2fb8388..156acb0 100644
--- a/include/hw/pci/pcie_aer.h
+++ b/include/hw/pci/pcie_aer.h
@@ -87,7 +87,7 @@ struct PCIEAERErr {
 
 extern const VMStateDescription vmstate_pcie_aer_log;
 
-int pcie_aer_init(PCIDevice *dev, uint16_t offset);
+int pcie_aer_init(PCIDevice *dev, uint16_t offset, uint16_t size);
 void pcie_aer_exit(PCIDevice *dev);
 void pcie_aer_write_config(PCIDevice *dev,
                            uint32_t addr, uint32_t val, int len);
-- 
1.9.3

[Qemu-devel] [PATCH 4/4] pcie_aer: expose pcie_aer_msg() interface

[Cao jin]

From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>

For vfio device, we need to propagate the aer error to
Guest OS. we use the pcie_aer_msg() to send aer error
to guest.

Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
---
 hw/pci/pcie_aer.c         | 2 +-
 include/hw/pci/pcie_aer.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 8043020..e2d4e68 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -371,7 +371,7 @@ static void pcie_aer_msg_root_port(PCIDevice *dev, const PCIEAERMsg *msg)
  *
  * Walk up the bus tree from the device, propagate the error message.
  */
-static void pcie_aer_msg(PCIDevice *dev, const PCIEAERMsg *msg)
+void pcie_aer_msg(PCIDevice *dev, const PCIEAERMsg *msg)
 {
     uint8_t type;
 
diff --git a/include/hw/pci/pcie_aer.h b/include/hw/pci/pcie_aer.h
index 156acb0..c2ee4e2 100644
--- a/include/hw/pci/pcie_aer.h
+++ b/include/hw/pci/pcie_aer.h
@@ -102,5 +102,6 @@ void pcie_aer_root_write_config(PCIDevice *dev,
 
 /* error injection */
 int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err);
+void pcie_aer_msg(PCIDevice *dev, const PCIEAERMsg *msg);
 
 #endif /* QEMU_PCIE_AER_H */
-- 
1.9.3

Re: [Qemu-devel] [PATCH 2/4] vfio: make the 4 bytes aligned for capability size

[Michael S. Tsirkin]

On Thu, Feb 04, 2016 at 09:31:06AM +0800, Cao jin wrote:
> From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
> 
> this function search the capability from the end, the last
> size should 0x100 - pos, not 0xff - pos.
> 
> Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>

Reviewed-by: Michael S. Tsirkin <mst@redhat.com>

> ---
>  hw/vfio/pci.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
> index 49f3d2d..e671506 100644
> --- a/hw/vfio/pci.c
> +++ b/hw/vfio/pci.c
> @@ -1505,7 +1505,8 @@ static void vfio_unmap_bars(VFIOPCIDevice *vdev)
>   */
>  static uint8_t vfio_std_cap_max_size(PCIDevice *pdev, uint8_t pos)
>  {
> -    uint8_t tmp, next = 0xff;
> +    uint8_t tmp;
> +    uint16_t next = PCI_CONFIG_SPACE_SIZE;
>  
>      for (tmp = pdev->config[PCI_CAPABILITY_LIST]; tmp;
>           tmp = pdev->config[tmp + 1]) {
> -- 
> 1.9.3
> 
> 

Re: [Qemu-devel] [PATCH 0/4] vfio-pci: pass the aer error to guest, part1

[Michael S. Tsirkin]

On Thu, Feb 04, 2016 at 09:31:04AM +0800, Cao jin wrote:
> From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
> 
> this patchset are splited out from my aer series patches,
> this part of aer patches is harmless, and have been reviewed-by.
> In order to avoid blocking it to merge, so I send it out independently
> as part1. the part2 is under discussion. Thanks

I acked the remaining patch.
Alex, will you take it?

> Chen Fan (4):
>   pcie: modify the capability size assert
>   vfio: make the 4 bytes aligned for capability size
>   aer: impove pcie_aer_init to support vfio device
>   pcie_aer: expose pcie_aer_msg() interface
> 
>  hw/pci-bridge/ioh3420.c            | 2 +-
>  hw/pci-bridge/xio3130_downstream.c | 2 +-
>  hw/pci-bridge/xio3130_upstream.c   | 2 +-
>  hw/pci/pcie.c                      | 2 +-
>  hw/pci/pcie_aer.c                  | 6 +++---
>  hw/vfio/pci.c                      | 3 ++-
>  include/hw/pci/pcie_aer.h          | 3 ++-
>  7 files changed, 11 insertions(+), 9 deletions(-)
> 
> -- 
> 1.9.3
> 
> 

Re: [Qemu-devel] [PATCH 0/4] vfio-pci: pass the aer error to guest, part1

[Alex Williamson]

On Thu, 4 Feb 2016 13:28:53 +0200
"Michael S. Tsirkin" <mst@redhat.com> wrote:

> On Thu, Feb 04, 2016 at 09:31:04AM +0800, Cao jin wrote:
> > From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
> > 
> > this patchset are splited out from my aer series patches,
> > this part of aer patches is harmless, and have been reviewed-by.
> > In order to avoid blocking it to merge, so I send it out
> > independently as part1. the part2 is under discussion. Thanks  
> 
> I acked the remaining patch.
> Alex, will you take it?

If that's what you prefer, yes.  Thanks,

Alex

> > Chen Fan (4):
> >   pcie: modify the capability size assert
> >   vfio: make the 4 bytes aligned for capability size
> >   aer: impove pcie_aer_init to support vfio device
> >   pcie_aer: expose pcie_aer_msg() interface
> > 
> >  hw/pci-bridge/ioh3420.c            | 2 +-
> >  hw/pci-bridge/xio3130_downstream.c | 2 +-
> >  hw/pci-bridge/xio3130_upstream.c   | 2 +-
> >  hw/pci/pcie.c                      | 2 +-
> >  hw/pci/pcie_aer.c                  | 6 +++---
> >  hw/vfio/pci.c                      | 3 ++-
> >  include/hw/pci/pcie_aer.h          | 3 ++-
> >  7 files changed, 11 insertions(+), 9 deletions(-)
> > 
> > -- 
> > 1.9.3
> > 
> >