Fw: Getting an early start on C++ standards issues...

* Fw: Getting an early start on C++ standards issues...
@ 2016-02-26 14:50 Paul E. McKenney
  2016-02-26 15:22 ` Will Deacon
  0 siblings, 1 reply; 3+ messages in thread
From: Paul E. McKenney @ 2016-02-26 14:50 UTC (permalink / raw)
  To: will.deacon, ralf, tony.luck, fenghua.yu; +Cc: linux-arch

Hello!

Do ARM, MIPS, and IA64 data/address/control dependencies apply to loads
and stores from vector instructions?  The use case appears to be that the
dependency chain is headed by a normal load instruction, and a dependency
to a later vector load/store is desired.

Any other weakly ordered architectures with vector instructions?

							Thanx, Paul

Original query from Torvald Riegel and Richard Biener:

> > I'm not sure I understand you correctly.  Do you have a brief example,
> > perhaps?  For mo_consume and its data dependencies, if there might be a
> > dependence, the compiler would have to preserve it; but I guess that
> > both a vectorized loop an one that accessses each element separately
> > would preserve dependences because it's doing those accesses, and they
> > depend on the input data.
> > OTOH, peraps HW vector instructions don't get the ordering guarantees
> > from data dependences -- Paul, do you know of any such cases?
> 
> A brief example would be for
> 
>  void foo (int *a, int *b, int n)
> {
>   for (int i = 0; i < n; ++i)
>    a[i] = b[i];
> }
> 
> which we can vectorize like
> 
>   if (a + n < b || b + n < a)
>    {
>       vectorized loop
>    }
>   else
>     {
>        not vectorized loop
>     }
> 
> note how we're not establishing equivalences between pointers but
> non-dependence vs. possible dependence.

^ permalink raw reply	[flat|nested] 3+ messages in thread