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* [PATCH] drm/i915: Add delay on DPCD reads
@ 2016-03-15 11:38 Mika Kahola
  2016-03-15 11:58 ` ✗ Fi.CI.BAT: failure for " Patchwork
  2016-03-15 13:26 ` [PATCH] " Daniel Vetter
  0 siblings, 2 replies; 4+ messages in thread
From: Mika Kahola @ 2016-03-15 11:38 UTC (permalink / raw)
  To: intel-gfx

Additional 50 ms delay is needed between DPCD reads on HP Bizlink 1326
DP to VGA adapter. Having said that, I haven't noticed a need for
additional delay between DPCD reads on other DP-VGA dongles.

While at it, let's replace mdelay() with usleep_range() routine.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0e326e7..ff3883c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3125,9 +3125,11 @@ intel_dp_dpcd_read_wake(struct drm_dp_aux *aux, unsigned int offset,
 
 	for (i = 0; i < 3; i++) {
 		ret = drm_dp_dpcd_read(aux, offset, buffer, size);
-		if (ret == size)
+		if (ret == size) {
+			usleep_range(50000, 50100);
 			return ret;
-		msleep(1);
+		}
+		usleep_range(1000, 1100);
 	}
 
 	return ret;
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915: Add delay on DPCD reads
  2016-03-15 11:38 [PATCH] drm/i915: Add delay on DPCD reads Mika Kahola
@ 2016-03-15 11:58 ` Patchwork
  2016-03-15 13:26 ` [PATCH] " Daniel Vetter
  1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2016-03-15 11:58 UTC (permalink / raw)
  To: Mika Kahola; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Add delay on DPCD reads
URL   : https://patchwork.freedesktop.org/series/4462/
State : failure

== Summary ==

Series 4462v1 drm/i915: Add delay on DPCD reads
http://patchwork.freedesktop.org/api/1.0/series/4462/revisions/1/mbox/

Test drv_module_reload_basic:
                skip       -> PASS       (hsw-brixbox)
Test gem_exec_basic:
        Subgroup gtt-render:
                dmesg-warn -> PASS       (bsw-nuc-2)
Test gem_mmap_gtt:
        Subgroup basic-write-read-distinct:
                pass       -> DMESG-WARN (bsw-nuc-2)
Test gem_ringfill:
        Subgroup basic-default-s3:
                pass       -> DMESG-WARN (skl-nuci5)
Test gem_storedw_loop:
        Subgroup basic-default:
                pass       -> DMESG-WARN (skl-nuci5)
Test kms_flip:
        Subgroup basic-flip-vs-dpms:
                pass       -> DMESG-WARN (skl-nuci5)
                dmesg-warn -> PASS       (hsw-brixbox)
Test kms_force_connector_basic:
        Subgroup prune-stale-modes:
                pass       -> SKIP       (ivb-t430s)
Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-b:
                dmesg-warn -> PASS       (hsw-gt2)
Test pm_rpm:
        Subgroup basic-pci-d3-state:
                pass       -> DMESG-WARN (skl-nuci5)
        Subgroup basic-rte:
                pass       -> DMESG-WARN (hsw-brixbox)

bdw-nuci7        total:194  pass:182  dwarn:0   dfail:0   fail:0   skip:12 
bdw-ultra        total:194  pass:172  dwarn:1   dfail:0   fail:0   skip:21 
bsw-nuc-2        total:194  pass:156  dwarn:1   dfail:0   fail:0   skip:37 
byt-nuc          total:194  pass:155  dwarn:4   dfail:0   fail:0   skip:35 
hsw-brixbox      total:194  pass:171  dwarn:1   dfail:0   fail:0   skip:22 
hsw-gt2          total:194  pass:177  dwarn:0   dfail:0   fail:0   skip:17 
ivb-t430s        total:194  pass:168  dwarn:0   dfail:0   fail:0   skip:26 
skl-i5k-2        total:194  pass:171  dwarn:0   dfail:0   fail:0   skip:23 
skl-i7k-2        total:194  pass:171  dwarn:0   dfail:0   fail:0   skip:23 
skl-nuci5        total:194  pass:179  dwarn:4   dfail:0   fail:0   skip:11 
snb-dellxps      total:194  pass:159  dwarn:1   dfail:0   fail:0   skip:34 
snb-x220t        total:194  pass:159  dwarn:1   dfail:1   fail:0   skip:33 

Results at /archive/results/CI_IGT_test/Patchwork_1601/

3e5ecc8c5ff80cb1fb635ce1cf16b7cd4cfb1979 drm-intel-nightly: 2016y-03m-14d-09h-06m-00s UTC integration manifest
e27d236d26c47ce33af053d63391704c3a6a1311 drm/i915: Add delay on DPCD reads

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Add delay on DPCD reads
  2016-03-15 11:38 [PATCH] drm/i915: Add delay on DPCD reads Mika Kahola
  2016-03-15 11:58 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2016-03-15 13:26 ` Daniel Vetter
  2016-03-16  7:43   ` Mika Kahola
  1 sibling, 1 reply; 4+ messages in thread
From: Daniel Vetter @ 2016-03-15 13:26 UTC (permalink / raw)
  To: Mika Kahola; +Cc: intel-gfx

On Tue, Mar 15, 2016 at 01:38:58PM +0200, Mika Kahola wrote:
> Additional 50 ms delay is needed between DPCD reads on HP Bizlink 1326
> DP to VGA adapter. Having said that, I haven't noticed a need for
> additional delay between DPCD reads on other DP-VGA dongles.
> 
> While at it, let's replace mdelay() with usleep_range() routine.
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Please don't add more hacks to our own private copy of read_wake. This
stuff needs to move into drm core, since really we can't be the only ones
who try to plug in shit dongles ;-)

Would be great to test this with an amd DP card and the exact same
connector and see what happens. Then move these read_wake hacks into the
drm_dp_dpcd_read function. Lyude is also working on something like this,
but for DP MST hubs.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 0e326e7..ff3883c 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3125,9 +3125,11 @@ intel_dp_dpcd_read_wake(struct drm_dp_aux *aux, unsigned int offset,
>  
>  	for (i = 0; i < 3; i++) {
>  		ret = drm_dp_dpcd_read(aux, offset, buffer, size);
> -		if (ret == size)
> +		if (ret == size) {
> +			usleep_range(50000, 50100);
>  			return ret;
> -		msleep(1);
> +		}
> +		usleep_range(1000, 1100);
>  	}
>  
>  	return ret;
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Add delay on DPCD reads
  2016-03-15 13:26 ` [PATCH] " Daniel Vetter
@ 2016-03-16  7:43   ` Mika Kahola
  0 siblings, 0 replies; 4+ messages in thread
From: Mika Kahola @ 2016-03-16  7:43 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: intel-gfx

On Tue, 2016-03-15 at 14:26 +0100, Daniel Vetter wrote:
> On Tue, Mar 15, 2016 at 01:38:58PM +0200, Mika Kahola wrote:
> > Additional 50 ms delay is needed between DPCD reads on HP Bizlink 1326
> > DP to VGA adapter. Having said that, I haven't noticed a need for
> > additional delay between DPCD reads on other DP-VGA dongles.
> > 
> > While at it, let's replace mdelay() with usleep_range() routine.
> > 
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> 
> Please don't add more hacks to our own private copy of read_wake. This
> stuff needs to move into drm core, since really we can't be the only ones
> who try to plug in shit dongles ;-)
> 
> Would be great to test this with an amd DP card and the exact same
> connector and see what happens. Then move these read_wake hacks into the
> drm_dp_dpcd_read function. Lyude is also working on something like this,
> but for DP MST hubs.

This particular DP-VGA dongle has been problematic. I have used Windows
to benchmark the performance. It takes eternity to light up the display
on Windows but the eventually the driver is able to do that.

You're right, perhaps the best place for this sort of hacks is the drm
core. 

Cheers,
Mika
 
> -Daniel
> 
> > ---
> >  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 0e326e7..ff3883c 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -3125,9 +3125,11 @@ intel_dp_dpcd_read_wake(struct drm_dp_aux *aux, unsigned int offset,
> >  
> >  	for (i = 0; i < 3; i++) {
> >  		ret = drm_dp_dpcd_read(aux, offset, buffer, size);
> > -		if (ret == size)
> > +		if (ret == size) {
> > +			usleep_range(50000, 50100);
> >  			return ret;
> > -		msleep(1);
> > +		}
> > +		usleep_range(1000, 1100);
> >  	}
> >  
> >  	return ret;
> > -- 
> > 1.9.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-03-16  7:44 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-03-15 11:38 [PATCH] drm/i915: Add delay on DPCD reads Mika Kahola
2016-03-15 11:58 ` ✗ Fi.CI.BAT: failure for " Patchwork
2016-03-15 13:26 ` [PATCH] " Daniel Vetter
2016-03-16  7:43   ` Mika Kahola

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