* [Qemu-devel] [PATCHv2 0/3] target-ppc: Clean up handling of SDR1 and external HPTs
@ 2016-03-07 2:26 David Gibson
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions David Gibson
` (2 more replies)
0 siblings, 3 replies; 21+ messages in thread
From: David Gibson @ 2016-03-07 2:26 UTC (permalink / raw)
To: gkurz, aik; +Cc: lvivier, thuth, agraf, qemu-devel, qemu-ppc, David Gibson
These patches cleans up handling of SDR1 (master page table pointer
register for Power) and related cases with an external (i.e. managed
by qemu or KVM, rather than the guest) hash page table (HPT).
I wouldn't push 1/3 or 2/3 on their own after the soft freeze, except
that they simplify 3/3, which fixes a real regression.
Changes since v1:
* Split out SREGS getters/putters instead of creating a special one just for SDR1
David Gibson (3):
target-ppc: Split out SREGS get/put functions
target-ppc: Add helpers for updating a CPU's SDR1 and external HPT
target-ppc: Eliminate kvmppc_kern_htab global
hw/ppc/spapr.c | 16 +-
hw/ppc/spapr_hcall.c | 10 +-
target-ppc/kvm.c | 421 ++++++++++++++++++++++++++----------------------
target-ppc/kvm_ppc.h | 6 +
target-ppc/mmu-hash64.c | 81 +++++++---
target-ppc/mmu-hash64.h | 11 +-
target-ppc/mmu_helper.c | 13 +-
7 files changed, 315 insertions(+), 243 deletions(-)
--
2.5.0
^ permalink raw reply [flat|nested] 21+ messages in thread
* [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions
2016-03-07 2:26 [Qemu-devel] [PATCHv2 0/3] target-ppc: Clean up handling of SDR1 and external HPTs David Gibson
@ 2016-03-07 2:26 ` David Gibson
2016-03-07 11:22 ` Thomas Huth
2016-03-08 0:37 ` David Gibson
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT David Gibson
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 3/3] target-ppc: Eliminate kvmppc_kern_htab global David Gibson
2 siblings, 2 replies; 21+ messages in thread
From: David Gibson @ 2016-03-07 2:26 UTC (permalink / raw)
To: gkurz, aik; +Cc: lvivier, thuth, agraf, qemu-devel, qemu-ppc, David Gibson
Currently the getting and setting of Power MMU registers (sregs) take up
large inline chunks of the kvm_arch_get_registers() and
kvm_arch_put_registers() functions. Especially since there are two
variants (for Book-E and Book-S CPUs), only one of which will be used in
practice, this is pretty hard to read.
This patch splits these out into helper functions for clarity. No
functional change is expected.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target-ppc/kvm.c | 421 ++++++++++++++++++++++++++++++-------------------------
1 file changed, 228 insertions(+), 193 deletions(-)
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index d67c169..8a762e8 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -867,6 +867,44 @@ static int kvm_put_vpa(CPUState *cs)
}
#endif /* TARGET_PPC64 */
+static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
+{
+ CPUPPCState *env = &cpu->env;
+ struct kvm_sregs sregs;
+ int i;
+
+ sregs.pvr = env->spr[SPR_PVR];
+
+ sregs.u.s.sdr1 = env->spr[SPR_SDR1];
+
+ /* Sync SLB */
+#ifdef TARGET_PPC64
+ for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
+ sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
+ if (env->slb[i].esid & SLB_ESID_V) {
+ sregs.u.s.ppc64.slb[i].slbe |= i;
+ }
+ sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
+ }
+#endif
+
+ /* Sync SRs */
+ for (i = 0; i < 16; i++) {
+ sregs.u.s.ppc32.sr[i] = env->sr[i];
+ }
+
+ /* Sync BATs */
+ for (i = 0; i < 8; i++) {
+ /* Beware. We have to swap upper and lower bits here */
+ sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
+ | env->DBAT[1][i];
+ sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
+ | env->IBAT[1][i];
+ }
+
+ return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs);
+}
+
int kvm_arch_put_registers(CPUState *cs, int level)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
@@ -920,39 +958,8 @@ int kvm_arch_put_registers(CPUState *cs, int level)
}
if (cap_segstate && (level >= KVM_PUT_RESET_STATE)) {
- struct kvm_sregs sregs;
-
- sregs.pvr = env->spr[SPR_PVR];
-
- sregs.u.s.sdr1 = env->spr[SPR_SDR1];
-
- /* Sync SLB */
-#ifdef TARGET_PPC64
- for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
- sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
- if (env->slb[i].esid & SLB_ESID_V) {
- sregs.u.s.ppc64.slb[i].slbe |= i;
- }
- sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
- }
-#endif
-
- /* Sync SRs */
- for (i = 0; i < 16; i++) {
- sregs.u.s.ppc32.sr[i] = env->sr[i];
- }
-
- /* Sync BATs */
- for (i = 0; i < 8; i++) {
- /* Beware. We have to swap upper and lower bits here */
- sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
- | env->DBAT[1][i];
- sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
- | env->IBAT[1][i];
- }
-
- ret = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs);
- if (ret) {
+ ret = kvmppc_put_books_sregs(cpu);
+ if (ret < 0) {
return ret;
}
}
@@ -1014,12 +1021,197 @@ static void kvm_sync_excp(CPUPPCState *env, int vector, int ivor)
env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR];
}
+static int kvmppc_get_booke_sregs(PowerPCCPU *cpu)
+{
+ CPUPPCState *env = &cpu->env;
+ struct kvm_sregs sregs;
+ int ret;
+
+ ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
+ if (ret < 0) {
+ return ret;
+ }
+
+ if (sregs.u.e.features & KVM_SREGS_E_BASE) {
+ env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
+ env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
+ env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
+ env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
+ env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
+ env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
+ env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
+ env->spr[SPR_DECR] = sregs.u.e.dec;
+ env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
+ env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
+ env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
+ }
+
+ if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
+ env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
+ env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
+ env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
+ env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
+ env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
+ }
+
+ if (sregs.u.e.features & KVM_SREGS_E_64) {
+ env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
+ }
+
+ if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
+ env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
+ }
+
+ if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
+ env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
+ kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
+ env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
+ kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
+ env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
+ kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
+ env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
+ kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
+ env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
+ kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
+ env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
+ kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
+ env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
+ kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
+ env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
+ kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
+ env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
+ kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
+ env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
+ kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
+ env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
+ kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
+ env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
+ kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
+ env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
+ kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
+ env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
+ kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
+ env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
+ kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
+ env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
+ kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
+
+ if (sregs.u.e.features & KVM_SREGS_E_SPE) {
+ env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
+ kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
+ env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
+ kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
+ env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
+ kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
+ }
+
+ if (sregs.u.e.features & KVM_SREGS_E_PM) {
+ env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
+ kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
+ }
+
+ if (sregs.u.e.features & KVM_SREGS_E_PC) {
+ env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
+ kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
+ env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
+ kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
+ }
+ }
+
+ if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
+ env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
+ env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
+ env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
+ env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
+ env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
+ env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
+ env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
+ env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
+ env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
+ env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
+ }
+
+ if (sregs.u.e.features & KVM_SREGS_EXP) {
+ env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
+ }
+
+ if (sregs.u.e.features & KVM_SREGS_E_PD) {
+ env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
+ env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
+ }
+
+ if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
+ env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
+ env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
+ env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
+
+ if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
+ env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
+ env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
+ }
+ }
+
+ return 0;
+}
+
+static int kvmppc_get_books_sregs(PowerPCCPU *cpu)
+{
+ CPUPPCState *env = &cpu->env;
+ struct kvm_sregs sregs;
+ int ret;
+ int i;
+
+ ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
+ if (ret < 0) {
+ return ret;
+ }
+
+ if (!env->external_htab) {
+ ppc_store_sdr1(env, sregs.u.s.sdr1);
+ }
+
+ /* Sync SLB */
+#ifdef TARGET_PPC64
+ /*
+ * The packed SLB array we get from KVM_GET_SREGS only contains
+ * information about valid entries. So we flush our internal copy
+ * to get rid of stale ones, then put all valid SLB entries back
+ * in.
+ */
+ memset(env->slb, 0, sizeof(env->slb));
+ for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
+ target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
+ target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
+ /*
+ * Only restore valid entries
+ */
+ if (rb & SLB_ESID_V) {
+ ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
+ }
+ }
+#endif
+
+ /* Sync SRs */
+ for (i = 0; i < 16; i++) {
+ env->sr[i] = sregs.u.s.ppc32.sr[i];
+ }
+
+ /* Sync BATs */
+ for (i = 0; i < 8; i++) {
+ env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
+ env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
+ env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
+ env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
+ }
+
+ return 0;
+}
+
int kvm_arch_get_registers(CPUState *cs)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
struct kvm_regs regs;
- struct kvm_sregs sregs;
uint32_t cr;
int i, ret;
@@ -1059,174 +1251,17 @@ int kvm_arch_get_registers(CPUState *cs)
kvm_get_fp(cs);
if (cap_booke_sregs) {
- ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
+ ret = kvmppc_get_booke_sregs(cpu);
if (ret < 0) {
return ret;
}
-
- if (sregs.u.e.features & KVM_SREGS_E_BASE) {
- env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
- env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
- env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
- env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
- env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
- env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
- env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
- env->spr[SPR_DECR] = sregs.u.e.dec;
- env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
- env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
- env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
- }
-
- if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
- env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
- env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
- env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
- env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
- env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
- }
-
- if (sregs.u.e.features & KVM_SREGS_E_64) {
- env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
- }
-
- if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
- env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
- }
-
- if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
- env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
- kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
- env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
- kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
- env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
- kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
- env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
- kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
- env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
- kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
- env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
- kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
- env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
- kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
- env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
- kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
- env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
- kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
- env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
- kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
- env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
- kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
- env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
- kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
- env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
- kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
- env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
- kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
- env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
- kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
- env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
- kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
-
- if (sregs.u.e.features & KVM_SREGS_E_SPE) {
- env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
- kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
- env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
- kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
- env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
- kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
- }
-
- if (sregs.u.e.features & KVM_SREGS_E_PM) {
- env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
- kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
- }
-
- if (sregs.u.e.features & KVM_SREGS_E_PC) {
- env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
- kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
- env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
- kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
- }
- }
-
- if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
- env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
- env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
- env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
- env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
- env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
- env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
- env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
- env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
- env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
- env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
- }
-
- if (sregs.u.e.features & KVM_SREGS_EXP) {
- env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
- }
-
- if (sregs.u.e.features & KVM_SREGS_E_PD) {
- env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
- env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
- }
-
- if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
- env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
- env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
- env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
-
- if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
- env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
- env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
- }
- }
}
if (cap_segstate) {
- ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
+ ret = kvmppc_get_books_sregs(cpu);
if (ret < 0) {
return ret;
}
-
- if (!env->external_htab) {
- ppc_store_sdr1(env, sregs.u.s.sdr1);
- }
-
- /* Sync SLB */
-#ifdef TARGET_PPC64
- /*
- * The packed SLB array we get from KVM_GET_SREGS only contains
- * information about valid entries. So we flush our internal
- * copy to get rid of stale ones, then put all valid SLB entries
- * back in.
- */
- memset(env->slb, 0, sizeof(env->slb));
- for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
- target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
- target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
- /*
- * Only restore valid entries
- */
- if (rb & SLB_ESID_V) {
- ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
- }
- }
-#endif
-
- /* Sync SRs */
- for (i = 0; i < 16; i++) {
- env->sr[i] = sregs.u.s.ppc32.sr[i];
- }
-
- /* Sync BATs */
- for (i = 0; i < 8; i++) {
- env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
- env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
- env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
- env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
- }
}
if (cap_hior) {
--
2.5.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT
2016-03-07 2:26 [Qemu-devel] [PATCHv2 0/3] target-ppc: Clean up handling of SDR1 and external HPTs David Gibson
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions David Gibson
@ 2016-03-07 2:26 ` David Gibson
2016-03-07 13:37 ` Greg Kurz
` (2 more replies)
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 3/3] target-ppc: Eliminate kvmppc_kern_htab global David Gibson
2 siblings, 3 replies; 21+ messages in thread
From: David Gibson @ 2016-03-07 2:26 UTC (permalink / raw)
To: gkurz, aik; +Cc: lvivier, thuth, agraf, qemu-devel, qemu-ppc, David Gibson
When a Power cpu with 64-bit hash MMU has it's hash page table (HPT)
pointer updated by a write to the SDR1 register we need to update some
derived variables. Likewise, when the cpu is configured for an external
HPT (one not in the guest memory space) some derived variables need to be
updated.
Currently the logic for this is (partially) duplicated in ppc_store_sdr1()
and in spapr_cpu_reset(). In future we're going to need it in some other
places, so make some common helpers for this update.
In addition the new ppc_hash64_set_external_hpt() helper also updates
SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU
synchronization. In a sense this belongs logically in the
ppc_hash64_set_sdr1() helper, but that is called from
kvm_arch_get_registers() so can't itself call cpu_synchronize_state()
without infinite recursion. In practice this doesn't matter because
the only other caller is TCG specific.
Currently there aren't situations where updating SDR1 at runtime in KVM
matters, but there are going to be in future.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/spapr.c | 13 ++-----------
target-ppc/kvm.c | 2 +-
target-ppc/kvm_ppc.h | 6 ++++++
target-ppc/mmu-hash64.c | 43 +++++++++++++++++++++++++++++++++++++++++++
target-ppc/mmu-hash64.h | 6 ++++++
target-ppc/mmu_helper.c | 13 ++++++-------
6 files changed, 64 insertions(+), 19 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 64c4acc..72a018b 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1196,17 +1196,8 @@ static void spapr_cpu_reset(void *opaque)
env->spr[SPR_HIOR] = 0;
- env->external_htab = (uint8_t *)spapr->htab;
- env->htab_base = -1;
- /*
- * htab_mask is the mask used to normalize hash value to PTEG index.
- * htab_shift is log2 of hash table size.
- * We have 8 hpte per group, and each hpte is 16 bytes.
- * ie have 128 bytes per hpte entry.
- */
- env->htab_mask = (1ULL << (spapr->htab_shift - 7)) - 1;
- env->spr[SPR_SDR1] = (target_ulong)(uintptr_t)spapr->htab |
- (spapr->htab_shift - 18);
+ ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
+ &error_fatal);
}
static void spapr_create_nvram(sPAPRMachineState *spapr)
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 8a762e8..380dff6 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -867,7 +867,7 @@ static int kvm_put_vpa(CPUState *cs)
}
#endif /* TARGET_PPC64 */
-static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
+int kvmppc_put_books_sregs(PowerPCCPU *cpu)
{
CPUPPCState *env = &cpu->env;
struct kvm_sregs sregs;
diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
index fd64c44..fc79312 100644
--- a/target-ppc/kvm_ppc.h
+++ b/target-ppc/kvm_ppc.h
@@ -55,6 +55,7 @@ void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,
target_ulong pte0, target_ulong pte1);
bool kvmppc_has_cap_fixup_hcalls(void);
int kvmppc_enable_hwrng(void);
+int kvmppc_put_books_sregs(PowerPCCPU *cpu);
#else
@@ -246,6 +247,11 @@ static inline int kvmppc_enable_hwrng(void)
{
return -1;
}
+
+static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
+{
+ abort();
+}
#endif
#ifndef CONFIG_KVM
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 9c58fbf..7b5200b 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -258,6 +258,49 @@ target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb)
/*
* 64-bit hash table MMU handling
*/
+void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
+ Error **errp)
+{
+ CPUPPCState *env = &cpu->env;
+ target_ulong htabsize = value & SDR_64_HTABSIZE;
+
+ env->spr[SPR_SDR1] = value;
+ if (htabsize > 28) {
+ error_setg(errp,
+ "Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1",
+ htabsize);
+ htabsize = 28;
+ }
+ env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
+ env->htab_base = value & SDR_64_HTABORG;
+}
+
+void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
+ Error **errp)
+{
+ CPUPPCState *env = &cpu->env;
+ Error *local_err = NULL;
+
+ cpu_synchronize_state(CPU(cpu));
+
+ env->external_htab = hpt;
+ ppc_hash64_set_sdr1(cpu, (target_ulong)(uintptr_t)hpt | (shift - 18),
+ &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
+
+ /* Not strictly necessary, but makes it clearer that an external
+ * htab is in use when debugging */
+ env->htab_base = -1;
+
+ if (kvm_enabled()) {
+ if (kvmppc_put_books_sregs(cpu) < 0) {
+ error_setg(errp, "Unable to update SDR1 in KVM");
+ }
+ }
+}
static int ppc_hash64_pte_prot(PowerPCCPU *cpu,
ppc_slb_t *slb, ppc_hash_pte64_t pte)
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index e7d9925..138cd7e 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -92,6 +92,12 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
extern bool kvmppc_kern_htab;
+
+void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
+ Error **errp);
+void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
+ Error **errp);
+
uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index);
void ppc_hash64_stop_access(uint64_t token);
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index e5ec8d6..fcb2cc5 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -2005,15 +2005,14 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value)
env->spr[SPR_SDR1] = value;
#if defined(TARGET_PPC64)
if (env->mmu_model & POWERPC_MMU_64) {
- target_ulong htabsize = value & SDR_64_HTABSIZE;
+ PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ Error *local_err = NULL;
- if (htabsize > 28) {
- fprintf(stderr, "Invalid HTABSIZE 0x" TARGET_FMT_lx
- " stored in SDR1\n", htabsize);
- htabsize = 28;
+ ppc_hash64_set_sdr1(cpu, value, &local_err);
+ if (local_err) {
+ error_report_err(local_err);
+ error_free(local_err);
}
- env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
- env->htab_base = value & SDR_64_HTABORG;
} else
#endif /* defined(TARGET_PPC64) */
{
--
2.5.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Qemu-devel] [PATCHv2 3/3] target-ppc: Eliminate kvmppc_kern_htab global
2016-03-07 2:26 [Qemu-devel] [PATCHv2 0/3] target-ppc: Clean up handling of SDR1 and external HPTs David Gibson
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions David Gibson
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT David Gibson
@ 2016-03-07 2:26 ` David Gibson
2016-03-07 13:41 ` Greg Kurz
2 siblings, 1 reply; 21+ messages in thread
From: David Gibson @ 2016-03-07 2:26 UTC (permalink / raw)
To: gkurz, aik; +Cc: lvivier, thuth, agraf, qemu-devel, qemu-ppc, David Gibson
fa48b43 "target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVM"
purports to remove a hack in the handling of hash page tables (HPTs)
managed by KVM instead of qemu. However, it actually went in the wrong
direction.
That patch requires anything looking for an external HPT (that is one not
managed by the guest itself) to check both env->external_htab (for a qemu
managed HPT) and kvmppc_kern_htab (for a KVM managed HPT). That's a
problem because kvmppc_kern_htab is local to mmu-hash64.c, but some places
which need to check for an external HPT are outside that, such as
kvm_arch_get_registers(). The latter was subtly broken by the earlier
patch such that gdbstub can no longer access memory.
Basically a KVM managed HPT is much more like a qemu managed HPT than it is
like a guest managed HPT, so the original "hack" was actually on the right
track.
This partially reverts fa48b43, so we again mark a KVM managed external HPT
by putting a special but non-NULL value in env->external_htab. It then
goes further, using that marker to eliminate the kvmppc_kern_htab global
entirely. The ppc_hash64_set_external_hpt() helper function is extended
to set that marker if passed a NULL value (if you're setting an external
HPT, but don't have an actual HPT to set, the assumption is that it must
be a KVM managed HPT).
This also has some flow-on changes to the HPT access helpers, required by
the above changes.
Reported-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Thomas Huth <thuth@redhat.com>
---
hw/ppc/spapr.c | 3 +--
hw/ppc/spapr_hcall.c | 10 +++++-----
target-ppc/mmu-hash64.c | 40 ++++++++++++++++++----------------------
target-ppc/mmu-hash64.h | 9 +++------
4 files changed, 27 insertions(+), 35 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 72a018b..43708a2 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1091,7 +1091,7 @@ static void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
}
spapr->htab_shift = shift;
- kvmppc_kern_htab = true;
+ spapr->htab = NULL;
} else {
/* kernel-side HPT not needed, allocate in userspace instead */
size_t size = 1ULL << shift;
@@ -1106,7 +1106,6 @@ static void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
memset(spapr->htab, 0, size);
spapr->htab_shift = shift;
- kvmppc_kern_htab = false;
for (i = 0; i < size / HASH_PTE_SIZE_64; i++) {
DIRTY_HPTE(HPTE(spapr->htab, i));
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 1733482..b2b1b93 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -122,17 +122,17 @@ static target_ulong h_enter(PowerPCCPU *cpu, sPAPRMachineState *spapr,
break;
}
}
- ppc_hash64_stop_access(token);
+ ppc_hash64_stop_access(cpu, token);
if (index == 8) {
return H_PTEG_FULL;
}
} else {
token = ppc_hash64_start_access(cpu, pte_index);
if (ppc_hash64_load_hpte0(cpu, token, 0) & HPTE64_V_VALID) {
- ppc_hash64_stop_access(token);
+ ppc_hash64_stop_access(cpu, token);
return H_PTEG_FULL;
}
- ppc_hash64_stop_access(token);
+ ppc_hash64_stop_access(cpu, token);
}
ppc_hash64_store_hpte(cpu, pte_index + index,
@@ -165,7 +165,7 @@ static RemoveResult remove_hpte(PowerPCCPU *cpu, target_ulong ptex,
token = ppc_hash64_start_access(cpu, ptex);
v = ppc_hash64_load_hpte0(cpu, token, 0);
r = ppc_hash64_load_hpte1(cpu, token, 0);
- ppc_hash64_stop_access(token);
+ ppc_hash64_stop_access(cpu, token);
if ((v & HPTE64_V_VALID) == 0 ||
((flags & H_AVPN) && (v & ~0x7fULL) != avpn) ||
@@ -288,7 +288,7 @@ static target_ulong h_protect(PowerPCCPU *cpu, sPAPRMachineState *spapr,
token = ppc_hash64_start_access(cpu, pte_index);
v = ppc_hash64_load_hpte0(cpu, token, 0);
r = ppc_hash64_load_hpte1(cpu, token, 0);
- ppc_hash64_stop_access(token);
+ ppc_hash64_stop_access(cpu, token);
if ((v & HPTE64_V_VALID) == 0 ||
((flags & H_AVPN) && (v & ~0x7fULL) != avpn)) {
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 7b5200b..a9ae0b3 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -36,10 +36,11 @@
#endif
/*
- * Used to indicate whether we have allocated htab in the
- * host kernel
+ * Used to indicate that a CPU has it's hash page table (HPT) managed
+ * within the host kernel
*/
-bool kvmppc_kern_htab;
+#define MMU_HASH64_KVM_MANAGED_HPT ((void *)-1)
+
/*
* SLB handling
*/
@@ -283,7 +284,11 @@ void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
cpu_synchronize_state(CPU(cpu));
- env->external_htab = hpt;
+ if (hpt) {
+ env->external_htab = hpt;
+ } else {
+ env->external_htab = MMU_HASH64_KVM_MANAGED_HPT;
+ }
ppc_hash64_set_sdr1(cpu, (target_ulong)(uintptr_t)hpt | (shift - 18),
&local_err);
if (local_err) {
@@ -396,25 +401,16 @@ uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index)
hwaddr pte_offset;
pte_offset = pte_index * HASH_PTE_SIZE_64;
- if (kvmppc_kern_htab) {
+ if (cpu->env.external_htab == MMU_HASH64_KVM_MANAGED_HPT) {
/*
* HTAB is controlled by KVM. Fetch the PTEG into a new buffer.
*/
token = kvmppc_hash64_read_pteg(cpu, pte_index);
- if (token) {
- return token;
- }
+ } else if (cpu->env.external_htab) {
/*
- * pteg read failed, even though we have allocated htab via
- * kvmppc_reset_htab.
+ * HTAB is controlled by QEMU. Just point to the internally
+ * accessible PTEG.
*/
- return 0;
- }
- /*
- * HTAB is controlled by QEMU. Just point to the internally
- * accessible PTEG.
- */
- if (cpu->env.external_htab) {
token = (uint64_t)(uintptr_t) cpu->env.external_htab + pte_offset;
} else if (cpu->env.htab_base) {
token = cpu->env.htab_base + pte_offset;
@@ -422,9 +418,9 @@ uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index)
return token;
}
-void ppc_hash64_stop_access(uint64_t token)
+void ppc_hash64_stop_access(PowerPCCPU *cpu, uint64_t token)
{
- if (kvmppc_kern_htab) {
+ if (cpu->env.external_htab == MMU_HASH64_KVM_MANAGED_HPT) {
kvmppc_hash64_free_pteg(token);
}
}
@@ -453,11 +449,11 @@ static hwaddr ppc_hash64_pteg_search(PowerPCCPU *cpu, hwaddr hash,
&& HPTE64_V_COMPARE(pte0, ptem)) {
pte->pte0 = pte0;
pte->pte1 = pte1;
- ppc_hash64_stop_access(token);
+ ppc_hash64_stop_access(cpu, token);
return (pte_index + i) * HASH_PTE_SIZE_64;
}
}
- ppc_hash64_stop_access(token);
+ ppc_hash64_stop_access(cpu, token);
/*
* We didn't find a valid entry.
*/
@@ -772,7 +768,7 @@ void ppc_hash64_store_hpte(PowerPCCPU *cpu,
{
CPUPPCState *env = &cpu->env;
- if (kvmppc_kern_htab) {
+ if (env->external_htab == MMU_HASH64_KVM_MANAGED_HPT) {
kvmppc_hash64_write_pte(env, pte_index, pte0, pte1);
return;
}
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index 138cd7e..9bf8b9b 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -90,16 +90,13 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
#define HPTE64_V_1TB_SEG 0x4000000000000000ULL
#define HPTE64_V_VRMA_MASK 0x4001ffffff000000ULL
-
-extern bool kvmppc_kern_htab;
-
void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
Error **errp);
void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
Error **errp);
uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index);
-void ppc_hash64_stop_access(uint64_t token);
+void ppc_hash64_stop_access(PowerPCCPU *cpu, uint64_t token);
static inline target_ulong ppc_hash64_load_hpte0(PowerPCCPU *cpu,
uint64_t token, int index)
@@ -108,7 +105,7 @@ static inline target_ulong ppc_hash64_load_hpte0(PowerPCCPU *cpu,
uint64_t addr;
addr = token + (index * HASH_PTE_SIZE_64);
- if (kvmppc_kern_htab || env->external_htab) {
+ if (env->external_htab) {
return ldq_p((const void *)(uintptr_t)addr);
} else {
return ldq_phys(CPU(cpu)->as, addr);
@@ -122,7 +119,7 @@ static inline target_ulong ppc_hash64_load_hpte1(PowerPCCPU *cpu,
uint64_t addr;
addr = token + (index * HASH_PTE_SIZE_64) + HASH_PTE_SIZE_64/2;
- if (kvmppc_kern_htab || env->external_htab) {
+ if (env->external_htab) {
return ldq_p((const void *)(uintptr_t)addr);
} else {
return ldq_phys(CPU(cpu)->as, addr);
--
2.5.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions David Gibson
@ 2016-03-07 11:22 ` Thomas Huth
2016-03-08 0:32 ` David Gibson
2016-03-08 0:37 ` David Gibson
1 sibling, 1 reply; 21+ messages in thread
From: Thomas Huth @ 2016-03-07 11:22 UTC (permalink / raw)
To: David Gibson, gkurz, aik; +Cc: lvivier, qemu-ppc, agraf, qemu-devel
On 07.03.2016 03:26, David Gibson wrote:
> Currently the getting and setting of Power MMU registers (sregs) take up
> large inline chunks of the kvm_arch_get_registers() and
> kvm_arch_put_registers() functions. Especially since there are two
> variants (for Book-E and Book-S CPUs), only one of which will be used in
> practice, this is pretty hard to read.
>
> This patch splits these out into helper functions for clarity. No
> functional change is expected.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> target-ppc/kvm.c | 421 ++++++++++++++++++++++++++++++-------------------------
> 1 file changed, 228 insertions(+), 193 deletions(-)
>
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index d67c169..8a762e8 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
...
> int kvm_arch_put_registers(CPUState *cs, int level)
> {
> PowerPCCPU *cpu = POWERPC_CPU(cs);
> @@ -920,39 +958,8 @@ int kvm_arch_put_registers(CPUState *cs, int level)
> }
>
> if (cap_segstate && (level >= KVM_PUT_RESET_STATE)) {
> - struct kvm_sregs sregs;
> -
> - sregs.pvr = env->spr[SPR_PVR];
> -
> - sregs.u.s.sdr1 = env->spr[SPR_SDR1];
> -
> - /* Sync SLB */
> -#ifdef TARGET_PPC64
> - for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> - sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> - if (env->slb[i].esid & SLB_ESID_V) {
> - sregs.u.s.ppc64.slb[i].slbe |= i;
> - }
> - sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> - }
> -#endif
> -
> - /* Sync SRs */
> - for (i = 0; i < 16; i++) {
> - sregs.u.s.ppc32.sr[i] = env->sr[i];
> - }
> -
> - /* Sync BATs */
> - for (i = 0; i < 8; i++) {
> - /* Beware. We have to swap upper and lower bits here */
> - sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
> - | env->DBAT[1][i];
> - sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
> - | env->IBAT[1][i];
> - }
> -
> - ret = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs);
> - if (ret) {
> + ret = kvmppc_put_books_sregs(cpu);
> + if (ret < 0) {
> return ret;
> }
Nit: Technically you've changed the check for the return code from
"ret != 0" to "ret < 0", so this is a small functional change. But
practically, it should not matter, since the ioctl is not supposed to
return values > 0, I think.
> }
> @@ -1014,12 +1021,197 @@ static void kvm_sync_excp(CPUPPCState *env, int vector, int ivor)
> env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR];
> }
>
> +static int kvmppc_get_booke_sregs(PowerPCCPU *cpu)
> +{
> + CPUPPCState *env = &cpu->env;
> + struct kvm_sregs sregs;
> + int ret;
...
> +
> + if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
> + env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
> + env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
> + env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
> + env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
> + env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
> + env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
> + env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
> + env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
> + env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
> + env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
> + }
Cosmetical nit: That closing curly bracket should not be indented by 8
spaces, but by 4.
Apart from these two nits, the patch looks good to me, so feel free to
add my "Reviewed-by" once you've fixed add least the cosmetical nit.
Thomas
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT David Gibson
@ 2016-03-07 13:37 ` Greg Kurz
2016-03-07 15:56 ` Thomas Huth
2016-03-22 16:33 ` Laurent Vivier
2 siblings, 0 replies; 21+ messages in thread
From: Greg Kurz @ 2016-03-07 13:37 UTC (permalink / raw)
To: David Gibson; +Cc: lvivier, thuth, aik, agraf, qemu-devel, qemu-ppc
On Mon, 7 Mar 2016 13:26:25 +1100
David Gibson <david@gibson.dropbear.id.au> wrote:
> When a Power cpu with 64-bit hash MMU has it's hash page table (HPT)
> pointer updated by a write to the SDR1 register we need to update some
> derived variables. Likewise, when the cpu is configured for an external
> HPT (one not in the guest memory space) some derived variables need to be
> updated.
>
> Currently the logic for this is (partially) duplicated in ppc_store_sdr1()
> and in spapr_cpu_reset(). In future we're going to need it in some other
> places, so make some common helpers for this update.
>
> In addition the new ppc_hash64_set_external_hpt() helper also updates
> SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU
> synchronization. In a sense this belongs logically in the
> ppc_hash64_set_sdr1() helper, but that is called from
> kvm_arch_get_registers() so can't itself call cpu_synchronize_state()
> without infinite recursion. In practice this doesn't matter because
> the only other caller is TCG specific.
>
> Currently there aren't situations where updating SDR1 at runtime in KVM
> matters, but there are going to be in future.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
> hw/ppc/spapr.c | 13 ++-----------
> target-ppc/kvm.c | 2 +-
> target-ppc/kvm_ppc.h | 6 ++++++
> target-ppc/mmu-hash64.c | 43 +++++++++++++++++++++++++++++++++++++++++++
> target-ppc/mmu-hash64.h | 6 ++++++
> target-ppc/mmu_helper.c | 13 ++++++-------
> 6 files changed, 64 insertions(+), 19 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 64c4acc..72a018b 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -1196,17 +1196,8 @@ static void spapr_cpu_reset(void *opaque)
>
> env->spr[SPR_HIOR] = 0;
>
> - env->external_htab = (uint8_t *)spapr->htab;
> - env->htab_base = -1;
> - /*
> - * htab_mask is the mask used to normalize hash value to PTEG index.
> - * htab_shift is log2 of hash table size.
> - * We have 8 hpte per group, and each hpte is 16 bytes.
> - * ie have 128 bytes per hpte entry.
> - */
> - env->htab_mask = (1ULL << (spapr->htab_shift - 7)) - 1;
> - env->spr[SPR_SDR1] = (target_ulong)(uintptr_t)spapr->htab |
> - (spapr->htab_shift - 18);
> + ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
> + &error_fatal);
> }
>
> static void spapr_create_nvram(sPAPRMachineState *spapr)
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index 8a762e8..380dff6 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -867,7 +867,7 @@ static int kvm_put_vpa(CPUState *cs)
> }
> #endif /* TARGET_PPC64 */
>
> -static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> +int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> {
> CPUPPCState *env = &cpu->env;
> struct kvm_sregs sregs;
> diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
> index fd64c44..fc79312 100644
> --- a/target-ppc/kvm_ppc.h
> +++ b/target-ppc/kvm_ppc.h
> @@ -55,6 +55,7 @@ void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,
> target_ulong pte0, target_ulong pte1);
> bool kvmppc_has_cap_fixup_hcalls(void);
> int kvmppc_enable_hwrng(void);
> +int kvmppc_put_books_sregs(PowerPCCPU *cpu);
>
> #else
>
> @@ -246,6 +247,11 @@ static inline int kvmppc_enable_hwrng(void)
> {
> return -1;
> }
> +
> +static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> +{
> + abort();
> +}
> #endif
>
> #ifndef CONFIG_KVM
> diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
> index 9c58fbf..7b5200b 100644
> --- a/target-ppc/mmu-hash64.c
> +++ b/target-ppc/mmu-hash64.c
> @@ -258,6 +258,49 @@ target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb)
> /*
> * 64-bit hash table MMU handling
> */
> +void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
> + Error **errp)
> +{
> + CPUPPCState *env = &cpu->env;
> + target_ulong htabsize = value & SDR_64_HTABSIZE;
> +
> + env->spr[SPR_SDR1] = value;
> + if (htabsize > 28) {
> + error_setg(errp,
> + "Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1",
> + htabsize);
> + htabsize = 28;
> + }
> + env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
> + env->htab_base = value & SDR_64_HTABORG;
> +}
> +
> +void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
> + Error **errp)
> +{
> + CPUPPCState *env = &cpu->env;
> + Error *local_err = NULL;
> +
> + cpu_synchronize_state(CPU(cpu));
> +
> + env->external_htab = hpt;
> + ppc_hash64_set_sdr1(cpu, (target_ulong)(uintptr_t)hpt | (shift - 18),
> + &local_err);
> + if (local_err) {
> + error_propagate(errp, local_err);
> + return;
> + }
> +
> + /* Not strictly necessary, but makes it clearer that an external
> + * htab is in use when debugging */
> + env->htab_base = -1;
> +
> + if (kvm_enabled()) {
> + if (kvmppc_put_books_sregs(cpu) < 0) {
> + error_setg(errp, "Unable to update SDR1 in KVM");
> + }
> + }
> +}
>
> static int ppc_hash64_pte_prot(PowerPCCPU *cpu,
> ppc_slb_t *slb, ppc_hash_pte64_t pte)
> diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
> index e7d9925..138cd7e 100644
> --- a/target-ppc/mmu-hash64.h
> +++ b/target-ppc/mmu-hash64.h
> @@ -92,6 +92,12 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
>
>
> extern bool kvmppc_kern_htab;
> +
> +void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
> + Error **errp);
> +void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
> + Error **errp);
> +
> uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index);
> void ppc_hash64_stop_access(uint64_t token);
>
> diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
> index e5ec8d6..fcb2cc5 100644
> --- a/target-ppc/mmu_helper.c
> +++ b/target-ppc/mmu_helper.c
> @@ -2005,15 +2005,14 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value)
> env->spr[SPR_SDR1] = value;
> #if defined(TARGET_PPC64)
> if (env->mmu_model & POWERPC_MMU_64) {
> - target_ulong htabsize = value & SDR_64_HTABSIZE;
> + PowerPCCPU *cpu = ppc_env_get_cpu(env);
> + Error *local_err = NULL;
>
> - if (htabsize > 28) {
> - fprintf(stderr, "Invalid HTABSIZE 0x" TARGET_FMT_lx
> - " stored in SDR1\n", htabsize);
> - htabsize = 28;
> + ppc_hash64_set_sdr1(cpu, value, &local_err);
> + if (local_err) {
> + error_report_err(local_err);
> + error_free(local_err);
> }
> - env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
> - env->htab_base = value & SDR_64_HTABORG;
> } else
> #endif /* defined(TARGET_PPC64) */
> {
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 3/3] target-ppc: Eliminate kvmppc_kern_htab global
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 3/3] target-ppc: Eliminate kvmppc_kern_htab global David Gibson
@ 2016-03-07 13:41 ` Greg Kurz
2016-03-08 0:36 ` David Gibson
0 siblings, 1 reply; 21+ messages in thread
From: Greg Kurz @ 2016-03-07 13:41 UTC (permalink / raw)
To: David Gibson; +Cc: lvivier, thuth, aik, agraf, qemu-devel, qemu-ppc
On Mon, 7 Mar 2016 13:26:26 +1100
David Gibson <david@gibson.dropbear.id.au> wrote:
> fa48b43 "target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVM"
> purports to remove a hack in the handling of hash page tables (HPTs)
> managed by KVM instead of qemu. However, it actually went in the wrong
> direction.
>
> That patch requires anything looking for an external HPT (that is one not
> managed by the guest itself) to check both env->external_htab (for a qemu
> managed HPT) and kvmppc_kern_htab (for a KVM managed HPT). That's a
> problem because kvmppc_kern_htab is local to mmu-hash64.c, but some places
> which need to check for an external HPT are outside that, such as
> kvm_arch_get_registers(). The latter was subtly broken by the earlier
> patch such that gdbstub can no longer access memory.
>
> Basically a KVM managed HPT is much more like a qemu managed HPT than it is
> like a guest managed HPT, so the original "hack" was actually on the right
> track.
>
> This partially reverts fa48b43, so we again mark a KVM managed external HPT
> by putting a special but non-NULL value in env->external_htab. It then
> goes further, using that marker to eliminate the kvmppc_kern_htab global
> entirely. The ppc_hash64_set_external_hpt() helper function is extended
> to set that marker if passed a NULL value (if you're setting an external
> HPT, but don't have an actual HPT to set, the assumption is that it must
> be a KVM managed HPT).
>
> This also has some flow-on changes to the HPT access helpers, required by
> the above changes.
>
> Reported-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> Reviewed-by: Thomas Huth <thuth@redhat.com>
> ---
Typo in comment in target-ppc/mmu-hash64.c (see below).
Apart from that, you get:
Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
and also...
without this patch:
0x00000000100009b8 in main (argc=<error reading variable: Cannot access memory at address 0x3fffc03ce270>, argv=<error reading variable: Cannot access memory at address 0x3fffc03ce278>) at fp.c:11
with this patch:
0x00000000100009b8 in main (argc=4, argv=0x3fffc7fcfd18) at fp.c:11
Just to be sure, I've also tested with TCG: no regression.
Thanks for the fix !
Tested-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
> hw/ppc/spapr.c | 3 +--
> hw/ppc/spapr_hcall.c | 10 +++++-----
> target-ppc/mmu-hash64.c | 40 ++++++++++++++++++----------------------
> target-ppc/mmu-hash64.h | 9 +++------
> 4 files changed, 27 insertions(+), 35 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 72a018b..43708a2 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -1091,7 +1091,7 @@ static void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
> }
>
> spapr->htab_shift = shift;
> - kvmppc_kern_htab = true;
> + spapr->htab = NULL;
> } else {
> /* kernel-side HPT not needed, allocate in userspace instead */
> size_t size = 1ULL << shift;
> @@ -1106,7 +1106,6 @@ static void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
>
> memset(spapr->htab, 0, size);
> spapr->htab_shift = shift;
> - kvmppc_kern_htab = false;
>
> for (i = 0; i < size / HASH_PTE_SIZE_64; i++) {
> DIRTY_HPTE(HPTE(spapr->htab, i));
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index 1733482..b2b1b93 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -122,17 +122,17 @@ static target_ulong h_enter(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> break;
> }
> }
> - ppc_hash64_stop_access(token);
> + ppc_hash64_stop_access(cpu, token);
> if (index == 8) {
> return H_PTEG_FULL;
> }
> } else {
> token = ppc_hash64_start_access(cpu, pte_index);
> if (ppc_hash64_load_hpte0(cpu, token, 0) & HPTE64_V_VALID) {
> - ppc_hash64_stop_access(token);
> + ppc_hash64_stop_access(cpu, token);
> return H_PTEG_FULL;
> }
> - ppc_hash64_stop_access(token);
> + ppc_hash64_stop_access(cpu, token);
> }
>
> ppc_hash64_store_hpte(cpu, pte_index + index,
> @@ -165,7 +165,7 @@ static RemoveResult remove_hpte(PowerPCCPU *cpu, target_ulong ptex,
> token = ppc_hash64_start_access(cpu, ptex);
> v = ppc_hash64_load_hpte0(cpu, token, 0);
> r = ppc_hash64_load_hpte1(cpu, token, 0);
> - ppc_hash64_stop_access(token);
> + ppc_hash64_stop_access(cpu, token);
>
> if ((v & HPTE64_V_VALID) == 0 ||
> ((flags & H_AVPN) && (v & ~0x7fULL) != avpn) ||
> @@ -288,7 +288,7 @@ static target_ulong h_protect(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> token = ppc_hash64_start_access(cpu, pte_index);
> v = ppc_hash64_load_hpte0(cpu, token, 0);
> r = ppc_hash64_load_hpte1(cpu, token, 0);
> - ppc_hash64_stop_access(token);
> + ppc_hash64_stop_access(cpu, token);
>
> if ((v & HPTE64_V_VALID) == 0 ||
> ((flags & H_AVPN) && (v & ~0x7fULL) != avpn)) {
> diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
> index 7b5200b..a9ae0b3 100644
> --- a/target-ppc/mmu-hash64.c
> +++ b/target-ppc/mmu-hash64.c
> @@ -36,10 +36,11 @@
> #endif
>
> /*
> - * Used to indicate whether we have allocated htab in the
> - * host kernel
> + * Used to indicate that a CPU has it's hash page table (HPT) managed
s/it's/its
> + * within the host kernel
> */
> -bool kvmppc_kern_htab;
> +#define MMU_HASH64_KVM_MANAGED_HPT ((void *)-1)
> +
> /*
> * SLB handling
> */
> @@ -283,7 +284,11 @@ void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
>
> cpu_synchronize_state(CPU(cpu));
>
> - env->external_htab = hpt;
> + if (hpt) {
> + env->external_htab = hpt;
> + } else {
> + env->external_htab = MMU_HASH64_KVM_MANAGED_HPT;
> + }
> ppc_hash64_set_sdr1(cpu, (target_ulong)(uintptr_t)hpt | (shift - 18),
> &local_err);
> if (local_err) {
> @@ -396,25 +401,16 @@ uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index)
> hwaddr pte_offset;
>
> pte_offset = pte_index * HASH_PTE_SIZE_64;
> - if (kvmppc_kern_htab) {
> + if (cpu->env.external_htab == MMU_HASH64_KVM_MANAGED_HPT) {
> /*
> * HTAB is controlled by KVM. Fetch the PTEG into a new buffer.
> */
> token = kvmppc_hash64_read_pteg(cpu, pte_index);
> - if (token) {
> - return token;
> - }
> + } else if (cpu->env.external_htab) {
> /*
> - * pteg read failed, even though we have allocated htab via
> - * kvmppc_reset_htab.
> + * HTAB is controlled by QEMU. Just point to the internally
> + * accessible PTEG.
> */
> - return 0;
> - }
> - /*
> - * HTAB is controlled by QEMU. Just point to the internally
> - * accessible PTEG.
> - */
> - if (cpu->env.external_htab) {
> token = (uint64_t)(uintptr_t) cpu->env.external_htab + pte_offset;
> } else if (cpu->env.htab_base) {
> token = cpu->env.htab_base + pte_offset;
> @@ -422,9 +418,9 @@ uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index)
> return token;
> }
>
> -void ppc_hash64_stop_access(uint64_t token)
> +void ppc_hash64_stop_access(PowerPCCPU *cpu, uint64_t token)
> {
> - if (kvmppc_kern_htab) {
> + if (cpu->env.external_htab == MMU_HASH64_KVM_MANAGED_HPT) {
> kvmppc_hash64_free_pteg(token);
> }
> }
> @@ -453,11 +449,11 @@ static hwaddr ppc_hash64_pteg_search(PowerPCCPU *cpu, hwaddr hash,
> && HPTE64_V_COMPARE(pte0, ptem)) {
> pte->pte0 = pte0;
> pte->pte1 = pte1;
> - ppc_hash64_stop_access(token);
> + ppc_hash64_stop_access(cpu, token);
> return (pte_index + i) * HASH_PTE_SIZE_64;
> }
> }
> - ppc_hash64_stop_access(token);
> + ppc_hash64_stop_access(cpu, token);
> /*
> * We didn't find a valid entry.
> */
> @@ -772,7 +768,7 @@ void ppc_hash64_store_hpte(PowerPCCPU *cpu,
> {
> CPUPPCState *env = &cpu->env;
>
> - if (kvmppc_kern_htab) {
> + if (env->external_htab == MMU_HASH64_KVM_MANAGED_HPT) {
> kvmppc_hash64_write_pte(env, pte_index, pte0, pte1);
> return;
> }
> diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
> index 138cd7e..9bf8b9b 100644
> --- a/target-ppc/mmu-hash64.h
> +++ b/target-ppc/mmu-hash64.h
> @@ -90,16 +90,13 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
> #define HPTE64_V_1TB_SEG 0x4000000000000000ULL
> #define HPTE64_V_VRMA_MASK 0x4001ffffff000000ULL
>
> -
> -extern bool kvmppc_kern_htab;
> -
> void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
> Error **errp);
> void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
> Error **errp);
>
> uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index);
> -void ppc_hash64_stop_access(uint64_t token);
> +void ppc_hash64_stop_access(PowerPCCPU *cpu, uint64_t token);
>
> static inline target_ulong ppc_hash64_load_hpte0(PowerPCCPU *cpu,
> uint64_t token, int index)
> @@ -108,7 +105,7 @@ static inline target_ulong ppc_hash64_load_hpte0(PowerPCCPU *cpu,
> uint64_t addr;
>
> addr = token + (index * HASH_PTE_SIZE_64);
> - if (kvmppc_kern_htab || env->external_htab) {
> + if (env->external_htab) {
> return ldq_p((const void *)(uintptr_t)addr);
> } else {
> return ldq_phys(CPU(cpu)->as, addr);
> @@ -122,7 +119,7 @@ static inline target_ulong ppc_hash64_load_hpte1(PowerPCCPU *cpu,
> uint64_t addr;
>
> addr = token + (index * HASH_PTE_SIZE_64) + HASH_PTE_SIZE_64/2;
> - if (kvmppc_kern_htab || env->external_htab) {
> + if (env->external_htab) {
> return ldq_p((const void *)(uintptr_t)addr);
> } else {
> return ldq_phys(CPU(cpu)->as, addr);
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT David Gibson
2016-03-07 13:37 ` Greg Kurz
@ 2016-03-07 15:56 ` Thomas Huth
2016-03-22 16:33 ` Laurent Vivier
2 siblings, 0 replies; 21+ messages in thread
From: Thomas Huth @ 2016-03-07 15:56 UTC (permalink / raw)
To: David Gibson, gkurz, aik; +Cc: lvivier, qemu-ppc, agraf, qemu-devel
On 07.03.2016 03:26, David Gibson wrote:
> When a Power cpu with 64-bit hash MMU has it's hash page table (HPT)
> pointer updated by a write to the SDR1 register we need to update some
> derived variables. Likewise, when the cpu is configured for an external
> HPT (one not in the guest memory space) some derived variables need to be
> updated.
>
> Currently the logic for this is (partially) duplicated in ppc_store_sdr1()
> and in spapr_cpu_reset(). In future we're going to need it in some other
> places, so make some common helpers for this update.
>
> In addition the new ppc_hash64_set_external_hpt() helper also updates
> SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU
> synchronization. In a sense this belongs logically in the
> ppc_hash64_set_sdr1() helper, but that is called from
> kvm_arch_get_registers() so can't itself call cpu_synchronize_state()
> without infinite recursion. In practice this doesn't matter because
> the only other caller is TCG specific.
>
> Currently there aren't situations where updating SDR1 at runtime in KVM
> matters, but there are going to be in future.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/ppc/spapr.c | 13 ++-----------
> target-ppc/kvm.c | 2 +-
> target-ppc/kvm_ppc.h | 6 ++++++
> target-ppc/mmu-hash64.c | 43 +++++++++++++++++++++++++++++++++++++++++++
> target-ppc/mmu-hash64.h | 6 ++++++
> target-ppc/mmu_helper.c | 13 ++++++-------
> 6 files changed, 64 insertions(+), 19 deletions(-)
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions
2016-03-07 11:22 ` Thomas Huth
@ 2016-03-08 0:32 ` David Gibson
0 siblings, 0 replies; 21+ messages in thread
From: David Gibson @ 2016-03-08 0:32 UTC (permalink / raw)
To: Thomas Huth; +Cc: lvivier, aik, qemu-devel, agraf, qemu-ppc, gkurz
[-- Attachment #1: Type: text/plain, Size: 4342 bytes --]
On Mon, Mar 07, 2016 at 12:22:04PM +0100, Thomas Huth wrote:
> On 07.03.2016 03:26, David Gibson wrote:
> > Currently the getting and setting of Power MMU registers (sregs) take up
> > large inline chunks of the kvm_arch_get_registers() and
> > kvm_arch_put_registers() functions. Especially since there are two
> > variants (for Book-E and Book-S CPUs), only one of which will be used in
> > practice, this is pretty hard to read.
> >
> > This patch splits these out into helper functions for clarity. No
> > functional change is expected.
> >
> > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> > ---
> > target-ppc/kvm.c | 421 ++++++++++++++++++++++++++++++-------------------------
> > 1 file changed, 228 insertions(+), 193 deletions(-)
> >
> > diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> > index d67c169..8a762e8 100644
> > --- a/target-ppc/kvm.c
> > +++ b/target-ppc/kvm.c
> ...
> > int kvm_arch_put_registers(CPUState *cs, int level)
> > {
> > PowerPCCPU *cpu = POWERPC_CPU(cs);
> > @@ -920,39 +958,8 @@ int kvm_arch_put_registers(CPUState *cs, int level)
> > }
> >
> > if (cap_segstate && (level >= KVM_PUT_RESET_STATE)) {
> > - struct kvm_sregs sregs;
> > -
> > - sregs.pvr = env->spr[SPR_PVR];
> > -
> > - sregs.u.s.sdr1 = env->spr[SPR_SDR1];
> > -
> > - /* Sync SLB */
> > -#ifdef TARGET_PPC64
> > - for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> > - sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> > - if (env->slb[i].esid & SLB_ESID_V) {
> > - sregs.u.s.ppc64.slb[i].slbe |= i;
> > - }
> > - sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> > - }
> > -#endif
> > -
> > - /* Sync SRs */
> > - for (i = 0; i < 16; i++) {
> > - sregs.u.s.ppc32.sr[i] = env->sr[i];
> > - }
> > -
> > - /* Sync BATs */
> > - for (i = 0; i < 8; i++) {
> > - /* Beware. We have to swap upper and lower bits here */
> > - sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
> > - | env->DBAT[1][i];
> > - sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
> > - | env->IBAT[1][i];
> > - }
> > -
> > - ret = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs);
> > - if (ret) {
> > + ret = kvmppc_put_books_sregs(cpu);
> > + if (ret < 0) {
> > return ret;
> > }
>
> Nit: Technically you've changed the check for the return code from
> "ret != 0" to "ret < 0", so this is a small functional change. But
> practically, it should not matter, since the ioctl is not supposed to
> return values > 0, I think.
>
> > }
> > @@ -1014,12 +1021,197 @@ static void kvm_sync_excp(CPUPPCState *env, int vector, int ivor)
> > env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR];
> > }
> >
> > +static int kvmppc_get_booke_sregs(PowerPCCPU *cpu)
> > +{
> > + CPUPPCState *env = &cpu->env;
> > + struct kvm_sregs sregs;
> > + int ret;
> ...
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
> > + env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
> > + env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
> > + env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
> > + env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
> > + env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
> > + env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
> > + env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
> > + env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
> > + env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
> > + env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
> > + }
>
> Cosmetical nit: That closing curly bracket should not be indented by 8
> spaces, but by 4.
Oops, thanks for the catch.
> Apart from these two nits, the patch looks good to me, so feel free to
> add my "Reviewed-by" once you've fixed add least the cosmetical nit.
Done, thanks.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 3/3] target-ppc: Eliminate kvmppc_kern_htab global
2016-03-07 13:41 ` Greg Kurz
@ 2016-03-08 0:36 ` David Gibson
0 siblings, 0 replies; 21+ messages in thread
From: David Gibson @ 2016-03-08 0:36 UTC (permalink / raw)
To: Greg Kurz; +Cc: lvivier, thuth, aik, agraf, qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 6288 bytes --]
On Mon, Mar 07, 2016 at 02:41:34PM +0100, Greg Kurz wrote:
> On Mon, 7 Mar 2016 13:26:26 +1100
> David Gibson <david@gibson.dropbear.id.au> wrote:
>
> > fa48b43 "target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVM"
> > purports to remove a hack in the handling of hash page tables (HPTs)
> > managed by KVM instead of qemu. However, it actually went in the wrong
> > direction.
> >
> > That patch requires anything looking for an external HPT (that is one not
> > managed by the guest itself) to check both env->external_htab (for a qemu
> > managed HPT) and kvmppc_kern_htab (for a KVM managed HPT). That's a
> > problem because kvmppc_kern_htab is local to mmu-hash64.c, but some places
> > which need to check for an external HPT are outside that, such as
> > kvm_arch_get_registers(). The latter was subtly broken by the earlier
> > patch such that gdbstub can no longer access memory.
> >
> > Basically a KVM managed HPT is much more like a qemu managed HPT than it is
> > like a guest managed HPT, so the original "hack" was actually on the right
> > track.
> >
> > This partially reverts fa48b43, so we again mark a KVM managed external HPT
> > by putting a special but non-NULL value in env->external_htab. It then
> > goes further, using that marker to eliminate the kvmppc_kern_htab global
> > entirely. The ppc_hash64_set_external_hpt() helper function is extended
> > to set that marker if passed a NULL value (if you're setting an external
> > HPT, but don't have an actual HPT to set, the assumption is that it must
> > be a KVM managed HPT).
> >
> > This also has some flow-on changes to the HPT access helpers, required by
> > the above changes.
> >
> > Reported-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
> > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> > Reviewed-by: Thomas Huth <thuth@redhat.com>
> > ---
>
> Typo in comment in target-ppc/mmu-hash64.c (see below).
>
> Apart from that, you get:
>
> Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
>
> and also...
>
> without this patch:
>
> 0x00000000100009b8 in main (argc=<error reading variable: Cannot access memory at address 0x3fffc03ce270>, argv=<error reading variable: Cannot access memory at address 0x3fffc03ce278>) at fp.c:11
>
> with this patch:
>
> 0x00000000100009b8 in main (argc=4, argv=0x3fffc7fcfd18) at fp.c:11
>
> Just to be sure, I've also tested with TCG: no regression.
>
> Thanks for the fix !
>
> Tested-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
Thanks.
> > hw/ppc/spapr.c | 3 +--
> > hw/ppc/spapr_hcall.c | 10 +++++-----
> > target-ppc/mmu-hash64.c | 40 ++++++++++++++++++----------------------
> > target-ppc/mmu-hash64.h | 9 +++------
> > 4 files changed, 27 insertions(+), 35 deletions(-)
> >
> > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > index 72a018b..43708a2 100644
> > --- a/hw/ppc/spapr.c
> > +++ b/hw/ppc/spapr.c
> > @@ -1091,7 +1091,7 @@ static void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
> > }
> >
> > spapr->htab_shift = shift;
> > - kvmppc_kern_htab = true;
> > + spapr->htab = NULL;
> > } else {
> > /* kernel-side HPT not needed, allocate in userspace instead */
> > size_t size = 1ULL << shift;
> > @@ -1106,7 +1106,6 @@ static void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
> >
> > memset(spapr->htab, 0, size);
> > spapr->htab_shift = shift;
> > - kvmppc_kern_htab = false;
> >
> > for (i = 0; i < size / HASH_PTE_SIZE_64; i++) {
> > DIRTY_HPTE(HPTE(spapr->htab, i));
> > diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> > index 1733482..b2b1b93 100644
> > --- a/hw/ppc/spapr_hcall.c
> > +++ b/hw/ppc/spapr_hcall.c
> > @@ -122,17 +122,17 @@ static target_ulong h_enter(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> > break;
> > }
> > }
> > - ppc_hash64_stop_access(token);
> > + ppc_hash64_stop_access(cpu, token);
> > if (index == 8) {
> > return H_PTEG_FULL;
> > }
> > } else {
> > token = ppc_hash64_start_access(cpu, pte_index);
> > if (ppc_hash64_load_hpte0(cpu, token, 0) & HPTE64_V_VALID) {
> > - ppc_hash64_stop_access(token);
> > + ppc_hash64_stop_access(cpu, token);
> > return H_PTEG_FULL;
> > }
> > - ppc_hash64_stop_access(token);
> > + ppc_hash64_stop_access(cpu, token);
> > }
> >
> > ppc_hash64_store_hpte(cpu, pte_index + index,
> > @@ -165,7 +165,7 @@ static RemoveResult remove_hpte(PowerPCCPU *cpu, target_ulong ptex,
> > token = ppc_hash64_start_access(cpu, ptex);
> > v = ppc_hash64_load_hpte0(cpu, token, 0);
> > r = ppc_hash64_load_hpte1(cpu, token, 0);
> > - ppc_hash64_stop_access(token);
> > + ppc_hash64_stop_access(cpu, token);
> >
> > if ((v & HPTE64_V_VALID) == 0 ||
> > ((flags & H_AVPN) && (v & ~0x7fULL) != avpn) ||
> > @@ -288,7 +288,7 @@ static target_ulong h_protect(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> > token = ppc_hash64_start_access(cpu, pte_index);
> > v = ppc_hash64_load_hpte0(cpu, token, 0);
> > r = ppc_hash64_load_hpte1(cpu, token, 0);
> > - ppc_hash64_stop_access(token);
> > + ppc_hash64_stop_access(cpu, token);
> >
> > if ((v & HPTE64_V_VALID) == 0 ||
> > ((flags & H_AVPN) && (v & ~0x7fULL) != avpn)) {
> > diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
> > index 7b5200b..a9ae0b3 100644
> > --- a/target-ppc/mmu-hash64.c
> > +++ b/target-ppc/mmu-hash64.c
> > @@ -36,10 +36,11 @@
> > #endif
> >
> > /*
> > - * Used to indicate whether we have allocated htab in the
> > - * host kernel
> > + * Used to indicate that a CPU has it's hash page table (HPT) managed
>
> s/it's/its
Oh dear. That mispelling really annoys me, so it's an embarrassing
error. Thanks for the catch.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions David Gibson
2016-03-07 11:22 ` Thomas Huth
@ 2016-03-08 0:37 ` David Gibson
2016-03-08 3:01 ` Alexey Kardashevskiy
2016-03-08 8:50 ` Greg Kurz
1 sibling, 2 replies; 21+ messages in thread
From: David Gibson @ 2016-03-08 0:37 UTC (permalink / raw)
To: gkurz, aik; +Cc: lvivier, thuth, qemu-ppc, agraf, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 20632 bytes --]
On Mon, Mar 07, 2016 at 01:26:24PM +1100, David Gibson wrote:
> Currently the getting and setting of Power MMU registers (sregs) take up
> large inline chunks of the kvm_arch_get_registers() and
> kvm_arch_put_registers() functions. Especially since there are two
> variants (for Book-E and Book-S CPUs), only one of which will be used in
> practice, this is pretty hard to read.
>
> This patch splits these out into helper functions for clarity. No
> functional change is expected.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Greg, or Alexey, can I can an R-b for this one as well?
> ---
> target-ppc/kvm.c | 421 ++++++++++++++++++++++++++++++-------------------------
> 1 file changed, 228 insertions(+), 193 deletions(-)
>
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index d67c169..8a762e8 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -867,6 +867,44 @@ static int kvm_put_vpa(CPUState *cs)
> }
> #endif /* TARGET_PPC64 */
>
> +static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> +{
> + CPUPPCState *env = &cpu->env;
> + struct kvm_sregs sregs;
> + int i;
> +
> + sregs.pvr = env->spr[SPR_PVR];
> +
> + sregs.u.s.sdr1 = env->spr[SPR_SDR1];
> +
> + /* Sync SLB */
> +#ifdef TARGET_PPC64
> + for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> + sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> + if (env->slb[i].esid & SLB_ESID_V) {
> + sregs.u.s.ppc64.slb[i].slbe |= i;
> + }
> + sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> + }
> +#endif
> +
> + /* Sync SRs */
> + for (i = 0; i < 16; i++) {
> + sregs.u.s.ppc32.sr[i] = env->sr[i];
> + }
> +
> + /* Sync BATs */
> + for (i = 0; i < 8; i++) {
> + /* Beware. We have to swap upper and lower bits here */
> + sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
> + | env->DBAT[1][i];
> + sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
> + | env->IBAT[1][i];
> + }
> +
> + return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs);
> +}
> +
> int kvm_arch_put_registers(CPUState *cs, int level)
> {
> PowerPCCPU *cpu = POWERPC_CPU(cs);
> @@ -920,39 +958,8 @@ int kvm_arch_put_registers(CPUState *cs, int level)
> }
>
> if (cap_segstate && (level >= KVM_PUT_RESET_STATE)) {
> - struct kvm_sregs sregs;
> -
> - sregs.pvr = env->spr[SPR_PVR];
> -
> - sregs.u.s.sdr1 = env->spr[SPR_SDR1];
> -
> - /* Sync SLB */
> -#ifdef TARGET_PPC64
> - for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> - sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> - if (env->slb[i].esid & SLB_ESID_V) {
> - sregs.u.s.ppc64.slb[i].slbe |= i;
> - }
> - sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> - }
> -#endif
> -
> - /* Sync SRs */
> - for (i = 0; i < 16; i++) {
> - sregs.u.s.ppc32.sr[i] = env->sr[i];
> - }
> -
> - /* Sync BATs */
> - for (i = 0; i < 8; i++) {
> - /* Beware. We have to swap upper and lower bits here */
> - sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
> - | env->DBAT[1][i];
> - sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
> - | env->IBAT[1][i];
> - }
> -
> - ret = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs);
> - if (ret) {
> + ret = kvmppc_put_books_sregs(cpu);
> + if (ret < 0) {
> return ret;
> }
> }
> @@ -1014,12 +1021,197 @@ static void kvm_sync_excp(CPUPPCState *env, int vector, int ivor)
> env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR];
> }
>
> +static int kvmppc_get_booke_sregs(PowerPCCPU *cpu)
> +{
> + CPUPPCState *env = &cpu->env;
> + struct kvm_sregs sregs;
> + int ret;
> +
> + ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
> + if (ret < 0) {
> + return ret;
> + }
> +
> + if (sregs.u.e.features & KVM_SREGS_E_BASE) {
> + env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
> + env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
> + env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
> + env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
> + env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
> + env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
> + env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
> + env->spr[SPR_DECR] = sregs.u.e.dec;
> + env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
> + env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
> + env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
> + }
> +
> + if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
> + env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
> + env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
> + env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
> + env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
> + env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
> + }
> +
> + if (sregs.u.e.features & KVM_SREGS_E_64) {
> + env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
> + }
> +
> + if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
> + env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
> + }
> +
> + if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
> + env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
> + kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
> + env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
> + kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
> + env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
> + kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
> + env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
> + kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
> + env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
> + kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
> + env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
> + kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
> + env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
> + kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
> + env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
> + kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
> + env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
> + kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
> + env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
> + kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
> + env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
> + kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
> + env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
> + kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
> + env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
> + kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
> + env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
> + kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
> + env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
> + kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
> + env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
> + kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
> +
> + if (sregs.u.e.features & KVM_SREGS_E_SPE) {
> + env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
> + kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
> + env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
> + kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
> + env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
> + kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
> + }
> +
> + if (sregs.u.e.features & KVM_SREGS_E_PM) {
> + env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
> + kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
> + }
> +
> + if (sregs.u.e.features & KVM_SREGS_E_PC) {
> + env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
> + kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
> + env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
> + kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
> + }
> + }
> +
> + if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
> + env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
> + env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
> + env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
> + env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
> + env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
> + env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
> + env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
> + env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
> + env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
> + env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
> + }
> +
> + if (sregs.u.e.features & KVM_SREGS_EXP) {
> + env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
> + }
> +
> + if (sregs.u.e.features & KVM_SREGS_E_PD) {
> + env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
> + env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
> + }
> +
> + if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
> + env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
> + env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
> + env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
> +
> + if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
> + env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
> + env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
> + }
> + }
> +
> + return 0;
> +}
> +
> +static int kvmppc_get_books_sregs(PowerPCCPU *cpu)
> +{
> + CPUPPCState *env = &cpu->env;
> + struct kvm_sregs sregs;
> + int ret;
> + int i;
> +
> + ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
> + if (ret < 0) {
> + return ret;
> + }
> +
> + if (!env->external_htab) {
> + ppc_store_sdr1(env, sregs.u.s.sdr1);
> + }
> +
> + /* Sync SLB */
> +#ifdef TARGET_PPC64
> + /*
> + * The packed SLB array we get from KVM_GET_SREGS only contains
> + * information about valid entries. So we flush our internal copy
> + * to get rid of stale ones, then put all valid SLB entries back
> + * in.
> + */
> + memset(env->slb, 0, sizeof(env->slb));
> + for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> + target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
> + target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
> + /*
> + * Only restore valid entries
> + */
> + if (rb & SLB_ESID_V) {
> + ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
> + }
> + }
> +#endif
> +
> + /* Sync SRs */
> + for (i = 0; i < 16; i++) {
> + env->sr[i] = sregs.u.s.ppc32.sr[i];
> + }
> +
> + /* Sync BATs */
> + for (i = 0; i < 8; i++) {
> + env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
> + env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
> + env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
> + env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
> + }
> +
> + return 0;
> +}
> +
> int kvm_arch_get_registers(CPUState *cs)
> {
> PowerPCCPU *cpu = POWERPC_CPU(cs);
> CPUPPCState *env = &cpu->env;
> struct kvm_regs regs;
> - struct kvm_sregs sregs;
> uint32_t cr;
> int i, ret;
>
> @@ -1059,174 +1251,17 @@ int kvm_arch_get_registers(CPUState *cs)
> kvm_get_fp(cs);
>
> if (cap_booke_sregs) {
> - ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
> + ret = kvmppc_get_booke_sregs(cpu);
> if (ret < 0) {
> return ret;
> }
> -
> - if (sregs.u.e.features & KVM_SREGS_E_BASE) {
> - env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
> - env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
> - env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
> - env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
> - env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
> - env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
> - env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
> - env->spr[SPR_DECR] = sregs.u.e.dec;
> - env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
> - env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
> - env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
> - }
> -
> - if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
> - env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
> - env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
> - env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
> - env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
> - env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
> - }
> -
> - if (sregs.u.e.features & KVM_SREGS_E_64) {
> - env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
> - }
> -
> - if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
> - env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
> - }
> -
> - if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
> - env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
> - kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
> - env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
> - kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
> - env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
> - kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
> - env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
> - kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
> - env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
> - kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
> - env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
> - kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
> - env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
> - kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
> - env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
> - kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
> - env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
> - kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
> - env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
> - kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
> - env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
> - kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
> - env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
> - kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
> - env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
> - kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
> - env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
> - kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
> - env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
> - kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
> - env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
> - kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
> -
> - if (sregs.u.e.features & KVM_SREGS_E_SPE) {
> - env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
> - kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
> - env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
> - kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
> - env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
> - kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
> - }
> -
> - if (sregs.u.e.features & KVM_SREGS_E_PM) {
> - env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
> - kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
> - }
> -
> - if (sregs.u.e.features & KVM_SREGS_E_PC) {
> - env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
> - kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
> - env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
> - kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
> - }
> - }
> -
> - if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
> - env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
> - env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
> - env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
> - env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
> - env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
> - env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
> - env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
> - env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
> - env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
> - env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
> - }
> -
> - if (sregs.u.e.features & KVM_SREGS_EXP) {
> - env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
> - }
> -
> - if (sregs.u.e.features & KVM_SREGS_E_PD) {
> - env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
> - env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
> - }
> -
> - if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
> - env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
> - env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
> - env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
> -
> - if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
> - env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
> - env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
> - }
> - }
> }
>
> if (cap_segstate) {
> - ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
> + ret = kvmppc_get_books_sregs(cpu);
> if (ret < 0) {
> return ret;
> }
> -
> - if (!env->external_htab) {
> - ppc_store_sdr1(env, sregs.u.s.sdr1);
> - }
> -
> - /* Sync SLB */
> -#ifdef TARGET_PPC64
> - /*
> - * The packed SLB array we get from KVM_GET_SREGS only contains
> - * information about valid entries. So we flush our internal
> - * copy to get rid of stale ones, then put all valid SLB entries
> - * back in.
> - */
> - memset(env->slb, 0, sizeof(env->slb));
> - for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> - target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
> - target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
> - /*
> - * Only restore valid entries
> - */
> - if (rb & SLB_ESID_V) {
> - ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
> - }
> - }
> -#endif
> -
> - /* Sync SRs */
> - for (i = 0; i < 16; i++) {
> - env->sr[i] = sregs.u.s.ppc32.sr[i];
> - }
> -
> - /* Sync BATs */
> - for (i = 0; i < 8; i++) {
> - env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
> - env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
> - env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
> - env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
> - }
> }
>
> if (cap_hior) {
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions
2016-03-08 0:37 ` David Gibson
@ 2016-03-08 3:01 ` Alexey Kardashevskiy
2016-03-08 3:53 ` David Gibson
2016-03-08 8:50 ` Greg Kurz
1 sibling, 1 reply; 21+ messages in thread
From: Alexey Kardashevskiy @ 2016-03-08 3:01 UTC (permalink / raw)
To: David Gibson, gkurz; +Cc: lvivier, thuth, qemu-ppc, agraf, qemu-devel
On 03/08/2016 11:37 AM, David Gibson wrote:
> On Mon, Mar 07, 2016 at 01:26:24PM +1100, David Gibson wrote:
>> Currently the getting and setting of Power MMU registers (sregs) take up
>> large inline chunks of the kvm_arch_get_registers() and
>> kvm_arch_put_registers() functions. Especially since there are two
>> variants (for Book-E and Book-S CPUs), only one of which will be used in
>> practice, this is pretty hard to read.
>>
>> This patch splits these out into helper functions for clarity. No
>> functional change is expected.
>>
>> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
>
> Greg, or Alexey, can I can an R-b for this one as well?
Well, the patch itself is quite alright but you could do BookE and BookS
changes in separate patches. And some more comments below.
>
>> ---
>> target-ppc/kvm.c | 421 ++++++++++++++++++++++++++++++-------------------------
>> 1 file changed, 228 insertions(+), 193 deletions(-)
>>
>> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
>> index d67c169..8a762e8 100644
>> --- a/target-ppc/kvm.c
>> +++ b/target-ppc/kvm.c
>> @@ -867,6 +867,44 @@ static int kvm_put_vpa(CPUState *cs)
>> }
>> #endif /* TARGET_PPC64 */
>>
>> +static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
>> +{
>> + CPUPPCState *env = &cpu->env;
>> + struct kvm_sregs sregs;
>> + int i;
>> +
>> + sregs.pvr = env->spr[SPR_PVR];
>> +
>> + sregs.u.s.sdr1 = env->spr[SPR_SDR1];
>> +
>> + /* Sync SLB */
>> +#ifdef TARGET_PPC64
>> + for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
>> + sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
>> + if (env->slb[i].esid & SLB_ESID_V) {
>> + sregs.u.s.ppc64.slb[i].slbe |= i;
>> + }
>> + sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
>> + }
>> +#endif
>> +
>> + /* Sync SRs */
>> + for (i = 0; i < 16; i++) {
>> + sregs.u.s.ppc32.sr[i] = env->sr[i];
>> + }
>> +
>> + /* Sync BATs */
>> + for (i = 0; i < 8; i++) {
>> + /* Beware. We have to swap upper and lower bits here */
>> + sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
>> + | env->DBAT[1][i];
>> + sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
>> + | env->IBAT[1][i];
>> + }
>> +
>> + return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs);
>> +}
>> +
>> int kvm_arch_put_registers(CPUState *cs, int level)
>> {
>> PowerPCCPU *cpu = POWERPC_CPU(cs);
>> @@ -920,39 +958,8 @@ int kvm_arch_put_registers(CPUState *cs, int level)
>> }
>>
>> if (cap_segstate && (level >= KVM_PUT_RESET_STATE)) {
>> - struct kvm_sregs sregs;
>> -
>> - sregs.pvr = env->spr[SPR_PVR];
>> -
>> - sregs.u.s.sdr1 = env->spr[SPR_SDR1];
>> -
>> - /* Sync SLB */
>> -#ifdef TARGET_PPC64
>> - for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
>> - sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
>> - if (env->slb[i].esid & SLB_ESID_V) {
>> - sregs.u.s.ppc64.slb[i].slbe |= i;
>> - }
>> - sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
>> - }
>> -#endif
>> -
>> - /* Sync SRs */
>> - for (i = 0; i < 16; i++) {
>> - sregs.u.s.ppc32.sr[i] = env->sr[i];
>> - }
>> -
>> - /* Sync BATs */
>> - for (i = 0; i < 8; i++) {
>> - /* Beware. We have to swap upper and lower bits here */
>> - sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
>> - | env->DBAT[1][i];
>> - sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
>> - | env->IBAT[1][i];
>> - }
>> -
>> - ret = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs);
>> - if (ret) {
>> + ret = kvmppc_put_books_sregs(cpu);
>> + if (ret < 0) {
>> return ret;
>> }
>> }
>> @@ -1014,12 +1021,197 @@ static void kvm_sync_excp(CPUPPCState *env, int vector, int ivor)
>> env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR];
>> }
>>
>> +static int kvmppc_get_booke_sregs(PowerPCCPU *cpu)
I found it confusing that the patch is not adding kvmppc_put_booke_sregs...
Not a problem of this patch though but if the commit log for booke-only
patch has mentioned it, I would not have to have a look in QEMU tree :)
>> +{
>> + CPUPPCState *env = &cpu->env;
>> + struct kvm_sregs sregs;
>> + int ret;
>> +
>> + ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
>> + if (ret < 0) {
>> + return ret;
>> + }
>> +
>> + if (sregs.u.e.features & KVM_SREGS_E_BASE) {
>> + env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
>> + env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
>> + env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
>> + env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
>> + env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
>> + env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
>> + env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
>> + env->spr[SPR_DECR] = sregs.u.e.dec;
>> + env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
>> + env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
>> + env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
>> + }
>> +
>> + if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
>> + env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
>> + env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
>> + env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
>> + env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
>> + env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
>> + }
>> +
>> + if (sregs.u.e.features & KVM_SREGS_E_64) {
>> + env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
>> + }
>> +
>> + if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
>> + env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
>> + }
>> +
>> + if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
>> + env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
>> + kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
>> + env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
>> + kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
>> + env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
>> + kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
>> + env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
>> + kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
>> + env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
>> + kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
>> + env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
>> + kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
>> + env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
>> + kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
>> + env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
>> + kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
>> + env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
>> + kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
>> + env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
>> + kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
>> + env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
>> + kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
>> + env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
>> + kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
>> + env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
>> + kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
>> + env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
>> + kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
>> + env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
>> + kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
>> + env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
>> + kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
>> +
>> + if (sregs.u.e.features & KVM_SREGS_E_SPE) {
>> + env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
>> + kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
>> + env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
>> + kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
>> + env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
>> + kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
>> + }
>> +
>> + if (sregs.u.e.features & KVM_SREGS_E_PM) {
>> + env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
>> + kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
>> + }
>> +
>> + if (sregs.u.e.features & KVM_SREGS_E_PC) {
>> + env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
>> + kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
>> + env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
>> + kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
>> + }
>> + }
>> +
>> + if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
>> + env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
>> + env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
>> + env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
>> + env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
>> + env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
>> + env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
>> + env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
>> + env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
>> + env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
>> + env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
>> + }
Wrong indend.
>> +
>> + if (sregs.u.e.features & KVM_SREGS_EXP) {
>> + env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
>> + }
>> +
>> + if (sregs.u.e.features & KVM_SREGS_E_PD) {
>> + env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
>> + env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
>> + }
>> +
>> + if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
>> + env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
>> + env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
>> + env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
>> +
>> + if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
>> + env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
>> + env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
>> + }
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int kvmppc_get_books_sregs(PowerPCCPU *cpu)
>> +{
>> + CPUPPCState *env = &cpu->env;
>> + struct kvm_sregs sregs;
>> + int ret;
>> + int i;
>> +
>> + ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
>> + if (ret < 0) {
>> + return ret;
>> + }
>> +
>> + if (!env->external_htab) {
>> + ppc_store_sdr1(env, sregs.u.s.sdr1);
>> + }
>> +
>> + /* Sync SLB */
>> +#ifdef TARGET_PPC64
>> + /*
>> + * The packed SLB array we get from KVM_GET_SREGS only contains
>> + * information about valid entries. So we flush our internal copy
>> + * to get rid of stale ones, then put all valid SLB entries back
>> + * in.
>> + */
>> + memset(env->slb, 0, sizeof(env->slb));
>> + for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
>> + target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
>> + target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
>> + /*
>> + * Only restore valid entries
>> + */
>> + if (rb & SLB_ESID_V) {
>> + ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
>> + }
>> + }
>> +#endif
>> +
>> + /* Sync SRs */
>> + for (i = 0; i < 16; i++) {
>> + env->sr[i] = sregs.u.s.ppc32.sr[i];
>> + }
>> +
>> + /* Sync BATs */
>> + for (i = 0; i < 8; i++) {
>> + env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
>> + env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
>> + env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
>> + env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> int kvm_arch_get_registers(CPUState *cs)
>> {
>> PowerPCCPU *cpu = POWERPC_CPU(cs);
>> CPUPPCState *env = &cpu->env;
>> struct kvm_regs regs;
>> - struct kvm_sregs sregs;
>> uint32_t cr;
>> int i, ret;
>>
>> @@ -1059,174 +1251,17 @@ int kvm_arch_get_registers(CPUState *cs)
>> kvm_get_fp(cs);
>>
>> if (cap_booke_sregs) {
>> - ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
>> + ret = kvmppc_get_booke_sregs(cpu);
>> if (ret < 0) {
>> return ret;
>> }
>> -
>> - if (sregs.u.e.features & KVM_SREGS_E_BASE) {
>> - env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
>> - env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
>> - env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
>> - env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
>> - env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
>> - env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
>> - env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
>> - env->spr[SPR_DECR] = sregs.u.e.dec;
>> - env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
>> - env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
>> - env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
>> - }
>> -
>> - if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
>> - env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
>> - env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
>> - env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
>> - env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
>> - env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
>> - }
>> -
>> - if (sregs.u.e.features & KVM_SREGS_E_64) {
>> - env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
>> - }
>> -
>> - if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
>> - env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
>> - }
>> -
>> - if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
>> - env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
>> - kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
>> - env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
>> - kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
>> - env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
>> - kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
>> - env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
>> - kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
>> - env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
>> - kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
>> - env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
>> - kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
>> - env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
>> - kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
>> - env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
>> - kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
>> - env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
>> - kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
>> - env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
>> - kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
>> - env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
>> - kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
>> - env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
>> - kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
>> - env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
>> - kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
>> - env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
>> - kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
>> - env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
>> - kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
>> - env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
>> - kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
>> -
>> - if (sregs.u.e.features & KVM_SREGS_E_SPE) {
>> - env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
>> - kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
>> - env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
>> - kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
>> - env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
>> - kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
>> - }
>> -
>> - if (sregs.u.e.features & KVM_SREGS_E_PM) {
>> - env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
>> - kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
>> - }
>> -
>> - if (sregs.u.e.features & KVM_SREGS_E_PC) {
>> - env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
>> - kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
>> - env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
>> - kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
>> - }
>> - }
>> -
>> - if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
>> - env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
>> - env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
>> - env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
>> - env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
>> - env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
>> - env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
>> - env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
>> - env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
>> - env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
>> - env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
>> - }
>> -
>> - if (sregs.u.e.features & KVM_SREGS_EXP) {
>> - env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
>> - }
>> -
>> - if (sregs.u.e.features & KVM_SREGS_E_PD) {
>> - env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
>> - env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
>> - }
>> -
>> - if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
>> - env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
>> - env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
>> - env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
>> -
>> - if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
>> - env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
>> - env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
>> - }
>> - }
>> }
>>
>> if (cap_segstate) {
>> - ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
>> + ret = kvmppc_get_books_sregs(cpu);
s/kvmppc_get_books_sregs/kvmppc_get_books_segstate_sregs/
or fold "if (cap_hior)" (at the end of this chunk) into
kvmppc_get_books_sregs().
>> if (ret < 0) {
>> return ret;
>> }
>> -
>> - if (!env->external_htab) {
>> - ppc_store_sdr1(env, sregs.u.s.sdr1);
>> - }
>> -
>> - /* Sync SLB */
>> -#ifdef TARGET_PPC64
>> - /*
>> - * The packed SLB array we get from KVM_GET_SREGS only contains
>> - * information about valid entries. So we flush our internal
>> - * copy to get rid of stale ones, then put all valid SLB entries
>> - * back in.
>> - */
>> - memset(env->slb, 0, sizeof(env->slb));
>> - for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
>> - target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
>> - target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
>> - /*
>> - * Only restore valid entries
>> - */
>> - if (rb & SLB_ESID_V) {
>> - ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
>> - }
>> - }
>> -#endif
>> -
>> - /* Sync SRs */
>> - for (i = 0; i < 16; i++) {
>> - env->sr[i] = sregs.u.s.ppc32.sr[i];
>> - }
>> -
>> - /* Sync BATs */
>> - for (i = 0; i < 8; i++) {
>> - env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
>> - env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
>> - env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
>> - env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
>> - }
>> }
>>
>> if (cap_hior) {
>
--
Alexey
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions
2016-03-08 3:01 ` Alexey Kardashevskiy
@ 2016-03-08 3:53 ` David Gibson
2016-03-08 5:13 ` Alexey Kardashevskiy
0 siblings, 1 reply; 21+ messages in thread
From: David Gibson @ 2016-03-08 3:53 UTC (permalink / raw)
To: Alexey Kardashevskiy; +Cc: lvivier, thuth, qemu-devel, agraf, qemu-ppc, gkurz
[-- Attachment #1: Type: text/plain, Size: 22623 bytes --]
On Tue, Mar 08, 2016 at 02:01:12PM +1100, Alexey Kardashevskiy wrote:
> On 03/08/2016 11:37 AM, David Gibson wrote:
> >On Mon, Mar 07, 2016 at 01:26:24PM +1100, David Gibson wrote:
> >>Currently the getting and setting of Power MMU registers (sregs) take up
> >>large inline chunks of the kvm_arch_get_registers() and
> >>kvm_arch_put_registers() functions. Especially since there are two
> >>variants (for Book-E and Book-S CPUs), only one of which will be used in
> >>practice, this is pretty hard to read.
> >>
> >>This patch splits these out into helper functions for clarity. No
> >>functional change is expected.
> >>
> >>Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> >
> >Greg, or Alexey, can I can an R-b for this one as well?
>
>
> Well, the patch itself is quite alright but you could do BookE and BookS
> changes in separate patches.
Well.. if you insist.
> And some more comments below.
>
> >
> >>---
> >> target-ppc/kvm.c | 421 ++++++++++++++++++++++++++++++-------------------------
> >> 1 file changed, 228 insertions(+), 193 deletions(-)
> >>
> >>diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> >>index d67c169..8a762e8 100644
> >>--- a/target-ppc/kvm.c
> >>+++ b/target-ppc/kvm.c
> >>@@ -867,6 +867,44 @@ static int kvm_put_vpa(CPUState *cs)
> >> }
> >> #endif /* TARGET_PPC64 */
> >>
> >>+static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> >>+{
> >>+ CPUPPCState *env = &cpu->env;
> >>+ struct kvm_sregs sregs;
> >>+ int i;
> >>+
> >>+ sregs.pvr = env->spr[SPR_PVR];
> >>+
> >>+ sregs.u.s.sdr1 = env->spr[SPR_SDR1];
> >>+
> >>+ /* Sync SLB */
> >>+#ifdef TARGET_PPC64
> >>+ for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> >>+ sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> >>+ if (env->slb[i].esid & SLB_ESID_V) {
> >>+ sregs.u.s.ppc64.slb[i].slbe |= i;
> >>+ }
> >>+ sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> >>+ }
> >>+#endif
> >>+
> >>+ /* Sync SRs */
> >>+ for (i = 0; i < 16; i++) {
> >>+ sregs.u.s.ppc32.sr[i] = env->sr[i];
> >>+ }
> >>+
> >>+ /* Sync BATs */
> >>+ for (i = 0; i < 8; i++) {
> >>+ /* Beware. We have to swap upper and lower bits here */
> >>+ sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
> >>+ | env->DBAT[1][i];
> >>+ sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
> >>+ | env->IBAT[1][i];
> >>+ }
> >>+
> >>+ return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs);
> >>+}
> >>+
> >> int kvm_arch_put_registers(CPUState *cs, int level)
> >> {
> >> PowerPCCPU *cpu = POWERPC_CPU(cs);
> >>@@ -920,39 +958,8 @@ int kvm_arch_put_registers(CPUState *cs, int level)
> >> }
> >>
> >> if (cap_segstate && (level >= KVM_PUT_RESET_STATE)) {
> >>- struct kvm_sregs sregs;
> >>-
> >>- sregs.pvr = env->spr[SPR_PVR];
> >>-
> >>- sregs.u.s.sdr1 = env->spr[SPR_SDR1];
> >>-
> >>- /* Sync SLB */
> >>-#ifdef TARGET_PPC64
> >>- for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> >>- sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> >>- if (env->slb[i].esid & SLB_ESID_V) {
> >>- sregs.u.s.ppc64.slb[i].slbe |= i;
> >>- }
> >>- sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> >>- }
> >>-#endif
> >>-
> >>- /* Sync SRs */
> >>- for (i = 0; i < 16; i++) {
> >>- sregs.u.s.ppc32.sr[i] = env->sr[i];
> >>- }
> >>-
> >>- /* Sync BATs */
> >>- for (i = 0; i < 8; i++) {
> >>- /* Beware. We have to swap upper and lower bits here */
> >>- sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
> >>- | env->DBAT[1][i];
> >>- sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
> >>- | env->IBAT[1][i];
> >>- }
> >>-
> >>- ret = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs);
> >>- if (ret) {
> >>+ ret = kvmppc_put_books_sregs(cpu);
> >>+ if (ret < 0) {
> >> return ret;
> >> }
> >> }
> >>@@ -1014,12 +1021,197 @@ static void kvm_sync_excp(CPUPPCState *env, int vector, int ivor)
> >> env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR];
> >> }
> >>
> >>+static int kvmppc_get_booke_sregs(PowerPCCPU *cpu)
>
>
> I found it confusing that the patch is not adding kvmppc_put_booke_sregs...
> Not a problem of this patch though but if the commit log for booke-only
> patch has mentioned it, I would not have to have a look in QEMU tree :)
Hm, ok.
> >>+{
> >>+ CPUPPCState *env = &cpu->env;
> >>+ struct kvm_sregs sregs;
> >>+ int ret;
> >>+
> >>+ ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
> >>+ if (ret < 0) {
> >>+ return ret;
> >>+ }
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_E_BASE) {
> >>+ env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
> >>+ env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
> >>+ env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
> >>+ env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
> >>+ env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
> >>+ env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
> >>+ env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
> >>+ env->spr[SPR_DECR] = sregs.u.e.dec;
> >>+ env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
> >>+ env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
> >>+ env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
> >>+ }
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
> >>+ env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
> >>+ env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
> >>+ env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
> >>+ env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
> >>+ env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
> >>+ }
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_E_64) {
> >>+ env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
> >>+ }
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
> >>+ env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
> >>+ }
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
> >>+ env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
> >>+ env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
> >>+ env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
> >>+ env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
> >>+ env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
> >>+ env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
> >>+ env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
> >>+ env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
> >>+ env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
> >>+ env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
> >>+ env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
> >>+ env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
> >>+ env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
> >>+ env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
> >>+ env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
> >>+ env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_E_SPE) {
> >>+ env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
> >>+ env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
> >>+ env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
> >>+ }
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_E_PM) {
> >>+ env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
> >>+ }
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_E_PC) {
> >>+ env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
> >>+ env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
> >>+ kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
> >>+ }
> >>+ }
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
> >>+ env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
> >>+ env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
> >>+ env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
> >>+ env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
> >>+ env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
> >>+ env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
> >>+ env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
> >>+ env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
> >>+ env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
> >>+ env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
> >>+ }
>
> Wrong indend.
Yeah, Thomas noted that so I've already fixed it.
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_EXP) {
> >>+ env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
> >>+ }
> >>+
> >>+ if (sregs.u.e.features & KVM_SREGS_E_PD) {
> >>+ env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
> >>+ env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
> >>+ }
> >>+
> >>+ if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
> >>+ env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
> >>+ env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
> >>+ env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
> >>+
> >>+ if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
> >>+ env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
> >>+ env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
> >>+ }
> >>+ }
> >>+
> >>+ return 0;
> >>+}
> >>+
> >>+static int kvmppc_get_books_sregs(PowerPCCPU *cpu)
> >>+{
> >>+ CPUPPCState *env = &cpu->env;
> >>+ struct kvm_sregs sregs;
> >>+ int ret;
> >>+ int i;
> >>+
> >>+ ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
> >>+ if (ret < 0) {
> >>+ return ret;
> >>+ }
> >>+
> >>+ if (!env->external_htab) {
> >>+ ppc_store_sdr1(env, sregs.u.s.sdr1);
> >>+ }
> >>+
> >>+ /* Sync SLB */
> >>+#ifdef TARGET_PPC64
> >>+ /*
> >>+ * The packed SLB array we get from KVM_GET_SREGS only contains
> >>+ * information about valid entries. So we flush our internal copy
> >>+ * to get rid of stale ones, then put all valid SLB entries back
> >>+ * in.
> >>+ */
> >>+ memset(env->slb, 0, sizeof(env->slb));
> >>+ for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> >>+ target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
> >>+ target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
> >>+ /*
> >>+ * Only restore valid entries
> >>+ */
> >>+ if (rb & SLB_ESID_V) {
> >>+ ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
> >>+ }
> >>+ }
> >>+#endif
> >>+
> >>+ /* Sync SRs */
> >>+ for (i = 0; i < 16; i++) {
> >>+ env->sr[i] = sregs.u.s.ppc32.sr[i];
> >>+ }
> >>+
> >>+ /* Sync BATs */
> >>+ for (i = 0; i < 8; i++) {
> >>+ env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
> >>+ env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
> >>+ env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
> >>+ env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
> >>+ }
> >>+
> >>+ return 0;
> >>+}
> >>+
> >> int kvm_arch_get_registers(CPUState *cs)
> >> {
> >> PowerPCCPU *cpu = POWERPC_CPU(cs);
> >> CPUPPCState *env = &cpu->env;
> >> struct kvm_regs regs;
> >>- struct kvm_sregs sregs;
> >> uint32_t cr;
> >> int i, ret;
> >>
> >>@@ -1059,174 +1251,17 @@ int kvm_arch_get_registers(CPUState *cs)
> >> kvm_get_fp(cs);
> >>
> >> if (cap_booke_sregs) {
> >>- ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
> >>+ ret = kvmppc_get_booke_sregs(cpu);
> >> if (ret < 0) {
> >> return ret;
> >> }
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_E_BASE) {
> >>- env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
> >>- env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
> >>- env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
> >>- env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
> >>- env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
> >>- env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
> >>- env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
> >>- env->spr[SPR_DECR] = sregs.u.e.dec;
> >>- env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
> >>- env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
> >>- env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
> >>- }
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
> >>- env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
> >>- env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
> >>- env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
> >>- env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
> >>- env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
> >>- }
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_E_64) {
> >>- env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
> >>- }
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
> >>- env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
> >>- }
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
> >>- env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
> >>- kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
> >>- env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
> >>- kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
> >>- env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
> >>- kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
> >>- env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
> >>- kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
> >>- env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
> >>- kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
> >>- env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
> >>- kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
> >>- env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
> >>- kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
> >>- env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
> >>- kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
> >>- env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
> >>- kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
> >>- env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
> >>- kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
> >>- env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
> >>- kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
> >>- env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
> >>- kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
> >>- env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
> >>- kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
> >>- env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
> >>- kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
> >>- env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
> >>- kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
> >>- env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
> >>- kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_E_SPE) {
> >>- env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
> >>- kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
> >>- env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
> >>- kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
> >>- env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
> >>- kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
> >>- }
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_E_PM) {
> >>- env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
> >>- kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
> >>- }
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_E_PC) {
> >>- env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
> >>- kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
> >>- env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
> >>- kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
> >>- }
> >>- }
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
> >>- env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
> >>- env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
> >>- env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
> >>- env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
> >>- env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
> >>- env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
> >>- env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
> >>- env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
> >>- env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
> >>- env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
> >>- }
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_EXP) {
> >>- env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
> >>- }
> >>-
> >>- if (sregs.u.e.features & KVM_SREGS_E_PD) {
> >>- env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
> >>- env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
> >>- }
> >>-
> >>- if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
> >>- env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
> >>- env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
> >>- env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
> >>-
> >>- if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
> >>- env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
> >>- env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
> >>- }
> >>- }
> >> }
> >>
> >> if (cap_segstate) {
> >>- ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
> >>+ ret = kvmppc_get_books_sregs(cpu);
>
>
> s/kvmppc_get_books_sregs/kvmppc_get_books_segstate_sregs/
Um.. why? It's the {GET,SET}_SREGS call that these are wrapping.
cap_segstate is just a kinda-old name for it.
> or fold "if (cap_hior)" (at the end of this chunk) into
> kvmppc_get_books_sregs().
Again, why? HIOR is a separate one-reg call, not in the sregs block.
> >> if (ret < 0) {
> >> return ret;
> >> }
> >>-
> >>- if (!env->external_htab) {
> >>- ppc_store_sdr1(env, sregs.u.s.sdr1);
> >>- }
> >>-
> >>- /* Sync SLB */
> >>-#ifdef TARGET_PPC64
> >>- /*
> >>- * The packed SLB array we get from KVM_GET_SREGS only contains
> >>- * information about valid entries. So we flush our internal
> >>- * copy to get rid of stale ones, then put all valid SLB entries
> >>- * back in.
> >>- */
> >>- memset(env->slb, 0, sizeof(env->slb));
> >>- for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> >>- target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
> >>- target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
> >>- /*
> >>- * Only restore valid entries
> >>- */
> >>- if (rb & SLB_ESID_V) {
> >>- ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
> >>- }
> >>- }
> >>-#endif
> >>-
> >>- /* Sync SRs */
> >>- for (i = 0; i < 16; i++) {
> >>- env->sr[i] = sregs.u.s.ppc32.sr[i];
> >>- }
> >>-
> >>- /* Sync BATs */
> >>- for (i = 0; i < 8; i++) {
> >>- env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
> >>- env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
> >>- env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
> >>- env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
> >>- }
> >> }
> >>
> >> if (cap_hior) {
> >
>
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions
2016-03-08 3:53 ` David Gibson
@ 2016-03-08 5:13 ` Alexey Kardashevskiy
2016-03-08 5:50 ` David Gibson
0 siblings, 1 reply; 21+ messages in thread
From: Alexey Kardashevskiy @ 2016-03-08 5:13 UTC (permalink / raw)
To: David Gibson; +Cc: lvivier, thuth, qemu-devel, agraf, qemu-ppc, gkurz
On 03/08/2016 02:53 PM, David Gibson wrote:
> On Tue, Mar 08, 2016 at 02:01:12PM +1100, Alexey Kardashevskiy wrote:
>> On 03/08/2016 11:37 AM, David Gibson wrote:
>>> On Mon, Mar 07, 2016 at 01:26:24PM +1100, David Gibson wrote:
>>>> Currently the getting and setting of Power MMU registers (sregs) take up
>>>> large inline chunks of the kvm_arch_get_registers() and
>>>> kvm_arch_put_registers() functions. Especially since there are two
>>>> variants (for Book-E and Book-S CPUs), only one of which will be used in
>>>> practice, this is pretty hard to read.
>>>>
>>>> This patch splits these out into helper functions for clarity. No
>>>> functional change is expected.
>>>>
>>>> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
>>>
>>> Greg, or Alexey, can I can an R-b for this one as well?
>>
>>
>> Well, the patch itself is quite alright but you could do BookE and BookS
>> changes in separate patches.
>
> Well.. if you insist.
I do not really, this is rather a wish for the future :)
>
>> And some more comments below.
>
>
>>
>>>
>>>> ---
>>>> target-ppc/kvm.c | 421 ++++++++++++++++++++++++++++++-------------------------
>>>> 1 file changed, 228 insertions(+), 193 deletions(-)
>>>>
>>>> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
>>>> index d67c169..8a762e8 100644
>>>> --- a/target-ppc/kvm.c
>>>> +++ b/target-ppc/kvm.c
>>>> @@ -867,6 +867,44 @@ static int kvm_put_vpa(CPUState *cs)
>>>> }
>>>> #endif /* TARGET_PPC64 */
>>>>
>>>> +static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
>>>> +{
>>>> + CPUPPCState *env = &cpu->env;
>>>> + struct kvm_sregs sregs;
>>>> + int i;
>>>> +
>>>> + sregs.pvr = env->spr[SPR_PVR];
>>>> +
>>>> + sregs.u.s.sdr1 = env->spr[SPR_SDR1];
>>>> +
>>>> + /* Sync SLB */
>>>> +#ifdef TARGET_PPC64
>>>> + for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
>>>> + sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
>>>> + if (env->slb[i].esid & SLB_ESID_V) {
>>>> + sregs.u.s.ppc64.slb[i].slbe |= i;
>>>> + }
>>>> + sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
>>>> + }
>>>> +#endif
>>>> +
>>>> + /* Sync SRs */
>>>> + for (i = 0; i < 16; i++) {
>>>> + sregs.u.s.ppc32.sr[i] = env->sr[i];
>>>> + }
>>>> +
>>>> + /* Sync BATs */
>>>> + for (i = 0; i < 8; i++) {
>>>> + /* Beware. We have to swap upper and lower bits here */
>>>> + sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
>>>> + | env->DBAT[1][i];
>>>> + sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
>>>> + | env->IBAT[1][i];
>>>> + }
>>>> +
>>>> + return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs);
>>>> +}
>>>> +
>>>> int kvm_arch_put_registers(CPUState *cs, int level)
>>>> {
>>>> PowerPCCPU *cpu = POWERPC_CPU(cs);
>>>> @@ -920,39 +958,8 @@ int kvm_arch_put_registers(CPUState *cs, int level)
>>>> }
>>>>
>>>> if (cap_segstate && (level >= KVM_PUT_RESET_STATE)) {
>>>> - struct kvm_sregs sregs;
>>>> -
>>>> - sregs.pvr = env->spr[SPR_PVR];
>>>> -
>>>> - sregs.u.s.sdr1 = env->spr[SPR_SDR1];
>>>> -
>>>> - /* Sync SLB */
>>>> -#ifdef TARGET_PPC64
>>>> - for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
>>>> - sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
>>>> - if (env->slb[i].esid & SLB_ESID_V) {
>>>> - sregs.u.s.ppc64.slb[i].slbe |= i;
>>>> - }
>>>> - sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
>>>> - }
>>>> -#endif
>>>> -
>>>> - /* Sync SRs */
>>>> - for (i = 0; i < 16; i++) {
>>>> - sregs.u.s.ppc32.sr[i] = env->sr[i];
>>>> - }
>>>> -
>>>> - /* Sync BATs */
>>>> - for (i = 0; i < 8; i++) {
>>>> - /* Beware. We have to swap upper and lower bits here */
>>>> - sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
>>>> - | env->DBAT[1][i];
>>>> - sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
>>>> - | env->IBAT[1][i];
>>>> - }
>>>> -
>>>> - ret = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs);
>>>> - if (ret) {
>>>> + ret = kvmppc_put_books_sregs(cpu);
>>>> + if (ret < 0) {
>>>> return ret;
>>>> }
>>>> }
>>>> @@ -1014,12 +1021,197 @@ static void kvm_sync_excp(CPUPPCState *env, int vector, int ivor)
>>>> env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR];
>>>> }
>>>>
>>>> +static int kvmppc_get_booke_sregs(PowerPCCPU *cpu)
>>
>>
>> I found it confusing that the patch is not adding kvmppc_put_booke_sregs...
>> Not a problem of this patch though but if the commit log for booke-only
>> patch has mentioned it, I would not have to have a look in QEMU tree :)
>
> Hm, ok.
>
>>>> +{
>>>> + CPUPPCState *env = &cpu->env;
>>>> + struct kvm_sregs sregs;
>>>> + int ret;
>>>> +
>>>> + ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
>>>> + if (ret < 0) {
>>>> + return ret;
>>>> + }
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_E_BASE) {
>>>> + env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
>>>> + env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
>>>> + env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
>>>> + env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
>>>> + env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
>>>> + env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
>>>> + env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
>>>> + env->spr[SPR_DECR] = sregs.u.e.dec;
>>>> + env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
>>>> + env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
>>>> + env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
>>>> + }
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
>>>> + env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
>>>> + env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
>>>> + env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
>>>> + env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
>>>> + env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
>>>> + }
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_E_64) {
>>>> + env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
>>>> + }
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
>>>> + env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
>>>> + }
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
>>>> + env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
>>>> + env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
>>>> + env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
>>>> + env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
>>>> + env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
>>>> + env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
>>>> + env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
>>>> + env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
>>>> + env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
>>>> + env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
>>>> + env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
>>>> + env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
>>>> + env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
>>>> + env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
>>>> + env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
>>>> + env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_E_SPE) {
>>>> + env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
>>>> + env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
>>>> + env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
>>>> + }
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_E_PM) {
>>>> + env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
>>>> + }
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_E_PC) {
>>>> + env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
>>>> + env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
>>>> + kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
>>>> + }
>>>> + }
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
>>>> + env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
>>>> + env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
>>>> + env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
>>>> + env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
>>>> + env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
>>>> + env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
>>>> + env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
>>>> + env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
>>>> + env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
>>>> + env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
>>>> + }
>>
>> Wrong indend.
>
> Yeah, Thomas noted that so I've already fixed it.
>
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_EXP) {
>>>> + env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
>>>> + }
>>>> +
>>>> + if (sregs.u.e.features & KVM_SREGS_E_PD) {
>>>> + env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
>>>> + env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
>>>> + }
>>>> +
>>>> + if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
>>>> + env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
>>>> + env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
>>>> + env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
>>>> +
>>>> + if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
>>>> + env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
>>>> + env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
>>>> + }
>>>> + }
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> +static int kvmppc_get_books_sregs(PowerPCCPU *cpu)
>>>> +{
>>>> + CPUPPCState *env = &cpu->env;
>>>> + struct kvm_sregs sregs;
>>>> + int ret;
>>>> + int i;
>>>> +
>>>> + ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
>>>> + if (ret < 0) {
>>>> + return ret;
>>>> + }
>>>> +
>>>> + if (!env->external_htab) {
>>>> + ppc_store_sdr1(env, sregs.u.s.sdr1);
>>>> + }
>>>> +
>>>> + /* Sync SLB */
>>>> +#ifdef TARGET_PPC64
>>>> + /*
>>>> + * The packed SLB array we get from KVM_GET_SREGS only contains
>>>> + * information about valid entries. So we flush our internal copy
>>>> + * to get rid of stale ones, then put all valid SLB entries back
>>>> + * in.
>>>> + */
>>>> + memset(env->slb, 0, sizeof(env->slb));
>>>> + for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
>>>> + target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
>>>> + target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
>>>> + /*
>>>> + * Only restore valid entries
>>>> + */
>>>> + if (rb & SLB_ESID_V) {
>>>> + ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
>>>> + }
>>>> + }
>>>> +#endif
>>>> +
>>>> + /* Sync SRs */
>>>> + for (i = 0; i < 16; i++) {
>>>> + env->sr[i] = sregs.u.s.ppc32.sr[i];
>>>> + }
>>>> +
>>>> + /* Sync BATs */
>>>> + for (i = 0; i < 8; i++) {
>>>> + env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
>>>> + env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
>>>> + env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
>>>> + env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
>>>> + }
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> int kvm_arch_get_registers(CPUState *cs)
>>>> {
>>>> PowerPCCPU *cpu = POWERPC_CPU(cs);
>>>> CPUPPCState *env = &cpu->env;
>>>> struct kvm_regs regs;
>>>> - struct kvm_sregs sregs;
>>>> uint32_t cr;
>>>> int i, ret;
>>>>
>>>> @@ -1059,174 +1251,17 @@ int kvm_arch_get_registers(CPUState *cs)
>>>> kvm_get_fp(cs);
>>>>
>>>> if (cap_booke_sregs) {
>>>> - ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
>>>> + ret = kvmppc_get_booke_sregs(cpu);
>>>> if (ret < 0) {
>>>> return ret;
>>>> }
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_E_BASE) {
>>>> - env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
>>>> - env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
>>>> - env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
>>>> - env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
>>>> - env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
>>>> - env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
>>>> - env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
>>>> - env->spr[SPR_DECR] = sregs.u.e.dec;
>>>> - env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
>>>> - env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
>>>> - env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
>>>> - }
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
>>>> - env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
>>>> - env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
>>>> - env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
>>>> - env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
>>>> - env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
>>>> - }
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_E_64) {
>>>> - env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
>>>> - }
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
>>>> - env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
>>>> - }
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
>>>> - env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
>>>> - env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
>>>> - env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
>>>> - env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
>>>> - env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
>>>> - env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
>>>> - env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
>>>> - env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
>>>> - env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
>>>> - env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
>>>> - env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
>>>> - env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
>>>> - env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
>>>> - env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
>>>> - env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
>>>> - env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_E_SPE) {
>>>> - env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
>>>> - env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
>>>> - env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
>>>> - }
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_E_PM) {
>>>> - env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
>>>> - }
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_E_PC) {
>>>> - env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
>>>> - env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
>>>> - kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
>>>> - }
>>>> - }
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
>>>> - env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
>>>> - env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
>>>> - env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
>>>> - env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
>>>> - env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
>>>> - env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
>>>> - env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
>>>> - env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
>>>> - env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
>>>> - env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
>>>> - }
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_EXP) {
>>>> - env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
>>>> - }
>>>> -
>>>> - if (sregs.u.e.features & KVM_SREGS_E_PD) {
>>>> - env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
>>>> - env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
>>>> - }
>>>> -
>>>> - if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
>>>> - env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
>>>> - env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
>>>> - env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
>>>> -
>>>> - if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
>>>> - env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
>>>> - env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
>>>> - }
>>>> - }
>>>> }
>>>>
>>>> if (cap_segstate) {
>>>> - ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
>>>> + ret = kvmppc_get_books_sregs(cpu);
>>
>>
>> s/kvmppc_get_books_sregs/kvmppc_get_books_segstate_sregs/
>
> Um.. why? It's the {GET,SET}_SREGS call that these are wrapping.
> cap_segstate is just a kinda-old name for it.
So cap_segstate == book3s_sregs effectively? Ok.
>> or fold "if (cap_hior)" (at the end of this chunk) into
>> kvmppc_get_books_sregs().
>
> Again, why? HIOR is a separate one-reg call, not in the sregs block.
I misinterpret what HIOR is, this is not pseries but rather powermac,
right? Then never mind.
With that indent fixed,
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>>>> if (ret < 0) {
>>>> return ret;
>>>> }
>>>> -
>>>> - if (!env->external_htab) {
>>>> - ppc_store_sdr1(env, sregs.u.s.sdr1);
>>>> - }
>>>> -
>>>> - /* Sync SLB */
>>>> -#ifdef TARGET_PPC64
>>>> - /*
>>>> - * The packed SLB array we get from KVM_GET_SREGS only contains
>>>> - * information about valid entries. So we flush our internal
>>>> - * copy to get rid of stale ones, then put all valid SLB entries
>>>> - * back in.
>>>> - */
>>>> - memset(env->slb, 0, sizeof(env->slb));
>>>> - for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
>>>> - target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
>>>> - target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
>>>> - /*
>>>> - * Only restore valid entries
>>>> - */
>>>> - if (rb & SLB_ESID_V) {
>>>> - ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
>>>> - }
>>>> - }
>>>> -#endif
>>>> -
>>>> - /* Sync SRs */
>>>> - for (i = 0; i < 16; i++) {
>>>> - env->sr[i] = sregs.u.s.ppc32.sr[i];
>>>> - }
>>>> -
>>>> - /* Sync BATs */
>>>> - for (i = 0; i < 8; i++) {
>>>> - env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
>>>> - env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
>>>> - env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
>>>> - env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
>>>> - }
>>>> }
>>>>
>>>> if (cap_hior) {
>>>
>>
>>
>
--
Alexey
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions
2016-03-08 5:13 ` Alexey Kardashevskiy
@ 2016-03-08 5:50 ` David Gibson
0 siblings, 0 replies; 21+ messages in thread
From: David Gibson @ 2016-03-08 5:50 UTC (permalink / raw)
To: Alexey Kardashevskiy; +Cc: lvivier, thuth, qemu-devel, agraf, qemu-ppc, gkurz
[-- Attachment #1: Type: text/plain, Size: 22615 bytes --]
On Tue, Mar 08, 2016 at 04:13:08PM +1100, Alexey Kardashevskiy wrote:
> On 03/08/2016 02:53 PM, David Gibson wrote:
> >On Tue, Mar 08, 2016 at 02:01:12PM +1100, Alexey Kardashevskiy wrote:
> >>On 03/08/2016 11:37 AM, David Gibson wrote:
> >>>On Mon, Mar 07, 2016 at 01:26:24PM +1100, David Gibson wrote:
> >>>>Currently the getting and setting of Power MMU registers (sregs) take up
> >>>>large inline chunks of the kvm_arch_get_registers() and
> >>>>kvm_arch_put_registers() functions. Especially since there are two
> >>>>variants (for Book-E and Book-S CPUs), only one of which will be used in
> >>>>practice, this is pretty hard to read.
> >>>>
> >>>>This patch splits these out into helper functions for clarity. No
> >>>>functional change is expected.
> >>>>
> >>>>Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> >>>
> >>>Greg, or Alexey, can I can an R-b for this one as well?
> >>
> >>
> >>Well, the patch itself is quite alright but you could do BookE and BookS
> >>changes in separate patches.
> >
> >Well.. if you insist.
>
> I do not really, this is rather a wish for the future :)
>
>
> >
> >>And some more comments below.
> >
> >
> >>
> >>>
> >>>>---
> >>>> target-ppc/kvm.c | 421 ++++++++++++++++++++++++++++++-------------------------
> >>>> 1 file changed, 228 insertions(+), 193 deletions(-)
> >>>>
> >>>>diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> >>>>index d67c169..8a762e8 100644
> >>>>--- a/target-ppc/kvm.c
> >>>>+++ b/target-ppc/kvm.c
> >>>>@@ -867,6 +867,44 @@ static int kvm_put_vpa(CPUState *cs)
> >>>> }
> >>>> #endif /* TARGET_PPC64 */
> >>>>
> >>>>+static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> >>>>+{
> >>>>+ CPUPPCState *env = &cpu->env;
> >>>>+ struct kvm_sregs sregs;
> >>>>+ int i;
> >>>>+
> >>>>+ sregs.pvr = env->spr[SPR_PVR];
> >>>>+
> >>>>+ sregs.u.s.sdr1 = env->spr[SPR_SDR1];
> >>>>+
> >>>>+ /* Sync SLB */
> >>>>+#ifdef TARGET_PPC64
> >>>>+ for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> >>>>+ sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> >>>>+ if (env->slb[i].esid & SLB_ESID_V) {
> >>>>+ sregs.u.s.ppc64.slb[i].slbe |= i;
> >>>>+ }
> >>>>+ sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> >>>>+ }
> >>>>+#endif
> >>>>+
> >>>>+ /* Sync SRs */
> >>>>+ for (i = 0; i < 16; i++) {
> >>>>+ sregs.u.s.ppc32.sr[i] = env->sr[i];
> >>>>+ }
> >>>>+
> >>>>+ /* Sync BATs */
> >>>>+ for (i = 0; i < 8; i++) {
> >>>>+ /* Beware. We have to swap upper and lower bits here */
> >>>>+ sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
> >>>>+ | env->DBAT[1][i];
> >>>>+ sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
> >>>>+ | env->IBAT[1][i];
> >>>>+ }
> >>>>+
> >>>>+ return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs);
> >>>>+}
> >>>>+
> >>>> int kvm_arch_put_registers(CPUState *cs, int level)
> >>>> {
> >>>> PowerPCCPU *cpu = POWERPC_CPU(cs);
> >>>>@@ -920,39 +958,8 @@ int kvm_arch_put_registers(CPUState *cs, int level)
> >>>> }
> >>>>
> >>>> if (cap_segstate && (level >= KVM_PUT_RESET_STATE)) {
> >>>>- struct kvm_sregs sregs;
> >>>>-
> >>>>- sregs.pvr = env->spr[SPR_PVR];
> >>>>-
> >>>>- sregs.u.s.sdr1 = env->spr[SPR_SDR1];
> >>>>-
> >>>>- /* Sync SLB */
> >>>>-#ifdef TARGET_PPC64
> >>>>- for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> >>>>- sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> >>>>- if (env->slb[i].esid & SLB_ESID_V) {
> >>>>- sregs.u.s.ppc64.slb[i].slbe |= i;
> >>>>- }
> >>>>- sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> >>>>- }
> >>>>-#endif
> >>>>-
> >>>>- /* Sync SRs */
> >>>>- for (i = 0; i < 16; i++) {
> >>>>- sregs.u.s.ppc32.sr[i] = env->sr[i];
> >>>>- }
> >>>>-
> >>>>- /* Sync BATs */
> >>>>- for (i = 0; i < 8; i++) {
> >>>>- /* Beware. We have to swap upper and lower bits here */
> >>>>- sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
> >>>>- | env->DBAT[1][i];
> >>>>- sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
> >>>>- | env->IBAT[1][i];
> >>>>- }
> >>>>-
> >>>>- ret = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs);
> >>>>- if (ret) {
> >>>>+ ret = kvmppc_put_books_sregs(cpu);
> >>>>+ if (ret < 0) {
> >>>> return ret;
> >>>> }
> >>>> }
> >>>>@@ -1014,12 +1021,197 @@ static void kvm_sync_excp(CPUPPCState *env, int vector, int ivor)
> >>>> env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR];
> >>>> }
> >>>>
> >>>>+static int kvmppc_get_booke_sregs(PowerPCCPU *cpu)
> >>
> >>
> >>I found it confusing that the patch is not adding kvmppc_put_booke_sregs...
> >>Not a problem of this patch though but if the commit log for booke-only
> >>patch has mentioned it, I would not have to have a look in QEMU tree :)
> >
> >Hm, ok.
> >
> >>>>+{
> >>>>+ CPUPPCState *env = &cpu->env;
> >>>>+ struct kvm_sregs sregs;
> >>>>+ int ret;
> >>>>+
> >>>>+ ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
> >>>>+ if (ret < 0) {
> >>>>+ return ret;
> >>>>+ }
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_E_BASE) {
> >>>>+ env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
> >>>>+ env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
> >>>>+ env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
> >>>>+ env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
> >>>>+ env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
> >>>>+ env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
> >>>>+ env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
> >>>>+ env->spr[SPR_DECR] = sregs.u.e.dec;
> >>>>+ env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
> >>>>+ env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
> >>>>+ env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
> >>>>+ }
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
> >>>>+ env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
> >>>>+ env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
> >>>>+ env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
> >>>>+ env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
> >>>>+ env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
> >>>>+ }
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_E_64) {
> >>>>+ env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
> >>>>+ }
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
> >>>>+ env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
> >>>>+ }
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
> >>>>+ env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
> >>>>+ env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
> >>>>+ env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
> >>>>+ env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
> >>>>+ env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
> >>>>+ env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
> >>>>+ env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
> >>>>+ env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
> >>>>+ env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
> >>>>+ env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
> >>>>+ env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
> >>>>+ env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
> >>>>+ env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
> >>>>+ env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
> >>>>+ env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
> >>>>+ env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_E_SPE) {
> >>>>+ env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
> >>>>+ env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
> >>>>+ env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
> >>>>+ }
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_E_PM) {
> >>>>+ env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
> >>>>+ }
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_E_PC) {
> >>>>+ env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
> >>>>+ env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
> >>>>+ kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
> >>>>+ }
> >>>>+ }
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
> >>>>+ env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
> >>>>+ env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
> >>>>+ env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
> >>>>+ env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
> >>>>+ env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
> >>>>+ env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
> >>>>+ env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
> >>>>+ env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
> >>>>+ env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
> >>>>+ env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
> >>>>+ }
> >>
> >>Wrong indend.
> >
> >Yeah, Thomas noted that so I've already fixed it.
> >
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_EXP) {
> >>>>+ env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
> >>>>+ }
> >>>>+
> >>>>+ if (sregs.u.e.features & KVM_SREGS_E_PD) {
> >>>>+ env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
> >>>>+ env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
> >>>>+ }
> >>>>+
> >>>>+ if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
> >>>>+ env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
> >>>>+ env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
> >>>>+ env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
> >>>>+
> >>>>+ if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
> >>>>+ env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
> >>>>+ env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
> >>>>+ }
> >>>>+ }
> >>>>+
> >>>>+ return 0;
> >>>>+}
> >>>>+
> >>>>+static int kvmppc_get_books_sregs(PowerPCCPU *cpu)
> >>>>+{
> >>>>+ CPUPPCState *env = &cpu->env;
> >>>>+ struct kvm_sregs sregs;
> >>>>+ int ret;
> >>>>+ int i;
> >>>>+
> >>>>+ ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
> >>>>+ if (ret < 0) {
> >>>>+ return ret;
> >>>>+ }
> >>>>+
> >>>>+ if (!env->external_htab) {
> >>>>+ ppc_store_sdr1(env, sregs.u.s.sdr1);
> >>>>+ }
> >>>>+
> >>>>+ /* Sync SLB */
> >>>>+#ifdef TARGET_PPC64
> >>>>+ /*
> >>>>+ * The packed SLB array we get from KVM_GET_SREGS only contains
> >>>>+ * information about valid entries. So we flush our internal copy
> >>>>+ * to get rid of stale ones, then put all valid SLB entries back
> >>>>+ * in.
> >>>>+ */
> >>>>+ memset(env->slb, 0, sizeof(env->slb));
> >>>>+ for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> >>>>+ target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
> >>>>+ target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
> >>>>+ /*
> >>>>+ * Only restore valid entries
> >>>>+ */
> >>>>+ if (rb & SLB_ESID_V) {
> >>>>+ ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
> >>>>+ }
> >>>>+ }
> >>>>+#endif
> >>>>+
> >>>>+ /* Sync SRs */
> >>>>+ for (i = 0; i < 16; i++) {
> >>>>+ env->sr[i] = sregs.u.s.ppc32.sr[i];
> >>>>+ }
> >>>>+
> >>>>+ /* Sync BATs */
> >>>>+ for (i = 0; i < 8; i++) {
> >>>>+ env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
> >>>>+ env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
> >>>>+ env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
> >>>>+ env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
> >>>>+ }
> >>>>+
> >>>>+ return 0;
> >>>>+}
> >>>>+
> >>>> int kvm_arch_get_registers(CPUState *cs)
> >>>> {
> >>>> PowerPCCPU *cpu = POWERPC_CPU(cs);
> >>>> CPUPPCState *env = &cpu->env;
> >>>> struct kvm_regs regs;
> >>>>- struct kvm_sregs sregs;
> >>>> uint32_t cr;
> >>>> int i, ret;
> >>>>
> >>>>@@ -1059,174 +1251,17 @@ int kvm_arch_get_registers(CPUState *cs)
> >>>> kvm_get_fp(cs);
> >>>>
> >>>> if (cap_booke_sregs) {
> >>>>- ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
> >>>>+ ret = kvmppc_get_booke_sregs(cpu);
> >>>> if (ret < 0) {
> >>>> return ret;
> >>>> }
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_E_BASE) {
> >>>>- env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
> >>>>- env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
> >>>>- env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
> >>>>- env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
> >>>>- env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
> >>>>- env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
> >>>>- env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
> >>>>- env->spr[SPR_DECR] = sregs.u.e.dec;
> >>>>- env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
> >>>>- env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
> >>>>- env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
> >>>>- }
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
> >>>>- env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
> >>>>- env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
> >>>>- env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
> >>>>- env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
> >>>>- env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
> >>>>- }
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_E_64) {
> >>>>- env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
> >>>>- }
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
> >>>>- env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
> >>>>- }
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
> >>>>- env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
> >>>>- env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
> >>>>- env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
> >>>>- env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
> >>>>- env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
> >>>>- env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
> >>>>- env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
> >>>>- env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
> >>>>- env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
> >>>>- env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
> >>>>- env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
> >>>>- env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
> >>>>- env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
> >>>>- env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
> >>>>- env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
> >>>>- env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_E_SPE) {
> >>>>- env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
> >>>>- env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
> >>>>- env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
> >>>>- }
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_E_PM) {
> >>>>- env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
> >>>>- }
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_E_PC) {
> >>>>- env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
> >>>>- env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
> >>>>- kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
> >>>>- }
> >>>>- }
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
> >>>>- env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
> >>>>- env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
> >>>>- env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
> >>>>- env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
> >>>>- env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
> >>>>- env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
> >>>>- env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
> >>>>- env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
> >>>>- env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
> >>>>- env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
> >>>>- }
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_EXP) {
> >>>>- env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
> >>>>- }
> >>>>-
> >>>>- if (sregs.u.e.features & KVM_SREGS_E_PD) {
> >>>>- env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
> >>>>- env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
> >>>>- }
> >>>>-
> >>>>- if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
> >>>>- env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
> >>>>- env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
> >>>>- env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
> >>>>-
> >>>>- if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
> >>>>- env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
> >>>>- env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
> >>>>- }
> >>>>- }
> >>>> }
> >>>>
> >>>> if (cap_segstate) {
> >>>>- ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
> >>>>+ ret = kvmppc_get_books_sregs(cpu);
> >>
> >>
> >>s/kvmppc_get_books_sregs/kvmppc_get_books_segstate_sregs/
> >
> >Um.. why? It's the {GET,SET}_SREGS call that these are wrapping.
> >cap_segstate is just a kinda-old name for it.
>
>
> So cap_segstate == book3s_sregs effectively? Ok.
It's a bit odd, but it's not new, right. I could either make the
function name match the cap name, or make it match the ioctl name (and
the similar BookE function). I chose the latter.
> >>or fold "if (cap_hior)" (at the end of this chunk) into
> >>kvmppc_get_books_sregs().
> >
> >Again, why? HIOR is a separate one-reg call, not in the sregs block.
>
>
> I misinterpret what HIOR is, this is not pseries but rather powermac, right?
> Then never mind.
>
> With that indent fixed,
>
>
> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Thanks.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions
2016-03-08 0:37 ` David Gibson
2016-03-08 3:01 ` Alexey Kardashevskiy
@ 2016-03-08 8:50 ` Greg Kurz
1 sibling, 0 replies; 21+ messages in thread
From: Greg Kurz @ 2016-03-08 8:50 UTC (permalink / raw)
To: David Gibson; +Cc: lvivier, thuth, aik, agraf, qemu-devel, qemu-ppc
On Tue, 8 Mar 2016 11:37:02 +1100
David Gibson <david@gibson.dropbear.id.au> wrote:
> On Mon, Mar 07, 2016 at 01:26:24PM +1100, David Gibson wrote:
> > Currently the getting and setting of Power MMU registers (sregs) take up
> > large inline chunks of the kvm_arch_get_registers() and
> > kvm_arch_put_registers() functions. Especially since there are two
> > variants (for Book-E and Book-S CPUs), only one of which will be used in
> > practice, this is pretty hard to read.
> >
> > This patch splits these out into helper functions for clarity. No
> > functional change is expected.
> >
> > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
>
> Greg, or Alexey, can I can an R-b for this one as well?
>
Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
> > ---
> > target-ppc/kvm.c | 421 ++++++++++++++++++++++++++++++-------------------------
> > 1 file changed, 228 insertions(+), 193 deletions(-)
> >
> > diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> > index d67c169..8a762e8 100644
> > --- a/target-ppc/kvm.c
> > +++ b/target-ppc/kvm.c
> > @@ -867,6 +867,44 @@ static int kvm_put_vpa(CPUState *cs)
> > }
> > #endif /* TARGET_PPC64 */
> >
> > +static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> > +{
> > + CPUPPCState *env = &cpu->env;
> > + struct kvm_sregs sregs;
> > + int i;
> > +
> > + sregs.pvr = env->spr[SPR_PVR];
> > +
> > + sregs.u.s.sdr1 = env->spr[SPR_SDR1];
> > +
> > + /* Sync SLB */
> > +#ifdef TARGET_PPC64
> > + for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> > + sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> > + if (env->slb[i].esid & SLB_ESID_V) {
> > + sregs.u.s.ppc64.slb[i].slbe |= i;
> > + }
> > + sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> > + }
> > +#endif
> > +
> > + /* Sync SRs */
> > + for (i = 0; i < 16; i++) {
> > + sregs.u.s.ppc32.sr[i] = env->sr[i];
> > + }
> > +
> > + /* Sync BATs */
> > + for (i = 0; i < 8; i++) {
> > + /* Beware. We have to swap upper and lower bits here */
> > + sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
> > + | env->DBAT[1][i];
> > + sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
> > + | env->IBAT[1][i];
> > + }
> > +
> > + return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs);
> > +}
> > +
> > int kvm_arch_put_registers(CPUState *cs, int level)
> > {
> > PowerPCCPU *cpu = POWERPC_CPU(cs);
> > @@ -920,39 +958,8 @@ int kvm_arch_put_registers(CPUState *cs, int level)
> > }
> >
> > if (cap_segstate && (level >= KVM_PUT_RESET_STATE)) {
> > - struct kvm_sregs sregs;
> > -
> > - sregs.pvr = env->spr[SPR_PVR];
> > -
> > - sregs.u.s.sdr1 = env->spr[SPR_SDR1];
> > -
> > - /* Sync SLB */
> > -#ifdef TARGET_PPC64
> > - for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> > - sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid;
> > - if (env->slb[i].esid & SLB_ESID_V) {
> > - sregs.u.s.ppc64.slb[i].slbe |= i;
> > - }
> > - sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid;
> > - }
> > -#endif
> > -
> > - /* Sync SRs */
> > - for (i = 0; i < 16; i++) {
> > - sregs.u.s.ppc32.sr[i] = env->sr[i];
> > - }
> > -
> > - /* Sync BATs */
> > - for (i = 0; i < 8; i++) {
> > - /* Beware. We have to swap upper and lower bits here */
> > - sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
> > - | env->DBAT[1][i];
> > - sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
> > - | env->IBAT[1][i];
> > - }
> > -
> > - ret = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs);
> > - if (ret) {
> > + ret = kvmppc_put_books_sregs(cpu);
> > + if (ret < 0) {
> > return ret;
> > }
> > }
> > @@ -1014,12 +1021,197 @@ static void kvm_sync_excp(CPUPPCState *env, int vector, int ivor)
> > env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR];
> > }
> >
> > +static int kvmppc_get_booke_sregs(PowerPCCPU *cpu)
> > +{
> > + CPUPPCState *env = &cpu->env;
> > + struct kvm_sregs sregs;
> > + int ret;
> > +
> > + ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
> > + if (ret < 0) {
> > + return ret;
> > + }
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_BASE) {
> > + env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
> > + env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
> > + env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
> > + env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
> > + env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
> > + env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
> > + env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
> > + env->spr[SPR_DECR] = sregs.u.e.dec;
> > + env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
> > + env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
> > + env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
> > + }
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
> > + env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
> > + env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
> > + env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
> > + env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
> > + env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
> > + }
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_64) {
> > + env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
> > + }
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
> > + env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
> > + }
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
> > + env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
> > + kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
> > + env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
> > + kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
> > + env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
> > + kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
> > + env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
> > + kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
> > + env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
> > + kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
> > + env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
> > + kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
> > + env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
> > + kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
> > + env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
> > + kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
> > + env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
> > + kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
> > + env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
> > + kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
> > + env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
> > + kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
> > + env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
> > + kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
> > + env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
> > + kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
> > + env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
> > + kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
> > + env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
> > + kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
> > + env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
> > + kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_SPE) {
> > + env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
> > + kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
> > + env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
> > + kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
> > + env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
> > + kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
> > + }
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_PM) {
> > + env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
> > + kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
> > + }
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_PC) {
> > + env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
> > + kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
> > + env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
> > + kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
> > + }
> > + }
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
> > + env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
> > + env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
> > + env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
> > + env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
> > + env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
> > + env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
> > + env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
> > + env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
> > + env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
> > + env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
> > + }
> > +
> > + if (sregs.u.e.features & KVM_SREGS_EXP) {
> > + env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
> > + }
> > +
> > + if (sregs.u.e.features & KVM_SREGS_E_PD) {
> > + env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
> > + env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
> > + }
> > +
> > + if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
> > + env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
> > + env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
> > + env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
> > +
> > + if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
> > + env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
> > + env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
> > + }
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static int kvmppc_get_books_sregs(PowerPCCPU *cpu)
> > +{
> > + CPUPPCState *env = &cpu->env;
> > + struct kvm_sregs sregs;
> > + int ret;
> > + int i;
> > +
> > + ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
> > + if (ret < 0) {
> > + return ret;
> > + }
> > +
> > + if (!env->external_htab) {
> > + ppc_store_sdr1(env, sregs.u.s.sdr1);
> > + }
> > +
> > + /* Sync SLB */
> > +#ifdef TARGET_PPC64
> > + /*
> > + * The packed SLB array we get from KVM_GET_SREGS only contains
> > + * information about valid entries. So we flush our internal copy
> > + * to get rid of stale ones, then put all valid SLB entries back
> > + * in.
> > + */
> > + memset(env->slb, 0, sizeof(env->slb));
> > + for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> > + target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
> > + target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
> > + /*
> > + * Only restore valid entries
> > + */
> > + if (rb & SLB_ESID_V) {
> > + ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
> > + }
> > + }
> > +#endif
> > +
> > + /* Sync SRs */
> > + for (i = 0; i < 16; i++) {
> > + env->sr[i] = sregs.u.s.ppc32.sr[i];
> > + }
> > +
> > + /* Sync BATs */
> > + for (i = 0; i < 8; i++) {
> > + env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
> > + env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
> > + env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
> > + env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > int kvm_arch_get_registers(CPUState *cs)
> > {
> > PowerPCCPU *cpu = POWERPC_CPU(cs);
> > CPUPPCState *env = &cpu->env;
> > struct kvm_regs regs;
> > - struct kvm_sregs sregs;
> > uint32_t cr;
> > int i, ret;
> >
> > @@ -1059,174 +1251,17 @@ int kvm_arch_get_registers(CPUState *cs)
> > kvm_get_fp(cs);
> >
> > if (cap_booke_sregs) {
> > - ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
> > + ret = kvmppc_get_booke_sregs(cpu);
> > if (ret < 0) {
> > return ret;
> > }
> > -
> > - if (sregs.u.e.features & KVM_SREGS_E_BASE) {
> > - env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
> > - env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
> > - env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr;
> > - env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear;
> > - env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr;
> > - env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr;
> > - env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr;
> > - env->spr[SPR_DECR] = sregs.u.e.dec;
> > - env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff;
> > - env->spr[SPR_TBU] = sregs.u.e.tb >> 32;
> > - env->spr[SPR_VRSAVE] = sregs.u.e.vrsave;
> > - }
> > -
> > - if (sregs.u.e.features & KVM_SREGS_E_ARCH206) {
> > - env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir;
> > - env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0;
> > - env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1;
> > - env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar;
> > - env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr;
> > - }
> > -
> > - if (sregs.u.e.features & KVM_SREGS_E_64) {
> > - env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr;
> > - }
> > -
> > - if (sregs.u.e.features & KVM_SREGS_E_SPRG8) {
> > - env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8;
> > - }
> > -
> > - if (sregs.u.e.features & KVM_SREGS_E_IVOR) {
> > - env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0];
> > - kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0);
> > - env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1];
> > - kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1);
> > - env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2];
> > - kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2);
> > - env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3];
> > - kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3);
> > - env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4];
> > - kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4);
> > - env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5];
> > - kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5);
> > - env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6];
> > - kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6);
> > - env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7];
> > - kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7);
> > - env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8];
> > - kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8);
> > - env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9];
> > - kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9);
> > - env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10];
> > - kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10);
> > - env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11];
> > - kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11);
> > - env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12];
> > - kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12);
> > - env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13];
> > - kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13);
> > - env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14];
> > - kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14);
> > - env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15];
> > - kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15);
> > -
> > - if (sregs.u.e.features & KVM_SREGS_E_SPE) {
> > - env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0];
> > - kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32);
> > - env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1];
> > - kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33);
> > - env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2];
> > - kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34);
> > - }
> > -
> > - if (sregs.u.e.features & KVM_SREGS_E_PM) {
> > - env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3];
> > - kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35);
> > - }
> > -
> > - if (sregs.u.e.features & KVM_SREGS_E_PC) {
> > - env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4];
> > - kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36);
> > - env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5];
> > - kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37);
> > - }
> > - }
> > -
> > - if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) {
> > - env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0;
> > - env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1;
> > - env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2;
> > - env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff;
> > - env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4;
> > - env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6;
> > - env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32;
> > - env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg;
> > - env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0];
> > - env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1];
> > - }
> > -
> > - if (sregs.u.e.features & KVM_SREGS_EXP) {
> > - env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr;
> > - }
> > -
> > - if (sregs.u.e.features & KVM_SREGS_E_PD) {
> > - env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc;
> > - env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc;
> > - }
> > -
> > - if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
> > - env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr;
> > - env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar;
> > - env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0;
> > -
> > - if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) {
> > - env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1;
> > - env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
> > - }
> > - }
> > }
> >
> > if (cap_segstate) {
> > - ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs);
> > + ret = kvmppc_get_books_sregs(cpu);
> > if (ret < 0) {
> > return ret;
> > }
> > -
> > - if (!env->external_htab) {
> > - ppc_store_sdr1(env, sregs.u.s.sdr1);
> > - }
> > -
> > - /* Sync SLB */
> > -#ifdef TARGET_PPC64
> > - /*
> > - * The packed SLB array we get from KVM_GET_SREGS only contains
> > - * information about valid entries. So we flush our internal
> > - * copy to get rid of stale ones, then put all valid SLB entries
> > - * back in.
> > - */
> > - memset(env->slb, 0, sizeof(env->slb));
> > - for (i = 0; i < ARRAY_SIZE(env->slb); i++) {
> > - target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
> > - target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
> > - /*
> > - * Only restore valid entries
> > - */
> > - if (rb & SLB_ESID_V) {
> > - ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs);
> > - }
> > - }
> > -#endif
> > -
> > - /* Sync SRs */
> > - for (i = 0; i < 16; i++) {
> > - env->sr[i] = sregs.u.s.ppc32.sr[i];
> > - }
> > -
> > - /* Sync BATs */
> > - for (i = 0; i < 8; i++) {
> > - env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
> > - env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
> > - env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
> > - env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
> > - }
> > }
> >
> > if (cap_hior) {
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT David Gibson
2016-03-07 13:37 ` Greg Kurz
2016-03-07 15:56 ` Thomas Huth
@ 2016-03-22 16:33 ` Laurent Vivier
2016-03-24 5:35 ` David Gibson
2 siblings, 1 reply; 21+ messages in thread
From: Laurent Vivier @ 2016-03-22 16:33 UTC (permalink / raw)
To: David Gibson, gkurz, aik; +Cc: thuth, qemu-ppc, agraf, qemu-devel
Hi David,
using kvm-unit-tests, I've found a side effect of your patches: the MSR
is cleared (and perhaps some others).
I was trying to test my patch on top of QEMU master:
"ppc64: set MSR_SF bit"
http://patchwork.ozlabs.org/patch/598198/
and it was not working anymore.
By bisecting, I've found this commit.
I think "cpu_synchronize_state()" in "ppc_hash64_set_external_hpt()"
restores the MSR from KVM whereas the one from QEMU has not been saved,
because cpu_synchronize_all_post_reset() is called later.
So it is cleared.
You can test this by applying the MSR_SF patch and using the "emulator"
test of kvm-unit-tests (the "emulator: 64bit" test case)
Laurent
On 07/03/2016 03:26, David Gibson wrote:
> When a Power cpu with 64-bit hash MMU has it's hash page table (HPT)
> pointer updated by a write to the SDR1 register we need to update some
> derived variables. Likewise, when the cpu is configured for an external
> HPT (one not in the guest memory space) some derived variables need to be
> updated.
>
> Currently the logic for this is (partially) duplicated in ppc_store_sdr1()
> and in spapr_cpu_reset(). In future we're going to need it in some other
> places, so make some common helpers for this update.
>
> In addition the new ppc_hash64_set_external_hpt() helper also updates
> SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU
> synchronization. In a sense this belongs logically in the
> ppc_hash64_set_sdr1() helper, but that is called from
> kvm_arch_get_registers() so can't itself call cpu_synchronize_state()
> without infinite recursion. In practice this doesn't matter because
> the only other caller is TCG specific.
>
> Currently there aren't situations where updating SDR1 at runtime in KVM
> matters, but there are going to be in future.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/ppc/spapr.c | 13 ++-----------
> target-ppc/kvm.c | 2 +-
> target-ppc/kvm_ppc.h | 6 ++++++
> target-ppc/mmu-hash64.c | 43 +++++++++++++++++++++++++++++++++++++++++++
> target-ppc/mmu-hash64.h | 6 ++++++
> target-ppc/mmu_helper.c | 13 ++++++-------
> 6 files changed, 64 insertions(+), 19 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 64c4acc..72a018b 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -1196,17 +1196,8 @@ static void spapr_cpu_reset(void *opaque)
>
> env->spr[SPR_HIOR] = 0;
>
> - env->external_htab = (uint8_t *)spapr->htab;
> - env->htab_base = -1;
> - /*
> - * htab_mask is the mask used to normalize hash value to PTEG index.
> - * htab_shift is log2 of hash table size.
> - * We have 8 hpte per group, and each hpte is 16 bytes.
> - * ie have 128 bytes per hpte entry.
> - */
> - env->htab_mask = (1ULL << (spapr->htab_shift - 7)) - 1;
> - env->spr[SPR_SDR1] = (target_ulong)(uintptr_t)spapr->htab |
> - (spapr->htab_shift - 18);
> + ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
> + &error_fatal);
> }
>
> static void spapr_create_nvram(sPAPRMachineState *spapr)
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index 8a762e8..380dff6 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -867,7 +867,7 @@ static int kvm_put_vpa(CPUState *cs)
> }
> #endif /* TARGET_PPC64 */
>
> -static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> +int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> {
> CPUPPCState *env = &cpu->env;
> struct kvm_sregs sregs;
> diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
> index fd64c44..fc79312 100644
> --- a/target-ppc/kvm_ppc.h
> +++ b/target-ppc/kvm_ppc.h
> @@ -55,6 +55,7 @@ void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,
> target_ulong pte0, target_ulong pte1);
> bool kvmppc_has_cap_fixup_hcalls(void);
> int kvmppc_enable_hwrng(void);
> +int kvmppc_put_books_sregs(PowerPCCPU *cpu);
>
> #else
>
> @@ -246,6 +247,11 @@ static inline int kvmppc_enable_hwrng(void)
> {
> return -1;
> }
> +
> +static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> +{
> + abort();
> +}
> #endif
>
> #ifndef CONFIG_KVM
> diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
> index 9c58fbf..7b5200b 100644
> --- a/target-ppc/mmu-hash64.c
> +++ b/target-ppc/mmu-hash64.c
> @@ -258,6 +258,49 @@ target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb)
> /*
> * 64-bit hash table MMU handling
> */
> +void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
> + Error **errp)
> +{
> + CPUPPCState *env = &cpu->env;
> + target_ulong htabsize = value & SDR_64_HTABSIZE;
> +
> + env->spr[SPR_SDR1] = value;
> + if (htabsize > 28) {
> + error_setg(errp,
> + "Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1",
> + htabsize);
> + htabsize = 28;
> + }
> + env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
> + env->htab_base = value & SDR_64_HTABORG;
> +}
> +
> +void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
> + Error **errp)
> +{
> + CPUPPCState *env = &cpu->env;
> + Error *local_err = NULL;
> +
> + cpu_synchronize_state(CPU(cpu));
> +
> + env->external_htab = hpt;
> + ppc_hash64_set_sdr1(cpu, (target_ulong)(uintptr_t)hpt | (shift - 18),
> + &local_err);
> + if (local_err) {
> + error_propagate(errp, local_err);
> + return;
> + }
> +
> + /* Not strictly necessary, but makes it clearer that an external
> + * htab is in use when debugging */
> + env->htab_base = -1;
> +
> + if (kvm_enabled()) {
> + if (kvmppc_put_books_sregs(cpu) < 0) {
> + error_setg(errp, "Unable to update SDR1 in KVM");
> + }
> + }
> +}
>
> static int ppc_hash64_pte_prot(PowerPCCPU *cpu,
> ppc_slb_t *slb, ppc_hash_pte64_t pte)
> diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
> index e7d9925..138cd7e 100644
> --- a/target-ppc/mmu-hash64.h
> +++ b/target-ppc/mmu-hash64.h
> @@ -92,6 +92,12 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
>
>
> extern bool kvmppc_kern_htab;
> +
> +void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
> + Error **errp);
> +void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
> + Error **errp);
> +
> uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index);
> void ppc_hash64_stop_access(uint64_t token);
>
> diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
> index e5ec8d6..fcb2cc5 100644
> --- a/target-ppc/mmu_helper.c
> +++ b/target-ppc/mmu_helper.c
> @@ -2005,15 +2005,14 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value)
> env->spr[SPR_SDR1] = value;
> #if defined(TARGET_PPC64)
> if (env->mmu_model & POWERPC_MMU_64) {
> - target_ulong htabsize = value & SDR_64_HTABSIZE;
> + PowerPCCPU *cpu = ppc_env_get_cpu(env);
> + Error *local_err = NULL;
>
> - if (htabsize > 28) {
> - fprintf(stderr, "Invalid HTABSIZE 0x" TARGET_FMT_lx
> - " stored in SDR1\n", htabsize);
> - htabsize = 28;
> + ppc_hash64_set_sdr1(cpu, value, &local_err);
> + if (local_err) {
> + error_report_err(local_err);
> + error_free(local_err);
> }
> - env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
> - env->htab_base = value & SDR_64_HTABORG;
> } else
> #endif /* defined(TARGET_PPC64) */
> {
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT
2016-03-22 16:33 ` Laurent Vivier
@ 2016-03-24 5:35 ` David Gibson
2016-03-24 8:41 ` Laurent Vivier
0 siblings, 1 reply; 21+ messages in thread
From: David Gibson @ 2016-03-24 5:35 UTC (permalink / raw)
To: Laurent Vivier; +Cc: thuth, aik, qemu-devel, agraf, qemu-ppc, gkurz
[-- Attachment #1: Type: text/plain, Size: 8739 bytes --]
On Tue, Mar 22, 2016 at 05:33:45PM +0100, Laurent Vivier wrote:
> Hi David,
>
> using kvm-unit-tests, I've found a side effect of your patches: the MSR
> is cleared (and perhaps some others).
>
> I was trying to test my patch on top of QEMU master:
>
> "ppc64: set MSR_SF bit"
> http://patchwork.ozlabs.org/patch/598198/
>
> and it was not working anymore.
>
> By bisecting, I've found this commit.
>
> I think "cpu_synchronize_state()" in "ppc_hash64_set_external_hpt()"
> restores the MSR from KVM whereas the one from QEMU has not been saved,
> because cpu_synchronize_all_post_reset() is called later.
>
> So it is cleared.
>
> You can test this by applying the MSR_SF patch and using the "emulator"
> test of kvm-unit-tests (the "emulator: 64bit" test case)
Ugh, you're right of course. But, I'm having a bit of trouble
figuring out how to fix it propertly.
>
> Laurent
>
> On 07/03/2016 03:26, David Gibson wrote:
> > When a Power cpu with 64-bit hash MMU has it's hash page table (HPT)
> > pointer updated by a write to the SDR1 register we need to update some
> > derived variables. Likewise, when the cpu is configured for an external
> > HPT (one not in the guest memory space) some derived variables need to be
> > updated.
> >
> > Currently the logic for this is (partially) duplicated in ppc_store_sdr1()
> > and in spapr_cpu_reset(). In future we're going to need it in some other
> > places, so make some common helpers for this update.
> >
> > In addition the new ppc_hash64_set_external_hpt() helper also updates
> > SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU
> > synchronization. In a sense this belongs logically in the
> > ppc_hash64_set_sdr1() helper, but that is called from
> > kvm_arch_get_registers() so can't itself call cpu_synchronize_state()
> > without infinite recursion. In practice this doesn't matter because
> > the only other caller is TCG specific.
> >
> > Currently there aren't situations where updating SDR1 at runtime in KVM
> > matters, but there are going to be in future.
> >
> > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> > ---
> > hw/ppc/spapr.c | 13 ++-----------
> > target-ppc/kvm.c | 2 +-
> > target-ppc/kvm_ppc.h | 6 ++++++
> > target-ppc/mmu-hash64.c | 43 +++++++++++++++++++++++++++++++++++++++++++
> > target-ppc/mmu-hash64.h | 6 ++++++
> > target-ppc/mmu_helper.c | 13 ++++++-------
> > 6 files changed, 64 insertions(+), 19 deletions(-)
> >
> > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > index 64c4acc..72a018b 100644
> > --- a/hw/ppc/spapr.c
> > +++ b/hw/ppc/spapr.c
> > @@ -1196,17 +1196,8 @@ static void spapr_cpu_reset(void *opaque)
> >
> > env->spr[SPR_HIOR] = 0;
> >
> > - env->external_htab = (uint8_t *)spapr->htab;
> > - env->htab_base = -1;
> > - /*
> > - * htab_mask is the mask used to normalize hash value to PTEG index.
> > - * htab_shift is log2 of hash table size.
> > - * We have 8 hpte per group, and each hpte is 16 bytes.
> > - * ie have 128 bytes per hpte entry.
> > - */
> > - env->htab_mask = (1ULL << (spapr->htab_shift - 7)) - 1;
> > - env->spr[SPR_SDR1] = (target_ulong)(uintptr_t)spapr->htab |
> > - (spapr->htab_shift - 18);
> > + ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
> > + &error_fatal);
> > }
> >
> > static void spapr_create_nvram(sPAPRMachineState *spapr)
> > diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> > index 8a762e8..380dff6 100644
> > --- a/target-ppc/kvm.c
> > +++ b/target-ppc/kvm.c
> > @@ -867,7 +867,7 @@ static int kvm_put_vpa(CPUState *cs)
> > }
> > #endif /* TARGET_PPC64 */
> >
> > -static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> > +int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> > {
> > CPUPPCState *env = &cpu->env;
> > struct kvm_sregs sregs;
> > diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
> > index fd64c44..fc79312 100644
> > --- a/target-ppc/kvm_ppc.h
> > +++ b/target-ppc/kvm_ppc.h
> > @@ -55,6 +55,7 @@ void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,
> > target_ulong pte0, target_ulong pte1);
> > bool kvmppc_has_cap_fixup_hcalls(void);
> > int kvmppc_enable_hwrng(void);
> > +int kvmppc_put_books_sregs(PowerPCCPU *cpu);
> >
> > #else
> >
> > @@ -246,6 +247,11 @@ static inline int kvmppc_enable_hwrng(void)
> > {
> > return -1;
> > }
> > +
> > +static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> > +{
> > + abort();
> > +}
> > #endif
> >
> > #ifndef CONFIG_KVM
> > diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
> > index 9c58fbf..7b5200b 100644
> > --- a/target-ppc/mmu-hash64.c
> > +++ b/target-ppc/mmu-hash64.c
> > @@ -258,6 +258,49 @@ target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb)
> > /*
> > * 64-bit hash table MMU handling
> > */
> > +void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
> > + Error **errp)
> > +{
> > + CPUPPCState *env = &cpu->env;
> > + target_ulong htabsize = value & SDR_64_HTABSIZE;
> > +
> > + env->spr[SPR_SDR1] = value;
> > + if (htabsize > 28) {
> > + error_setg(errp,
> > + "Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1",
> > + htabsize);
> > + htabsize = 28;
> > + }
> > + env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
> > + env->htab_base = value & SDR_64_HTABORG;
> > +}
> > +
> > +void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
> > + Error **errp)
> > +{
> > + CPUPPCState *env = &cpu->env;
> > + Error *local_err = NULL;
> > +
> > + cpu_synchronize_state(CPU(cpu));
> > +
> > + env->external_htab = hpt;
> > + ppc_hash64_set_sdr1(cpu, (target_ulong)(uintptr_t)hpt | (shift - 18),
> > + &local_err);
> > + if (local_err) {
> > + error_propagate(errp, local_err);
> > + return;
> > + }
> > +
> > + /* Not strictly necessary, but makes it clearer that an external
> > + * htab is in use when debugging */
> > + env->htab_base = -1;
> > +
> > + if (kvm_enabled()) {
> > + if (kvmppc_put_books_sregs(cpu) < 0) {
> > + error_setg(errp, "Unable to update SDR1 in KVM");
> > + }
> > + }
> > +}
> >
> > static int ppc_hash64_pte_prot(PowerPCCPU *cpu,
> > ppc_slb_t *slb, ppc_hash_pte64_t pte)
> > diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
> > index e7d9925..138cd7e 100644
> > --- a/target-ppc/mmu-hash64.h
> > +++ b/target-ppc/mmu-hash64.h
> > @@ -92,6 +92,12 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
> >
> >
> > extern bool kvmppc_kern_htab;
> > +
> > +void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
> > + Error **errp);
> > +void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
> > + Error **errp);
> > +
> > uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index);
> > void ppc_hash64_stop_access(uint64_t token);
> >
> > diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
> > index e5ec8d6..fcb2cc5 100644
> > --- a/target-ppc/mmu_helper.c
> > +++ b/target-ppc/mmu_helper.c
> > @@ -2005,15 +2005,14 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value)
> > env->spr[SPR_SDR1] = value;
> > #if defined(TARGET_PPC64)
> > if (env->mmu_model & POWERPC_MMU_64) {
> > - target_ulong htabsize = value & SDR_64_HTABSIZE;
> > + PowerPCCPU *cpu = ppc_env_get_cpu(env);
> > + Error *local_err = NULL;
> >
> > - if (htabsize > 28) {
> > - fprintf(stderr, "Invalid HTABSIZE 0x" TARGET_FMT_lx
> > - " stored in SDR1\n", htabsize);
> > - htabsize = 28;
> > + ppc_hash64_set_sdr1(cpu, value, &local_err);
> > + if (local_err) {
> > + error_report_err(local_err);
> > + error_free(local_err);
> > }
> > - env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
> > - env->htab_base = value & SDR_64_HTABORG;
> > } else
> > #endif /* defined(TARGET_PPC64) */
> > {
> >
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT
2016-03-24 5:35 ` David Gibson
@ 2016-03-24 8:41 ` Laurent Vivier
2016-03-25 9:13 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
0 siblings, 1 reply; 21+ messages in thread
From: Laurent Vivier @ 2016-03-24 8:41 UTC (permalink / raw)
To: David Gibson; +Cc: thuth, aik, qemu-devel, agraf, qemu-ppc, gkurz
On 24/03/2016 06:35, David Gibson wrote:
> On Tue, Mar 22, 2016 at 05:33:45PM +0100, Laurent Vivier wrote:
>> Hi David,
>>
>> using kvm-unit-tests, I've found a side effect of your patches: the MSR
>> is cleared (and perhaps some others).
>>
>> I was trying to test my patch on top of QEMU master:
>>
>> "ppc64: set MSR_SF bit"
>> http://patchwork.ozlabs.org/patch/598198/
>>
>> and it was not working anymore.
>>
>> By bisecting, I've found this commit.
>>
>> I think "cpu_synchronize_state()" in "ppc_hash64_set_external_hpt()"
>> restores the MSR from KVM whereas the one from QEMU has not been saved,
>> because cpu_synchronize_all_post_reset() is called later.
>>
>> So it is cleared.
>>
>> You can test this by applying the MSR_SF patch and using the "emulator"
>> test of kvm-unit-tests (the "emulator: 64bit" test case)
>
> Ugh, you're right of course. But, I'm having a bit of trouble
> figuring out how to fix it propertly.
Perhaps you can just remove the cpu_synchronize_state()?
As this is in the reset phase (spapr_cpu_reset()), I think the content
of the QEMU side registers are correct, and they will be synchronized at
the end of the reset phase.
You can see in spapr_cpu_reset(), SPR_HIOR is updated without prior
sync. I think spapr_cpu_reset() is called by qemu_device_reset() in
qemu_system_reset(), which is always followed by a
cpu_synchronize_all_post_reset(), which will call
do_kvm_cpu_synchronize_post_reset() (kvm_arch_put_registers(cpu,
KVM_PUT_RESET_STATE)) at the end.
Laurent
>> On 07/03/2016 03:26, David Gibson wrote:
>>> When a Power cpu with 64-bit hash MMU has it's hash page table (HPT)
>>> pointer updated by a write to the SDR1 register we need to update some
>>> derived variables. Likewise, when the cpu is configured for an external
>>> HPT (one not in the guest memory space) some derived variables need to be
>>> updated.
>>>
>>> Currently the logic for this is (partially) duplicated in ppc_store_sdr1()
>>> and in spapr_cpu_reset(). In future we're going to need it in some other
>>> places, so make some common helpers for this update.
>>>
>>> In addition the new ppc_hash64_set_external_hpt() helper also updates
>>> SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU
>>> synchronization. In a sense this belongs logically in the
>>> ppc_hash64_set_sdr1() helper, but that is called from
>>> kvm_arch_get_registers() so can't itself call cpu_synchronize_state()
>>> without infinite recursion. In practice this doesn't matter because
>>> the only other caller is TCG specific.
>>>
>>> Currently there aren't situations where updating SDR1 at runtime in KVM
>>> matters, but there are going to be in future.
>>>
>>> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
>>> ---
>>> hw/ppc/spapr.c | 13 ++-----------
>>> target-ppc/kvm.c | 2 +-
>>> target-ppc/kvm_ppc.h | 6 ++++++
>>> target-ppc/mmu-hash64.c | 43 +++++++++++++++++++++++++++++++++++++++++++
>>> target-ppc/mmu-hash64.h | 6 ++++++
>>> target-ppc/mmu_helper.c | 13 ++++++-------
>>> 6 files changed, 64 insertions(+), 19 deletions(-)
>>>
>>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
>>> index 64c4acc..72a018b 100644
>>> --- a/hw/ppc/spapr.c
>>> +++ b/hw/ppc/spapr.c
>>> @@ -1196,17 +1196,8 @@ static void spapr_cpu_reset(void *opaque)
>>>
>>> env->spr[SPR_HIOR] = 0;
>>>
>>> - env->external_htab = (uint8_t *)spapr->htab;
>>> - env->htab_base = -1;
>>> - /*
>>> - * htab_mask is the mask used to normalize hash value to PTEG index.
>>> - * htab_shift is log2 of hash table size.
>>> - * We have 8 hpte per group, and each hpte is 16 bytes.
>>> - * ie have 128 bytes per hpte entry.
>>> - */
>>> - env->htab_mask = (1ULL << (spapr->htab_shift - 7)) - 1;
>>> - env->spr[SPR_SDR1] = (target_ulong)(uintptr_t)spapr->htab |
>>> - (spapr->htab_shift - 18);
>>> + ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
>>> + &error_fatal);
>>> }
>>>
>>> static void spapr_create_nvram(sPAPRMachineState *spapr)
>>> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
>>> index 8a762e8..380dff6 100644
>>> --- a/target-ppc/kvm.c
>>> +++ b/target-ppc/kvm.c
>>> @@ -867,7 +867,7 @@ static int kvm_put_vpa(CPUState *cs)
>>> }
>>> #endif /* TARGET_PPC64 */
>>>
>>> -static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
>>> +int kvmppc_put_books_sregs(PowerPCCPU *cpu)
>>> {
>>> CPUPPCState *env = &cpu->env;
>>> struct kvm_sregs sregs;
>>> diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
>>> index fd64c44..fc79312 100644
>>> --- a/target-ppc/kvm_ppc.h
>>> +++ b/target-ppc/kvm_ppc.h
>>> @@ -55,6 +55,7 @@ void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,
>>> target_ulong pte0, target_ulong pte1);
>>> bool kvmppc_has_cap_fixup_hcalls(void);
>>> int kvmppc_enable_hwrng(void);
>>> +int kvmppc_put_books_sregs(PowerPCCPU *cpu);
>>>
>>> #else
>>>
>>> @@ -246,6 +247,11 @@ static inline int kvmppc_enable_hwrng(void)
>>> {
>>> return -1;
>>> }
>>> +
>>> +static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
>>> +{
>>> + abort();
>>> +}
>>> #endif
>>>
>>> #ifndef CONFIG_KVM
>>> diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
>>> index 9c58fbf..7b5200b 100644
>>> --- a/target-ppc/mmu-hash64.c
>>> +++ b/target-ppc/mmu-hash64.c
>>> @@ -258,6 +258,49 @@ target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb)
>>> /*
>>> * 64-bit hash table MMU handling
>>> */
>>> +void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
>>> + Error **errp)
>>> +{
>>> + CPUPPCState *env = &cpu->env;
>>> + target_ulong htabsize = value & SDR_64_HTABSIZE;
>>> +
>>> + env->spr[SPR_SDR1] = value;
>>> + if (htabsize > 28) {
>>> + error_setg(errp,
>>> + "Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1",
>>> + htabsize);
>>> + htabsize = 28;
>>> + }
>>> + env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
>>> + env->htab_base = value & SDR_64_HTABORG;
>>> +}
>>> +
>>> +void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
>>> + Error **errp)
>>> +{
>>> + CPUPPCState *env = &cpu->env;
>>> + Error *local_err = NULL;
>>> +
>>> + cpu_synchronize_state(CPU(cpu));
>>> +
>>> + env->external_htab = hpt;
>>> + ppc_hash64_set_sdr1(cpu, (target_ulong)(uintptr_t)hpt | (shift - 18),
>>> + &local_err);
>>> + if (local_err) {
>>> + error_propagate(errp, local_err);
>>> + return;
>>> + }
>>> +
>>> + /* Not strictly necessary, but makes it clearer that an external
>>> + * htab is in use when debugging */
>>> + env->htab_base = -1;
>>> +
>>> + if (kvm_enabled()) {
>>> + if (kvmppc_put_books_sregs(cpu) < 0) {
>>> + error_setg(errp, "Unable to update SDR1 in KVM");
>>> + }
>>> + }
>>> +}
>>>
>>> static int ppc_hash64_pte_prot(PowerPCCPU *cpu,
>>> ppc_slb_t *slb, ppc_hash_pte64_t pte)
>>> diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
>>> index e7d9925..138cd7e 100644
>>> --- a/target-ppc/mmu-hash64.h
>>> +++ b/target-ppc/mmu-hash64.h
>>> @@ -92,6 +92,12 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
>>>
>>>
>>> extern bool kvmppc_kern_htab;
>>> +
>>> +void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
>>> + Error **errp);
>>> +void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
>>> + Error **errp);
>>> +
>>> uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index);
>>> void ppc_hash64_stop_access(uint64_t token);
>>>
>>> diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
>>> index e5ec8d6..fcb2cc5 100644
>>> --- a/target-ppc/mmu_helper.c
>>> +++ b/target-ppc/mmu_helper.c
>>> @@ -2005,15 +2005,14 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value)
>>> env->spr[SPR_SDR1] = value;
>>> #if defined(TARGET_PPC64)
>>> if (env->mmu_model & POWERPC_MMU_64) {
>>> - target_ulong htabsize = value & SDR_64_HTABSIZE;
>>> + PowerPCCPU *cpu = ppc_env_get_cpu(env);
>>> + Error *local_err = NULL;
>>>
>>> - if (htabsize > 28) {
>>> - fprintf(stderr, "Invalid HTABSIZE 0x" TARGET_FMT_lx
>>> - " stored in SDR1\n", htabsize);
>>> - htabsize = 28;
>>> + ppc_hash64_set_sdr1(cpu, value, &local_err);
>>> + if (local_err) {
>>> + error_report_err(local_err);
>>> + error_free(local_err);
>>> }
>>> - env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
>>> - env->htab_base = value & SDR_64_HTABORG;
>>> } else
>>> #endif /* defined(TARGET_PPC64) */
>>> {
>>>
>>
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT
2016-03-24 8:41 ` Laurent Vivier
@ 2016-03-25 9:13 ` Greg Kurz
2016-03-29 6:39 ` David Gibson
0 siblings, 1 reply; 21+ messages in thread
From: Greg Kurz @ 2016-03-25 9:13 UTC (permalink / raw)
To: Laurent Vivier; +Cc: thuth, qemu-ppc, qemu-devel, David Gibson
Hi Laurent,
On Thu, 24 Mar 2016 09:41:59 +0100
Laurent Vivier <lvivier@redhat.com> wrote:
> On 24/03/2016 06:35, David Gibson wrote:
> > On Tue, Mar 22, 2016 at 05:33:45PM +0100, Laurent Vivier wrote:
> >> Hi David,
> >>
> >> using kvm-unit-tests, I've found a side effect of your patches: the MSR
> >> is cleared (and perhaps some others).
> >>
> >> I was trying to test my patch on top of QEMU master:
> >>
> >> "ppc64: set MSR_SF bit"
> >> http://patchwork.ozlabs.org/patch/598198/
> >>
> >> and it was not working anymore.
> >>
> >> By bisecting, I've found this commit.
> >>
> >> I think "cpu_synchronize_state()" in "ppc_hash64_set_external_hpt()"
> >> restores the MSR from KVM whereas the one from QEMU has not been saved,
> >> because cpu_synchronize_all_post_reset() is called later.
> >>
> >> So it is cleared.
> >>
> >> You can test this by applying the MSR_SF patch and using the "emulator"
> >> test of kvm-unit-tests (the "emulator: 64bit" test case)
> >
> > Ugh, you're right of course. But, I'm having a bit of trouble
> > figuring out how to fix it propertly.
>
> Perhaps you can just remove the cpu_synchronize_state()?
>
> As this is in the reset phase (spapr_cpu_reset()), I think the content
> of the QEMU side registers are correct, and they will be synchronized at
> the end of the reset phase.
>
I think this is right because qemu_system_reset() is called either:
- during system startup:
cpu_synchronize_all_post_init(); => push regs to KVM, kvm_vcpu_dirty = false
...
qemu_system_reset(VMRESET_SILENT);
QEMU still have good values for the registers though, since KVM hasn't run yet.
But ppc_hash64_set_external_hpt()->cpu_synchronize_state() will indeed pull
the registers from KVM and clear MSR_SF, since we have kvm_vcpu_dirty == false.
- or from main_loop_should_exit() and we have:
cpu_synchronize_all_states();
qemu_system_reset(VMRESET_REPORT);
and
cpu_synchronize_all_states();
qemu_system_reset(VMRESET_SILENT);
In which case ppc_hash64_set_external_hpt()->cpu_synchronize_state() isn't
needed.
Makes sense ?
Cheers.
--
Greg
> You can see in spapr_cpu_reset(), SPR_HIOR is updated without prior
> sync. I think spapr_cpu_reset() is called by qemu_device_reset() in
> qemu_system_reset(), which is always followed by a
> cpu_synchronize_all_post_reset(), which will call
> do_kvm_cpu_synchronize_post_reset() (kvm_arch_put_registers(cpu,
> KVM_PUT_RESET_STATE)) at the end.
>
>
> Laurent
>
> >> On 07/03/2016 03:26, David Gibson wrote:
> >>> When a Power cpu with 64-bit hash MMU has it's hash page table (HPT)
> >>> pointer updated by a write to the SDR1 register we need to update some
> >>> derived variables. Likewise, when the cpu is configured for an external
> >>> HPT (one not in the guest memory space) some derived variables need to be
> >>> updated.
> >>>
> >>> Currently the logic for this is (partially) duplicated in ppc_store_sdr1()
> >>> and in spapr_cpu_reset(). In future we're going to need it in some other
> >>> places, so make some common helpers for this update.
> >>>
> >>> In addition the new ppc_hash64_set_external_hpt() helper also updates
> >>> SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU
> >>> synchronization. In a sense this belongs logically in the
> >>> ppc_hash64_set_sdr1() helper, but that is called from
> >>> kvm_arch_get_registers() so can't itself call cpu_synchronize_state()
> >>> without infinite recursion. In practice this doesn't matter because
> >>> the only other caller is TCG specific.
> >>>
> >>> Currently there aren't situations where updating SDR1 at runtime in KVM
> >>> matters, but there are going to be in future.
> >>>
> >>> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> >>> ---
> >>> hw/ppc/spapr.c | 13 ++-----------
> >>> target-ppc/kvm.c | 2 +-
> >>> target-ppc/kvm_ppc.h | 6 ++++++
> >>> target-ppc/mmu-hash64.c | 43 +++++++++++++++++++++++++++++++++++++++++++
> >>> target-ppc/mmu-hash64.h | 6 ++++++
> >>> target-ppc/mmu_helper.c | 13 ++++++-------
> >>> 6 files changed, 64 insertions(+), 19 deletions(-)
> >>>
> >>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> >>> index 64c4acc..72a018b 100644
> >>> --- a/hw/ppc/spapr.c
> >>> +++ b/hw/ppc/spapr.c
> >>> @@ -1196,17 +1196,8 @@ static void spapr_cpu_reset(void *opaque)
> >>>
> >>> env->spr[SPR_HIOR] = 0;
> >>>
> >>> - env->external_htab = (uint8_t *)spapr->htab;
> >>> - env->htab_base = -1;
> >>> - /*
> >>> - * htab_mask is the mask used to normalize hash value to PTEG index.
> >>> - * htab_shift is log2 of hash table size.
> >>> - * We have 8 hpte per group, and each hpte is 16 bytes.
> >>> - * ie have 128 bytes per hpte entry.
> >>> - */
> >>> - env->htab_mask = (1ULL << (spapr->htab_shift - 7)) - 1;
> >>> - env->spr[SPR_SDR1] = (target_ulong)(uintptr_t)spapr->htab |
> >>> - (spapr->htab_shift - 18);
> >>> + ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
> >>> + &error_fatal);
> >>> }
> >>>
> >>> static void spapr_create_nvram(sPAPRMachineState *spapr)
> >>> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> >>> index 8a762e8..380dff6 100644
> >>> --- a/target-ppc/kvm.c
> >>> +++ b/target-ppc/kvm.c
> >>> @@ -867,7 +867,7 @@ static int kvm_put_vpa(CPUState *cs)
> >>> }
> >>> #endif /* TARGET_PPC64 */
> >>>
> >>> -static int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> >>> +int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> >>> {
> >>> CPUPPCState *env = &cpu->env;
> >>> struct kvm_sregs sregs;
> >>> diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
> >>> index fd64c44..fc79312 100644
> >>> --- a/target-ppc/kvm_ppc.h
> >>> +++ b/target-ppc/kvm_ppc.h
> >>> @@ -55,6 +55,7 @@ void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,
> >>> target_ulong pte0, target_ulong pte1);
> >>> bool kvmppc_has_cap_fixup_hcalls(void);
> >>> int kvmppc_enable_hwrng(void);
> >>> +int kvmppc_put_books_sregs(PowerPCCPU *cpu);
> >>>
> >>> #else
> >>>
> >>> @@ -246,6 +247,11 @@ static inline int kvmppc_enable_hwrng(void)
> >>> {
> >>> return -1;
> >>> }
> >>> +
> >>> +static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
> >>> +{
> >>> + abort();
> >>> +}
> >>> #endif
> >>>
> >>> #ifndef CONFIG_KVM
> >>> diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
> >>> index 9c58fbf..7b5200b 100644
> >>> --- a/target-ppc/mmu-hash64.c
> >>> +++ b/target-ppc/mmu-hash64.c
> >>> @@ -258,6 +258,49 @@ target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb)
> >>> /*
> >>> * 64-bit hash table MMU handling
> >>> */
> >>> +void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
> >>> + Error **errp)
> >>> +{
> >>> + CPUPPCState *env = &cpu->env;
> >>> + target_ulong htabsize = value & SDR_64_HTABSIZE;
> >>> +
> >>> + env->spr[SPR_SDR1] = value;
> >>> + if (htabsize > 28) {
> >>> + error_setg(errp,
> >>> + "Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1",
> >>> + htabsize);
> >>> + htabsize = 28;
> >>> + }
> >>> + env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
> >>> + env->htab_base = value & SDR_64_HTABORG;
> >>> +}
> >>> +
> >>> +void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
> >>> + Error **errp)
> >>> +{
> >>> + CPUPPCState *env = &cpu->env;
> >>> + Error *local_err = NULL;
> >>> +
> >>> + cpu_synchronize_state(CPU(cpu));
> >>> +
> >>> + env->external_htab = hpt;
> >>> + ppc_hash64_set_sdr1(cpu, (target_ulong)(uintptr_t)hpt | (shift - 18),
> >>> + &local_err);
> >>> + if (local_err) {
> >>> + error_propagate(errp, local_err);
> >>> + return;
> >>> + }
> >>> +
> >>> + /* Not strictly necessary, but makes it clearer that an external
> >>> + * htab is in use when debugging */
> >>> + env->htab_base = -1;
> >>> +
> >>> + if (kvm_enabled()) {
> >>> + if (kvmppc_put_books_sregs(cpu) < 0) {
> >>> + error_setg(errp, "Unable to update SDR1 in KVM");
> >>> + }
> >>> + }
> >>> +}
> >>>
> >>> static int ppc_hash64_pte_prot(PowerPCCPU *cpu,
> >>> ppc_slb_t *slb, ppc_hash_pte64_t pte)
> >>> diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
> >>> index e7d9925..138cd7e 100644
> >>> --- a/target-ppc/mmu-hash64.h
> >>> +++ b/target-ppc/mmu-hash64.h
> >>> @@ -92,6 +92,12 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
> >>>
> >>>
> >>> extern bool kvmppc_kern_htab;
> >>> +
> >>> +void ppc_hash64_set_sdr1(PowerPCCPU *cpu, target_ulong value,
> >>> + Error **errp);
> >>> +void ppc_hash64_set_external_hpt(PowerPCCPU *cpu, void *hpt, int shift,
> >>> + Error **errp);
> >>> +
> >>> uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index);
> >>> void ppc_hash64_stop_access(uint64_t token);
> >>>
> >>> diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
> >>> index e5ec8d6..fcb2cc5 100644
> >>> --- a/target-ppc/mmu_helper.c
> >>> +++ b/target-ppc/mmu_helper.c
> >>> @@ -2005,15 +2005,14 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value)
> >>> env->spr[SPR_SDR1] = value;
> >>> #if defined(TARGET_PPC64)
> >>> if (env->mmu_model & POWERPC_MMU_64) {
> >>> - target_ulong htabsize = value & SDR_64_HTABSIZE;
> >>> + PowerPCCPU *cpu = ppc_env_get_cpu(env);
> >>> + Error *local_err = NULL;
> >>>
> >>> - if (htabsize > 28) {
> >>> - fprintf(stderr, "Invalid HTABSIZE 0x" TARGET_FMT_lx
> >>> - " stored in SDR1\n", htabsize);
> >>> - htabsize = 28;
> >>> + ppc_hash64_set_sdr1(cpu, value, &local_err);
> >>> + if (local_err) {
> >>> + error_report_err(local_err);
> >>> + error_free(local_err);
> >>> }
> >>> - env->htab_mask = (1ULL << (htabsize + 18 - 7)) - 1;
> >>> - env->htab_base = value & SDR_64_HTABORG;
> >>> } else
> >>> #endif /* defined(TARGET_PPC64) */
> >>> {
> >>>
> >>
> >
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT
2016-03-25 9:13 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
@ 2016-03-29 6:39 ` David Gibson
0 siblings, 0 replies; 21+ messages in thread
From: David Gibson @ 2016-03-29 6:39 UTC (permalink / raw)
To: Greg Kurz; +Cc: Laurent Vivier, thuth, qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 3317 bytes --]
On Fri, Mar 25, 2016 at 10:13:59AM +0100, Greg Kurz wrote:
> Hi Laurent,
>
> On Thu, 24 Mar 2016 09:41:59 +0100
> Laurent Vivier <lvivier@redhat.com> wrote:
>
> > On 24/03/2016 06:35, David Gibson wrote:
> > > On Tue, Mar 22, 2016 at 05:33:45PM +0100, Laurent Vivier wrote:
> > >> Hi David,
> > >>
> > >> using kvm-unit-tests, I've found a side effect of your patches: the MSR
> > >> is cleared (and perhaps some others).
> > >>
> > >> I was trying to test my patch on top of QEMU master:
> > >>
> > >> "ppc64: set MSR_SF bit"
> > >> http://patchwork.ozlabs.org/patch/598198/
> > >>
> > >> and it was not working anymore.
> > >>
> > >> By bisecting, I've found this commit.
> > >>
> > >> I think "cpu_synchronize_state()" in "ppc_hash64_set_external_hpt()"
> > >> restores the MSR from KVM whereas the one from QEMU has not been saved,
> > >> because cpu_synchronize_all_post_reset() is called later.
> > >>
> > >> So it is cleared.
> > >>
> > >> You can test this by applying the MSR_SF patch and using the "emulator"
> > >> test of kvm-unit-tests (the "emulator: 64bit" test case)
> > >
> > > Ugh, you're right of course. But, I'm having a bit of trouble
> > > figuring out how to fix it propertly.
> >
> > Perhaps you can just remove the cpu_synchronize_state()?
> >
> > As this is in the reset phase (spapr_cpu_reset()), I think the content
> > of the QEMU side registers are correct, and they will be synchronized at
> > the end of the reset phase.
> >
>
> I think this is right because qemu_system_reset() is called either:
> - during system startup:
>
> cpu_synchronize_all_post_init(); => push regs to KVM, kvm_vcpu_dirty = false
> ...
> qemu_system_reset(VMRESET_SILENT);
>
> QEMU still have good values for the registers though, since KVM hasn't run yet.
>
> But ppc_hash64_set_external_hpt()->cpu_synchronize_state() will indeed pull
> the registers from KVM and clear MSR_SF, since we have kvm_vcpu_dirty == false.
>
> - or from main_loop_should_exit() and we have:
>
> cpu_synchronize_all_states();
> qemu_system_reset(VMRESET_REPORT);
> and
> cpu_synchronize_all_states();
> qemu_system_reset(VMRESET_SILENT);
>
> In which case ppc_hash64_set_external_hpt()->cpu_synchronize_state() isn't
> needed.
>
> Makes sense ?
Ugh. So, I think this is the simplest short term fix, and I've
applied a change to ppc-for-2.6 removing the cpu_synchronize_state().
But, longer term I don't think this is really right. Removing the
cpu_synchronize_state() corrects using this in the reset path, but
breaks it if it is used outside the reset path. At the moment we
don't do that, but I have code which will do so in my HPT resizing
branch. Obviously I can fix that by putting cpu_synchronize_state()
in the caller, but it still seems a bit odd having a put_sregs().
Really, it seems to me that kvm_vcpu_dirty should be set to true
(either via cpu_synchronize_state() or directly) *before* the core CPU
reset path, in the same way that it is set to true in kvm_init_vcpu().
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2016-03-29 6:38 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-03-07 2:26 [Qemu-devel] [PATCHv2 0/3] target-ppc: Clean up handling of SDR1 and external HPTs David Gibson
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 1/3] target-ppc: Split out SREGS get/put functions David Gibson
2016-03-07 11:22 ` Thomas Huth
2016-03-08 0:32 ` David Gibson
2016-03-08 0:37 ` David Gibson
2016-03-08 3:01 ` Alexey Kardashevskiy
2016-03-08 3:53 ` David Gibson
2016-03-08 5:13 ` Alexey Kardashevskiy
2016-03-08 5:50 ` David Gibson
2016-03-08 8:50 ` Greg Kurz
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 2/3] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT David Gibson
2016-03-07 13:37 ` Greg Kurz
2016-03-07 15:56 ` Thomas Huth
2016-03-22 16:33 ` Laurent Vivier
2016-03-24 5:35 ` David Gibson
2016-03-24 8:41 ` Laurent Vivier
2016-03-25 9:13 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2016-03-29 6:39 ` David Gibson
2016-03-07 2:26 ` [Qemu-devel] [PATCHv2 3/3] target-ppc: Eliminate kvmppc_kern_htab global David Gibson
2016-03-07 13:41 ` Greg Kurz
2016-03-08 0:36 ` David Gibson
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