From: Tony Lindgren <tony@atomide.com>
To: Keerthy <a0393675@ti.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
Lokesh Vutla <lokeshvutla@ti.com>, Keerthy <j-keerthy@ti.com>,
linux-kernel@vger.kernel.org, Tero Kristo <t-kristo@ti.com>,
robh+dt@kernel.org, galak@codeaurora.org,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck
Date: Fri, 1 Apr 2016 08:36:06 -0700 [thread overview]
Message-ID: <20160401153606.GJ9329@atomide.com> (raw)
In-Reply-To: <20160331170017.GI9329@atomide.com>
Hi,
* Tony Lindgren <tony@atomide.com> [160331 10:04]:
> * Keerthy <a0393675@ti.com> [160331 02:26]:
> >
> >
> > On Thursday 31 March 2016 12:00 PM, Tero Kristo wrote:
> > >On 03/31/2016 12:32 AM, Tony Lindgren wrote:
> > >>* Tony Lindgren <tony@atomide.com> [160330 14:19]:
> > >>>* Keerthy <j-keerthy@ti.com> [160314 05:04]:
> > >>>>This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source.
> > >>>>Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz
> > >>>>external
> > >>>>crystal is not enabled at power up. Instead the CPU falls back to using
> > >>>>an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is
> > >>>>usually
> > >>>>20MHz on boards so far (which gives an emulated frequency of 32.786KHz)
> > >>>
> > >>>Thanks applying into omap-for-v4.6/fixes.
> > >>
> > >>Actually let's wait a review from Tero on this one, not sure
> > >>about the pseudo clock naming here. So dropping for now.
> > >
> > >The patch is fine for me, I didn't comment anything before as I thought
> > >you already applied it.
> > >
> > >Acked-by: Tero Kristo <t-kristo@ti.com>
> >
> > Thanks Tero.
>
> OK applying with Tero's ack.
I'm dropping this again as it introduces new warnings with make dtbs:
Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/am57xx-cl-som-am57x.dtb
Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/am57xx-sbc-am57x.dtb
Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/dra7-evm.dtb
Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/dra72-evm.dtb
Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Regards,
Tony
WARNING: multiple messages have this Message-ID (diff)
From: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
To: Keerthy <a0393675-l0cyMroinI0@public.gmane.org>
Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Lokesh Vutla <lokeshvutla-l0cyMroinI0@public.gmane.org>,
Keerthy <j-keerthy-l0cyMroinI0@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Tero Kristo <t-kristo-l0cyMroinI0@public.gmane.org>,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck
Date: Fri, 1 Apr 2016 08:36:06 -0700 [thread overview]
Message-ID: <20160401153606.GJ9329@atomide.com> (raw)
In-Reply-To: <20160331170017.GI9329-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
Hi,
* Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> [160331 10:04]:
> * Keerthy <a0393675-l0cyMroinI0@public.gmane.org> [160331 02:26]:
> >
> >
> > On Thursday 31 March 2016 12:00 PM, Tero Kristo wrote:
> > >On 03/31/2016 12:32 AM, Tony Lindgren wrote:
> > >>* Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> [160330 14:19]:
> > >>>* Keerthy <j-keerthy-l0cyMroinI0@public.gmane.org> [160314 05:04]:
> > >>>>This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source.
> > >>>>Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz
> > >>>>external
> > >>>>crystal is not enabled at power up. Instead the CPU falls back to using
> > >>>>an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is
> > >>>>usually
> > >>>>20MHz on boards so far (which gives an emulated frequency of 32.786KHz)
> > >>>
> > >>>Thanks applying into omap-for-v4.6/fixes.
> > >>
> > >>Actually let's wait a review from Tero on this one, not sure
> > >>about the pseudo clock naming here. So dropping for now.
> > >
> > >The patch is fine for me, I didn't comment anything before as I thought
> > >you already applied it.
> > >
> > >Acked-by: Tero Kristo <t-kristo-l0cyMroinI0@public.gmane.org>
> >
> > Thanks Tero.
>
> OK applying with Tero's ack.
I'm dropping this again as it introduces new warnings with make dtbs:
Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/am57xx-cl-som-am57x.dtb
Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/am57xx-sbc-am57x.dtb
Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/dra7-evm.dtb
Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/dra72-evm.dtb
Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
Regards,
Tony
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WARNING: multiple messages have this Message-ID (diff)
From: tony@atomide.com (Tony Lindgren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck
Date: Fri, 1 Apr 2016 08:36:06 -0700 [thread overview]
Message-ID: <20160401153606.GJ9329@atomide.com> (raw)
In-Reply-To: <20160331170017.GI9329@atomide.com>
Hi,
* Tony Lindgren <tony@atomide.com> [160331 10:04]:
> * Keerthy <a0393675@ti.com> [160331 02:26]:
> >
> >
> > On Thursday 31 March 2016 12:00 PM, Tero Kristo wrote:
> > >On 03/31/2016 12:32 AM, Tony Lindgren wrote:
> > >>* Tony Lindgren <tony@atomide.com> [160330 14:19]:
> > >>>* Keerthy <j-keerthy@ti.com> [160314 05:04]:
> > >>>>This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source.
> > >>>>Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz
> > >>>>external
> > >>>>crystal is not enabled at power up. Instead the CPU falls back to using
> > >>>>an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is
> > >>>>usually
> > >>>>20MHz on boards so far (which gives an emulated frequency of 32.786KHz)
> > >>>
> > >>>Thanks applying into omap-for-v4.6/fixes.
> > >>
> > >>Actually let's wait a review from Tero on this one, not sure
> > >>about the pseudo clock naming here. So dropping for now.
> > >
> > >The patch is fine for me, I didn't comment anything before as I thought
> > >you already applied it.
> > >
> > >Acked-by: Tero Kristo <t-kristo@ti.com>
> >
> > Thanks Tero.
>
> OK applying with Tero's ack.
I'm dropping this again as it introduces new warnings with make dtbs:
Warning (reg_format): "reg" property in /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/am57xx-cl-som-am57x.dtb
Warning (reg_format): "reg" property in /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/am57xx-sbc-am57x.dtb
Warning (reg_format): "reg" property in /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/dra7-evm.dtb
Warning (reg_format): "reg" property in /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck
DTC arch/arm/boot/dts/dra72-evm.dtb
Warning (reg_format): "reg" property in /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck
Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4 at 4a000000/cm_core at 8000/clockdomains/sys_32k_ck
Regards,
Tony
next prev parent reply other threads:[~2016-04-01 15:36 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-14 12:03 [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck Keerthy
2016-03-14 12:03 ` Keerthy
2016-03-14 12:03 ` Keerthy
2016-03-30 21:18 ` Tony Lindgren
2016-03-30 21:18 ` Tony Lindgren
2016-03-30 21:18 ` Tony Lindgren
2016-03-30 21:32 ` Tony Lindgren
2016-03-30 21:32 ` Tony Lindgren
2016-03-30 21:32 ` Tony Lindgren
2016-03-31 6:30 ` Tero Kristo
2016-03-31 6:30 ` Tero Kristo
2016-03-31 6:30 ` Tero Kristo
2016-03-31 9:22 ` Keerthy
2016-03-31 9:22 ` Keerthy
2016-03-31 9:22 ` Keerthy
2016-03-31 17:00 ` Tony Lindgren
2016-03-31 17:00 ` Tony Lindgren
2016-03-31 17:00 ` Tony Lindgren
2016-04-01 15:36 ` Tony Lindgren [this message]
2016-04-01 15:36 ` Tony Lindgren
2016-04-01 15:36 ` Tony Lindgren
2016-04-01 18:48 ` Tero Kristo
2016-04-01 18:48 ` Tero Kristo
2016-04-01 18:48 ` Tero Kristo
2016-04-01 19:06 ` Tony Lindgren
2016-04-01 19:06 ` Tony Lindgren
2016-04-01 19:06 ` Tony Lindgren
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