* [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc
@ 2016-02-20 5:02 Anju T
2016-02-20 5:02 ` [PATCH V11 1/4] perf/powerpc: assign an id to each powerpc register Anju T
` (5 more replies)
0 siblings, 6 replies; 19+ messages in thread
From: Anju T @ 2016-02-20 5:02 UTC (permalink / raw)
To: linux-kernel
Cc: mpe, maddy, jolsa, dsahern, acme, sukadev, hemant, naveen.n.rao,
anju, linuxppc-dev
This short patch series adds the ability to sample the interrupted
machine state for each hardware sample.
To test this patchset,
Eg:
$ perf record -I? # list supported registers
output:
available registers: r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 nip msr orig_r3 ctr link xer ccr softe trap dar dsisr
usage: perf record [<options>] [<command>]
or: perf record [<options>] -- <command> [<options>]
-I, --intr-regs[=<any register>]
sample selected machine registers on interrupt, use -I ? to list register names
$ perf record -I ls # record machine state at interrupt
$ perf script -D # read the perf.data file
Sample output obtained for this patchset/ output looks like as follows:
496768515470 0x1988 [0x188]: PERF_RECORD_SAMPLE(IP, 0x1): 4522/4522: 0xc0000000001e538c period: 1 addr: 0
... intr regs: mask 0x7ffffffffff ABI 64-bit
.... r0 0xc0000000001e5e34
.... r1 0xc000000fe733f9a0
.... r2 0xc000000001523100
.... r3 0xc000000ffaadeb60
.... r4 0xc000000003456800
.... r5 0x73a9b5e000
.... r6 0x1e000000
.... r7 0x0
.... r8 0x0
.... r9 0x0
.... r10 0x1
.... r11 0x0
.... r12 0x24022822
.... r13 0xc00000000feec180
.... r14 0x0
.... r15 0xc000001e4be18800
.... r16 0x0
.... r17 0xc000000ffaac5000
.... r18 0xc000000fe733f8a0
.... r19 0xc000000001523100
.... r20 0xc00000000009fd1c
.... r21 0xc000000fcaa69000
.... r22 0xc0000000001e4968
.... r23 0xc000000001523100
.... r24 0xc000000fe733f850
.... r25 0xc000000fcaa69000
.... r26 0xc000000003b8fcf0
.... r27 0xfffffffffffffead
.... r28 0x0
.... r29 0xc000000fcaa69000
.... r30 0x1
.... r31 0x0
.... nip 0xc0000000001dd320
.... msr 0x9000000000009032
.... orig_r3 0xc0000000001e538c
.... ctr 0xc00000000009d550
.... link 0xc0000000001e5e34
.... xer 0x0
.... ccr 0x84022882
.... softe 0x0
.... trap 0xf01
.... dar 0x0
.... dsisr 0xf00040060000004
... thread: :4522:4522
...... dso: /root/.debug/.build-id/b0/ef11b1a1629e62ac9de75199117ee5ef9469e9
:4522 4522 496.768515: 1 cycles: c0000000001e538c .perf_event_context_sched_in (/boot/vmlinux)
Changes from v10:
- Included SOFTE as suggested by mpe
- The name of registers displayed is changed from
gpr* to r* also the macro names changed from
PERF_REG_POWERPC_GPR* to PERF_REG_POWERPC_R*.
- The conflict in returning the ABI is resolved.
- #define PERF_REG_SP is again changed to PERF_REG_POWERPC_R1
- Comment in tools/perf/config/Makefile is updated.
- removed the "Reviewed-By" tag as the patch has logic changes.
Changes from V9:
- Changed the name displayed for link register from "lnk" to "link" in
tools/perf/arch/powerpc/include/perf_regs.h
changes from V8:
- Corrected the indentation issue in the Makefile mentioned in 3rd patch
Changes from V7:
- Addressed the new line issue in 3rd patch.
Changes from V6:
- Corrected the typo in patch tools/perf: Map the ID values with register names.
ie #define PERF_REG_SP PERF_REG_POWERPC_R1 should be #define PERF_REG_SP PERF_REG_POWERPC_GPR1
Changes from V5:
- Enabled perf_sample_regs_user also in this patch set.Functions added in
arch/powerpc/perf/perf_regs.c
- Added Maddy's patch to this patchset for enabling -I? option which will
list the supported register names.
Changes from V4:
- Removed the softe and MQ from all patches
- Switch case is replaced with an array in the 3rd patch
Changes from V3:
- Addressed the comments by Sukadev regarding the nits in the descriptions.
- Modified the subject of first patch.
- Included the sample output in the 3rd patch also.
Changes from V2:
- tools/perf/config/Makefile is moved to the patch tools/perf.
- The patchset is reordered.
- perf_regs_load() function is used for the dwarf unwind test.Since it is not required here,
it is removed from tools/perf/arch/powerpc/include/perf_regs.h
- PERF_REGS_POWERPC_RESULT is removed.
Changes from V1:
- Solved the name missmatch issue in the from and signed-off field of the patch series.
- Added necessary comments in the 3rd patch ie perf/powerpc ,as suggested by Maddy.
Anju T (3):
perf/powerpc: assign an id to each powerpc register
perf/powerpc: add support for sampling intr machine state
tools/perf: Map the ID values with register names
Madhavan Srinivasan (1):
tool/perf: Add sample_reg_mask to include all perf_regs regs
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/uapi/asm/perf_regs.h | 50 ++++++++++++++++
arch/powerpc/perf/Makefile | 1 +
arch/powerpc/perf/perf_regs.c | 91 +++++++++++++++++++++++++++++
tools/perf/arch/powerpc/include/perf_regs.h | 69 ++++++++++++++++++++++
tools/perf/arch/powerpc/util/Build | 1 +
tools/perf/arch/powerpc/util/perf_regs.c | 49 ++++++++++++++++
tools/perf/config/Makefile | 5 ++
8 files changed, 267 insertions(+)
create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
create mode 100644 arch/powerpc/perf/perf_regs.c
create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
--
2.1.0
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH V11 1/4] perf/powerpc: assign an id to each powerpc register
2016-02-20 5:02 [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
@ 2016-02-20 5:02 ` Anju T
2016-04-21 11:07 ` Naveen N. Rao
2016-04-21 13:39 ` [V11,1/4] " Michael Ellerman
2016-02-20 5:02 ` [PATCH V11 2/4] perf/powerpc: add support for sampling intr machine state Anju T
` (4 subsequent siblings)
5 siblings, 2 replies; 19+ messages in thread
From: Anju T @ 2016-02-20 5:02 UTC (permalink / raw)
To: linux-kernel
Cc: mpe, maddy, jolsa, dsahern, acme, sukadev, hemant, naveen.n.rao,
anju, linuxppc-dev
The enum definition assigns an 'id' to each register in "struct pt_regs"
of arch/powerpc. The order of these values in the enum definition are
based on the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h.
Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
---
arch/powerpc/include/uapi/asm/perf_regs.h | 50 +++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
new file mode 100644
index 0000000..62b8a5e
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -0,0 +1,50 @@
+#ifndef _ASM_POWERPC_PERF_REGS_H
+#define _ASM_POWERPC_PERF_REGS_H
+
+enum perf_event_powerpc_regs {
+ PERF_REG_POWERPC_R0,
+ PERF_REG_POWERPC_R1,
+ PERF_REG_POWERPC_R2,
+ PERF_REG_POWERPC_R3,
+ PERF_REG_POWERPC_R4,
+ PERF_REG_POWERPC_R5,
+ PERF_REG_POWERPC_R6,
+ PERF_REG_POWERPC_R7,
+ PERF_REG_POWERPC_R8,
+ PERF_REG_POWERPC_R9,
+ PERF_REG_POWERPC_R10,
+ PERF_REG_POWERPC_R11,
+ PERF_REG_POWERPC_R12,
+ PERF_REG_POWERPC_R13,
+ PERF_REG_POWERPC_R14,
+ PERF_REG_POWERPC_R15,
+ PERF_REG_POWERPC_R16,
+ PERF_REG_POWERPC_R17,
+ PERF_REG_POWERPC_R18,
+ PERF_REG_POWERPC_R19,
+ PERF_REG_POWERPC_R20,
+ PERF_REG_POWERPC_R21,
+ PERF_REG_POWERPC_R22,
+ PERF_REG_POWERPC_R23,
+ PERF_REG_POWERPC_R24,
+ PERF_REG_POWERPC_R25,
+ PERF_REG_POWERPC_R26,
+ PERF_REG_POWERPC_R27,
+ PERF_REG_POWERPC_R28,
+ PERF_REG_POWERPC_R29,
+ PERF_REG_POWERPC_R30,
+ PERF_REG_POWERPC_R31,
+ PERF_REG_POWERPC_NIP,
+ PERF_REG_POWERPC_MSR,
+ PERF_REG_POWERPC_ORIG_R3,
+ PERF_REG_POWERPC_CTR,
+ PERF_REG_POWERPC_LNK,
+ PERF_REG_POWERPC_XER,
+ PERF_REG_POWERPC_CCR,
+ PERF_REG_POWERPC_SOFTE,
+ PERF_REG_POWERPC_TRAP,
+ PERF_REG_POWERPC_DAR,
+ PERF_REG_POWERPC_DSISR,
+ PERF_REG_POWERPC_MAX,
+};
+#endif /* _ASM_POWERPC_PERF_REGS_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH V11 2/4] perf/powerpc: add support for sampling intr machine state
2016-02-20 5:02 [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
2016-02-20 5:02 ` [PATCH V11 1/4] perf/powerpc: assign an id to each powerpc register Anju T
@ 2016-02-20 5:02 ` Anju T
2016-04-21 11:15 ` Naveen N. Rao
2016-04-21 13:39 ` [V11, 2/4] " Michael Ellerman
2016-02-20 5:02 ` [PATCH V11 3/4] tools/perf: Map the ID values with register names Anju T
` (3 subsequent siblings)
5 siblings, 2 replies; 19+ messages in thread
From: Anju T @ 2016-02-20 5:02 UTC (permalink / raw)
To: linux-kernel
Cc: mpe, maddy, jolsa, dsahern, acme, sukadev, hemant, naveen.n.rao,
anju, linuxppc-dev
The perf infrastructure uses a bit mask to find out valid
registers to display. Define a register mask for supported
registers defined in asm/perf_regs.h. The bit positions also
correspond to register IDs which is used by perf infrastructure
to fetch the register values. CONFIG_HAVE_PERF_REGS enables
sampling of the interrupted machine state.
Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/perf/Makefile | 1 +
arch/powerpc/perf/perf_regs.c | 91 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 93 insertions(+)
create mode 100644 arch/powerpc/perf/perf_regs.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 9a7057e..c4ce60d 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -119,6 +119,7 @@ config PPC
select GENERIC_ATOMIC64 if PPC32
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select HAVE_PERF_EVENTS
+ select HAVE_PERF_REGS
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
select ARCH_WANT_IPC_PARSE_VERSION
diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
index f9c083a..2f2d3d2 100644
--- a/arch/powerpc/perf/Makefile
+++ b/arch/powerpc/perf/Makefile
@@ -8,6 +8,7 @@ obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
power8-pmu.o
obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
+obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c
new file mode 100644
index 0000000..ae0759c
--- /dev/null
+++ b/arch/powerpc/perf/perf_regs.c
@@ -0,0 +1,91 @@
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/perf_event.h>
+#include <linux/bug.h>
+#include <linux/stddef.h>
+#include <asm/ptrace.h>
+#include <asm/perf_regs.h>
+
+#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r)
+
+#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1))
+
+static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R0, gpr[0]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R1, gpr[1]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R2, gpr[2]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R3, gpr[3]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R4, gpr[4]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R5, gpr[5]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R6, gpr[6]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R7, gpr[7]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R8, gpr[8]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R9, gpr[9]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R10, gpr[10]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R11, gpr[11]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R12, gpr[12]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R13, gpr[13]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R14, gpr[14]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R15, gpr[15]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R16, gpr[16]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R17, gpr[17]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R18, gpr[18]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R19, gpr[19]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R20, gpr[20]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R21, gpr[21]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R22, gpr[22]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R23, gpr[23]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R24, gpr[24]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R25, gpr[25]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R26, gpr[26]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R27, gpr[27]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R28, gpr[28]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R29, gpr[29]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R30, gpr[30]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_R31, gpr[31]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_LNK, link),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, softe),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
+};
+
+u64 perf_reg_value(struct pt_regs *regs, int idx)
+{
+ if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
+ return 0;
+
+ return regs_get_register(regs, pt_regs_offset[idx]);
+}
+
+int perf_reg_validate(u64 mask)
+{
+ if (!mask || mask & REG_RESERVED)
+ return -EINVAL;
+ return 0;
+}
+
+u64 perf_reg_abi(struct task_struct *task)
+{
+#ifdef __powerpc64__
+ if (!test_tsk_thread_flag(task, TIF_32BIT))
+ return PERF_SAMPLE_REGS_ABI_64;
+ else
+#endif
+ return PERF_SAMPLE_REGS_ABI_32;
+}
+
+void perf_get_regs_user(struct perf_regs *regs_user,
+ struct pt_regs *regs,
+ struct pt_regs *regs_user_copy)
+{
+ regs_user->regs = task_pt_regs(current);
+ regs_user->abi = perf_reg_abi(current);
+}
--
2.1.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH V11 3/4] tools/perf: Map the ID values with register names
2016-02-20 5:02 [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
2016-02-20 5:02 ` [PATCH V11 1/4] perf/powerpc: assign an id to each powerpc register Anju T
2016-02-20 5:02 ` [PATCH V11 2/4] perf/powerpc: add support for sampling intr machine state Anju T
@ 2016-02-20 5:02 ` Anju T
2016-04-21 13:39 ` [V11,3/4] " Michael Ellerman
2016-02-20 5:02 ` [PATCH V2 4/4] tool/perf: Add sample_reg_mask to include all perf_regs Anju T
` (2 subsequent siblings)
5 siblings, 1 reply; 19+ messages in thread
From: Anju T @ 2016-02-20 5:02 UTC (permalink / raw)
To: linux-kernel
Cc: mpe, maddy, jolsa, dsahern, acme, sukadev, hemant, naveen.n.rao,
anju, linuxppc-dev
Map ID values with corresponding register names. These names are then
displayed when user issues perf record with the -I option
followed by perf report/script with -D option.
To test this patchset,
Eg:
$ perf record -I ls # record machine state at interrupt
$ perf script -D # read the perf.data file
Sample output obtained for this patch / output looks like as follows:
496768515470 0x1988 [0x188]: PERF_RECORD_SAMPLE(IP, 0x1): 4522/4522: 0xc0000000001e538c period: 1 addr: 0
... intr regs: mask 0x7ffffffffff ABI 64-bit
.... r0 0xc0000000001e5e34
.... r1 0xc000000fe733f9a0
.... r2 0xc000000001523100
.... r3 0xc000000ffaadeb60
.... r4 0xc000000003456800
.... r5 0x73a9b5e000
.... r6 0x1e000000
.... r7 0x0
.... r8 0x0
.... r9 0x0
.... r10 0x1
.... r11 0x0
.... r12 0x24022822
.... r13 0xc00000000feec180
.... r14 0x0
.... r15 0xc000001e4be18800
.... r16 0x0
.... r17 0xc000000ffaac5000
.... r18 0xc000000fe733f8a0
.... r19 0xc000000001523100
.... r20 0xc00000000009fd1c
.... r21 0xc000000fcaa69000
.... r22 0xc0000000001e4968
.... r23 0xc000000001523100
.... r24 0xc000000fe733f850
.... r25 0xc000000fcaa69000
.... r26 0xc000000003b8fcf0
.... r27 0xfffffffffffffead
.... r28 0x0
.... r29 0xc000000fcaa69000
.... r30 0x1
.... r31 0x0
.... nip 0xc0000000001dd320
.... msr 0x9000000000009032
.... orig_r3 0xc0000000001e538c
.... ctr 0xc00000000009d550
.... link 0xc0000000001e5e34
.... xer 0x0
.... ccr 0x84022882
.... softe 0x0
.... trap 0xf01
.... dar 0x0
.... dsisr 0xf00040060000004
... thread: :4522:4522
...... dso: /root/.debug/.build-id/b0/ef11b1a1629e62ac9de75199117ee5ef9469e9
:4522 4522 496.768515: 1 cycles: c0000000001e538c .perf_event_context_sched_in (/boot/vmlinux)
Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
---
tools/perf/arch/powerpc/include/perf_regs.h | 69 +++++++++++++++++++++++++++++
tools/perf/config/Makefile | 5 +++
2 files changed, 74 insertions(+)
create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
diff --git a/tools/perf/arch/powerpc/include/perf_regs.h b/tools/perf/arch/powerpc/include/perf_regs.h
new file mode 100644
index 0000000..0b77a93
--- /dev/null
+++ b/tools/perf/arch/powerpc/include/perf_regs.h
@@ -0,0 +1,69 @@
+#ifndef ARCH_PERF_REGS_H
+#define ARCH_PERF_REGS_H
+
+#include <stdlib.h>
+#include <linux/types.h>
+#include <asm/perf_regs.h>
+
+#define PERF_REGS_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1)
+#define PERF_REGS_MAX PERF_REG_POWERPC_MAX
+#ifdef __powerpc64__
+ #define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64
+#else
+ #define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_32
+#endif
+
+#define PERF_REG_IP PERF_REG_POWERPC_NIP
+#define PERF_REG_SP PERF_REG_POWERPC_R1
+
+static const char *reg_names[] = {
+ [PERF_REG_POWERPC_R0] = "r0",
+ [PERF_REG_POWERPC_R1] = "r1",
+ [PERF_REG_POWERPC_R2] = "r2",
+ [PERF_REG_POWERPC_R3] = "r3",
+ [PERF_REG_POWERPC_R4] = "r4",
+ [PERF_REG_POWERPC_R5] = "r5",
+ [PERF_REG_POWERPC_R6] = "r6",
+ [PERF_REG_POWERPC_R7] = "r7",
+ [PERF_REG_POWERPC_R8] = "r8",
+ [PERF_REG_POWERPC_R9] = "r9",
+ [PERF_REG_POWERPC_R10] = "r10",
+ [PERF_REG_POWERPC_R11] = "r11",
+ [PERF_REG_POWERPC_R12] = "r12",
+ [PERF_REG_POWERPC_R13] = "r13",
+ [PERF_REG_POWERPC_R14] = "r14",
+ [PERF_REG_POWERPC_R15] = "r15",
+ [PERF_REG_POWERPC_R16] = "r16",
+ [PERF_REG_POWERPC_R17] = "r17",
+ [PERF_REG_POWERPC_R18] = "r18",
+ [PERF_REG_POWERPC_R19] = "r19",
+ [PERF_REG_POWERPC_R20] = "r20",
+ [PERF_REG_POWERPC_R21] = "r21",
+ [PERF_REG_POWERPC_R22] = "r22",
+ [PERF_REG_POWERPC_R23] = "r23",
+ [PERF_REG_POWERPC_R24] = "r24",
+ [PERF_REG_POWERPC_R25] = "r25",
+ [PERF_REG_POWERPC_R26] = "r26",
+ [PERF_REG_POWERPC_R27] = "r27",
+ [PERF_REG_POWERPC_R28] = "r28",
+ [PERF_REG_POWERPC_R29] = "r29",
+ [PERF_REG_POWERPC_R30] = "r30",
+ [PERF_REG_POWERPC_R31] = "r31",
+ [PERF_REG_POWERPC_NIP] = "nip",
+ [PERF_REG_POWERPC_MSR] = "msr",
+ [PERF_REG_POWERPC_ORIG_R3] = "orig_r3",
+ [PERF_REG_POWERPC_CTR] = "ctr",
+ [PERF_REG_POWERPC_LNK] = "link",
+ [PERF_REG_POWERPC_XER] = "xer",
+ [PERF_REG_POWERPC_CCR] = "ccr",
+ [PERF_REG_POWERPC_SOFTE] = "softe",
+ [PERF_REG_POWERPC_TRAP] = "trap",
+ [PERF_REG_POWERPC_DAR] = "dar",
+ [PERF_REG_POWERPC_DSISR] = "dsisr"
+};
+
+static inline const char *perf_reg_name(int id)
+{
+ return reg_names[id];
+}
+#endif /* ARCH_PERF_REGS_H */
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index 38a0853..2de6bd4 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -23,6 +23,11 @@ $(call detected_var,ARCH)
NO_PERF_REGS := 1
+# Additional ARCH settings for ppc
+ifeq ($(ARCH),powerpc)
+ NO_PERF_REGS := 0
+endif
+
# Additional ARCH settings for x86
ifeq ($(ARCH),x86)
$(call detected,CONFIG_X86)
--
2.1.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH V2 4/4] tool/perf: Add sample_reg_mask to include all perf_regs
2016-02-20 5:02 [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
` (2 preceding siblings ...)
2016-02-20 5:02 ` [PATCH V11 3/4] tools/perf: Map the ID values with register names Anju T
@ 2016-02-20 5:02 ` Anju T
2016-04-21 13:39 ` [V2,4/4] " Michael Ellerman
2016-03-07 8:23 ` [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
2016-04-18 9:47 ` Anju T
5 siblings, 1 reply; 19+ messages in thread
From: Anju T @ 2016-02-20 5:02 UTC (permalink / raw)
To: linux-kernel
Cc: mpe, maddy, jolsa, dsahern, acme, sukadev, hemant, naveen.n.rao,
anju, linuxppc-dev
From: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Add sample_reg_mask array with pt_regs registers.
This is needed for printing supported regs ( -I? option).
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
---
tools/perf/arch/powerpc/util/Build | 1 +
tools/perf/arch/powerpc/util/perf_regs.c | 49 ++++++++++++++++++++++++++++++++
2 files changed, 50 insertions(+)
create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
diff --git a/tools/perf/arch/powerpc/util/Build b/tools/perf/arch/powerpc/util/Build
index 7b8b0d1..3deb1bc 100644
--- a/tools/perf/arch/powerpc/util/Build
+++ b/tools/perf/arch/powerpc/util/Build
@@ -1,5 +1,6 @@
libperf-y += header.o
libperf-y += sym-handling.o
+libperf-y += perf_regs.o
libperf-$(CONFIG_DWARF) += dwarf-regs.o
libperf-$(CONFIG_DWARF) += skip-callchain-idx.o
diff --git a/tools/perf/arch/powerpc/util/perf_regs.c b/tools/perf/arch/powerpc/util/perf_regs.c
new file mode 100644
index 0000000..df9db75
--- /dev/null
+++ b/tools/perf/arch/powerpc/util/perf_regs.c
@@ -0,0 +1,49 @@
+#include "../../perf.h"
+#include "../../util/perf_regs.h"
+
+const struct sample_reg sample_reg_masks[] = {
+ SMPL_REG(r0, PERF_REG_POWERPC_R0),
+ SMPL_REG(r1, PERF_REG_POWERPC_R1),
+ SMPL_REG(r2, PERF_REG_POWERPC_R2),
+ SMPL_REG(r3, PERF_REG_POWERPC_R3),
+ SMPL_REG(r4, PERF_REG_POWERPC_R4),
+ SMPL_REG(r5, PERF_REG_POWERPC_R5),
+ SMPL_REG(r6, PERF_REG_POWERPC_R6),
+ SMPL_REG(r7, PERF_REG_POWERPC_R7),
+ SMPL_REG(r8, PERF_REG_POWERPC_R8),
+ SMPL_REG(r9, PERF_REG_POWERPC_R9),
+ SMPL_REG(r10, PERF_REG_POWERPC_R10),
+ SMPL_REG(r11, PERF_REG_POWERPC_R11),
+ SMPL_REG(r12, PERF_REG_POWERPC_R12),
+ SMPL_REG(r13, PERF_REG_POWERPC_R13),
+ SMPL_REG(r14, PERF_REG_POWERPC_R14),
+ SMPL_REG(r15, PERF_REG_POWERPC_R15),
+ SMPL_REG(r16, PERF_REG_POWERPC_R16),
+ SMPL_REG(r17, PERF_REG_POWERPC_R17),
+ SMPL_REG(r18, PERF_REG_POWERPC_R18),
+ SMPL_REG(r19, PERF_REG_POWERPC_R19),
+ SMPL_REG(r20, PERF_REG_POWERPC_R20),
+ SMPL_REG(r21, PERF_REG_POWERPC_R21),
+ SMPL_REG(r22, PERF_REG_POWERPC_R22),
+ SMPL_REG(r23, PERF_REG_POWERPC_R23),
+ SMPL_REG(r24, PERF_REG_POWERPC_R24),
+ SMPL_REG(r25, PERF_REG_POWERPC_R25),
+ SMPL_REG(r26, PERF_REG_POWERPC_R26),
+ SMPL_REG(r27, PERF_REG_POWERPC_R27),
+ SMPL_REG(r28, PERF_REG_POWERPC_R28),
+ SMPL_REG(r29, PERF_REG_POWERPC_R29),
+ SMPL_REG(r30, PERF_REG_POWERPC_R30),
+ SMPL_REG(r31, PERF_REG_POWERPC_R31),
+ SMPL_REG(nip, PERF_REG_POWERPC_NIP),
+ SMPL_REG(msr, PERF_REG_POWERPC_MSR),
+ SMPL_REG(orig_r3, PERF_REG_POWERPC_ORIG_R3),
+ SMPL_REG(ctr, PERF_REG_POWERPC_CTR),
+ SMPL_REG(link, PERF_REG_POWERPC_LNK),
+ SMPL_REG(xer, PERF_REG_POWERPC_XER),
+ SMPL_REG(ccr, PERF_REG_POWERPC_CCR),
+ SMPL_REG(softe, PERF_REG_POWERPC_SOFTE),
+ SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
+ SMPL_REG(dar, PERF_REG_POWERPC_DAR),
+ SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
+ SMPL_REG_END
+};
--
2.1.0
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc
2016-02-20 5:02 [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
` (3 preceding siblings ...)
2016-02-20 5:02 ` [PATCH V2 4/4] tool/perf: Add sample_reg_mask to include all perf_regs Anju T
@ 2016-03-07 8:23 ` Anju T
2016-04-18 9:47 ` Anju T
5 siblings, 0 replies; 19+ messages in thread
From: Anju T @ 2016-03-07 8:23 UTC (permalink / raw)
To: linux-kernel
Cc: mpe, maddy, jolsa, dsahern, acme, sukadev, hemant, naveen.n.rao,
linuxppc-dev, anju
Hi,
Any updates on this?
On Saturday 20 February 2016 10:32 AM, Anju T wrote:
> This short patch series adds the ability to sample the interrupted
> machine state for each hardware sample.
>
> To test this patchset,
> Eg:
>
> $ perf record -I? # list supported registers
>
> output:
> available registers: r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 nip msr orig_r3 ctr link xer ccr softe trap dar dsisr
>
> usage: perf record [<options>] [<command>]
> or: perf record [<options>] -- <command> [<options>]
>
> -I, --intr-regs[=<any register>]
> sample selected machine registers on interrupt, use -I ? to list register names
>
>
> $ perf record -I ls # record machine state at interrupt
> $ perf script -D # read the perf.data file
>
> Sample output obtained for this patchset/ output looks like as follows:
>
> 496768515470 0x1988 [0x188]: PERF_RECORD_SAMPLE(IP, 0x1): 4522/4522: 0xc0000000001e538c period: 1 addr: 0
> ... intr regs: mask 0x7ffffffffff ABI 64-bit
> .... r0 0xc0000000001e5e34
> .... r1 0xc000000fe733f9a0
> .... r2 0xc000000001523100
> .... r3 0xc000000ffaadeb60
> .... r4 0xc000000003456800
> .... r5 0x73a9b5e000
> .... r6 0x1e000000
> .... r7 0x0
> .... r8 0x0
> .... r9 0x0
> .... r10 0x1
> .... r11 0x0
> .... r12 0x24022822
> .... r13 0xc00000000feec180
> .... r14 0x0
> .... r15 0xc000001e4be18800
> .... r16 0x0
> .... r17 0xc000000ffaac5000
> .... r18 0xc000000fe733f8a0
> .... r19 0xc000000001523100
> .... r20 0xc00000000009fd1c
> .... r21 0xc000000fcaa69000
> .... r22 0xc0000000001e4968
> .... r23 0xc000000001523100
> .... r24 0xc000000fe733f850
> .... r25 0xc000000fcaa69000
> .... r26 0xc000000003b8fcf0
> .... r27 0xfffffffffffffead
> .... r28 0x0
> .... r29 0xc000000fcaa69000
> .... r30 0x1
> .... r31 0x0
> .... nip 0xc0000000001dd320
> .... msr 0x9000000000009032
> .... orig_r3 0xc0000000001e538c
> .... ctr 0xc00000000009d550
> .... link 0xc0000000001e5e34
> .... xer 0x0
> .... ccr 0x84022882
> .... softe 0x0
> .... trap 0xf01
> .... dar 0x0
> .... dsisr 0xf00040060000004
> ... thread: :4522:4522
> ...... dso: /root/.debug/.build-id/b0/ef11b1a1629e62ac9de75199117ee5ef9469e9
> :4522 4522 496.768515: 1 cycles: c0000000001e538c .perf_event_context_sched_in (/boot/vmlinux)
>
>
>
> Changes from v10:
>
> - Included SOFTE as suggested by mpe
> - The name of registers displayed is changed from
> gpr* to r* also the macro names changed from
> PERF_REG_POWERPC_GPR* to PERF_REG_POWERPC_R*.
> - The conflict in returning the ABI is resolved.
> - #define PERF_REG_SP is again changed to PERF_REG_POWERPC_R1
> - Comment in tools/perf/config/Makefile is updated.
> - removed the "Reviewed-By" tag as the patch has logic changes.
>
>
> Changes from V9:
>
> - Changed the name displayed for link register from "lnk" to "link" in
> tools/perf/arch/powerpc/include/perf_regs.h
>
> changes from V8:
>
> - Corrected the indentation issue in the Makefile mentioned in 3rd patch
>
> Changes from V7:
>
> - Addressed the new line issue in 3rd patch.
>
> Changes from V6:
>
> - Corrected the typo in patch tools/perf: Map the ID values with register names.
> ie #define PERF_REG_SP PERF_REG_POWERPC_R1 should be #define PERF_REG_SP PERF_REG_POWERPC_GPR1
>
>
> Changes from V5:
>
> - Enabled perf_sample_regs_user also in this patch set.Functions added in
> arch/powerpc/perf/perf_regs.c
> - Added Maddy's patch to this patchset for enabling -I? option which will
> list the supported register names.
>
>
> Changes from V4:
>
> - Removed the softe and MQ from all patches
> - Switch case is replaced with an array in the 3rd patch
>
> Changes from V3:
>
> - Addressed the comments by Sukadev regarding the nits in the descriptions.
> - Modified the subject of first patch.
> - Included the sample output in the 3rd patch also.
>
> Changes from V2:
>
> - tools/perf/config/Makefile is moved to the patch tools/perf.
> - The patchset is reordered.
> - perf_regs_load() function is used for the dwarf unwind test.Since it is not required here,
> it is removed from tools/perf/arch/powerpc/include/perf_regs.h
> - PERF_REGS_POWERPC_RESULT is removed.
>
> Changes from V1:
>
> - Solved the name missmatch issue in the from and signed-off field of the patch series.
> - Added necessary comments in the 3rd patch ie perf/powerpc ,as suggested by Maddy.
>
>
>
> Anju T (3):
> perf/powerpc: assign an id to each powerpc register
> perf/powerpc: add support for sampling intr machine state
> tools/perf: Map the ID values with register names
>
> Madhavan Srinivasan (1):
> tool/perf: Add sample_reg_mask to include all perf_regs regs
>
>
> arch/powerpc/Kconfig | 1 +
> arch/powerpc/include/uapi/asm/perf_regs.h | 50 ++++++++++++++++
> arch/powerpc/perf/Makefile | 1 +
> arch/powerpc/perf/perf_regs.c | 91 +++++++++++++++++++++++++++++
> tools/perf/arch/powerpc/include/perf_regs.h | 69 ++++++++++++++++++++++
> tools/perf/arch/powerpc/util/Build | 1 +
> tools/perf/arch/powerpc/util/perf_regs.c | 49 ++++++++++++++++
> tools/perf/config/Makefile | 5 ++
> 8 files changed, 267 insertions(+)
> create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
> create mode 100644 arch/powerpc/perf/perf_regs.c
> create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
> create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
>
Thanks
Anju
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc
2016-02-20 5:02 [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
` (4 preceding siblings ...)
2016-03-07 8:23 ` [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
@ 2016-04-18 9:47 ` Anju T
2016-04-20 3:57 ` Arnaldo Carvalho de Melo
5 siblings, 1 reply; 19+ messages in thread
From: Anju T @ 2016-04-18 9:47 UTC (permalink / raw)
To: linux-kernel
Cc: mpe, maddy, jolsa, dsahern, acme, sukadev, hemant, naveen.n.rao,
linuxppc-dev
On Saturday 20 February 2016 10:32 AM, Anju T wrote:
> This short patch series adds the ability to sample the interrupted
> machine state for each hardware sample.
>
> To test this patchset,
> Eg:
>
> $ perf record -I? # list supported registers
>
> output:
> available registers: r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 nip msr orig_r3 ctr link xer ccr softe trap dar dsisr
>
> usage: perf record [<options>] [<command>]
> or: perf record [<options>] -- <command> [<options>]
>
> -I, --intr-regs[=<any register>]
> sample selected machine registers on interrupt, use -I ? to list register names
>
>
> $ perf record -I ls # record machine state at interrupt
> $ perf script -D # read the perf.data file
>
> Sample output obtained for this patchset/ output looks like as follows:
>
> 496768515470 0x1988 [0x188]: PERF_RECORD_SAMPLE(IP, 0x1): 4522/4522: 0xc0000000001e538c period: 1 addr: 0
> ... intr regs: mask 0x7ffffffffff ABI 64-bit
> .... r0 0xc0000000001e5e34
> .... r1 0xc000000fe733f9a0
> .... r2 0xc000000001523100
> .... r3 0xc000000ffaadeb60
> .... r4 0xc000000003456800
> .... r5 0x73a9b5e000
> .... r6 0x1e000000
> .... r7 0x0
> .... r8 0x0
> .... r9 0x0
> .... r10 0x1
> .... r11 0x0
> .... r12 0x24022822
> .... r13 0xc00000000feec180
> .... r14 0x0
> .... r15 0xc000001e4be18800
> .... r16 0x0
> .... r17 0xc000000ffaac5000
> .... r18 0xc000000fe733f8a0
> .... r19 0xc000000001523100
> .... r20 0xc00000000009fd1c
> .... r21 0xc000000fcaa69000
> .... r22 0xc0000000001e4968
> .... r23 0xc000000001523100
> .... r24 0xc000000fe733f850
> .... r25 0xc000000fcaa69000
> .... r26 0xc000000003b8fcf0
> .... r27 0xfffffffffffffead
> .... r28 0x0
> .... r29 0xc000000fcaa69000
> .... r30 0x1
> .... r31 0x0
> .... nip 0xc0000000001dd320
> .... msr 0x9000000000009032
> .... orig_r3 0xc0000000001e538c
> .... ctr 0xc00000000009d550
> .... link 0xc0000000001e5e34
> .... xer 0x0
> .... ccr 0x84022882
> .... softe 0x0
> .... trap 0xf01
> .... dar 0x0
> .... dsisr 0xf00040060000004
> ... thread: :4522:4522
> ...... dso: /root/.debug/.build-id/b0/ef11b1a1629e62ac9de75199117ee5ef9469e9
> :4522 4522 496.768515: 1 cycles: c0000000001e538c .perf_event_context_sched_in (/boot/vmlinux)
>
>
>
> Changes from v10:
>
> - Included SOFTE as suggested by mpe
> - The name of registers displayed is changed from
> gpr* to r* also the macro names changed from
> PERF_REG_POWERPC_GPR* to PERF_REG_POWERPC_R*.
> - The conflict in returning the ABI is resolved.
> - #define PERF_REG_SP is again changed to PERF_REG_POWERPC_R1
> - Comment in tools/perf/config/Makefile is updated.
> - removed the "Reviewed-By" tag as the patch has logic changes.
>
>
> Changes from V9:
>
> - Changed the name displayed for link register from "lnk" to "link" in
> tools/perf/arch/powerpc/include/perf_regs.h
>
> changes from V8:
>
> - Corrected the indentation issue in the Makefile mentioned in 3rd patch
>
> Changes from V7:
>
> - Addressed the new line issue in 3rd patch.
>
> Changes from V6:
>
> - Corrected the typo in patch tools/perf: Map the ID values with register names.
> ie #define PERF_REG_SP PERF_REG_POWERPC_R1 should be #define PERF_REG_SP PERF_REG_POWERPC_GPR1
>
>
> Changes from V5:
>
> - Enabled perf_sample_regs_user also in this patch set.Functions added in
> arch/powerpc/perf/perf_regs.c
> - Added Maddy's patch to this patchset for enabling -I? option which will
> list the supported register names.
>
>
> Changes from V4:
>
> - Removed the softe and MQ from all patches
> - Switch case is replaced with an array in the 3rd patch
>
> Changes from V3:
>
> - Addressed the comments by Sukadev regarding the nits in the descriptions.
> - Modified the subject of first patch.
> - Included the sample output in the 3rd patch also.
>
> Changes from V2:
>
> - tools/perf/config/Makefile is moved to the patch tools/perf.
> - The patchset is reordered.
> - perf_regs_load() function is used for the dwarf unwind test.Since it is not required here,
> it is removed from tools/perf/arch/powerpc/include/perf_regs.h
> - PERF_REGS_POWERPC_RESULT is removed.
>
> Changes from V1:
>
> - Solved the name missmatch issue in the from and signed-off field of the patch series.
> - Added necessary comments in the 3rd patch ie perf/powerpc ,as suggested by Maddy.
>
>
>
> Anju T (3):
> perf/powerpc: assign an id to each powerpc register
> perf/powerpc: add support for sampling intr machine state
> tools/perf: Map the ID values with register names
>
> Madhavan Srinivasan (1):
> tool/perf: Add sample_reg_mask to include all perf_regs regs
>
>
> arch/powerpc/Kconfig | 1 +
> arch/powerpc/include/uapi/asm/perf_regs.h | 50 ++++++++++++++++
> arch/powerpc/perf/Makefile | 1 +
> arch/powerpc/perf/perf_regs.c | 91 +++++++++++++++++++++++++++++
> tools/perf/arch/powerpc/include/perf_regs.h | 69 ++++++++++++++++++++++
> tools/perf/arch/powerpc/util/Build | 1 +
> tools/perf/arch/powerpc/util/perf_regs.c | 49 ++++++++++++++++
> tools/perf/config/Makefile | 5 ++
> 8 files changed, 267 insertions(+)
> create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
> create mode 100644 arch/powerpc/perf/perf_regs.c
> create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
> create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
>
Hi,
Can this be taken into the next tree?
Thanks
Anju.
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc
2016-04-18 9:47 ` Anju T
@ 2016-04-20 3:57 ` Arnaldo Carvalho de Melo
2016-04-20 4:55 ` Michael Ellerman
0 siblings, 1 reply; 19+ messages in thread
From: Arnaldo Carvalho de Melo @ 2016-04-20 3:57 UTC (permalink / raw)
To: Anju T, mpe
Cc: linux-kernel, maddy, jolsa, dsahern, sukadev, hemant,
naveen.n.rao, linuxppc-dev
Em Mon, Apr 18, 2016 at 03:17:11PM +0530, Anju T escreveu:
> On Saturday 20 February 2016 10:32 AM, Anju T wrote:
> >This short patch series adds the ability to sample the interrupted
> >machine state for each hardware sample.
> >
> >To test this patchset,
> >Eg:
> >
> >$ perf record -I? # list supported registers
> >
> >output:
> >available registers: r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 nip msr orig_r3 ctr link xer ccr softe trap dar dsisr
> >
> > usage: perf record [<options>] [<command>]
> > or: perf record [<options>] -- <command> [<options>]
> >
> > -I, --intr-regs[=<any register>]
> > sample selected machine registers on interrupt, use -I ? to list register names
> >
> >
> >$ perf record -I ls # record machine state at interrupt
> >$ perf script -D # read the perf.data file
> >
> >Sample output obtained for this patchset/ output looks like as follows:
> >
> >496768515470 0x1988 [0x188]: PERF_RECORD_SAMPLE(IP, 0x1): 4522/4522: 0xc0000000001e538c period: 1 addr: 0
> >... intr regs: mask 0x7ffffffffff ABI 64-bit
> >.... r0 0xc0000000001e5e34
> >.... r1 0xc000000fe733f9a0
> >.... r2 0xc000000001523100
> >.... r3 0xc000000ffaadeb60
> >.... r4 0xc000000003456800
> >.... r5 0x73a9b5e000
> >.... r6 0x1e000000
> >.... r7 0x0
> >.... r8 0x0
> >.... r9 0x0
> >.... r10 0x1
> >.... r11 0x0
> >.... r12 0x24022822
> >.... r13 0xc00000000feec180
> >.... r14 0x0
> >.... r15 0xc000001e4be18800
> >.... r16 0x0
> >.... r17 0xc000000ffaac5000
> >.... r18 0xc000000fe733f8a0
> >.... r19 0xc000000001523100
> >.... r20 0xc00000000009fd1c
> >.... r21 0xc000000fcaa69000
> >.... r22 0xc0000000001e4968
> >.... r23 0xc000000001523100
> >.... r24 0xc000000fe733f850
> >.... r25 0xc000000fcaa69000
> >.... r26 0xc000000003b8fcf0
> >.... r27 0xfffffffffffffead
> >.... r28 0x0
> >.... r29 0xc000000fcaa69000
> >.... r30 0x1
> >.... r31 0x0
> >.... nip 0xc0000000001dd320
> >.... msr 0x9000000000009032
> >.... orig_r3 0xc0000000001e538c
> >.... ctr 0xc00000000009d550
> >.... link 0xc0000000001e5e34
> >.... xer 0x0
> >.... ccr 0x84022882
> >.... softe 0x0
> >.... trap 0xf01
> >.... dar 0x0
> >.... dsisr 0xf00040060000004
> > ... thread: :4522:4522
> > ...... dso: /root/.debug/.build-id/b0/ef11b1a1629e62ac9de75199117ee5ef9469e9
> > :4522 4522 496.768515: 1 cycles: c0000000001e538c .perf_event_context_sched_in (/boot/vmlinux)
> >
> >
> >
> >Changes from v10:
> >
> >- Included SOFTE as suggested by mpe
> >- The name of registers displayed is changed from
> > gpr* to r* also the macro names changed from
> > PERF_REG_POWERPC_GPR* to PERF_REG_POWERPC_R*.
> >- The conflict in returning the ABI is resolved.
> >- #define PERF_REG_SP is again changed to PERF_REG_POWERPC_R1
> >- Comment in tools/perf/config/Makefile is updated.
> >- removed the "Reviewed-By" tag as the patch has logic changes.
> >
> >
> >Changes from V9:
> >
> >- Changed the name displayed for link register from "lnk" to "link" in
> > tools/perf/arch/powerpc/include/perf_regs.h
> >
> >changes from V8:
> >
> >- Corrected the indentation issue in the Makefile mentioned in 3rd patch
> >
> >Changes from V7:
> >
> >- Addressed the new line issue in 3rd patch.
> >
> >Changes from V6:
> >
> >- Corrected the typo in patch tools/perf: Map the ID values with register names.
> > ie #define PERF_REG_SP PERF_REG_POWERPC_R1 should be #define PERF_REG_SP PERF_REG_POWERPC_GPR1
> >
> >
> >Changes from V5:
> >
> >- Enabled perf_sample_regs_user also in this patch set.Functions added in
> > arch/powerpc/perf/perf_regs.c
> >- Added Maddy's patch to this patchset for enabling -I? option which will
> > list the supported register names.
> >
> >
> >Changes from V4:
> >
> >- Removed the softe and MQ from all patches
> >- Switch case is replaced with an array in the 3rd patch
> >
> >Changes from V3:
> >
> >- Addressed the comments by Sukadev regarding the nits in the descriptions.
> >- Modified the subject of first patch.
> >- Included the sample output in the 3rd patch also.
> >
> >Changes from V2:
> >
> >- tools/perf/config/Makefile is moved to the patch tools/perf.
> >- The patchset is reordered.
> >- perf_regs_load() function is used for the dwarf unwind test.Since it is not required here,
> > it is removed from tools/perf/arch/powerpc/include/perf_regs.h
> >- PERF_REGS_POWERPC_RESULT is removed.
> >
> >Changes from V1:
> >
> >- Solved the name missmatch issue in the from and signed-off field of the patch series.
> >- Added necessary comments in the 3rd patch ie perf/powerpc ,as suggested by Maddy.
> >
> >
> >
> >Anju T (3):
> > perf/powerpc: assign an id to each powerpc register
> > perf/powerpc: add support for sampling intr machine state
> > tools/perf: Map the ID values with register names
> >
> >Madhavan Srinivasan (1):
> > tool/perf: Add sample_reg_mask to include all perf_regs regs
> >
> >
> > arch/powerpc/Kconfig | 1 +
> > arch/powerpc/include/uapi/asm/perf_regs.h | 50 ++++++++++++++++
> > arch/powerpc/perf/Makefile | 1 +
> > arch/powerpc/perf/perf_regs.c | 91 +++++++++++++++++++++++++++++
> > tools/perf/arch/powerpc/include/perf_regs.h | 69 ++++++++++++++++++++++
> > tools/perf/arch/powerpc/util/Build | 1 +
> > tools/perf/arch/powerpc/util/perf_regs.c | 49 ++++++++++++++++
> > tools/perf/config/Makefile | 5 ++
> > 8 files changed, 267 insertions(+)
> > create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
> > create mode 100644 arch/powerpc/perf/perf_regs.c
> > create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
> > create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
> >
>
> Hi,
>
> Can this be taken into the next tree?
Even the bits in tools/perf/ are arch specific, so I guess this goes via
the powerpc tree? Michael?
- Arnaldo
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc
2016-04-20 3:57 ` Arnaldo Carvalho de Melo
@ 2016-04-20 4:55 ` Michael Ellerman
0 siblings, 0 replies; 19+ messages in thread
From: Michael Ellerman @ 2016-04-20 4:55 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo, Anju T
Cc: linux-kernel, maddy, jolsa, dsahern, sukadev, hemant,
naveen.n.rao, linuxppc-dev
On Wed, 2016-04-20 at 00:57 -0300, Arnaldo Carvalho de Melo wrote:
> Em Mon, Apr 18, 2016 at 03:17:11PM +0530, Anju T escreveu:
> > On Saturday 20 February 2016 10:32 AM, Anju T wrote:
> > >
> > > arch/powerpc/Kconfig | 1 +
> > > arch/powerpc/include/uapi/asm/perf_regs.h | 50 ++++++++++++++++
> > > arch/powerpc/perf/Makefile | 1 +
> > > arch/powerpc/perf/perf_regs.c | 91 +++++++++++++++++++++++++++++
> > > tools/perf/arch/powerpc/include/perf_regs.h | 69 ++++++++++++++++++++++
> > > tools/perf/arch/powerpc/util/Build | 1 +
> > > tools/perf/arch/powerpc/util/perf_regs.c | 49 ++++++++++++++++
> > > tools/perf/config/Makefile | 5 ++
> > > 8 files changed, 267 insertions(+)
> > > create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
> > > create mode 100644 arch/powerpc/perf/perf_regs.c
> > > create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
> > > create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
> > >
> >
> > Hi,
> >
> > Can this be taken into the next tree?
>
> Even the bits in tools/perf/ are arch specific, so I guess this goes via
> the powerpc tree? Michael?
Yeah if that's OK with you.
It doesn't look like it will generate much in the way of merge conflicts.
Do you want to send an ack?
cheers
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc
@ 2016-04-20 4:55 ` Michael Ellerman
0 siblings, 0 replies; 19+ messages in thread
From: Michael Ellerman @ 2016-04-20 4:55 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo, Anju T
Cc: linux-kernel, maddy, jolsa, dsahern, sukadev, hemant,
naveen.n.rao, linuxppc-dev
On Wed, 2016-04-20 at 00:57 -0300, Arnaldo Carvalho de Melo wrote:
> Em Mon, Apr 18, 2016 at 03:17:11PM +0530, Anju T escreveu:
> > On Saturday 20 February 2016 10:32 AM, Anju T wrote:
> > >
> > > arch/powerpc/Kconfig | 1 +
> > > arch/powerpc/include/uapi/asm/perf_regs.h | 50 ++++++++++++++++
> > > arch/powerpc/perf/Makefile | 1 +
> > > arch/powerpc/perf/perf_regs.c | 91 +++++++++++++++++++++++++++++
> > > tools/perf/arch/powerpc/include/perf_regs.h | 69 ++++++++++++++++++++++
> > > tools/perf/arch/powerpc/util/Build | 1 +
> > > tools/perf/arch/powerpc/util/perf_regs.c | 49 ++++++++++++++++
> > > tools/perf/config/Makefile | 5 ++
> > > 8 files changed, 267 insertions(+)
> > > create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
> > > create mode 100644 arch/powerpc/perf/perf_regs.c
> > > create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
> > > create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
> > >
> >
> > Hi,
> >
> > Can this be taken into the next tree?
>
> Even the bits in tools/perf/ are arch specific, so I guess this goes via
> the powerpc tree? Michael?
Yeah if that's OK with you.
It doesn't look like it will generate much in the way of merge conflicts.
Do you want to send an ack?
cheers
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc
2016-04-20 4:55 ` Michael Ellerman
(?)
@ 2016-04-20 13:16 ` Arnaldo Carvalho de Melo
2016-04-21 13:41 ` Michael Ellerman
-1 siblings, 1 reply; 19+ messages in thread
From: Arnaldo Carvalho de Melo @ 2016-04-20 13:16 UTC (permalink / raw)
To: Michael Ellerman
Cc: Anju T, linux-kernel, maddy, jolsa, dsahern, sukadev, hemant,
acme, naveen.n.rao, linuxppc-dev
Em Wed, Apr 20, 2016 at 02:55:58PM +1000, Michael Ellerman escreveu:
> On Wed, 2016-04-20 at 00:57 -0300, Arnaldo Carvalho de Melo wrote:
> > Em Mon, Apr 18, 2016 at 03:17:11PM +0530, Anju T escreveu:
> > > On Saturday 20 February 2016 10:32 AM, Anju T wrote:
> > > > tools/perf/arch/powerpc/include/perf_regs.h | 69 ++++++++++++++++++++++
> > > > tools/perf/arch/powerpc/util/Build | 1 +
> > > > tools/perf/arch/powerpc/util/perf_regs.c | 49 ++++++++++++++++
> > > > tools/perf/config/Makefile | 5 ++
> > > > create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
> > > > create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
> > > Can this be taken into the next tree?
> > Even the bits in tools/perf/ are arch specific, so I guess this goes via
> > the powerpc tree? Michael?
> Yeah if that's OK with you.
>
> It doesn't look like it will generate much in the way of merge conflicts.
>
> Do you want to send an ack?
For the tools/perf/ bits:
Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
- Arnaldo
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH V11 1/4] perf/powerpc: assign an id to each powerpc register
2016-02-20 5:02 ` [PATCH V11 1/4] perf/powerpc: assign an id to each powerpc register Anju T
@ 2016-04-21 11:07 ` Naveen N. Rao
2016-04-21 13:39 ` [V11,1/4] " Michael Ellerman
1 sibling, 0 replies; 19+ messages in thread
From: Naveen N. Rao @ 2016-04-21 11:07 UTC (permalink / raw)
To: Anju T
Cc: linux-kernel, mpe, maddy, jolsa, dsahern, acme, sukadev, hemant,
linuxppc-dev
On 2016/02/20 10:32AM, Anju T wrote:
> The enum definition assigns an 'id' to each register in "struct pt_regs"
> of arch/powerpc. The order of these values in the enum definition are
> based on the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h.
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/uapi/asm/perf_regs.h | 50 +++++++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
> create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
This patch doesn't enable anything and doesn't look to be useful by
itself. Please merge this with your second patch.
- Naveen
>
> diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
> new file mode 100644
> index 0000000..62b8a5e
> --- /dev/null
> +++ b/arch/powerpc/include/uapi/asm/perf_regs.h
> @@ -0,0 +1,50 @@
> +#ifndef _ASM_POWERPC_PERF_REGS_H
> +#define _ASM_POWERPC_PERF_REGS_H
> +
> +enum perf_event_powerpc_regs {
> + PERF_REG_POWERPC_R0,
> + PERF_REG_POWERPC_R1,
> + PERF_REG_POWERPC_R2,
> + PERF_REG_POWERPC_R3,
> + PERF_REG_POWERPC_R4,
> + PERF_REG_POWERPC_R5,
> + PERF_REG_POWERPC_R6,
> + PERF_REG_POWERPC_R7,
> + PERF_REG_POWERPC_R8,
> + PERF_REG_POWERPC_R9,
> + PERF_REG_POWERPC_R10,
> + PERF_REG_POWERPC_R11,
> + PERF_REG_POWERPC_R12,
> + PERF_REG_POWERPC_R13,
> + PERF_REG_POWERPC_R14,
> + PERF_REG_POWERPC_R15,
> + PERF_REG_POWERPC_R16,
> + PERF_REG_POWERPC_R17,
> + PERF_REG_POWERPC_R18,
> + PERF_REG_POWERPC_R19,
> + PERF_REG_POWERPC_R20,
> + PERF_REG_POWERPC_R21,
> + PERF_REG_POWERPC_R22,
> + PERF_REG_POWERPC_R23,
> + PERF_REG_POWERPC_R24,
> + PERF_REG_POWERPC_R25,
> + PERF_REG_POWERPC_R26,
> + PERF_REG_POWERPC_R27,
> + PERF_REG_POWERPC_R28,
> + PERF_REG_POWERPC_R29,
> + PERF_REG_POWERPC_R30,
> + PERF_REG_POWERPC_R31,
> + PERF_REG_POWERPC_NIP,
> + PERF_REG_POWERPC_MSR,
> + PERF_REG_POWERPC_ORIG_R3,
> + PERF_REG_POWERPC_CTR,
> + PERF_REG_POWERPC_LNK,
> + PERF_REG_POWERPC_XER,
> + PERF_REG_POWERPC_CCR,
> + PERF_REG_POWERPC_SOFTE,
> + PERF_REG_POWERPC_TRAP,
> + PERF_REG_POWERPC_DAR,
> + PERF_REG_POWERPC_DSISR,
> + PERF_REG_POWERPC_MAX,
> +};
> +#endif /* _ASM_POWERPC_PERF_REGS_H */
> --
> 2.1.0
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH V11 2/4] perf/powerpc: add support for sampling intr machine state
2016-02-20 5:02 ` [PATCH V11 2/4] perf/powerpc: add support for sampling intr machine state Anju T
@ 2016-04-21 11:15 ` Naveen N. Rao
2016-04-21 13:39 ` [V11, 2/4] " Michael Ellerman
1 sibling, 0 replies; 19+ messages in thread
From: Naveen N. Rao @ 2016-04-21 11:15 UTC (permalink / raw)
To: Anju T
Cc: linux-kernel, mpe, maddy, jolsa, dsahern, acme, sukadev, hemant,
linuxppc-dev
On 2016/02/20 10:32AM, Anju T wrote:
> The perf infrastructure uses a bit mask to find out valid
> registers to display. Define a register mask for supported
> registers defined in asm/perf_regs.h. The bit positions also
> correspond to register IDs which is used by perf infrastructure
> to fetch the register values. CONFIG_HAVE_PERF_REGS enables
> sampling of the interrupted machine state.
Please also update
Documentation/features/perf/perf-regs/arch-support.txt as part of this
patch.
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
> ---
> arch/powerpc/Kconfig | 1 +
> arch/powerpc/perf/Makefile | 1 +
> arch/powerpc/perf/perf_regs.c | 91 +++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 93 insertions(+)
> create mode 100644 arch/powerpc/perf/perf_regs.c
>
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 9a7057e..c4ce60d 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -119,6 +119,7 @@ config PPC
> select GENERIC_ATOMIC64 if PPC32
> select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
> select HAVE_PERF_EVENTS
> + select HAVE_PERF_REGS
> select HAVE_REGS_AND_STACK_ACCESS_API
> select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
> select ARCH_WANT_IPC_PARSE_VERSION
> diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
> index f9c083a..2f2d3d2 100644
> --- a/arch/powerpc/perf/Makefile
> +++ b/arch/powerpc/perf/Makefile
> @@ -8,6 +8,7 @@ obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
> power8-pmu.o
> obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
>
> +obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
> obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
> obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
>
> diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c
> new file mode 100644
> index 0000000..ae0759c
> --- /dev/null
> +++ b/arch/powerpc/perf/perf_regs.c
> @@ -0,0 +1,91 @@
You may want to add a copyright header here.
> +#include <linux/errno.h>
> +#include <linux/kernel.h>
> +#include <linux/sched.h>
> +#include <linux/perf_event.h>
> +#include <linux/bug.h>
> +#include <linux/stddef.h>
> +#include <asm/ptrace.h>
> +#include <asm/perf_regs.h>
> +
> +#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r)
Also, run this through checkpatch.pl. There is a whitespace issue
reported here.
> +
> +#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1))
> +
> +static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R0, gpr[0]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R1, gpr[1]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R2, gpr[2]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R3, gpr[3]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R4, gpr[4]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R5, gpr[5]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R6, gpr[6]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R7, gpr[7]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R8, gpr[8]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R9, gpr[9]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R10, gpr[10]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R11, gpr[11]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R12, gpr[12]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R13, gpr[13]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R14, gpr[14]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R15, gpr[15]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R16, gpr[16]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R17, gpr[17]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R18, gpr[18]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R19, gpr[19]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R20, gpr[20]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R21, gpr[21]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R22, gpr[22]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R23, gpr[23]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R24, gpr[24]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R25, gpr[25]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R26, gpr[26]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R27, gpr[27]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R28, gpr[28]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R29, gpr[29]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R30, gpr[30]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_R31, gpr[31]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_LNK, link),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, softe),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
> +};
> +
> +u64 perf_reg_value(struct pt_regs *regs, int idx)
> +{
> + if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
> + return 0;
> +
> + return regs_get_register(regs, pt_regs_offset[idx]);
> +}
> +
> +int perf_reg_validate(u64 mask)
> +{
> + if (!mask || mask & REG_RESERVED)
> + return -EINVAL;
> + return 0;
> +}
> +
> +u64 perf_reg_abi(struct task_struct *task)
> +{
> +#ifdef __powerpc64__
> + if (!test_tsk_thread_flag(task, TIF_32BIT))
> + return PERF_SAMPLE_REGS_ABI_64;
> + else
The 'else' above is redundant.
- Naveen
> +#endif
> + return PERF_SAMPLE_REGS_ABI_32;
> +}
> +
> +void perf_get_regs_user(struct perf_regs *regs_user,
> + struct pt_regs *regs,
> + struct pt_regs *regs_user_copy)
> +{
> + regs_user->regs = task_pt_regs(current);
> + regs_user->abi = perf_reg_abi(current);
> +}
> --
> 2.1.0
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [V11,2/4] perf/powerpc: add support for sampling intr machine state
2016-02-20 5:02 ` [PATCH V11 2/4] perf/powerpc: add support for sampling intr machine state Anju T
@ 2016-04-21 13:39 ` Michael Ellerman
2016-04-21 13:39 ` [V11, 2/4] " Michael Ellerman
1 sibling, 0 replies; 19+ messages in thread
From: Michael Ellerman @ 2016-04-21 13:39 UTC (permalink / raw)
To: Anju T, linux-kernel
Cc: maddy, linuxppc-dev, acme, hemant, anju, dsahern, naveen.n.rao,
sukadev, jolsa
On Sat, 2016-20-02 at 05:02:46 UTC, Anju T wrote:
> The perf infrastructure uses a bit mask to find out valid
> registers to display. Define a register mask for supported
> registers defined in asm/perf_regs.h. The bit positions also
> correspond to register IDs which is used by perf infrastructure
> to fetch the register values. CONFIG_HAVE_PERF_REGS enables
> sampling of the interrupted machine state.
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/ed4a4ef85cf5b7523107950103
cheers
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [V11,1/4] perf/powerpc: assign an id to each powerpc register
2016-02-20 5:02 ` [PATCH V11 1/4] perf/powerpc: assign an id to each powerpc register Anju T
2016-04-21 11:07 ` Naveen N. Rao
@ 2016-04-21 13:39 ` Michael Ellerman
1 sibling, 0 replies; 19+ messages in thread
From: Michael Ellerman @ 2016-04-21 13:39 UTC (permalink / raw)
To: Anju T, linux-kernel
Cc: maddy, linuxppc-dev, acme, hemant, anju, dsahern, naveen.n.rao,
sukadev, jolsa
On Sat, 2016-20-02 at 05:02:45 UTC, Anju T wrote:
> The enum definition assigns an 'id' to each register in "struct pt_regs"
> of arch/powerpc. The order of these values in the enum definition are
> based on the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h.
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/1bfadabfebc671a6af0f5008b5
cheers
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [V11, 2/4] perf/powerpc: add support for sampling intr machine state
@ 2016-04-21 13:39 ` Michael Ellerman
0 siblings, 0 replies; 19+ messages in thread
From: Michael Ellerman @ 2016-04-21 13:39 UTC (permalink / raw)
To: Anju T, linux-kernel
Cc: maddy, linuxppc-dev, acme, hemant, anju, dsahern, naveen.n.rao,
sukadev, jolsa
On Sat, 2016-20-02 at 05:02:46 UTC, Anju T wrote:
> The perf infrastructure uses a bit mask to find out valid
> registers to display. Define a register mask for supported
> registers defined in asm/perf_regs.h. The bit positions also
> correspond to register IDs which is used by perf infrastructure
> to fetch the register values. CONFIG_HAVE_PERF_REGS enables
> sampling of the interrupted machine state.
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/ed4a4ef85cf5b7523107950103
cheers
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [V11,3/4] tools/perf: Map the ID values with register names
2016-02-20 5:02 ` [PATCH V11 3/4] tools/perf: Map the ID values with register names Anju T
@ 2016-04-21 13:39 ` Michael Ellerman
0 siblings, 0 replies; 19+ messages in thread
From: Michael Ellerman @ 2016-04-21 13:39 UTC (permalink / raw)
To: Anju T, linux-kernel
Cc: maddy, linuxppc-dev, acme, hemant, anju, dsahern, naveen.n.rao,
sukadev, jolsa
On Sat, 2016-20-02 at 05:02:47 UTC, Anju T wrote:
> Map ID values with corresponding register names. These names are then
> displayed when user issues perf record with the -I option
> followed by perf report/script with -D option.
>
> To test this patchset,
> Eg:
> $ perf record -I ls # record machine state at interrupt
> $ perf script -D # read the perf.data file
>
> Sample output obtained for this patch / output looks like as follows:
>
> 496768515470 0x1988 [0x188]: PERF_RECORD_SAMPLE(IP, 0x1): 4522/4522: 0xc0000000001e538c period: 1 addr: 0
> ... intr regs: mask 0x7ffffffffff ABI 64-bit
> .... r0 0xc0000000001e5e34
> .... r1 0xc000000fe733f9a0
> .... r2 0xc000000001523100
> .... r3 0xc000000ffaadeb60
> .... r4 0xc000000003456800
> .... r5 0x73a9b5e000
> .... r6 0x1e000000
> .... r7 0x0
> .... r8 0x0
> .... r9 0x0
> .... r10 0x1
> .... r11 0x0
> .... r12 0x24022822
> .... r13 0xc00000000feec180
> .... r14 0x0
> .... r15 0xc000001e4be18800
> .... r16 0x0
> .... r17 0xc000000ffaac5000
> .... r18 0xc000000fe733f8a0
> .... r19 0xc000000001523100
> .... r20 0xc00000000009fd1c
> .... r21 0xc000000fcaa69000
> .... r22 0xc0000000001e4968
> .... r23 0xc000000001523100
> .... r24 0xc000000fe733f850
> .... r25 0xc000000fcaa69000
> .... r26 0xc000000003b8fcf0
> .... r27 0xfffffffffffffead
> .... r28 0x0
> .... r29 0xc000000fcaa69000
> .... r30 0x1
> .... r31 0x0
> .... nip 0xc0000000001dd320
> .... msr 0x9000000000009032
> .... orig_r3 0xc0000000001e538c
> .... ctr 0xc00000000009d550
> .... link 0xc0000000001e5e34
> .... xer 0x0
> .... ccr 0x84022882
> .... softe 0x0
> .... trap 0xf01
> .... dar 0x0
> .... dsisr 0xf00040060000004
> ... thread: :4522:4522
> ...... dso: /root/.debug/.build-id/b0/ef11b1a1629e62ac9de75199117ee5ef9469e9
> :4522 4522 496.768515: 1 cycles: c0000000001e538c .perf_event_context_sched_in (/boot/vmlinux)
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/dc642e8388b63a9a221903584b
cheers
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [V2,4/4] tool/perf: Add sample_reg_mask to include all perf_regs
2016-02-20 5:02 ` [PATCH V2 4/4] tool/perf: Add sample_reg_mask to include all perf_regs Anju T
@ 2016-04-21 13:39 ` Michael Ellerman
0 siblings, 0 replies; 19+ messages in thread
From: Michael Ellerman @ 2016-04-21 13:39 UTC (permalink / raw)
To: Anju T, linux-kernel
Cc: maddy, linuxppc-dev, acme, hemant, anju, dsahern, naveen.n.rao,
sukadev, jolsa
On Sat, 2016-20-02 at 05:02:48 UTC, Anju T wrote:
> From: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
>
> Add sample_reg_mask array with pt_regs registers.
> This is needed for printing supported regs ( -I? option).
>
> Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/bb62bad623deb7952aef13fcbe
cheers
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc
2016-04-20 13:16 ` Arnaldo Carvalho de Melo
@ 2016-04-21 13:41 ` Michael Ellerman
0 siblings, 0 replies; 19+ messages in thread
From: Michael Ellerman @ 2016-04-21 13:41 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo
Cc: Anju T, linux-kernel, maddy, jolsa, dsahern, sukadev, hemant,
acme, naveen.n.rao, linuxppc-dev
On Wed, 2016-04-20 at 10:16 -0300, Arnaldo Carvalho de Melo wrote:
> Em Wed, Apr 20, 2016 at 02:55:58PM +1000, Michael Ellerman escreveu:
> > On Wed, 2016-04-20 at 00:57 -0300, Arnaldo Carvalho de Melo wrote:
> > > Even the bits in tools/perf/ are arch specific, so I guess this goes via
> > > the powerpc tree? Michael?
> >
> > Yeah if that's OK with you.
> >
> > It doesn't look like it will generate much in the way of merge conflicts.
> >
> > Do you want to send an ack?
>
> For the tools/perf/ bits:
>
> Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Thanks.
cheers
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2016-04-21 13:41 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-02-20 5:02 [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
2016-02-20 5:02 ` [PATCH V11 1/4] perf/powerpc: assign an id to each powerpc register Anju T
2016-04-21 11:07 ` Naveen N. Rao
2016-04-21 13:39 ` [V11,1/4] " Michael Ellerman
2016-02-20 5:02 ` [PATCH V11 2/4] perf/powerpc: add support for sampling intr machine state Anju T
2016-04-21 11:15 ` Naveen N. Rao
2016-04-21 13:39 ` [V11,2/4] " Michael Ellerman
2016-04-21 13:39 ` [V11, 2/4] " Michael Ellerman
2016-02-20 5:02 ` [PATCH V11 3/4] tools/perf: Map the ID values with register names Anju T
2016-04-21 13:39 ` [V11,3/4] " Michael Ellerman
2016-02-20 5:02 ` [PATCH V2 4/4] tool/perf: Add sample_reg_mask to include all perf_regs Anju T
2016-04-21 13:39 ` [V2,4/4] " Michael Ellerman
2016-03-07 8:23 ` [PATCH V11 0/4]perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
2016-04-18 9:47 ` Anju T
2016-04-20 3:57 ` Arnaldo Carvalho de Melo
2016-04-20 4:55 ` Michael Ellerman
2016-04-20 4:55 ` Michael Ellerman
2016-04-20 13:16 ` Arnaldo Carvalho de Melo
2016-04-21 13:41 ` Michael Ellerman
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