* [PATCH 1/2] dt-bindings: pci: add DT binding for Axis ARTPEC-6 PCIe controller
@ 2016-05-04 11:54 ` Niklas Cassel
0 siblings, 0 replies; 4+ messages in thread
From: Niklas Cassel @ 2016-05-04 11:54 UTC (permalink / raw)
To: niklass, jespern, robh+dt, pawel.moll, mark.rutland,
ijc+devicetree, galak
Cc: linux-arm-kernel, linux-pci, devicetree, linux-kernel
From: Niklas Cassel <niklas.cassel@axis.com>
This commit adds the Device Tree binding documentation that allows to
describe the PCIe controller found in the Axis ARTPEC-6 SoC.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
---
.../devicetree/bindings/pci/axis,artpec6-pcie.txt | 45 ++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
diff --git a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
new file mode 100644
index 0000000..fdac2a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
@@ -0,0 +1,45 @@
+* Axis ARTPEC-6 PCIe interface
+
+This PCIe host controller is based on the Synopsis Designware PCIe IP
+and thus inherits all the common properties defined in designware-pcie.txt.
+
+Required properties:
+- compatible: "axis,artpec6-pcie", "snps,dw-pcie"
+- reg: base addresses and lengths of the pcie controller (DBI),
+ the phy controller, and configuration address space.
+- reg-names: Must include the following entries:
+ - "dbi"
+ - "phy"
+ - "config"
+- interrupts: A list of interrupt outputs of the controller. Must contain an
+ entry for each entry in the interrupt-names property.
+- interrupt-names: Must include the following entries:
+ - "msi": The interrupt that is asserted when an MSI is received
+- syscon: Should contain a link to the syscon device node.
+
+Example:
+
+ pcie@f8050000 {
+ compatible = "axis,artpec6-pcie", "snps,dw-pcie";
+ reg = <0xf8050000 0x2000
+ 0xf8040000 0x1000
+ 0xc0000000 0x1000>;
+ reg-names = "dbi", "phy", "config";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ /* downstream I/O */
+ ranges = <0x81000000 0 0 0xc0001000 0 0x00010000
+ /* non-prefetchable memory */
+ 0x82000000 0 0xc0011000 0xc0011000 0 0x1ffef000>;
+ num-lanes = <2>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ syscon = <&syscon>;
+ };
--
2.1.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 1/2] dt-bindings: pci: add DT binding for Axis ARTPEC-6 PCIe controller
@ 2016-05-04 11:54 ` Niklas Cassel
0 siblings, 0 replies; 4+ messages in thread
From: Niklas Cassel @ 2016-05-04 11:54 UTC (permalink / raw)
To: niklass-VrBV9hrLPhE, jespern-VrBV9hrLPhE,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, pawel.moll-5wv7dgnIgG8,
mark.rutland-5wv7dgnIgG8, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
galak-sgV2jX0FEOL9JmXXK+q4OQ
Cc: linux-arm-kernel-VrBV9hrLPhE, linux-pci-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
From: Niklas Cassel <niklas.cassel-VrBV9hrLPhE@public.gmane.org>
This commit adds the Device Tree binding documentation that allows to
describe the PCIe controller found in the Axis ARTPEC-6 SoC.
Signed-off-by: Niklas Cassel <niklas.cassel-VrBV9hrLPhE@public.gmane.org>
---
.../devicetree/bindings/pci/axis,artpec6-pcie.txt | 45 ++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
diff --git a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
new file mode 100644
index 0000000..fdac2a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
@@ -0,0 +1,45 @@
+* Axis ARTPEC-6 PCIe interface
+
+This PCIe host controller is based on the Synopsis Designware PCIe IP
+and thus inherits all the common properties defined in designware-pcie.txt.
+
+Required properties:
+- compatible: "axis,artpec6-pcie", "snps,dw-pcie"
+- reg: base addresses and lengths of the pcie controller (DBI),
+ the phy controller, and configuration address space.
+- reg-names: Must include the following entries:
+ - "dbi"
+ - "phy"
+ - "config"
+- interrupts: A list of interrupt outputs of the controller. Must contain an
+ entry for each entry in the interrupt-names property.
+- interrupt-names: Must include the following entries:
+ - "msi": The interrupt that is asserted when an MSI is received
+- syscon: Should contain a link to the syscon device node.
+
+Example:
+
+ pcie@f8050000 {
+ compatible = "axis,artpec6-pcie", "snps,dw-pcie";
+ reg = <0xf8050000 0x2000
+ 0xf8040000 0x1000
+ 0xc0000000 0x1000>;
+ reg-names = "dbi", "phy", "config";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ /* downstream I/O */
+ ranges = <0x81000000 0 0 0xc0001000 0 0x00010000
+ /* non-prefetchable memory */
+ 0x82000000 0 0xc0011000 0xc0011000 0 0x1ffef000>;
+ num-lanes = <2>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ syscon = <&syscon>;
+ };
--
2.1.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: add DT binding for Axis ARTPEC-6 PCIe controller
2016-05-04 11:54 ` Niklas Cassel
(?)
@ 2016-05-05 22:03 ` Rob Herring
2016-05-07 11:45 ` Jesper Nilsson
-1 siblings, 1 reply; 4+ messages in thread
From: Rob Herring @ 2016-05-05 22:03 UTC (permalink / raw)
To: Niklas Cassel
Cc: niklass, jespern, pawel.moll, mark.rutland, ijc+devicetree,
galak, linux-arm-kernel, linux-pci, devicetree, linux-kernel
On Wed, May 04, 2016 at 01:54:17PM +0200, Niklas Cassel wrote:
> From: Niklas Cassel <niklas.cassel@axis.com>
>
> This commit adds the Device Tree binding documentation that allows to
> describe the PCIe controller found in the Axis ARTPEC-6 SoC.
>
> Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
> ---
> .../devicetree/bindings/pci/axis,artpec6-pcie.txt | 45 ++++++++++++++++++++++
> 1 file changed, 45 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
>
> diff --git a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
> new file mode 100644
> index 0000000..fdac2a2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
> @@ -0,0 +1,45 @@
> +* Axis ARTPEC-6 PCIe interface
> +
> +This PCIe host controller is based on the Synopsis Designware PCIe IP
> +and thus inherits all the common properties defined in designware-pcie.txt.
> +
> +Required properties:
> +- compatible: "axis,artpec6-pcie", "snps,dw-pcie"
> +- reg: base addresses and lengths of the pcie controller (DBI),
> + the phy controller, and configuration address space.
> +- reg-names: Must include the following entries:
> + - "dbi"
> + - "phy"
> + - "config"
> +- interrupts: A list of interrupt outputs of the controller. Must contain an
> + entry for each entry in the interrupt-names property.
> +- interrupt-names: Must include the following entries:
> + - "msi": The interrupt that is asserted when an MSI is received
> +- syscon: Should contain a link to the syscon device node.
What is the syscon for? Perhaps a name that reflects the purpose.
Rob
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: add DT binding for Axis ARTPEC-6 PCIe controller
2016-05-05 22:03 ` Rob Herring
@ 2016-05-07 11:45 ` Jesper Nilsson
0 siblings, 0 replies; 4+ messages in thread
From: Jesper Nilsson @ 2016-05-07 11:45 UTC (permalink / raw)
To: Rob Herring
Cc: Niklas Cassel, jespern, pawel.moll, mark.rutland, ijc+devicetree,
galak, linux-arm-kernel, linux-pci, devicetree, linux-kernel
On Thu, May 05, 2016 at 05:03:31PM -0500, Rob Herring wrote:
> On Wed, May 04, 2016 at 01:54:17PM +0200, Niklas Cassel wrote:
> > From: Niklas Cassel <niklas.cassel@axis.com>
> >
> > This commit adds the Device Tree binding documentation that allows to
> > describe the PCIe controller found in the Axis ARTPEC-6 SoC.
> >
> > Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
> > ---
> > .../devicetree/bindings/pci/axis,artpec6-pcie.txt | 45 ++++++++++++++++++++++
> > 1 file changed, 45 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
> >
> > diff --git a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
> > new file mode 100644
> > index 0000000..fdac2a2
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
> > @@ -0,0 +1,45 @@
> > +* Axis ARTPEC-6 PCIe interface
> > +
> > +This PCIe host controller is based on the Synopsis Designware PCIe IP
> > +and thus inherits all the common properties defined in designware-pcie.txt.
> > +
> > +Required properties:
> > +- compatible: "axis,artpec6-pcie", "snps,dw-pcie"
> > +- reg: base addresses and lengths of the pcie controller (DBI),
> > + the phy controller, and configuration address space.
> > +- reg-names: Must include the following entries:
> > + - "dbi"
> > + - "phy"
> > + - "config"
> > +- interrupts: A list of interrupt outputs of the controller. Must contain an
> > + entry for each entry in the interrupt-names property.
> > +- interrupt-names: Must include the following entries:
> > + - "msi": The interrupt that is asserted when an MSI is received
> > +- syscon: Should contain a link to the syscon device node.
>
> What is the syscon for? Perhaps a name that reflects the purpose.
It's the SoC System Controller, and holds some chip-specific registers
for the Synopsys IP control, clocks and some termination variables spring
to mind. It was named sysctrl earlier, although that's not very much more
descriptive.
> Rob
/^JN - Jesper Nilsson
--
Jesper Nilsson -- jesper.nilsson@axis.com
^ permalink raw reply [flat|nested] 4+ messages in thread
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2016-05-04 11:54 [PATCH 1/2] dt-bindings: pci: add DT binding for Axis ARTPEC-6 PCIe controller Niklas Cassel
2016-05-04 11:54 ` Niklas Cassel
2016-05-05 22:03 ` Rob Herring
2016-05-07 11:45 ` Jesper Nilsson
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