* [PATCH] drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
@ 2016-05-12 11:43 Chris Wilson
2016-05-12 12:15 ` Tvrtko Ursulin
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Chris Wilson @ 2016-05-12 11:43 UTC (permalink / raw)
To: intel-gfx
Another day, another long overdue conversion. Not much to update inside
intel_overlay.c, but still
text data bss dec hex filename
6309547 3578778 696320 10584645 a18245 vmlinux
6309291 3578778 696320 10584389 a18145 vmlinux
a couple of hundred bytes of pointer misdirection.
Whilst here, rename the ioctl entry points to include the _ioctl suffix
so that the user entry points are clear (following the idiom).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_dma.c | 4 +-
drivers/gpu/drm/i915/intel_display.c | 4 +-
drivers/gpu/drm/i915/intel_drv.h | 12 ++--
drivers/gpu/drm/i915/intel_overlay.c | 132 ++++++++++++++++-------------------
4 files changed, 70 insertions(+), 82 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 0eadeb694fec..e42fa1769c10 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1623,8 +1623,8 @@ const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0),
DRM_IOCTL_DEF_DRV(I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW),
- DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW),
DRM_IOCTL_DEF_DRV(I915_SET_SPRITE_COLORKEY, intel_sprite_set_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, drm_noop, DRM_MASTER|DRM_CONTROL_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b60d9b67e033..d6211c3036c0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -16025,7 +16025,7 @@ void intel_modeset_gem_init(struct drm_device *dev)
intel_modeset_init_hw(dev);
- intel_setup_overlay(dev);
+ intel_setup_overlay(dev_priv);
/*
* Make sure any fbs we allocated at startup are properly
@@ -16098,7 +16098,7 @@ void intel_modeset_cleanup(struct drm_device *dev)
drm_mode_config_cleanup(dev);
- intel_cleanup_overlay(dev);
+ intel_cleanup_overlay(dev_priv);
intel_cleanup_gt_powersave(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1a3e69e5f9f5..0a9c10d65a13 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1435,13 +1435,13 @@ void intel_attach_aspect_ratio_property(struct drm_connector *connector);
/* intel_overlay.c */
-void intel_setup_overlay(struct drm_device *dev);
-void intel_cleanup_overlay(struct drm_device *dev);
+void intel_setup_overlay(struct drm_i915_private *dev_priv);
+void intel_cleanup_overlay(struct drm_i915_private *dev_priv);
int intel_overlay_switch_off(struct intel_overlay *overlay);
-int intel_overlay_put_image(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-int intel_overlay_attrs(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
+int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv);
+int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv);
void intel_overlay_reset(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 4a1e774ba8cc..b9b042cc619f 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -168,7 +168,7 @@ struct overlay_registers {
};
struct intel_overlay {
- struct drm_device *dev;
+ struct drm_i915_private *i915;
struct intel_crtc *crtc;
struct drm_i915_gem_object *vid_bo;
struct drm_i915_gem_object *old_vid_bo;
@@ -190,14 +190,13 @@ struct intel_overlay {
static struct overlay_registers __iomem *
intel_overlay_map_regs(struct intel_overlay *overlay)
{
- struct drm_i915_private *dev_priv = to_i915(overlay->dev);
- struct i915_ggtt *ggtt = &dev_priv->ggtt;
+ struct drm_i915_private *dev_priv = overlay->i915;
struct overlay_registers __iomem *regs;
- if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
+ if (OVERLAY_NEEDS_PHYSICAL(dev_priv))
regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr;
else
- regs = io_mapping_map_wc(ggtt->mappable,
+ regs = io_mapping_map_wc(dev_priv->ggtt.mappable,
overlay->flip_addr,
PAGE_SIZE);
@@ -207,7 +206,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)
static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
struct overlay_registers __iomem *regs)
{
- if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev))
+ if (!OVERLAY_NEEDS_PHYSICAL(overlay->i915))
io_mapping_unmap(regs);
}
@@ -233,14 +232,13 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
/* overlay needs to be disable in OCMD reg */
static int intel_overlay_on(struct intel_overlay *overlay)
{
- struct drm_device *dev = overlay->dev;
- struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_i915_private *dev_priv = overlay->i915;
struct intel_engine_cs *engine = &dev_priv->engine[RCS];
struct drm_i915_gem_request *req;
int ret;
WARN_ON(overlay->active);
- WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
+ WARN_ON(IS_I830(dev_priv) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
req = i915_gem_request_alloc(engine, NULL);
if (IS_ERR(req))
@@ -267,8 +265,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
static int intel_overlay_continue(struct intel_overlay *overlay,
bool load_polyphase_filter)
{
- struct drm_device *dev = overlay->dev;
- struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_i915_private *dev_priv = overlay->i915;
struct intel_engine_cs *engine = &dev_priv->engine[RCS];
struct drm_i915_gem_request *req;
u32 flip_addr = overlay->flip_addr;
@@ -336,8 +333,7 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
/* overlay needs to be disabled in OCMD reg */
static int intel_overlay_off(struct intel_overlay *overlay)
{
- struct drm_device *dev = overlay->dev;
- struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_i915_private *dev_priv = overlay->i915;
struct intel_engine_cs *engine = &dev_priv->engine[RCS];
struct drm_i915_gem_request *req;
u32 flip_addr = overlay->flip_addr;
@@ -366,7 +362,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
intel_ring_emit(engine, flip_addr);
intel_ring_emit(engine, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
/* turn overlay off */
- if (IS_I830(dev)) {
+ if (IS_I830(dev_priv)) {
/* Workaround: Don't disable the overlay fully, since otherwise
* it dies on the next OVERLAY_ON cmd. */
intel_ring_emit(engine, MI_NOOP);
@@ -409,12 +405,11 @@ static int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay)
*/
static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
{
- struct drm_device *dev = overlay->dev;
- struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_i915_private *dev_priv = overlay->i915;
struct intel_engine_cs *engine = &dev_priv->engine[RCS];
int ret;
- WARN_ON(!mutex_is_locked(&dev->struct_mutex));
+ lockdep_assert_held(&dev_priv->dev->struct_mutex);
/* Only wait if there is actually an old frame to release to
* guarantee forward progress.
@@ -538,10 +533,10 @@ static int uv_vsubsampling(u32 format)
}
}
-static u32 calc_swidthsw(struct drm_device *dev, u32 offset, u32 width)
+static u32 calc_swidthsw(struct drm_i915_private *dev_priv, u32 offset, u32 width)
{
u32 mask, shift, ret;
- if (IS_GEN2(dev)) {
+ if (IS_GEN2(dev_priv)) {
mask = 0x1f;
shift = 5;
} else {
@@ -549,7 +544,7 @@ static u32 calc_swidthsw(struct drm_device *dev, u32 offset, u32 width)
shift = 6;
}
ret = ((offset + width + mask) >> shift) - (offset >> shift);
- if (!IS_GEN2(dev))
+ if (!IS_GEN2(dev_priv))
ret <<= 1;
ret -= 1;
return ret << 2;
@@ -742,12 +737,12 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
int ret, tmp_width;
struct overlay_registers __iomem *regs;
bool scale_changed = false;
- struct drm_device *dev = overlay->dev;
+ struct drm_i915_private *dev_priv = overlay->i915;
u32 swidth, swidthsw, sheight, ostride;
enum pipe pipe = overlay->crtc->pipe;
- WARN_ON(!mutex_is_locked(&dev->struct_mutex));
- WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
+ lockdep_assert_held(&dev_priv->dev->struct_mutex);
+ WARN_ON(!drm_modeset_is_locked(&dev_priv->dev->mode_config.connection_mutex));
ret = intel_overlay_release_old_vid(overlay);
if (ret != 0)
@@ -770,7 +765,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
goto out_unpin;
}
oconfig = OCONF_CC_OUT_8BIT;
- if (IS_GEN4(overlay->dev))
+ if (IS_GEN4(dev_priv))
oconfig |= OCONF_CSC_MODE_BT709;
oconfig |= pipe == 0 ?
OCONF_PIPE_A : OCONF_PIPE_B;
@@ -797,7 +792,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
tmp_width = params->src_w;
swidth = params->src_w;
- swidthsw = calc_swidthsw(overlay->dev, params->offset_Y, tmp_width);
+ swidthsw = calc_swidthsw(dev_priv, params->offset_Y, tmp_width);
sheight = params->src_h;
iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_Y, ®s->OBUF_0Y);
ostride = params->stride_Y;
@@ -807,9 +802,9 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
int uv_vscale = uv_vsubsampling(params->format);
u32 tmp_U, tmp_V;
swidth |= (params->src_w/uv_hscale) << 16;
- tmp_U = calc_swidthsw(overlay->dev, params->offset_U,
+ tmp_U = calc_swidthsw(dev_priv, params->offset_U,
params->src_w/uv_hscale);
- tmp_V = calc_swidthsw(overlay->dev, params->offset_V,
+ tmp_V = calc_swidthsw(dev_priv, params->offset_V,
params->src_w/uv_hscale);
swidthsw |= max_t(u32, tmp_U, tmp_V) << 16;
sheight |= (params->src_h/uv_vscale) << 16;
@@ -841,8 +836,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
overlay->old_vid_bo = overlay->vid_bo;
overlay->vid_bo = new_bo;
- intel_frontbuffer_flip(dev,
- INTEL_FRONTBUFFER_OVERLAY(pipe));
+ intel_frontbuffer_flip(dev_priv->dev, INTEL_FRONTBUFFER_OVERLAY(pipe));
return 0;
@@ -853,12 +847,12 @@ out_unpin:
int intel_overlay_switch_off(struct intel_overlay *overlay)
{
+ struct drm_i915_private *dev_priv = overlay->i915;
struct overlay_registers __iomem *regs;
- struct drm_device *dev = overlay->dev;
int ret;
- WARN_ON(!mutex_is_locked(&dev->struct_mutex));
- WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
+ lockdep_assert_held(&dev_priv->dev->struct_mutex);
+ WARN_ON(!drm_modeset_is_locked(&dev_priv->dev->mode_config.connection_mutex));
ret = intel_overlay_recover_from_interrupt(overlay);
if (ret != 0)
@@ -898,15 +892,14 @@ static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
static void update_pfit_vscale_ratio(struct intel_overlay *overlay)
{
- struct drm_device *dev = overlay->dev;
- struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_i915_private *dev_priv = overlay->i915;
u32 pfit_control = I915_READ(PFIT_CONTROL);
u32 ratio;
/* XXX: This is not the same logic as in the xorg driver, but more in
* line with the intel documentation for the i965
*/
- if (INTEL_INFO(dev)->gen >= 4) {
+ if (INTEL_GEN(dev_priv) >= 4) {
/* on i965 use the PGM reg to read out the autoscaler values */
ratio = I915_READ(PFIT_PGM_RATIOS) >> PFIT_VERT_SCALE_SHIFT_965;
} else {
@@ -949,7 +942,7 @@ static int check_overlay_scaling(struct put_image_params *rec)
return 0;
}
-static int check_overlay_src(struct drm_device *dev,
+static int check_overlay_src(struct drm_i915_private *dev_priv,
struct drm_intel_overlay_put_image *rec,
struct drm_i915_gem_object *new_bo)
{
@@ -960,7 +953,7 @@ static int check_overlay_src(struct drm_device *dev,
u32 tmp;
/* check src dimensions */
- if (IS_845G(dev) || IS_I830(dev)) {
+ if (IS_845G(dev_priv) || IS_I830(dev_priv)) {
if (rec->src_height > IMAGE_MAX_HEIGHT_LEGACY ||
rec->src_width > IMAGE_MAX_WIDTH_LEGACY)
return -EINVAL;
@@ -1012,14 +1005,14 @@ static int check_overlay_src(struct drm_device *dev,
return -EINVAL;
/* stride checking */
- if (IS_I830(dev) || IS_845G(dev))
+ if (IS_I830(dev_priv) || IS_845G(dev_priv))
stride_mask = 255;
else
stride_mask = 63;
if (rec->stride_Y & stride_mask || rec->stride_UV & stride_mask)
return -EINVAL;
- if (IS_GEN4(dev) && rec->stride_Y < 512)
+ if (IS_GEN4(dev_priv) && rec->stride_Y < 512)
return -EINVAL;
tmp = (rec->flags & I915_OVERLAY_TYPE_MASK) == I915_OVERLAY_YUV_PLANAR ?
@@ -1064,13 +1057,13 @@ static int check_overlay_src(struct drm_device *dev,
* Return the pipe currently connected to the panel fitter,
* or -1 if the panel fitter is not present or not in use
*/
-static int intel_panel_fitter_pipe(struct drm_device *dev)
+static int intel_panel_fitter_pipe(struct drm_i915_private *dev_priv)
{
- struct drm_i915_private *dev_priv = dev->dev_private;
u32 pfit_control;
/* i830 doesn't have a panel fitter */
- if (INTEL_INFO(dev)->gen <= 3 && (IS_I830(dev) || !IS_MOBILE(dev)))
+ if (INTEL_GEN(dev_priv) <= 3 &&
+ (IS_I830(dev_priv) || !IS_MOBILE(dev_priv)))
return -1;
pfit_control = I915_READ(PFIT_CONTROL);
@@ -1080,15 +1073,15 @@ static int intel_panel_fitter_pipe(struct drm_device *dev)
return -1;
/* 965 can place panel fitter on either pipe */
- if (IS_GEN4(dev))
+ if (IS_GEN4(dev_priv))
return (pfit_control >> 29) & 0x3;
/* older chips can only use pipe 1 */
return 1;
}
-int intel_overlay_put_image(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
+int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv)
{
struct drm_intel_overlay_put_image *put_image_rec = data;
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1163,7 +1156,7 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
/* line too wide, i.e. one-line-mode */
if (mode->hdisplay > 1024 &&
- intel_panel_fitter_pipe(dev) == crtc->pipe) {
+ intel_panel_fitter_pipe(dev_priv) == crtc->pipe) {
overlay->pfit_active = true;
update_pfit_vscale_ratio(overlay);
} else
@@ -1197,7 +1190,7 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
goto out_unlock;
}
- ret = check_overlay_src(dev, put_image_rec, new_bo);
+ ret = check_overlay_src(dev_priv, put_image_rec, new_bo);
if (ret != 0)
goto out_unlock;
params->format = put_image_rec->flags & ~I915_OVERLAY_FLAGS_MASK;
@@ -1285,8 +1278,8 @@ static int check_gamma(struct drm_intel_overlay_attrs *attrs)
return 0;
}
-int intel_overlay_attrs(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
+int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv)
{
struct drm_intel_overlay_attrs *attrs = data;
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1310,7 +1303,7 @@ int intel_overlay_attrs(struct drm_device *dev, void *data,
attrs->contrast = overlay->contrast;
attrs->saturation = overlay->saturation;
- if (!IS_GEN2(dev)) {
+ if (!IS_GEN2(dev_priv)) {
attrs->gamma0 = I915_READ(OGAMC0);
attrs->gamma1 = I915_READ(OGAMC1);
attrs->gamma2 = I915_READ(OGAMC2);
@@ -1342,7 +1335,7 @@ int intel_overlay_attrs(struct drm_device *dev, void *data,
intel_overlay_unmap_regs(overlay, regs);
if (attrs->flags & I915_OVERLAY_UPDATE_GAMMA) {
- if (IS_GEN2(dev))
+ if (IS_GEN2(dev_priv))
goto out_unlock;
if (overlay->active) {
@@ -1372,37 +1365,36 @@ out_unlock:
return ret;
}
-void intel_setup_overlay(struct drm_device *dev)
+void intel_setup_overlay(struct drm_i915_private *dev_priv)
{
- struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_overlay *overlay;
struct drm_i915_gem_object *reg_bo;
struct overlay_registers __iomem *regs;
int ret;
- if (!HAS_OVERLAY(dev))
+ if (!HAS_OVERLAY(dev_priv))
return;
overlay = kzalloc(sizeof(*overlay), GFP_KERNEL);
if (!overlay)
return;
- mutex_lock(&dev->struct_mutex);
+ mutex_lock(&dev_priv->dev->struct_mutex);
if (WARN_ON(dev_priv->overlay))
goto out_free;
- overlay->dev = dev;
+ overlay->i915 = dev_priv;
reg_bo = NULL;
- if (!OVERLAY_NEEDS_PHYSICAL(dev))
- reg_bo = i915_gem_object_create_stolen(dev, PAGE_SIZE);
+ if (!OVERLAY_NEEDS_PHYSICAL(dev_priv))
+ reg_bo = i915_gem_object_create_stolen(dev_priv->dev, PAGE_SIZE);
if (reg_bo == NULL)
- reg_bo = i915_gem_object_create(dev, PAGE_SIZE);
+ reg_bo = i915_gem_object_create(dev_priv->dev, PAGE_SIZE);
if (IS_ERR(reg_bo))
goto out_free;
overlay->reg_bo = reg_bo;
- if (OVERLAY_NEEDS_PHYSICAL(dev)) {
+ if (OVERLAY_NEEDS_PHYSICAL(dev_priv)) {
ret = i915_gem_object_attach_phys(reg_bo, PAGE_SIZE);
if (ret) {
DRM_ERROR("failed to attach phys overlay regs\n");
@@ -1442,25 +1434,23 @@ void intel_setup_overlay(struct drm_device *dev)
intel_overlay_unmap_regs(overlay, regs);
dev_priv->overlay = overlay;
- mutex_unlock(&dev->struct_mutex);
+ mutex_unlock(&dev_priv->dev->struct_mutex);
DRM_INFO("initialized overlay support\n");
return;
out_unpin_bo:
- if (!OVERLAY_NEEDS_PHYSICAL(dev))
+ if (!OVERLAY_NEEDS_PHYSICAL(dev_priv))
i915_gem_object_ggtt_unpin(reg_bo);
out_free_bo:
drm_gem_object_unreference(®_bo->base);
out_free:
- mutex_unlock(&dev->struct_mutex);
+ mutex_unlock(&dev_priv->dev->struct_mutex);
kfree(overlay);
return;
}
-void intel_cleanup_overlay(struct drm_device *dev)
+void intel_cleanup_overlay(struct drm_i915_private *dev_priv)
{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
if (!dev_priv->overlay)
return;
@@ -1483,17 +1473,16 @@ struct intel_overlay_error_state {
static struct overlay_registers __iomem *
intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
{
- struct drm_i915_private *dev_priv = to_i915(overlay->dev);
- struct i915_ggtt *ggtt = &dev_priv->ggtt;
+ struct drm_i915_private *dev_priv = overlay->i915;
struct overlay_registers __iomem *regs;
- if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
+ if (OVERLAY_NEEDS_PHYSICAL(dev_priv))
/* Cast to make sparse happy, but it's wc memory anyway, so
* equivalent to the wc io mapping on X86. */
regs = (struct overlay_registers __iomem *)
overlay->reg_bo->phys_handle->vaddr;
else
- regs = io_mapping_map_atomic_wc(ggtt->mappable,
+ regs = io_mapping_map_atomic_wc(dev_priv->ggtt.mappable,
overlay->flip_addr);
return regs;
@@ -1502,11 +1491,10 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay,
struct overlay_registers __iomem *regs)
{
- if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev))
+ if (!OVERLAY_NEEDS_PHYSICAL(overlay->i915))
io_mapping_unmap_atomic(regs);
}
-
struct intel_overlay_error_state *
intel_overlay_capture_error_state(struct drm_i915_private *dev_priv)
{
--
2.8.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
2016-05-12 11:43 [PATCH] drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers Chris Wilson
@ 2016-05-12 12:15 ` Tvrtko Ursulin
2016-05-12 12:30 ` Chris Wilson
2016-05-12 12:45 ` ✗ Ro.CI.BAT: warning for " Patchwork
2016-05-12 14:30 ` ✗ Ro.CI.BAT: failure " Patchwork
2 siblings, 1 reply; 6+ messages in thread
From: Tvrtko Ursulin @ 2016-05-12 12:15 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 12/05/16 12:43, Chris Wilson wrote:
> Another day, another long overdue conversion. Not much to update inside
> intel_overlay.c, but still
>
> text data bss dec hex filename
> 6309547 3578778 696320 10584645 a18245 vmlinux
> 6309291 3578778 696320 10584389 a18145 vmlinux
>
> a couple of hundred bytes of pointer misdirection.
>
> Whilst here, rename the ioctl entry points to include the _ioctl suffix
> so that the user entry points are clear (following the idiom).
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_dma.c | 4 +-
> drivers/gpu/drm/i915/intel_display.c | 4 +-
> drivers/gpu/drm/i915/intel_drv.h | 12 ++--
> drivers/gpu/drm/i915/intel_overlay.c | 132 ++++++++++++++++-------------------
> 4 files changed, 70 insertions(+), 82 deletions(-)
>
intel_setup_overlay might be tidier with a local variable for dev since
it is used a good number of times, but either way:
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 0eadeb694fec..e42fa1769c10 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1623,8 +1623,8 @@ const struct drm_ioctl_desc i915_ioctls[] = {
> DRM_IOCTL_DEF_DRV(I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_RENDER_ALLOW),
> DRM_IOCTL_DEF_DRV(I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0),
> DRM_IOCTL_DEF_DRV(I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_RENDER_ALLOW),
> - DRM_IOCTL_DEF_DRV(I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW),
> - DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW),
> + DRM_IOCTL_DEF_DRV(I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW),
> + DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW),
> DRM_IOCTL_DEF_DRV(I915_SET_SPRITE_COLORKEY, intel_sprite_set_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW),
> DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, drm_noop, DRM_MASTER|DRM_CONTROL_ALLOW),
> DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b60d9b67e033..d6211c3036c0 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -16025,7 +16025,7 @@ void intel_modeset_gem_init(struct drm_device *dev)
>
> intel_modeset_init_hw(dev);
>
> - intel_setup_overlay(dev);
> + intel_setup_overlay(dev_priv);
>
> /*
> * Make sure any fbs we allocated at startup are properly
> @@ -16098,7 +16098,7 @@ void intel_modeset_cleanup(struct drm_device *dev)
>
> drm_mode_config_cleanup(dev);
>
> - intel_cleanup_overlay(dev);
> + intel_cleanup_overlay(dev_priv);
>
> intel_cleanup_gt_powersave(dev_priv);
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 1a3e69e5f9f5..0a9c10d65a13 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1435,13 +1435,13 @@ void intel_attach_aspect_ratio_property(struct drm_connector *connector);
>
>
> /* intel_overlay.c */
> -void intel_setup_overlay(struct drm_device *dev);
> -void intel_cleanup_overlay(struct drm_device *dev);
> +void intel_setup_overlay(struct drm_i915_private *dev_priv);
> +void intel_cleanup_overlay(struct drm_i915_private *dev_priv);
> int intel_overlay_switch_off(struct intel_overlay *overlay);
> -int intel_overlay_put_image(struct drm_device *dev, void *data,
> - struct drm_file *file_priv);
> -int intel_overlay_attrs(struct drm_device *dev, void *data,
> - struct drm_file *file_priv);
> +int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
> + struct drm_file *file_priv);
> +int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
> + struct drm_file *file_priv);
> void intel_overlay_reset(struct drm_i915_private *dev_priv);
>
>
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index 4a1e774ba8cc..b9b042cc619f 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -168,7 +168,7 @@ struct overlay_registers {
> };
>
> struct intel_overlay {
> - struct drm_device *dev;
> + struct drm_i915_private *i915;
> struct intel_crtc *crtc;
> struct drm_i915_gem_object *vid_bo;
> struct drm_i915_gem_object *old_vid_bo;
> @@ -190,14 +190,13 @@ struct intel_overlay {
> static struct overlay_registers __iomem *
> intel_overlay_map_regs(struct intel_overlay *overlay)
> {
> - struct drm_i915_private *dev_priv = to_i915(overlay->dev);
> - struct i915_ggtt *ggtt = &dev_priv->ggtt;
> + struct drm_i915_private *dev_priv = overlay->i915;
> struct overlay_registers __iomem *regs;
>
> - if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
> + if (OVERLAY_NEEDS_PHYSICAL(dev_priv))
> regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr;
> else
> - regs = io_mapping_map_wc(ggtt->mappable,
> + regs = io_mapping_map_wc(dev_priv->ggtt.mappable,
> overlay->flip_addr,
> PAGE_SIZE);
>
> @@ -207,7 +206,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)
> static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
> struct overlay_registers __iomem *regs)
> {
> - if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev))
> + if (!OVERLAY_NEEDS_PHYSICAL(overlay->i915))
> io_mapping_unmap(regs);
> }
>
> @@ -233,14 +232,13 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
> /* overlay needs to be disable in OCMD reg */
> static int intel_overlay_on(struct intel_overlay *overlay)
> {
> - struct drm_device *dev = overlay->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> + struct drm_i915_private *dev_priv = overlay->i915;
> struct intel_engine_cs *engine = &dev_priv->engine[RCS];
> struct drm_i915_gem_request *req;
> int ret;
>
> WARN_ON(overlay->active);
> - WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
> + WARN_ON(IS_I830(dev_priv) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
>
> req = i915_gem_request_alloc(engine, NULL);
> if (IS_ERR(req))
> @@ -267,8 +265,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
> static int intel_overlay_continue(struct intel_overlay *overlay,
> bool load_polyphase_filter)
> {
> - struct drm_device *dev = overlay->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> + struct drm_i915_private *dev_priv = overlay->i915;
> struct intel_engine_cs *engine = &dev_priv->engine[RCS];
> struct drm_i915_gem_request *req;
> u32 flip_addr = overlay->flip_addr;
> @@ -336,8 +333,7 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
> /* overlay needs to be disabled in OCMD reg */
> static int intel_overlay_off(struct intel_overlay *overlay)
> {
> - struct drm_device *dev = overlay->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> + struct drm_i915_private *dev_priv = overlay->i915;
> struct intel_engine_cs *engine = &dev_priv->engine[RCS];
> struct drm_i915_gem_request *req;
> u32 flip_addr = overlay->flip_addr;
> @@ -366,7 +362,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
> intel_ring_emit(engine, flip_addr);
> intel_ring_emit(engine, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
> /* turn overlay off */
> - if (IS_I830(dev)) {
> + if (IS_I830(dev_priv)) {
> /* Workaround: Don't disable the overlay fully, since otherwise
> * it dies on the next OVERLAY_ON cmd. */
> intel_ring_emit(engine, MI_NOOP);
> @@ -409,12 +405,11 @@ static int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay)
> */
> static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
> {
> - struct drm_device *dev = overlay->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> + struct drm_i915_private *dev_priv = overlay->i915;
> struct intel_engine_cs *engine = &dev_priv->engine[RCS];
> int ret;
>
> - WARN_ON(!mutex_is_locked(&dev->struct_mutex));
> + lockdep_assert_held(&dev_priv->dev->struct_mutex);
>
> /* Only wait if there is actually an old frame to release to
> * guarantee forward progress.
> @@ -538,10 +533,10 @@ static int uv_vsubsampling(u32 format)
> }
> }
>
> -static u32 calc_swidthsw(struct drm_device *dev, u32 offset, u32 width)
> +static u32 calc_swidthsw(struct drm_i915_private *dev_priv, u32 offset, u32 width)
> {
> u32 mask, shift, ret;
> - if (IS_GEN2(dev)) {
> + if (IS_GEN2(dev_priv)) {
> mask = 0x1f;
> shift = 5;
> } else {
> @@ -549,7 +544,7 @@ static u32 calc_swidthsw(struct drm_device *dev, u32 offset, u32 width)
> shift = 6;
> }
> ret = ((offset + width + mask) >> shift) - (offset >> shift);
> - if (!IS_GEN2(dev))
> + if (!IS_GEN2(dev_priv))
> ret <<= 1;
> ret -= 1;
> return ret << 2;
> @@ -742,12 +737,12 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
> int ret, tmp_width;
> struct overlay_registers __iomem *regs;
> bool scale_changed = false;
> - struct drm_device *dev = overlay->dev;
> + struct drm_i915_private *dev_priv = overlay->i915;
> u32 swidth, swidthsw, sheight, ostride;
> enum pipe pipe = overlay->crtc->pipe;
>
> - WARN_ON(!mutex_is_locked(&dev->struct_mutex));
> - WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
> + lockdep_assert_held(&dev_priv->dev->struct_mutex);
> + WARN_ON(!drm_modeset_is_locked(&dev_priv->dev->mode_config.connection_mutex));
>
> ret = intel_overlay_release_old_vid(overlay);
> if (ret != 0)
> @@ -770,7 +765,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
> goto out_unpin;
> }
> oconfig = OCONF_CC_OUT_8BIT;
> - if (IS_GEN4(overlay->dev))
> + if (IS_GEN4(dev_priv))
> oconfig |= OCONF_CSC_MODE_BT709;
> oconfig |= pipe == 0 ?
> OCONF_PIPE_A : OCONF_PIPE_B;
> @@ -797,7 +792,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
> tmp_width = params->src_w;
>
> swidth = params->src_w;
> - swidthsw = calc_swidthsw(overlay->dev, params->offset_Y, tmp_width);
> + swidthsw = calc_swidthsw(dev_priv, params->offset_Y, tmp_width);
> sheight = params->src_h;
> iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_Y, ®s->OBUF_0Y);
> ostride = params->stride_Y;
> @@ -807,9 +802,9 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
> int uv_vscale = uv_vsubsampling(params->format);
> u32 tmp_U, tmp_V;
> swidth |= (params->src_w/uv_hscale) << 16;
> - tmp_U = calc_swidthsw(overlay->dev, params->offset_U,
> + tmp_U = calc_swidthsw(dev_priv, params->offset_U,
> params->src_w/uv_hscale);
> - tmp_V = calc_swidthsw(overlay->dev, params->offset_V,
> + tmp_V = calc_swidthsw(dev_priv, params->offset_V,
> params->src_w/uv_hscale);
> swidthsw |= max_t(u32, tmp_U, tmp_V) << 16;
> sheight |= (params->src_h/uv_vscale) << 16;
> @@ -841,8 +836,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
> overlay->old_vid_bo = overlay->vid_bo;
> overlay->vid_bo = new_bo;
>
> - intel_frontbuffer_flip(dev,
> - INTEL_FRONTBUFFER_OVERLAY(pipe));
> + intel_frontbuffer_flip(dev_priv->dev, INTEL_FRONTBUFFER_OVERLAY(pipe));
>
> return 0;
>
> @@ -853,12 +847,12 @@ out_unpin:
>
> int intel_overlay_switch_off(struct intel_overlay *overlay)
> {
> + struct drm_i915_private *dev_priv = overlay->i915;
> struct overlay_registers __iomem *regs;
> - struct drm_device *dev = overlay->dev;
> int ret;
>
> - WARN_ON(!mutex_is_locked(&dev->struct_mutex));
> - WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
> + lockdep_assert_held(&dev_priv->dev->struct_mutex);
> + WARN_ON(!drm_modeset_is_locked(&dev_priv->dev->mode_config.connection_mutex));
>
> ret = intel_overlay_recover_from_interrupt(overlay);
> if (ret != 0)
> @@ -898,15 +892,14 @@ static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
>
> static void update_pfit_vscale_ratio(struct intel_overlay *overlay)
> {
> - struct drm_device *dev = overlay->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> + struct drm_i915_private *dev_priv = overlay->i915;
> u32 pfit_control = I915_READ(PFIT_CONTROL);
> u32 ratio;
>
> /* XXX: This is not the same logic as in the xorg driver, but more in
> * line with the intel documentation for the i965
> */
> - if (INTEL_INFO(dev)->gen >= 4) {
> + if (INTEL_GEN(dev_priv) >= 4) {
> /* on i965 use the PGM reg to read out the autoscaler values */
> ratio = I915_READ(PFIT_PGM_RATIOS) >> PFIT_VERT_SCALE_SHIFT_965;
> } else {
> @@ -949,7 +942,7 @@ static int check_overlay_scaling(struct put_image_params *rec)
> return 0;
> }
>
> -static int check_overlay_src(struct drm_device *dev,
> +static int check_overlay_src(struct drm_i915_private *dev_priv,
> struct drm_intel_overlay_put_image *rec,
> struct drm_i915_gem_object *new_bo)
> {
> @@ -960,7 +953,7 @@ static int check_overlay_src(struct drm_device *dev,
> u32 tmp;
>
> /* check src dimensions */
> - if (IS_845G(dev) || IS_I830(dev)) {
> + if (IS_845G(dev_priv) || IS_I830(dev_priv)) {
> if (rec->src_height > IMAGE_MAX_HEIGHT_LEGACY ||
> rec->src_width > IMAGE_MAX_WIDTH_LEGACY)
> return -EINVAL;
> @@ -1012,14 +1005,14 @@ static int check_overlay_src(struct drm_device *dev,
> return -EINVAL;
>
> /* stride checking */
> - if (IS_I830(dev) || IS_845G(dev))
> + if (IS_I830(dev_priv) || IS_845G(dev_priv))
> stride_mask = 255;
> else
> stride_mask = 63;
>
> if (rec->stride_Y & stride_mask || rec->stride_UV & stride_mask)
> return -EINVAL;
> - if (IS_GEN4(dev) && rec->stride_Y < 512)
> + if (IS_GEN4(dev_priv) && rec->stride_Y < 512)
> return -EINVAL;
>
> tmp = (rec->flags & I915_OVERLAY_TYPE_MASK) == I915_OVERLAY_YUV_PLANAR ?
> @@ -1064,13 +1057,13 @@ static int check_overlay_src(struct drm_device *dev,
> * Return the pipe currently connected to the panel fitter,
> * or -1 if the panel fitter is not present or not in use
> */
> -static int intel_panel_fitter_pipe(struct drm_device *dev)
> +static int intel_panel_fitter_pipe(struct drm_i915_private *dev_priv)
> {
> - struct drm_i915_private *dev_priv = dev->dev_private;
> u32 pfit_control;
>
> /* i830 doesn't have a panel fitter */
> - if (INTEL_INFO(dev)->gen <= 3 && (IS_I830(dev) || !IS_MOBILE(dev)))
> + if (INTEL_GEN(dev_priv) <= 3 &&
> + (IS_I830(dev_priv) || !IS_MOBILE(dev_priv)))
> return -1;
>
> pfit_control = I915_READ(PFIT_CONTROL);
> @@ -1080,15 +1073,15 @@ static int intel_panel_fitter_pipe(struct drm_device *dev)
> return -1;
>
> /* 965 can place panel fitter on either pipe */
> - if (IS_GEN4(dev))
> + if (IS_GEN4(dev_priv))
> return (pfit_control >> 29) & 0x3;
>
> /* older chips can only use pipe 1 */
> return 1;
> }
>
> -int intel_overlay_put_image(struct drm_device *dev, void *data,
> - struct drm_file *file_priv)
> +int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
> + struct drm_file *file_priv)
> {
> struct drm_intel_overlay_put_image *put_image_rec = data;
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -1163,7 +1156,7 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
>
> /* line too wide, i.e. one-line-mode */
> if (mode->hdisplay > 1024 &&
> - intel_panel_fitter_pipe(dev) == crtc->pipe) {
> + intel_panel_fitter_pipe(dev_priv) == crtc->pipe) {
> overlay->pfit_active = true;
> update_pfit_vscale_ratio(overlay);
> } else
> @@ -1197,7 +1190,7 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
> goto out_unlock;
> }
>
> - ret = check_overlay_src(dev, put_image_rec, new_bo);
> + ret = check_overlay_src(dev_priv, put_image_rec, new_bo);
> if (ret != 0)
> goto out_unlock;
> params->format = put_image_rec->flags & ~I915_OVERLAY_FLAGS_MASK;
> @@ -1285,8 +1278,8 @@ static int check_gamma(struct drm_intel_overlay_attrs *attrs)
> return 0;
> }
>
> -int intel_overlay_attrs(struct drm_device *dev, void *data,
> - struct drm_file *file_priv)
> +int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
> + struct drm_file *file_priv)
> {
> struct drm_intel_overlay_attrs *attrs = data;
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -1310,7 +1303,7 @@ int intel_overlay_attrs(struct drm_device *dev, void *data,
> attrs->contrast = overlay->contrast;
> attrs->saturation = overlay->saturation;
>
> - if (!IS_GEN2(dev)) {
> + if (!IS_GEN2(dev_priv)) {
> attrs->gamma0 = I915_READ(OGAMC0);
> attrs->gamma1 = I915_READ(OGAMC1);
> attrs->gamma2 = I915_READ(OGAMC2);
> @@ -1342,7 +1335,7 @@ int intel_overlay_attrs(struct drm_device *dev, void *data,
> intel_overlay_unmap_regs(overlay, regs);
>
> if (attrs->flags & I915_OVERLAY_UPDATE_GAMMA) {
> - if (IS_GEN2(dev))
> + if (IS_GEN2(dev_priv))
> goto out_unlock;
>
> if (overlay->active) {
> @@ -1372,37 +1365,36 @@ out_unlock:
> return ret;
> }
>
> -void intel_setup_overlay(struct drm_device *dev)
> +void intel_setup_overlay(struct drm_i915_private *dev_priv)
> {
> - struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_overlay *overlay;
> struct drm_i915_gem_object *reg_bo;
> struct overlay_registers __iomem *regs;
> int ret;
>
> - if (!HAS_OVERLAY(dev))
> + if (!HAS_OVERLAY(dev_priv))
> return;
>
> overlay = kzalloc(sizeof(*overlay), GFP_KERNEL);
> if (!overlay)
> return;
>
> - mutex_lock(&dev->struct_mutex);
> + mutex_lock(&dev_priv->dev->struct_mutex);
> if (WARN_ON(dev_priv->overlay))
> goto out_free;
>
> - overlay->dev = dev;
> + overlay->i915 = dev_priv;
>
> reg_bo = NULL;
> - if (!OVERLAY_NEEDS_PHYSICAL(dev))
> - reg_bo = i915_gem_object_create_stolen(dev, PAGE_SIZE);
> + if (!OVERLAY_NEEDS_PHYSICAL(dev_priv))
> + reg_bo = i915_gem_object_create_stolen(dev_priv->dev, PAGE_SIZE);
> if (reg_bo == NULL)
> - reg_bo = i915_gem_object_create(dev, PAGE_SIZE);
> + reg_bo = i915_gem_object_create(dev_priv->dev, PAGE_SIZE);
> if (IS_ERR(reg_bo))
> goto out_free;
> overlay->reg_bo = reg_bo;
>
> - if (OVERLAY_NEEDS_PHYSICAL(dev)) {
> + if (OVERLAY_NEEDS_PHYSICAL(dev_priv)) {
> ret = i915_gem_object_attach_phys(reg_bo, PAGE_SIZE);
> if (ret) {
> DRM_ERROR("failed to attach phys overlay regs\n");
> @@ -1442,25 +1434,23 @@ void intel_setup_overlay(struct drm_device *dev)
> intel_overlay_unmap_regs(overlay, regs);
>
> dev_priv->overlay = overlay;
> - mutex_unlock(&dev->struct_mutex);
> + mutex_unlock(&dev_priv->dev->struct_mutex);
> DRM_INFO("initialized overlay support\n");
> return;
>
> out_unpin_bo:
> - if (!OVERLAY_NEEDS_PHYSICAL(dev))
> + if (!OVERLAY_NEEDS_PHYSICAL(dev_priv))
> i915_gem_object_ggtt_unpin(reg_bo);
> out_free_bo:
> drm_gem_object_unreference(®_bo->base);
> out_free:
> - mutex_unlock(&dev->struct_mutex);
> + mutex_unlock(&dev_priv->dev->struct_mutex);
> kfree(overlay);
> return;
> }
>
> -void intel_cleanup_overlay(struct drm_device *dev)
> +void intel_cleanup_overlay(struct drm_i915_private *dev_priv)
> {
> - struct drm_i915_private *dev_priv = dev->dev_private;
> -
> if (!dev_priv->overlay)
> return;
>
> @@ -1483,17 +1473,16 @@ struct intel_overlay_error_state {
> static struct overlay_registers __iomem *
> intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
> {
> - struct drm_i915_private *dev_priv = to_i915(overlay->dev);
> - struct i915_ggtt *ggtt = &dev_priv->ggtt;
> + struct drm_i915_private *dev_priv = overlay->i915;
> struct overlay_registers __iomem *regs;
>
> - if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
> + if (OVERLAY_NEEDS_PHYSICAL(dev_priv))
> /* Cast to make sparse happy, but it's wc memory anyway, so
> * equivalent to the wc io mapping on X86. */
> regs = (struct overlay_registers __iomem *)
> overlay->reg_bo->phys_handle->vaddr;
> else
> - regs = io_mapping_map_atomic_wc(ggtt->mappable,
> + regs = io_mapping_map_atomic_wc(dev_priv->ggtt.mappable,
> overlay->flip_addr);
>
> return regs;
> @@ -1502,11 +1491,10 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
> static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay,
> struct overlay_registers __iomem *regs)
> {
> - if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev))
> + if (!OVERLAY_NEEDS_PHYSICAL(overlay->i915))
> io_mapping_unmap_atomic(regs);
> }
>
> -
> struct intel_overlay_error_state *
> intel_overlay_capture_error_state(struct drm_i915_private *dev_priv)
> {
>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
2016-05-12 12:15 ` Tvrtko Ursulin
@ 2016-05-12 12:30 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2016-05-12 12:30 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
On Thu, May 12, 2016 at 01:15:43PM +0100, Tvrtko Ursulin wrote:
>
> On 12/05/16 12:43, Chris Wilson wrote:
> >Another day, another long overdue conversion. Not much to update inside
> >intel_overlay.c, but still
> >
> > text data bss dec hex filename
> >6309547 3578778 696320 10584645 a18245 vmlinux
> >6309291 3578778 696320 10584389 a18145 vmlinux
> >
> >a couple of hundred bytes of pointer misdirection.
> >
> >Whilst here, rename the ioctl entry points to include the _ioctl suffix
> >so that the user entry points are clear (following the idiom).
> >
> >Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> >---
> > drivers/gpu/drm/i915/i915_dma.c | 4 +-
> > drivers/gpu/drm/i915/intel_display.c | 4 +-
> > drivers/gpu/drm/i915/intel_drv.h | 12 ++--
> > drivers/gpu/drm/i915/intel_overlay.c | 132 ++++++++++++++++-------------------
> > 4 files changed, 70 insertions(+), 82 deletions(-)
> >
>
> intel_setup_overlay might be tidier with a local variable for dev
> since it is used a good number of times, but either way:
Long term is that those callsites also use drm_i915_private. Having lots
of dev_priv->dev is a good motivator for which paths to prioritse.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
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^ permalink raw reply [flat|nested] 6+ messages in thread
* ✗ Ro.CI.BAT: warning for drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
2016-05-12 11:43 [PATCH] drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers Chris Wilson
2016-05-12 12:15 ` Tvrtko Ursulin
@ 2016-05-12 12:45 ` Patchwork
2016-05-12 14:19 ` Chris Wilson
2016-05-12 14:30 ` ✗ Ro.CI.BAT: failure " Patchwork
2 siblings, 1 reply; 6+ messages in thread
From: Patchwork @ 2016-05-12 12:45 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
URL : https://patchwork.freedesktop.org/series/7064/
State : warning
== Summary ==
Series 7064v1 drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
http://patchwork.freedesktop.org/api/1.0/series/7064/revisions/1/mbox
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-b-frame-sequence:
pass -> SKIP (fi-hsw-i7-4770r)
Subgroup read-crc-pipe-a:
pass -> SKIP (fi-byt-n2820)
fi-bdw-i7-5557u total:219 pass:206 dwarn:0 dfail:0 fail:0 skip:13
fi-bsw-n3050 total:218 pass:174 dwarn:0 dfail:0 fail:2 skip:42
fi-byt-n2820 total:218 pass:173 dwarn:0 dfail:0 fail:3 skip:42
fi-hsw-i7-4770r total:219 pass:192 dwarn:0 dfail:0 fail:0 skip:27
fi-skl-i5-6260u total:219 pass:207 dwarn:0 dfail:0 fail:0 skip:12
fi-skl-i7-6700k total:219 pass:191 dwarn:0 dfail:0 fail:0 skip:28
fi-hsw-i7-4770k failed to connect after reboot
fi-kbl-y failed to connect after reboot
ro-bdw-i5-5250u failed to connect after reboot
ro-bdw-i7-5557U failed to connect after reboot
ro-bdw-i7-5600u failed to connect after reboot
ro-bsw-n3050 failed to connect after reboot
ro-byt-n2820 failed to connect after reboot
ro-hsw-i3-4010u failed to connect after reboot
ro-hsw-i7-4770r failed to connect after reboot
ro-ilk1-i5-650 failed to connect after reboot
ro-ilk-i7-620lm failed to connect after reboot
ro-ivb2-i7-3770 failed to connect after reboot
ro-ivb-i7-3770 failed to connect after reboot
ro-skl-i7-6700hq failed to connect after reboot
ro-snb-i7-2620M failed to connect after reboot
Results at /archive/results/CI_IGT_test/RO_Patchwork_861/
dd7de1c drm-intel-nightly: 2016y-05m-12d-11h-29m-40s UTC integration manifest
9e5721a drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: ✗ Ro.CI.BAT: warning for drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
2016-05-12 12:45 ` ✗ Ro.CI.BAT: warning for " Patchwork
@ 2016-05-12 14:19 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2016-05-12 14:19 UTC (permalink / raw)
To: intel-gfx
On Thu, May 12, 2016 at 12:45:54PM -0000, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
> URL : https://patchwork.freedesktop.org/series/7064/
> State : warning
>
> == Summary ==
>
> Series 7064v1 drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
> http://patchwork.freedesktop.org/api/1.0/series/7064/revisions/1/mbox
>
> Test kms_pipe_crc_basic:
> Subgroup nonblocking-crc-pipe-b-frame-sequence:
> pass -> SKIP (fi-hsw-i7-4770r)
> Subgroup read-crc-pipe-a:
> pass -> SKIP (fi-byt-n2820)
Since CI coverage is essentially zero of intel_overlay.c, I checked that
using Xv + the overlay still worked on Pineview.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✗ Ro.CI.BAT: failure for drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
2016-05-12 11:43 [PATCH] drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers Chris Wilson
2016-05-12 12:15 ` Tvrtko Ursulin
2016-05-12 12:45 ` ✗ Ro.CI.BAT: warning for " Patchwork
@ 2016-05-12 14:30 ` Patchwork
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2016-05-12 14:30 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
URL : https://patchwork.freedesktop.org/series/7064/
State : failure
== Summary ==
Series 7064v1 drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
http://patchwork.freedesktop.org/api/1.0/series/7064/revisions/1/mbox
Test drv_hangman:
Subgroup error-state-basic:
pass -> FAIL (ro-ilk1-i5-650)
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
fail -> PASS (ro-ivb2-i7-3770)
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-a:
pass -> INCOMPLETE (fi-snb-i7-2600)
Subgroup hang-read-crc-pipe-c:
pass -> DMESG-WARN (ro-ivb2-i7-3770)
Subgroup nonblocking-crc-pipe-c:
skip -> PASS (fi-skl-i5-6260u)
Subgroup nonblocking-crc-pipe-c-frame-sequence:
pass -> FAIL (fi-skl-i5-6260u)
Subgroup read-crc-pipe-b-frame-sequence:
pass -> SKIP (fi-skl-i5-6260u)
Subgroup suspend-read-crc-pipe-a:
dmesg-warn -> PASS (ro-bdw-i7-5557U)
fi-bdw-i7-5557u total:219 pass:206 dwarn:0 dfail:0 fail:0 skip:13
fi-bsw-n3050 total:218 pass:174 dwarn:0 dfail:0 fail:2 skip:42
fi-byt-n2820 total:218 pass:174 dwarn:0 dfail:0 fail:3 skip:41
fi-hsw-i7-4770r total:219 pass:193 dwarn:0 dfail:0 fail:0 skip:26
fi-kbl-y total:219 pass:191 dwarn:1 dfail:0 fail:2 skip:25
fi-skl-i5-6260u total:219 pass:205 dwarn:0 dfail:0 fail:1 skip:13
fi-skl-i7-6700k total:219 pass:191 dwarn:0 dfail:0 fail:0 skip:28
fi-snb-i7-2600 total:195 pass:159 dwarn:0 dfail:0 fail:0 skip:35
ro-bdw-i5-5250u total:219 pass:181 dwarn:0 dfail:0 fail:0 skip:38
ro-bdw-i7-5557U total:219 pass:206 dwarn:0 dfail:0 fail:0 skip:13
ro-bdw-i7-5600u total:219 pass:187 dwarn:0 dfail:0 fail:0 skip:32
ro-bsw-n3050 total:219 pass:175 dwarn:0 dfail:0 fail:2 skip:42
ro-byt-n2820 total:218 pass:173 dwarn:0 dfail:0 fail:4 skip:41
ro-hsw-i3-4010u total:218 pass:193 dwarn:0 dfail:0 fail:0 skip:25
ro-hsw-i7-4770r total:219 pass:194 dwarn:0 dfail:0 fail:0 skip:25
ro-ilk-i7-620lm total:219 pass:151 dwarn:0 dfail:0 fail:1 skip:67
ro-ilk1-i5-650 total:214 pass:151 dwarn:0 dfail:0 fail:2 skip:61
ro-ivb-i7-3770 total:219 pass:183 dwarn:0 dfail:0 fail:0 skip:36
ro-ivb2-i7-3770 total:219 pass:186 dwarn:1 dfail:0 fail:0 skip:32
ro-skl-i7-6700hq total:214 pass:189 dwarn:0 dfail:0 fail:0 skip:25
ro-snb-i7-2620M total:219 pass:177 dwarn:0 dfail:0 fail:1 skip:41
Results at /archive/results/CI_IGT_test/RO_Patchwork_862/
dd7de1c drm-intel-nightly: 2016y-05m-12d-11h-29m-40s UTC integration manifest
a0bc136 drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-05-12 14:30 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-05-12 11:43 [PATCH] drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers Chris Wilson
2016-05-12 12:15 ` Tvrtko Ursulin
2016-05-12 12:30 ` Chris Wilson
2016-05-12 12:45 ` ✗ Ro.CI.BAT: warning for " Patchwork
2016-05-12 14:19 ` Chris Wilson
2016-05-12 14:30 ` ✗ Ro.CI.BAT: failure " Patchwork
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