* [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: linux-pm, devicetree, linux-kernel, linuxppc-dev,
linux-arm-kernel, hongtao.jia
For different types of SoC the sensor id and endianness may vary.
"#thermal-sensor-cells" is used to provide sensor id information.
"little-endian" property is to tell the endianness of TMU.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
.../devicetree/bindings/thermal/qoriq-thermal.txt | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
index 66223d5..8eeef80 100644
--- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
@@ -1,22 +1,28 @@
* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
Required properties:
-- compatible : Must include "fsl,qoriq-tmu". The version of the device is
+- compatible: Must include "fsl,qoriq-tmu". The version of the device is
determined by the TMU IP Block Revision Register (IPBRR0) at
offset 0x0BF8.
- Table of correspondences between IPBRR0 values and example chips:
+ Table of correspondences between IPBRR0 values and example chips:
Value Device
---------- -----
0x01900102 T1040
-- reg : Address range of TMU registers.
-- interrupts : Contains the interrupt for TMU.
-- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
+- reg: Address range of TMU registers.
+- interrupts: Contains the interrupt for TMU.
+- fsl,tmu-range: The values to be programmed into TTRnCR, as specified by
the SoC reference manual. The first cell is TTR0CR, the second is
TTR1CR, etc.
-- fsl,tmu-calibration : A list of cell pairs containing temperature
+- fsl,tmu-calibration: A list of cell pairs containing temperature
calibration data, as specified by the SoC reference manual.
The first cell of each pair is the value to be written to TTCFGR,
and the second is the value to be written to TSCFGR.
+- #thermal-sensor-cells: Must be 1. The sensor specifier is the monitoring
+ site ID, and represents the "n" in TRITSRn and TRATSRn.
+
+Optional property:
+- little-endian: If present, the TMU registers are little endian. If absent,
+ the default is big endian.
Example:
@@ -60,4 +66,5 @@ tmu@f0000 {
0x00030000 0x00000012
0x00030001 0x0000001d>;
+ #thermal-sensor-cells = <1>;
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: devicetree, linux-pm, linux-kernel, hongtao.jia, linuxppc-dev,
linux-arm-kernel
For different types of SoC the sensor id and endianness may vary.
"#thermal-sensor-cells" is used to provide sensor id information.
"little-endian" property is to tell the endianness of TMU.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
.../devicetree/bindings/thermal/qoriq-thermal.txt | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
index 66223d5..8eeef80 100644
--- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
@@ -1,22 +1,28 @@
* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
Required properties:
-- compatible : Must include "fsl,qoriq-tmu". The version of the device is
+- compatible: Must include "fsl,qoriq-tmu". The version of the device is
determined by the TMU IP Block Revision Register (IPBRR0) at
offset 0x0BF8.
- Table of correspondences between IPBRR0 values and example chips:
+ Table of correspondences between IPBRR0 values and example chips:
Value Device
---------- -----
0x01900102 T1040
-- reg : Address range of TMU registers.
-- interrupts : Contains the interrupt for TMU.
-- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
+- reg: Address range of TMU registers.
+- interrupts: Contains the interrupt for TMU.
+- fsl,tmu-range: The values to be programmed into TTRnCR, as specified by
the SoC reference manual. The first cell is TTR0CR, the second is
TTR1CR, etc.
-- fsl,tmu-calibration : A list of cell pairs containing temperature
+- fsl,tmu-calibration: A list of cell pairs containing temperature
calibration data, as specified by the SoC reference manual.
The first cell of each pair is the value to be written to TTCFGR,
and the second is the value to be written to TSCFGR.
+- #thermal-sensor-cells: Must be 1. The sensor specifier is the monitoring
+ site ID, and represents the "n" in TRITSRn and TRATSRn.
+
+Optional property:
+- little-endian: If present, the TMU registers are little endian. If absent,
+ the default is big endian.
Example:
@@ -60,4 +66,5 @@ tmu@f0000 {
0x00030000 0x00000012
0x00030001 0x0000001d>;
+ #thermal-sensor-cells = <1>;
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: linux-arm-kernel
For different types of SoC the sensor id and endianness may vary.
"#thermal-sensor-cells" is used to provide sensor id information.
"little-endian" property is to tell the endianness of TMU.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
.../devicetree/bindings/thermal/qoriq-thermal.txt | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
index 66223d5..8eeef80 100644
--- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
@@ -1,22 +1,28 @@
* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
Required properties:
-- compatible : Must include "fsl,qoriq-tmu". The version of the device is
+- compatible: Must include "fsl,qoriq-tmu". The version of the device is
determined by the TMU IP Block Revision Register (IPBRR0) at
offset 0x0BF8.
- Table of correspondences between IPBRR0 values and example chips:
+ Table of correspondences between IPBRR0 values and example chips:
Value Device
---------- -----
0x01900102 T1040
-- reg : Address range of TMU registers.
-- interrupts : Contains the interrupt for TMU.
-- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
+- reg: Address range of TMU registers.
+- interrupts: Contains the interrupt for TMU.
+- fsl,tmu-range: The values to be programmed into TTRnCR, as specified by
the SoC reference manual. The first cell is TTR0CR, the second is
TTR1CR, etc.
-- fsl,tmu-calibration : A list of cell pairs containing temperature
+- fsl,tmu-calibration: A list of cell pairs containing temperature
calibration data, as specified by the SoC reference manual.
The first cell of each pair is the value to be written to TTCFGR,
and the second is the value to be written to TSCFGR.
+- #thermal-sensor-cells: Must be 1. The sensor specifier is the monitoring
+ site ID, and represents the "n" in TRITSRn and TRATSRn.
+
+Optional property:
+- little-endian: If present, the TMU registers are little endian. If absent,
+ the default is big endian.
Example:
@@ -60,4 +66,5 @@ tmu at f0000 {
0x00030000 0x00000012
0x00030001 0x0000001d>;
+ #thermal-sensor-cells = <1>;
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 2/7] powerpc/mpc85xx: Update TMU device tree node for T1040/T1042
2016-06-03 6:57 ` Jia Hongtao
(?)
@ 2016-06-03 6:57 ` Jia Hongtao
-1 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: linux-pm, devicetree, linux-kernel, linuxppc-dev,
linux-arm-kernel, hongtao.jia
SoC compatible string and endianness property are added according to the
new bindings.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 507649e..089eb56 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -526,7 +526,7 @@
0x00030000 0x00000012
0x00030001 0x0000001d>;
- #thermal-sensor-cells = <0>;
+ #thermal-sensor-cells = <1>;
};
thermal-zones {
@@ -534,7 +534,7 @@
polling-delay-passive = <1000>;
polling-delay = <5000>;
- thermal-sensors = <&tmu>;
+ thermal-sensors = <&tmu 2>;
trips {
cpu_alert: cpu-alert {
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 2/7] powerpc/mpc85xx: Update TMU device tree node for T1040/T1042
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: devicetree, linux-pm, linux-kernel, hongtao.jia, linuxppc-dev,
linux-arm-kernel
SoC compatible string and endianness property are added according to the
new bindings.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 507649e..089eb56 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -526,7 +526,7 @@
0x00030000 0x00000012
0x00030001 0x0000001d>;
- #thermal-sensor-cells = <0>;
+ #thermal-sensor-cells = <1>;
};
thermal-zones {
@@ -534,7 +534,7 @@
polling-delay-passive = <1000>;
polling-delay = <5000>;
- thermal-sensors = <&tmu>;
+ thermal-sensors = <&tmu 2>;
trips {
cpu_alert: cpu-alert {
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 2/7] powerpc/mpc85xx: Update TMU device tree node for T1040/T1042
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: linux-arm-kernel
SoC compatible string and endianness property are added according to the
new bindings.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 507649e..089eb56 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -526,7 +526,7 @@
0x00030000 0x00000012
0x00030001 0x0000001d>;
- #thermal-sensor-cells = <0>;
+ #thermal-sensor-cells = <1>;
};
thermal-zones {
@@ -534,7 +534,7 @@
polling-delay-passive = <1000>;
polling-delay = <5000>;
- thermal-sensors = <&tmu>;
+ thermal-sensors = <&tmu 2>;
trips {
cpu_alert: cpu-alert {
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 3/7] powerpc/mpc85xx: Update TMU device tree node for T1023/T1024
2016-06-03 6:57 ` Jia Hongtao
(?)
@ 2016-06-03 6:57 ` Jia Hongtao
-1 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: linux-pm, devicetree, linux-kernel, linuxppc-dev,
linux-arm-kernel, hongtao.jia
SoC compatible string and endianness property are added according to the
new bindings.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/powerpc/boot/dts/fsl/t1023si-post.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
index 6e0b489..bce762a 100644
--- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -321,7 +321,7 @@
0x00030001 0x0000000d
0x00030002 0x00000019
0x00030003 0x00000024>;
- #thermal-sensor-cells = <0>;
+ #thermal-sensor-cells = <1>;
};
thermal-zones {
@@ -329,7 +329,7 @@
polling-delay-passive = <1000>;
polling-delay = <5000>;
- thermal-sensors = <&tmu>;
+ thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 3/7] powerpc/mpc85xx: Update TMU device tree node for T1023/T1024
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: devicetree, linux-pm, linux-kernel, hongtao.jia, linuxppc-dev,
linux-arm-kernel
SoC compatible string and endianness property are added according to the
new bindings.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/powerpc/boot/dts/fsl/t1023si-post.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
index 6e0b489..bce762a 100644
--- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -321,7 +321,7 @@
0x00030001 0x0000000d
0x00030002 0x00000019
0x00030003 0x00000024>;
- #thermal-sensor-cells = <0>;
+ #thermal-sensor-cells = <1>;
};
thermal-zones {
@@ -329,7 +329,7 @@
polling-delay-passive = <1000>;
polling-delay = <5000>;
- thermal-sensors = <&tmu>;
+ thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 3/7] powerpc/mpc85xx: Update TMU device tree node for T1023/T1024
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: linux-arm-kernel
SoC compatible string and endianness property are added according to the
new bindings.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/powerpc/boot/dts/fsl/t1023si-post.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
index 6e0b489..bce762a 100644
--- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -321,7 +321,7 @@
0x00030001 0x0000000d
0x00030002 0x00000019
0x00030003 0x00000024>;
- #thermal-sensor-cells = <0>;
+ #thermal-sensor-cells = <1>;
};
thermal-zones {
@@ -329,7 +329,7 @@
polling-delay-passive = <1000>;
polling-delay = <5000>;
- thermal-sensors = <&tmu>;
+ thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 4/7] arm:dt:ls1021a: Add TMU device tree support for LS1021A
2016-06-03 6:57 ` Jia Hongtao
(?)
@ 2016-06-03 6:57 ` Jia Hongtao
-1 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: linux-pm, devicetree, linux-kernel, linuxppc-dev,
linux-arm-kernel, hongtao.jia
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/arm/boot/dts/ls1021a.dtsi | 84 +++++++++++++++++++++++++++++++++++++++++-
1 file changed, 82 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 5ae8e92..1bac9d8 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -47,6 +47,7 @@
#include "skeleton64.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "fsl,ls1021a";
@@ -70,14 +71,15 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@f00 {
+ cpu0: cpu@f00 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf00>;
clocks = <&cluster1_clk>;
+ #cooling-cells = <2>;
};
- cpu@f01 {
+ cpu1: cpu@f01 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf01>;
@@ -251,6 +253,84 @@
};
};
+ tmu: tmu@1f00000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f00000 0x0 0x10000>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
+ fsl,tmu-calibration = <0x00000000 0x0000000f
+ 0x00000001 0x00000017
+ 0x00000002 0x0000001e
+ 0x00000003 0x00000026
+ 0x00000004 0x0000002e
+ 0x00000005 0x00000035
+ 0x00000006 0x0000003d
+ 0x00000007 0x00000044
+ 0x00000008 0x0000004c
+ 0x00000009 0x00000053
+ 0x0000000a 0x0000005b
+ 0x0000000b 0x00000064
+
+ 0x00010000 0x00000011
+ 0x00010001 0x0000001c
+ 0x00010002 0x00000024
+ 0x00010003 0x0000002b
+ 0x00010004 0x00000034
+ 0x00010005 0x00000039
+ 0x00010006 0x00000042
+ 0x00010007 0x0000004c
+ 0x00010008 0x00000051
+ 0x00010009 0x0000005a
+ 0x0001000a 0x00000063
+
+ 0x00020000 0x00000013
+ 0x00020001 0x00000019
+ 0x00020002 0x00000024
+ 0x00020003 0x0000002c
+ 0x00020004 0x00000035
+ 0x00020005 0x0000003d
+ 0x00020006 0x00000046
+ 0x00020007 0x00000050
+ 0x00020008 0x00000059
+
+ 0x00030000 0x00000002
+ 0x00030001 0x0000000d
+ 0x00030002 0x00000019
+ 0x00030003 0x00000024>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu 0>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
dspi0: dspi@2100000 {
compatible = "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 4/7] arm:dt:ls1021a: Add TMU device tree support for LS1021A
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: devicetree, linux-pm, linux-kernel, hongtao.jia, linuxppc-dev,
linux-arm-kernel
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/arm/boot/dts/ls1021a.dtsi | 84 +++++++++++++++++++++++++++++++++++++++++-
1 file changed, 82 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 5ae8e92..1bac9d8 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -47,6 +47,7 @@
#include "skeleton64.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "fsl,ls1021a";
@@ -70,14 +71,15 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@f00 {
+ cpu0: cpu@f00 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf00>;
clocks = <&cluster1_clk>;
+ #cooling-cells = <2>;
};
- cpu@f01 {
+ cpu1: cpu@f01 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf01>;
@@ -251,6 +253,84 @@
};
};
+ tmu: tmu@1f00000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f00000 0x0 0x10000>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
+ fsl,tmu-calibration = <0x00000000 0x0000000f
+ 0x00000001 0x00000017
+ 0x00000002 0x0000001e
+ 0x00000003 0x00000026
+ 0x00000004 0x0000002e
+ 0x00000005 0x00000035
+ 0x00000006 0x0000003d
+ 0x00000007 0x00000044
+ 0x00000008 0x0000004c
+ 0x00000009 0x00000053
+ 0x0000000a 0x0000005b
+ 0x0000000b 0x00000064
+
+ 0x00010000 0x00000011
+ 0x00010001 0x0000001c
+ 0x00010002 0x00000024
+ 0x00010003 0x0000002b
+ 0x00010004 0x00000034
+ 0x00010005 0x00000039
+ 0x00010006 0x00000042
+ 0x00010007 0x0000004c
+ 0x00010008 0x00000051
+ 0x00010009 0x0000005a
+ 0x0001000a 0x00000063
+
+ 0x00020000 0x00000013
+ 0x00020001 0x00000019
+ 0x00020002 0x00000024
+ 0x00020003 0x0000002c
+ 0x00020004 0x00000035
+ 0x00020005 0x0000003d
+ 0x00020006 0x00000046
+ 0x00020007 0x00000050
+ 0x00020008 0x00000059
+
+ 0x00030000 0x00000002
+ 0x00030001 0x0000000d
+ 0x00030002 0x00000019
+ 0x00030003 0x00000024>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu 0>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
dspi0: dspi@2100000 {
compatible = "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 4/7] arm:dt:ls1021a: Add TMU device tree support for LS1021A
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: linux-arm-kernel
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/arm/boot/dts/ls1021a.dtsi | 84 +++++++++++++++++++++++++++++++++++++++++-
1 file changed, 82 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 5ae8e92..1bac9d8 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -47,6 +47,7 @@
#include "skeleton64.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "fsl,ls1021a";
@@ -70,14 +71,15 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu at f00 {
+ cpu0: cpu at f00 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf00>;
clocks = <&cluster1_clk>;
+ #cooling-cells = <2>;
};
- cpu at f01 {
+ cpu1: cpu at f01 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf01>;
@@ -251,6 +253,84 @@
};
};
+ tmu: tmu at 1f00000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f00000 0x0 0x10000>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
+ fsl,tmu-calibration = <0x00000000 0x0000000f
+ 0x00000001 0x00000017
+ 0x00000002 0x0000001e
+ 0x00000003 0x00000026
+ 0x00000004 0x0000002e
+ 0x00000005 0x00000035
+ 0x00000006 0x0000003d
+ 0x00000007 0x00000044
+ 0x00000008 0x0000004c
+ 0x00000009 0x00000053
+ 0x0000000a 0x0000005b
+ 0x0000000b 0x00000064
+
+ 0x00010000 0x00000011
+ 0x00010001 0x0000001c
+ 0x00010002 0x00000024
+ 0x00010003 0x0000002b
+ 0x00010004 0x00000034
+ 0x00010005 0x00000039
+ 0x00010006 0x00000042
+ 0x00010007 0x0000004c
+ 0x00010008 0x00000051
+ 0x00010009 0x0000005a
+ 0x0001000a 0x00000063
+
+ 0x00020000 0x00000013
+ 0x00020001 0x00000019
+ 0x00020002 0x00000024
+ 0x00020003 0x0000002c
+ 0x00020004 0x00000035
+ 0x00020005 0x0000003d
+ 0x00020006 0x00000046
+ 0x00020007 0x00000050
+ 0x00020008 0x00000059
+
+ 0x00030000 0x00000002
+ 0x00030001 0x0000000d
+ 0x00030002 0x00000019
+ 0x00030003 0x00000024>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu 0>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
dspi0: dspi at 2100000 {
compatible = "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 5/7] arm64:dt:ls1043a: Add TMU device tree support for LS1043A
2016-06-03 6:57 ` Jia Hongtao
(?)
@ 2016-06-03 6:57 ` Jia Hongtao
-1 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: linux-pm, devicetree, linux-kernel, linuxppc-dev,
linux-arm-kernel, hongtao.jia
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 78 +++++++++++++++++++++++
3 files changed, 80 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
index 9d3e9fe..fa447b6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
@@ -45,7 +45,7 @@
*/
/dts-v1/;
-/include/ "fsl-ls1043a.dtsi"
+#include "fsl-ls1043a.dtsi"
/ {
model = "LS1043A QDS Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
index f895fc0..6015d88 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -45,7 +45,7 @@
*/
/dts-v1/;
-/include/ "fsl-ls1043a.dtsi"
+#include "fsl-ls1043a.dtsi"
/ {
model = "LS1043A RDB Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index de0323b..4004273 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -44,6 +44,8 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
+#include <dt-bindings/thermal/thermal.h>
+
/ {
compatible = "fsl,ls1043a";
interrupt-parent = <&gic>;
@@ -65,6 +67,7 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
clocks = <&clockgen 1 0>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -196,6 +199,81 @@
bus-width = <4>;
};
+ tmu: tmu@1f00000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f00000 0x0 0x10000>;
+ interrupts = <0 33 0x4>;
+ fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
+ fsl,tmu-calibration = <0x00000000 0x00000026
+ 0x00000001 0x0000002d
+ 0x00000002 0x00000032
+ 0x00000003 0x00000039
+ 0x00000004 0x0000003f
+ 0x00000005 0x00000046
+ 0x00000006 0x0000004d
+ 0x00000007 0x00000054
+ 0x00000008 0x0000005a
+ 0x00000009 0x00000061
+ 0x0000000a 0x0000006a
+ 0x0000000b 0x00000071
+
+ 0x00010000 0x00000025
+ 0x00010001 0x0000002c
+ 0x00010002 0x00000035
+ 0x00010003 0x0000003d
+ 0x00010004 0x00000045
+ 0x00010005 0x0000004e
+ 0x00010006 0x00000057
+ 0x00010007 0x00000061
+ 0x00010008 0x0000006b
+ 0x00010009 0x00000076
+
+ 0x00020000 0x00000029
+ 0x00020001 0x00000033
+ 0x00020002 0x0000003d
+ 0x00020003 0x00000049
+ 0x00020004 0x00000056
+ 0x00020005 0x00000061
+ 0x00020006 0x0000006d
+
+ 0x00030000 0x00000021
+ 0x00030001 0x0000002a
+ 0x00030002 0x0000003c
+ 0x00030003 0x0000004e>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu 3>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
dspi0: dspi@2100000 {
compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 5/7] arm64:dt:ls1043a: Add TMU device tree support for LS1043A
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: devicetree, linux-pm, linux-kernel, hongtao.jia, linuxppc-dev,
linux-arm-kernel
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 78 +++++++++++++++++++++++
3 files changed, 80 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
index 9d3e9fe..fa447b6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
@@ -45,7 +45,7 @@
*/
/dts-v1/;
-/include/ "fsl-ls1043a.dtsi"
+#include "fsl-ls1043a.dtsi"
/ {
model = "LS1043A QDS Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
index f895fc0..6015d88 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -45,7 +45,7 @@
*/
/dts-v1/;
-/include/ "fsl-ls1043a.dtsi"
+#include "fsl-ls1043a.dtsi"
/ {
model = "LS1043A RDB Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index de0323b..4004273 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -44,6 +44,8 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
+#include <dt-bindings/thermal/thermal.h>
+
/ {
compatible = "fsl,ls1043a";
interrupt-parent = <&gic>;
@@ -65,6 +67,7 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
clocks = <&clockgen 1 0>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -196,6 +199,81 @@
bus-width = <4>;
};
+ tmu: tmu@1f00000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f00000 0x0 0x10000>;
+ interrupts = <0 33 0x4>;
+ fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
+ fsl,tmu-calibration = <0x00000000 0x00000026
+ 0x00000001 0x0000002d
+ 0x00000002 0x00000032
+ 0x00000003 0x00000039
+ 0x00000004 0x0000003f
+ 0x00000005 0x00000046
+ 0x00000006 0x0000004d
+ 0x00000007 0x00000054
+ 0x00000008 0x0000005a
+ 0x00000009 0x00000061
+ 0x0000000a 0x0000006a
+ 0x0000000b 0x00000071
+
+ 0x00010000 0x00000025
+ 0x00010001 0x0000002c
+ 0x00010002 0x00000035
+ 0x00010003 0x0000003d
+ 0x00010004 0x00000045
+ 0x00010005 0x0000004e
+ 0x00010006 0x00000057
+ 0x00010007 0x00000061
+ 0x00010008 0x0000006b
+ 0x00010009 0x00000076
+
+ 0x00020000 0x00000029
+ 0x00020001 0x00000033
+ 0x00020002 0x0000003d
+ 0x00020003 0x00000049
+ 0x00020004 0x00000056
+ 0x00020005 0x00000061
+ 0x00020006 0x0000006d
+
+ 0x00030000 0x00000021
+ 0x00030001 0x0000002a
+ 0x00030002 0x0000003c
+ 0x00030003 0x0000004e>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu 3>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
dspi0: dspi@2100000 {
compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 5/7] arm64:dt:ls1043a: Add TMU device tree support for LS1043A
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: linux-arm-kernel
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 78 +++++++++++++++++++++++
3 files changed, 80 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
index 9d3e9fe..fa447b6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
@@ -45,7 +45,7 @@
*/
/dts-v1/;
-/include/ "fsl-ls1043a.dtsi"
+#include "fsl-ls1043a.dtsi"
/ {
model = "LS1043A QDS Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
index f895fc0..6015d88 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -45,7 +45,7 @@
*/
/dts-v1/;
-/include/ "fsl-ls1043a.dtsi"
+#include "fsl-ls1043a.dtsi"
/ {
model = "LS1043A RDB Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index de0323b..4004273 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -44,6 +44,8 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
+#include <dt-bindings/thermal/thermal.h>
+
/ {
compatible = "fsl,ls1043a";
interrupt-parent = <&gic>;
@@ -65,6 +67,7 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
clocks = <&clockgen 1 0>;
+ #cooling-cells = <2>;
};
cpu1: cpu at 1 {
@@ -196,6 +199,81 @@
bus-width = <4>;
};
+ tmu: tmu at 1f00000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f00000 0x0 0x10000>;
+ interrupts = <0 33 0x4>;
+ fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
+ fsl,tmu-calibration = <0x00000000 0x00000026
+ 0x00000001 0x0000002d
+ 0x00000002 0x00000032
+ 0x00000003 0x00000039
+ 0x00000004 0x0000003f
+ 0x00000005 0x00000046
+ 0x00000006 0x0000004d
+ 0x00000007 0x00000054
+ 0x00000008 0x0000005a
+ 0x00000009 0x00000061
+ 0x0000000a 0x0000006a
+ 0x0000000b 0x00000071
+
+ 0x00010000 0x00000025
+ 0x00010001 0x0000002c
+ 0x00010002 0x00000035
+ 0x00010003 0x0000003d
+ 0x00010004 0x00000045
+ 0x00010005 0x0000004e
+ 0x00010006 0x00000057
+ 0x00010007 0x00000061
+ 0x00010008 0x0000006b
+ 0x00010009 0x00000076
+
+ 0x00020000 0x00000029
+ 0x00020001 0x00000033
+ 0x00020002 0x0000003d
+ 0x00020003 0x00000049
+ 0x00020004 0x00000056
+ 0x00020005 0x00000061
+ 0x00020006 0x0000006d
+
+ 0x00030000 0x00000021
+ 0x00030001 0x0000002a
+ 0x00030002 0x0000003c
+ 0x00030003 0x0000004e>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu 3>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
dspi0: dspi at 2100000 {
compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 6/7] arm64:dt:ls2080a: Add TMU device tree support for LS2080A
2016-06-03 6:57 ` Jia Hongtao
(?)
@ 2016-06-03 6:57 ` Jia Hongtao
-1 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: linux-pm, devicetree, linux-kernel, linuxppc-dev,
linux-arm-kernel, hongtao.jia
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 116 +++++++++++++++++++--
4 files changed, 111 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
index e8801fa..18e99f4 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
@@ -46,7 +46,7 @@
/dts-v1/;
-/include/ "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a.dtsi"
/ {
model = "Freescale Layerscape 2080a QDS Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
index e127f0b..f1c8115 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
@@ -46,7 +46,7 @@
/dts-v1/;
-/include/ "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a.dtsi"
/ {
model = "Freescale Layerscape 2080a RDB Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
index 505d038..290604b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
@@ -46,7 +46,7 @@
/dts-v1/;
-/include/ "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a.dtsi"
/ {
model = "Freescale Layerscape 2080a software Simulator model";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 3187c82..5cc27df 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -44,6 +44,8 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
+#include <dt-bindings/thermal/thermal.h>
+
/ {
compatible = "fsl,ls2080a";
interrupt-parent = <&gic>;
@@ -62,56 +64,60 @@
*/
/* We have 4 clusters having 2 Cortex-A57 cores each */
- cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x0>;
clocks = <&clockgen 1 0>;
+ #cooling-cells = <2>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x1>;
clocks = <&clockgen 1 0>;
};
- cpu@100 {
+ cpu2: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x100>;
clocks = <&clockgen 1 1>;
+ #cooling-cells = <2>;
};
- cpu@101 {
+ cpu3: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x101>;
clocks = <&clockgen 1 1>;
};
- cpu@200 {
+ cpu4: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x200>;
clocks = <&clockgen 1 2>;
+ #cooling-cells = <2>;
};
- cpu@201 {
+ cpu5: cpu@201 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x201>;
clocks = <&clockgen 1 2>;
};
- cpu@300 {
+ cpu6: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x300>;
clocks = <&clockgen 1 3>;
+ #cooling-cells = <2>;
};
- cpu@301 {
+ cpu7: cpu@301 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x301>;
@@ -191,6 +197,100 @@
clocks = <&sysclk>;
};
+ tmu: tmu@1f80000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f80000 0x0 0x10000>;
+ interrupts = <0 23 0x4>;
+ fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
+ fsl,tmu-calibration = <0x00000000 0x00000026
+ 0x00000001 0x0000002d
+ 0x00000002 0x00000032
+ 0x00000003 0x00000039
+ 0x00000004 0x0000003f
+ 0x00000005 0x00000046
+ 0x00000006 0x0000004d
+ 0x00000007 0x00000054
+ 0x00000008 0x0000005a
+ 0x00000009 0x00000061
+ 0x0000000a 0x0000006a
+ 0x0000000b 0x00000071
+
+ 0x00010000 0x00000025
+ 0x00010001 0x0000002c
+ 0x00010002 0x00000035
+ 0x00010003 0x0000003d
+ 0x00010004 0x00000045
+ 0x00010005 0x0000004e
+ 0x00010006 0x00000057
+ 0x00010007 0x00000061
+ 0x00010008 0x0000006b
+ 0x00010009 0x00000076
+
+ 0x00020000 0x00000029
+ 0x00020001 0x00000033
+ 0x00020002 0x0000003d
+ 0x00020003 0x00000049
+ 0x00020004 0x00000056
+ 0x00020005 0x00000061
+ 0x00020006 0x0000006d
+
+ 0x00030000 0x00000021
+ 0x00030001 0x0000002a
+ 0x00030002 0x0000003c
+ 0x00030003 0x0000004e>;
+ little-endian;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu 4>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map1 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu2 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map2 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu4 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map3 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu6 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
serial0: serial@21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0500 0x0 0x100>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 6/7] arm64:dt:ls2080a: Add TMU device tree support for LS2080A
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: devicetree, linux-pm, linux-kernel, hongtao.jia, linuxppc-dev,
linux-arm-kernel
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 116 +++++++++++++++++++--
4 files changed, 111 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
index e8801fa..18e99f4 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
@@ -46,7 +46,7 @@
/dts-v1/;
-/include/ "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a.dtsi"
/ {
model = "Freescale Layerscape 2080a QDS Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
index e127f0b..f1c8115 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
@@ -46,7 +46,7 @@
/dts-v1/;
-/include/ "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a.dtsi"
/ {
model = "Freescale Layerscape 2080a RDB Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
index 505d038..290604b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
@@ -46,7 +46,7 @@
/dts-v1/;
-/include/ "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a.dtsi"
/ {
model = "Freescale Layerscape 2080a software Simulator model";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 3187c82..5cc27df 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -44,6 +44,8 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
+#include <dt-bindings/thermal/thermal.h>
+
/ {
compatible = "fsl,ls2080a";
interrupt-parent = <&gic>;
@@ -62,56 +64,60 @@
*/
/* We have 4 clusters having 2 Cortex-A57 cores each */
- cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x0>;
clocks = <&clockgen 1 0>;
+ #cooling-cells = <2>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x1>;
clocks = <&clockgen 1 0>;
};
- cpu@100 {
+ cpu2: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x100>;
clocks = <&clockgen 1 1>;
+ #cooling-cells = <2>;
};
- cpu@101 {
+ cpu3: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x101>;
clocks = <&clockgen 1 1>;
};
- cpu@200 {
+ cpu4: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x200>;
clocks = <&clockgen 1 2>;
+ #cooling-cells = <2>;
};
- cpu@201 {
+ cpu5: cpu@201 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x201>;
clocks = <&clockgen 1 2>;
};
- cpu@300 {
+ cpu6: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x300>;
clocks = <&clockgen 1 3>;
+ #cooling-cells = <2>;
};
- cpu@301 {
+ cpu7: cpu@301 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x301>;
@@ -191,6 +197,100 @@
clocks = <&sysclk>;
};
+ tmu: tmu@1f80000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f80000 0x0 0x10000>;
+ interrupts = <0 23 0x4>;
+ fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
+ fsl,tmu-calibration = <0x00000000 0x00000026
+ 0x00000001 0x0000002d
+ 0x00000002 0x00000032
+ 0x00000003 0x00000039
+ 0x00000004 0x0000003f
+ 0x00000005 0x00000046
+ 0x00000006 0x0000004d
+ 0x00000007 0x00000054
+ 0x00000008 0x0000005a
+ 0x00000009 0x00000061
+ 0x0000000a 0x0000006a
+ 0x0000000b 0x00000071
+
+ 0x00010000 0x00000025
+ 0x00010001 0x0000002c
+ 0x00010002 0x00000035
+ 0x00010003 0x0000003d
+ 0x00010004 0x00000045
+ 0x00010005 0x0000004e
+ 0x00010006 0x00000057
+ 0x00010007 0x00000061
+ 0x00010008 0x0000006b
+ 0x00010009 0x00000076
+
+ 0x00020000 0x00000029
+ 0x00020001 0x00000033
+ 0x00020002 0x0000003d
+ 0x00020003 0x00000049
+ 0x00020004 0x00000056
+ 0x00020005 0x00000061
+ 0x00020006 0x0000006d
+
+ 0x00030000 0x00000021
+ 0x00030001 0x0000002a
+ 0x00030002 0x0000003c
+ 0x00030003 0x0000004e>;
+ little-endian;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu 4>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map1 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu2 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map2 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu4 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map3 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu6 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
serial0: serial@21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0500 0x0 0x100>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 6/7] arm64:dt:ls2080a: Add TMU device tree support for LS2080A
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: linux-arm-kernel
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 116 +++++++++++++++++++--
4 files changed, 111 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
index e8801fa..18e99f4 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
@@ -46,7 +46,7 @@
/dts-v1/;
-/include/ "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a.dtsi"
/ {
model = "Freescale Layerscape 2080a QDS Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
index e127f0b..f1c8115 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
@@ -46,7 +46,7 @@
/dts-v1/;
-/include/ "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a.dtsi"
/ {
model = "Freescale Layerscape 2080a RDB Board";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
index 505d038..290604b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
@@ -46,7 +46,7 @@
/dts-v1/;
-/include/ "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a.dtsi"
/ {
model = "Freescale Layerscape 2080a software Simulator model";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 3187c82..5cc27df 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -44,6 +44,8 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
+#include <dt-bindings/thermal/thermal.h>
+
/ {
compatible = "fsl,ls2080a";
interrupt-parent = <&gic>;
@@ -62,56 +64,60 @@
*/
/* We have 4 clusters having 2 Cortex-A57 cores each */
- cpu at 0 {
+ cpu0: cpu at 0 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x0>;
clocks = <&clockgen 1 0>;
+ #cooling-cells = <2>;
};
- cpu at 1 {
+ cpu1: cpu at 1 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x1>;
clocks = <&clockgen 1 0>;
};
- cpu at 100 {
+ cpu2: cpu at 100 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x100>;
clocks = <&clockgen 1 1>;
+ #cooling-cells = <2>;
};
- cpu at 101 {
+ cpu3: cpu at 101 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x101>;
clocks = <&clockgen 1 1>;
};
- cpu at 200 {
+ cpu4: cpu at 200 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x200>;
clocks = <&clockgen 1 2>;
+ #cooling-cells = <2>;
};
- cpu at 201 {
+ cpu5: cpu at 201 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x201>;
clocks = <&clockgen 1 2>;
};
- cpu at 300 {
+ cpu6: cpu at 300 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x300>;
clocks = <&clockgen 1 3>;
+ #cooling-cells = <2>;
};
- cpu at 301 {
+ cpu7: cpu at 301 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x301>;
@@ -191,6 +197,100 @@
clocks = <&sysclk>;
};
+ tmu: tmu at 1f80000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f80000 0x0 0x10000>;
+ interrupts = <0 23 0x4>;
+ fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
+ fsl,tmu-calibration = <0x00000000 0x00000026
+ 0x00000001 0x0000002d
+ 0x00000002 0x00000032
+ 0x00000003 0x00000039
+ 0x00000004 0x0000003f
+ 0x00000005 0x00000046
+ 0x00000006 0x0000004d
+ 0x00000007 0x00000054
+ 0x00000008 0x0000005a
+ 0x00000009 0x00000061
+ 0x0000000a 0x0000006a
+ 0x0000000b 0x00000071
+
+ 0x00010000 0x00000025
+ 0x00010001 0x0000002c
+ 0x00010002 0x00000035
+ 0x00010003 0x0000003d
+ 0x00010004 0x00000045
+ 0x00010005 0x0000004e
+ 0x00010006 0x00000057
+ 0x00010007 0x00000061
+ 0x00010008 0x0000006b
+ 0x00010009 0x00000076
+
+ 0x00020000 0x00000029
+ 0x00020001 0x00000033
+ 0x00020002 0x0000003d
+ 0x00020003 0x00000049
+ 0x00020004 0x00000056
+ 0x00020005 0x00000061
+ 0x00020006 0x0000006d
+
+ 0x00030000 0x00000021
+ 0x00030001 0x0000002a
+ 0x00030002 0x0000003c
+ 0x00030003 0x0000004e>;
+ little-endian;
+ #thermal-sensor-cells = <1>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu 4>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map1 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu2 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map2 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu4 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map3 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu6 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
serial0: serial at 21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0500 0x0 0x100>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 7/7] thermal: qoriq: Add thermal management support
2016-06-03 6:57 ` Jia Hongtao
(?)
@ 2016-06-03 6:57 ` Jia Hongtao
-1 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: linux-pm, devicetree, linux-kernel, linuxppc-dev,
linux-arm-kernel, hongtao.jia
This driver add thermal management support by enabling TMU (Thermal
Monitoring Unit) on QorIQ platform.
It's based on thermal of framework:
- Trip points defined in device tree.
- Cpufreq as cooling device registered in qoriq cpufreq driver.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
drivers/thermal/Kconfig | 9 ++
drivers/thermal/Makefile | 1 +
drivers/thermal/qoriq_thermal.c | 328 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 338 insertions(+)
create mode 100644 drivers/thermal/qoriq_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 2d702ca..bef26cd 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -195,6 +195,15 @@ config IMX_THERMAL
cpufreq is used as the cooling device to throttle CPUs when the
passive trip is crossed.
+config QORIQ_THERMAL
+ tristate "QorIQ Thermal Monitoring Unit"
+ depends on THERMAL_OF
+ help
+ Support for Thermal Monitoring Unit (TMU) found on QorIQ platforms.
+ It supports one critical trip point and one passive trip point. The
+ cpufreq is used as the cooling device to throttle CPUs when the
+ passive trip is crossed.
+
config SPEAR_THERMAL
tristate "SPEAr thermal sensor driver"
depends on PLAT_SPEAR || COMPILE_TEST
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 10b07c1..6662232 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
obj-$(CONFIG_TANGO_THERMAL) += tango_thermal.o
obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
+obj-$(CONFIG_QORIQ_THERMAL) += qoriq_thermal.o
obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
new file mode 100644
index 0000000..644ba52
--- /dev/null
+++ b/drivers/thermal/qoriq_thermal.c
@@ -0,0 +1,328 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/thermal.h>
+
+#include "thermal_core.h"
+
+#define SITES_MAX 16
+
+/*
+ * QorIQ TMU Registers
+ */
+struct qoriq_tmu_site_regs {
+ u32 tritsr; /* Immediate Temperature Site Register */
+ u32 tratsr; /* Average Temperature Site Register */
+ u8 res0[0x8];
+};
+
+struct qoriq_tmu_regs {
+ u32 tmr; /* Mode Register */
+#define TMR_DISABLE 0x0
+#define TMR_ME 0x80000000
+#define TMR_ALPF 0x0c000000
+ u32 tsr; /* Status Register */
+ u32 tmtmir; /* Temperature measurement interval Register */
+#define TMTMIR_DEFAULT 0x0000000f
+ u8 res0[0x14];
+ u32 tier; /* Interrupt Enable Register */
+#define TIER_DISABLE 0x0
+ u32 tidr; /* Interrupt Detect Register */
+ u32 tiscr; /* Interrupt Site Capture Register */
+ u32 ticscr; /* Interrupt Critical Site Capture Register */
+ u8 res1[0x10];
+ u32 tmhtcrh; /* High Temperature Capture Register */
+ u32 tmhtcrl; /* Low Temperature Capture Register */
+ u8 res2[0x8];
+ u32 tmhtitr; /* High Temperature Immediate Threshold */
+ u32 tmhtatr; /* High Temperature Average Threshold */
+ u32 tmhtactr; /* High Temperature Average Crit Threshold */
+ u8 res3[0x24];
+ u32 ttcfgr; /* Temperature Configuration Register */
+ u32 tscfgr; /* Sensor Configuration Register */
+ u8 res4[0x78];
+ struct qoriq_tmu_site_regs site[SITES_MAX];
+ u8 res5[0x9f8];
+ u32 ipbrr0; /* IP Block Revision Register 0 */
+ u32 ipbrr1; /* IP Block Revision Register 1 */
+ u8 res6[0x310];
+ u32 ttr0cr; /* Temperature Range 0 Control Register */
+ u32 ttr1cr; /* Temperature Range 1 Control Register */
+ u32 ttr2cr; /* Temperature Range 2 Control Register */
+ u32 ttr3cr; /* Temperature Range 3 Control Register */
+};
+
+/*
+ * Thermal zone data
+ */
+struct qoriq_tmu_data {
+ struct thermal_zone_device *tz;
+ struct qoriq_tmu_regs __iomem *regs;
+ int sensor_id;
+ bool little_endian;
+};
+
+static void tmu_write(struct qoriq_tmu_data *p, u32 val, void __iomem *addr)
+{
+ if (p->little_endian)
+ iowrite32(val, addr);
+ else
+ iowrite32be(val, addr);
+}
+
+static u32 tmu_read(struct qoriq_tmu_data *p, void __iomem *addr)
+{
+ if (p->little_endian)
+ return ioread32(addr);
+ else
+ return ioread32be(addr);
+}
+
+static int tmu_get_temp(void *p, int *temp)
+{
+ u32 val;
+ struct qoriq_tmu_data *data = p;
+
+ val = tmu_read(data, &data->regs->site[data->sensor_id].tritsr);
+ *temp = (val & 0xff) * 1000;
+
+ return 0;
+}
+
+static int qoriq_tmu_get_sensor_id(void)
+{
+ int ret, id;
+ struct of_phandle_args sensor_specs;
+ struct device_node *np, *sensor_np;
+
+ np = of_find_node_by_name(NULL, "thermal-zones");
+ if (!np)
+ return -ENODEV;
+
+ sensor_np = of_get_next_child(np, NULL);
+ ret = of_parse_phandle_with_args(sensor_np, "thermal-sensors",
+ "#thermal-sensor-cells",
+ 0, &sensor_specs);
+ if (ret) {
+ of_node_put(np);
+ of_node_put(sensor_np);
+ return ret;
+ }
+
+ if (sensor_specs.args_count >= 1) {
+ id = sensor_specs.args[0];
+ WARN(sensor_specs.args_count > 1,
+ "%s: too many cells in sensor specifier %d\n",
+ sensor_specs.np->name, sensor_specs.args_count);
+ } else {
+ id = 0;
+ }
+
+ of_node_put(np);
+ of_node_put(sensor_np);
+
+ return id;
+}
+
+static int qoriq_tmu_calibration(struct platform_device *pdev)
+{
+ int i, val, len;
+ u32 range[4];
+ const u32 *calibration;
+ struct device_node *np = pdev->dev.of_node;
+ struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
+
+ if (of_property_read_u32_array(np, "fsl,tmu-range", range, 4)) {
+ dev_err(&pdev->dev, "missing calibration range.\n");
+ return -ENODEV;
+ }
+
+ /* Init temperature range registers */
+ tmu_write(data, range[0], &data->regs->ttr0cr);
+ tmu_write(data, range[1], &data->regs->ttr1cr);
+ tmu_write(data, range[2], &data->regs->ttr2cr);
+ tmu_write(data, range[3], &data->regs->ttr3cr);
+
+ calibration = of_get_property(np, "fsl,tmu-calibration", &len);
+ if (calibration == NULL || len % 8) {
+ dev_err(&pdev->dev, "invalid calibration data.\n");
+ return -ENODEV;
+ }
+
+ for (i = 0; i < len; i += 8, calibration += 2) {
+ val = of_read_number(calibration, 1);
+ tmu_write(data, val, &data->regs->ttcfgr);
+ val = of_read_number(calibration + 1, 1);
+ tmu_write(data, val, &data->regs->tscfgr);
+ }
+
+ return 0;
+}
+
+static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
+{
+ /* Disable interrupt, using polling instead */
+ tmu_write(data, TIER_DISABLE, &data->regs->tier);
+
+ /* Set update_interval */
+ tmu_write(data, TMTMIR_DEFAULT, &data->regs->tmtmir);
+
+ /* Disable monitoring */
+ tmu_write(data, TMR_DISABLE, &data->regs->tmr);
+}
+
+static struct thermal_zone_of_device_ops tmu_tz_ops = {
+ .get_temp = tmu_get_temp,
+};
+
+static int qoriq_tmu_probe(struct platform_device *pdev)
+{
+ int ret;
+ const struct thermal_trip *trip;
+ struct qoriq_tmu_data *data;
+ struct device_node *np = pdev->dev.of_node;
+ u32 site = 0;
+
+ if (!np) {
+ dev_err(&pdev->dev, "Device OF-Node is NULL");
+ return -ENODEV;
+ }
+
+ data = devm_kzalloc(&pdev->dev, sizeof(struct qoriq_tmu_data),
+ GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, data);
+
+ data->little_endian = of_property_read_bool(np, "little-endian");
+
+ data->sensor_id = qoriq_tmu_get_sensor_id();
+ if (data->sensor_id < 0) {
+ dev_err(&pdev->dev, "Failed to get sensor id\n");
+ ret = -ENODEV;
+ goto err_iomap;
+ }
+
+ data->regs = of_iomap(np, 0);
+ if (!data->regs) {
+ dev_err(&pdev->dev, "Failed to get memory region\n");
+ ret = -ENODEV;
+ goto err_iomap;
+ }
+
+ qoriq_tmu_init_device(data); /* TMU initialization */
+
+ ret = qoriq_tmu_calibration(pdev); /* TMU calibration */
+ if (ret < 0)
+ goto err_tmu;
+
+ data->tz = thermal_zone_of_sensor_register(&pdev->dev, data->sensor_id,
+ data, &tmu_tz_ops);
+ if (IS_ERR(data->tz)) {
+ ret = PTR_ERR(data->tz);
+ dev_err(&pdev->dev,
+ "Failed to register thermal zone device %d\n", ret);
+ goto err_tmu;
+ }
+
+ trip = of_thermal_get_trip_points(data->tz);
+
+ /* Enable monitoring */
+ site |= 0x1 << (15 - data->sensor_id);
+ tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr);
+
+ return 0;
+
+err_tmu:
+ iounmap(data->regs);
+
+err_iomap:
+ platform_set_drvdata(pdev, NULL);
+
+ return ret;
+}
+
+static int qoriq_tmu_remove(struct platform_device *pdev)
+{
+ struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
+
+ thermal_zone_of_sensor_unregister(&pdev->dev, data->tz);
+
+ /* Disable monitoring */
+ tmu_write(data, TMR_DISABLE, &data->regs->tmr);
+
+ iounmap(data->regs);
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int qoriq_tmu_suspend(struct device *dev)
+{
+ u32 tmr;
+ struct qoriq_tmu_data *data = dev_get_drvdata(dev);
+
+ /* Disable monitoring */
+ tmr = tmu_read(data, &data->regs->tmr);
+ tmr &= ~TMR_ME;
+ tmu_write(data, tmr, &data->regs->tmr);
+
+ return 0;
+}
+
+static int qoriq_tmu_resume(struct device *dev)
+{
+ u32 tmr;
+ struct qoriq_tmu_data *data = dev_get_drvdata(dev);
+
+ /* Enable monitoring */
+ tmr = tmu_read(data, &data->regs->tmr);
+ tmr |= TMR_ME;
+ tmu_write(data, tmr, &data->regs->tmr);
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
+ qoriq_tmu_suspend, qoriq_tmu_resume);
+
+static const struct of_device_id qoriq_tmu_match[] = {
+ { .compatible = "fsl,qoriq-tmu", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
+
+static struct platform_driver qoriq_tmu = {
+ .driver = {
+ .name = "qoriq_thermal",
+ .pm = &qoriq_tmu_pm_ops,
+ .of_match_table = qoriq_tmu_match,
+ },
+ .probe = qoriq_tmu_probe,
+ .remove = qoriq_tmu_remove,
+};
+module_platform_driver(qoriq_tmu);
+
+MODULE_AUTHOR("Jia Hongtao <hongtao.jia@nxp.com>");
+MODULE_DESCRIPTION("QorIQ Thermal Monitoring Unit driver");
+MODULE_LICENSE("GPL v2");
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 7/7] thermal: qoriq: Add thermal management support
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: edubezval, rui.zhang, robh+dt, galak, scott.wood, shawnguo
Cc: devicetree, linux-pm, linux-kernel, hongtao.jia, linuxppc-dev,
linux-arm-kernel
This driver add thermal management support by enabling TMU (Thermal
Monitoring Unit) on QorIQ platform.
It's based on thermal of framework:
- Trip points defined in device tree.
- Cpufreq as cooling device registered in qoriq cpufreq driver.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
drivers/thermal/Kconfig | 9 ++
drivers/thermal/Makefile | 1 +
drivers/thermal/qoriq_thermal.c | 328 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 338 insertions(+)
create mode 100644 drivers/thermal/qoriq_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 2d702ca..bef26cd 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -195,6 +195,15 @@ config IMX_THERMAL
cpufreq is used as the cooling device to throttle CPUs when the
passive trip is crossed.
+config QORIQ_THERMAL
+ tristate "QorIQ Thermal Monitoring Unit"
+ depends on THERMAL_OF
+ help
+ Support for Thermal Monitoring Unit (TMU) found on QorIQ platforms.
+ It supports one critical trip point and one passive trip point. The
+ cpufreq is used as the cooling device to throttle CPUs when the
+ passive trip is crossed.
+
config SPEAR_THERMAL
tristate "SPEAr thermal sensor driver"
depends on PLAT_SPEAR || COMPILE_TEST
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 10b07c1..6662232 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
obj-$(CONFIG_TANGO_THERMAL) += tango_thermal.o
obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
+obj-$(CONFIG_QORIQ_THERMAL) += qoriq_thermal.o
obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
new file mode 100644
index 0000000..644ba52
--- /dev/null
+++ b/drivers/thermal/qoriq_thermal.c
@@ -0,0 +1,328 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/thermal.h>
+
+#include "thermal_core.h"
+
+#define SITES_MAX 16
+
+/*
+ * QorIQ TMU Registers
+ */
+struct qoriq_tmu_site_regs {
+ u32 tritsr; /* Immediate Temperature Site Register */
+ u32 tratsr; /* Average Temperature Site Register */
+ u8 res0[0x8];
+};
+
+struct qoriq_tmu_regs {
+ u32 tmr; /* Mode Register */
+#define TMR_DISABLE 0x0
+#define TMR_ME 0x80000000
+#define TMR_ALPF 0x0c000000
+ u32 tsr; /* Status Register */
+ u32 tmtmir; /* Temperature measurement interval Register */
+#define TMTMIR_DEFAULT 0x0000000f
+ u8 res0[0x14];
+ u32 tier; /* Interrupt Enable Register */
+#define TIER_DISABLE 0x0
+ u32 tidr; /* Interrupt Detect Register */
+ u32 tiscr; /* Interrupt Site Capture Register */
+ u32 ticscr; /* Interrupt Critical Site Capture Register */
+ u8 res1[0x10];
+ u32 tmhtcrh; /* High Temperature Capture Register */
+ u32 tmhtcrl; /* Low Temperature Capture Register */
+ u8 res2[0x8];
+ u32 tmhtitr; /* High Temperature Immediate Threshold */
+ u32 tmhtatr; /* High Temperature Average Threshold */
+ u32 tmhtactr; /* High Temperature Average Crit Threshold */
+ u8 res3[0x24];
+ u32 ttcfgr; /* Temperature Configuration Register */
+ u32 tscfgr; /* Sensor Configuration Register */
+ u8 res4[0x78];
+ struct qoriq_tmu_site_regs site[SITES_MAX];
+ u8 res5[0x9f8];
+ u32 ipbrr0; /* IP Block Revision Register 0 */
+ u32 ipbrr1; /* IP Block Revision Register 1 */
+ u8 res6[0x310];
+ u32 ttr0cr; /* Temperature Range 0 Control Register */
+ u32 ttr1cr; /* Temperature Range 1 Control Register */
+ u32 ttr2cr; /* Temperature Range 2 Control Register */
+ u32 ttr3cr; /* Temperature Range 3 Control Register */
+};
+
+/*
+ * Thermal zone data
+ */
+struct qoriq_tmu_data {
+ struct thermal_zone_device *tz;
+ struct qoriq_tmu_regs __iomem *regs;
+ int sensor_id;
+ bool little_endian;
+};
+
+static void tmu_write(struct qoriq_tmu_data *p, u32 val, void __iomem *addr)
+{
+ if (p->little_endian)
+ iowrite32(val, addr);
+ else
+ iowrite32be(val, addr);
+}
+
+static u32 tmu_read(struct qoriq_tmu_data *p, void __iomem *addr)
+{
+ if (p->little_endian)
+ return ioread32(addr);
+ else
+ return ioread32be(addr);
+}
+
+static int tmu_get_temp(void *p, int *temp)
+{
+ u32 val;
+ struct qoriq_tmu_data *data = p;
+
+ val = tmu_read(data, &data->regs->site[data->sensor_id].tritsr);
+ *temp = (val & 0xff) * 1000;
+
+ return 0;
+}
+
+static int qoriq_tmu_get_sensor_id(void)
+{
+ int ret, id;
+ struct of_phandle_args sensor_specs;
+ struct device_node *np, *sensor_np;
+
+ np = of_find_node_by_name(NULL, "thermal-zones");
+ if (!np)
+ return -ENODEV;
+
+ sensor_np = of_get_next_child(np, NULL);
+ ret = of_parse_phandle_with_args(sensor_np, "thermal-sensors",
+ "#thermal-sensor-cells",
+ 0, &sensor_specs);
+ if (ret) {
+ of_node_put(np);
+ of_node_put(sensor_np);
+ return ret;
+ }
+
+ if (sensor_specs.args_count >= 1) {
+ id = sensor_specs.args[0];
+ WARN(sensor_specs.args_count > 1,
+ "%s: too many cells in sensor specifier %d\n",
+ sensor_specs.np->name, sensor_specs.args_count);
+ } else {
+ id = 0;
+ }
+
+ of_node_put(np);
+ of_node_put(sensor_np);
+
+ return id;
+}
+
+static int qoriq_tmu_calibration(struct platform_device *pdev)
+{
+ int i, val, len;
+ u32 range[4];
+ const u32 *calibration;
+ struct device_node *np = pdev->dev.of_node;
+ struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
+
+ if (of_property_read_u32_array(np, "fsl,tmu-range", range, 4)) {
+ dev_err(&pdev->dev, "missing calibration range.\n");
+ return -ENODEV;
+ }
+
+ /* Init temperature range registers */
+ tmu_write(data, range[0], &data->regs->ttr0cr);
+ tmu_write(data, range[1], &data->regs->ttr1cr);
+ tmu_write(data, range[2], &data->regs->ttr2cr);
+ tmu_write(data, range[3], &data->regs->ttr3cr);
+
+ calibration = of_get_property(np, "fsl,tmu-calibration", &len);
+ if (calibration == NULL || len % 8) {
+ dev_err(&pdev->dev, "invalid calibration data.\n");
+ return -ENODEV;
+ }
+
+ for (i = 0; i < len; i += 8, calibration += 2) {
+ val = of_read_number(calibration, 1);
+ tmu_write(data, val, &data->regs->ttcfgr);
+ val = of_read_number(calibration + 1, 1);
+ tmu_write(data, val, &data->regs->tscfgr);
+ }
+
+ return 0;
+}
+
+static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
+{
+ /* Disable interrupt, using polling instead */
+ tmu_write(data, TIER_DISABLE, &data->regs->tier);
+
+ /* Set update_interval */
+ tmu_write(data, TMTMIR_DEFAULT, &data->regs->tmtmir);
+
+ /* Disable monitoring */
+ tmu_write(data, TMR_DISABLE, &data->regs->tmr);
+}
+
+static struct thermal_zone_of_device_ops tmu_tz_ops = {
+ .get_temp = tmu_get_temp,
+};
+
+static int qoriq_tmu_probe(struct platform_device *pdev)
+{
+ int ret;
+ const struct thermal_trip *trip;
+ struct qoriq_tmu_data *data;
+ struct device_node *np = pdev->dev.of_node;
+ u32 site = 0;
+
+ if (!np) {
+ dev_err(&pdev->dev, "Device OF-Node is NULL");
+ return -ENODEV;
+ }
+
+ data = devm_kzalloc(&pdev->dev, sizeof(struct qoriq_tmu_data),
+ GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, data);
+
+ data->little_endian = of_property_read_bool(np, "little-endian");
+
+ data->sensor_id = qoriq_tmu_get_sensor_id();
+ if (data->sensor_id < 0) {
+ dev_err(&pdev->dev, "Failed to get sensor id\n");
+ ret = -ENODEV;
+ goto err_iomap;
+ }
+
+ data->regs = of_iomap(np, 0);
+ if (!data->regs) {
+ dev_err(&pdev->dev, "Failed to get memory region\n");
+ ret = -ENODEV;
+ goto err_iomap;
+ }
+
+ qoriq_tmu_init_device(data); /* TMU initialization */
+
+ ret = qoriq_tmu_calibration(pdev); /* TMU calibration */
+ if (ret < 0)
+ goto err_tmu;
+
+ data->tz = thermal_zone_of_sensor_register(&pdev->dev, data->sensor_id,
+ data, &tmu_tz_ops);
+ if (IS_ERR(data->tz)) {
+ ret = PTR_ERR(data->tz);
+ dev_err(&pdev->dev,
+ "Failed to register thermal zone device %d\n", ret);
+ goto err_tmu;
+ }
+
+ trip = of_thermal_get_trip_points(data->tz);
+
+ /* Enable monitoring */
+ site |= 0x1 << (15 - data->sensor_id);
+ tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr);
+
+ return 0;
+
+err_tmu:
+ iounmap(data->regs);
+
+err_iomap:
+ platform_set_drvdata(pdev, NULL);
+
+ return ret;
+}
+
+static int qoriq_tmu_remove(struct platform_device *pdev)
+{
+ struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
+
+ thermal_zone_of_sensor_unregister(&pdev->dev, data->tz);
+
+ /* Disable monitoring */
+ tmu_write(data, TMR_DISABLE, &data->regs->tmr);
+
+ iounmap(data->regs);
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int qoriq_tmu_suspend(struct device *dev)
+{
+ u32 tmr;
+ struct qoriq_tmu_data *data = dev_get_drvdata(dev);
+
+ /* Disable monitoring */
+ tmr = tmu_read(data, &data->regs->tmr);
+ tmr &= ~TMR_ME;
+ tmu_write(data, tmr, &data->regs->tmr);
+
+ return 0;
+}
+
+static int qoriq_tmu_resume(struct device *dev)
+{
+ u32 tmr;
+ struct qoriq_tmu_data *data = dev_get_drvdata(dev);
+
+ /* Enable monitoring */
+ tmr = tmu_read(data, &data->regs->tmr);
+ tmr |= TMR_ME;
+ tmu_write(data, tmr, &data->regs->tmr);
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
+ qoriq_tmu_suspend, qoriq_tmu_resume);
+
+static const struct of_device_id qoriq_tmu_match[] = {
+ { .compatible = "fsl,qoriq-tmu", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
+
+static struct platform_driver qoriq_tmu = {
+ .driver = {
+ .name = "qoriq_thermal",
+ .pm = &qoriq_tmu_pm_ops,
+ .of_match_table = qoriq_tmu_match,
+ },
+ .probe = qoriq_tmu_probe,
+ .remove = qoriq_tmu_remove,
+};
+module_platform_driver(qoriq_tmu);
+
+MODULE_AUTHOR("Jia Hongtao <hongtao.jia@nxp.com>");
+MODULE_DESCRIPTION("QorIQ Thermal Monitoring Unit driver");
+MODULE_LICENSE("GPL v2");
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 7/7] thermal: qoriq: Add thermal management support
@ 2016-06-03 6:57 ` Jia Hongtao
0 siblings, 0 replies; 29+ messages in thread
From: Jia Hongtao @ 2016-06-03 6:57 UTC (permalink / raw)
To: linux-arm-kernel
This driver add thermal management support by enabling TMU (Thermal
Monitoring Unit) on QorIQ platform.
It's based on thermal of framework:
- Trip points defined in device tree.
- Cpufreq as cooling device registered in qoriq cpufreq driver.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
---
drivers/thermal/Kconfig | 9 ++
drivers/thermal/Makefile | 1 +
drivers/thermal/qoriq_thermal.c | 328 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 338 insertions(+)
create mode 100644 drivers/thermal/qoriq_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 2d702ca..bef26cd 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -195,6 +195,15 @@ config IMX_THERMAL
cpufreq is used as the cooling device to throttle CPUs when the
passive trip is crossed.
+config QORIQ_THERMAL
+ tristate "QorIQ Thermal Monitoring Unit"
+ depends on THERMAL_OF
+ help
+ Support for Thermal Monitoring Unit (TMU) found on QorIQ platforms.
+ It supports one critical trip point and one passive trip point. The
+ cpufreq is used as the cooling device to throttle CPUs when the
+ passive trip is crossed.
+
config SPEAR_THERMAL
tristate "SPEAr thermal sensor driver"
depends on PLAT_SPEAR || COMPILE_TEST
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 10b07c1..6662232 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
obj-$(CONFIG_TANGO_THERMAL) += tango_thermal.o
obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
+obj-$(CONFIG_QORIQ_THERMAL) += qoriq_thermal.o
obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
new file mode 100644
index 0000000..644ba52
--- /dev/null
+++ b/drivers/thermal/qoriq_thermal.c
@@ -0,0 +1,328 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/thermal.h>
+
+#include "thermal_core.h"
+
+#define SITES_MAX 16
+
+/*
+ * QorIQ TMU Registers
+ */
+struct qoriq_tmu_site_regs {
+ u32 tritsr; /* Immediate Temperature Site Register */
+ u32 tratsr; /* Average Temperature Site Register */
+ u8 res0[0x8];
+};
+
+struct qoriq_tmu_regs {
+ u32 tmr; /* Mode Register */
+#define TMR_DISABLE 0x0
+#define TMR_ME 0x80000000
+#define TMR_ALPF 0x0c000000
+ u32 tsr; /* Status Register */
+ u32 tmtmir; /* Temperature measurement interval Register */
+#define TMTMIR_DEFAULT 0x0000000f
+ u8 res0[0x14];
+ u32 tier; /* Interrupt Enable Register */
+#define TIER_DISABLE 0x0
+ u32 tidr; /* Interrupt Detect Register */
+ u32 tiscr; /* Interrupt Site Capture Register */
+ u32 ticscr; /* Interrupt Critical Site Capture Register */
+ u8 res1[0x10];
+ u32 tmhtcrh; /* High Temperature Capture Register */
+ u32 tmhtcrl; /* Low Temperature Capture Register */
+ u8 res2[0x8];
+ u32 tmhtitr; /* High Temperature Immediate Threshold */
+ u32 tmhtatr; /* High Temperature Average Threshold */
+ u32 tmhtactr; /* High Temperature Average Crit Threshold */
+ u8 res3[0x24];
+ u32 ttcfgr; /* Temperature Configuration Register */
+ u32 tscfgr; /* Sensor Configuration Register */
+ u8 res4[0x78];
+ struct qoriq_tmu_site_regs site[SITES_MAX];
+ u8 res5[0x9f8];
+ u32 ipbrr0; /* IP Block Revision Register 0 */
+ u32 ipbrr1; /* IP Block Revision Register 1 */
+ u8 res6[0x310];
+ u32 ttr0cr; /* Temperature Range 0 Control Register */
+ u32 ttr1cr; /* Temperature Range 1 Control Register */
+ u32 ttr2cr; /* Temperature Range 2 Control Register */
+ u32 ttr3cr; /* Temperature Range 3 Control Register */
+};
+
+/*
+ * Thermal zone data
+ */
+struct qoriq_tmu_data {
+ struct thermal_zone_device *tz;
+ struct qoriq_tmu_regs __iomem *regs;
+ int sensor_id;
+ bool little_endian;
+};
+
+static void tmu_write(struct qoriq_tmu_data *p, u32 val, void __iomem *addr)
+{
+ if (p->little_endian)
+ iowrite32(val, addr);
+ else
+ iowrite32be(val, addr);
+}
+
+static u32 tmu_read(struct qoriq_tmu_data *p, void __iomem *addr)
+{
+ if (p->little_endian)
+ return ioread32(addr);
+ else
+ return ioread32be(addr);
+}
+
+static int tmu_get_temp(void *p, int *temp)
+{
+ u32 val;
+ struct qoriq_tmu_data *data = p;
+
+ val = tmu_read(data, &data->regs->site[data->sensor_id].tritsr);
+ *temp = (val & 0xff) * 1000;
+
+ return 0;
+}
+
+static int qoriq_tmu_get_sensor_id(void)
+{
+ int ret, id;
+ struct of_phandle_args sensor_specs;
+ struct device_node *np, *sensor_np;
+
+ np = of_find_node_by_name(NULL, "thermal-zones");
+ if (!np)
+ return -ENODEV;
+
+ sensor_np = of_get_next_child(np, NULL);
+ ret = of_parse_phandle_with_args(sensor_np, "thermal-sensors",
+ "#thermal-sensor-cells",
+ 0, &sensor_specs);
+ if (ret) {
+ of_node_put(np);
+ of_node_put(sensor_np);
+ return ret;
+ }
+
+ if (sensor_specs.args_count >= 1) {
+ id = sensor_specs.args[0];
+ WARN(sensor_specs.args_count > 1,
+ "%s: too many cells in sensor specifier %d\n",
+ sensor_specs.np->name, sensor_specs.args_count);
+ } else {
+ id = 0;
+ }
+
+ of_node_put(np);
+ of_node_put(sensor_np);
+
+ return id;
+}
+
+static int qoriq_tmu_calibration(struct platform_device *pdev)
+{
+ int i, val, len;
+ u32 range[4];
+ const u32 *calibration;
+ struct device_node *np = pdev->dev.of_node;
+ struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
+
+ if (of_property_read_u32_array(np, "fsl,tmu-range", range, 4)) {
+ dev_err(&pdev->dev, "missing calibration range.\n");
+ return -ENODEV;
+ }
+
+ /* Init temperature range registers */
+ tmu_write(data, range[0], &data->regs->ttr0cr);
+ tmu_write(data, range[1], &data->regs->ttr1cr);
+ tmu_write(data, range[2], &data->regs->ttr2cr);
+ tmu_write(data, range[3], &data->regs->ttr3cr);
+
+ calibration = of_get_property(np, "fsl,tmu-calibration", &len);
+ if (calibration == NULL || len % 8) {
+ dev_err(&pdev->dev, "invalid calibration data.\n");
+ return -ENODEV;
+ }
+
+ for (i = 0; i < len; i += 8, calibration += 2) {
+ val = of_read_number(calibration, 1);
+ tmu_write(data, val, &data->regs->ttcfgr);
+ val = of_read_number(calibration + 1, 1);
+ tmu_write(data, val, &data->regs->tscfgr);
+ }
+
+ return 0;
+}
+
+static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
+{
+ /* Disable interrupt, using polling instead */
+ tmu_write(data, TIER_DISABLE, &data->regs->tier);
+
+ /* Set update_interval */
+ tmu_write(data, TMTMIR_DEFAULT, &data->regs->tmtmir);
+
+ /* Disable monitoring */
+ tmu_write(data, TMR_DISABLE, &data->regs->tmr);
+}
+
+static struct thermal_zone_of_device_ops tmu_tz_ops = {
+ .get_temp = tmu_get_temp,
+};
+
+static int qoriq_tmu_probe(struct platform_device *pdev)
+{
+ int ret;
+ const struct thermal_trip *trip;
+ struct qoriq_tmu_data *data;
+ struct device_node *np = pdev->dev.of_node;
+ u32 site = 0;
+
+ if (!np) {
+ dev_err(&pdev->dev, "Device OF-Node is NULL");
+ return -ENODEV;
+ }
+
+ data = devm_kzalloc(&pdev->dev, sizeof(struct qoriq_tmu_data),
+ GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, data);
+
+ data->little_endian = of_property_read_bool(np, "little-endian");
+
+ data->sensor_id = qoriq_tmu_get_sensor_id();
+ if (data->sensor_id < 0) {
+ dev_err(&pdev->dev, "Failed to get sensor id\n");
+ ret = -ENODEV;
+ goto err_iomap;
+ }
+
+ data->regs = of_iomap(np, 0);
+ if (!data->regs) {
+ dev_err(&pdev->dev, "Failed to get memory region\n");
+ ret = -ENODEV;
+ goto err_iomap;
+ }
+
+ qoriq_tmu_init_device(data); /* TMU initialization */
+
+ ret = qoriq_tmu_calibration(pdev); /* TMU calibration */
+ if (ret < 0)
+ goto err_tmu;
+
+ data->tz = thermal_zone_of_sensor_register(&pdev->dev, data->sensor_id,
+ data, &tmu_tz_ops);
+ if (IS_ERR(data->tz)) {
+ ret = PTR_ERR(data->tz);
+ dev_err(&pdev->dev,
+ "Failed to register thermal zone device %d\n", ret);
+ goto err_tmu;
+ }
+
+ trip = of_thermal_get_trip_points(data->tz);
+
+ /* Enable monitoring */
+ site |= 0x1 << (15 - data->sensor_id);
+ tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr);
+
+ return 0;
+
+err_tmu:
+ iounmap(data->regs);
+
+err_iomap:
+ platform_set_drvdata(pdev, NULL);
+
+ return ret;
+}
+
+static int qoriq_tmu_remove(struct platform_device *pdev)
+{
+ struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
+
+ thermal_zone_of_sensor_unregister(&pdev->dev, data->tz);
+
+ /* Disable monitoring */
+ tmu_write(data, TMR_DISABLE, &data->regs->tmr);
+
+ iounmap(data->regs);
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int qoriq_tmu_suspend(struct device *dev)
+{
+ u32 tmr;
+ struct qoriq_tmu_data *data = dev_get_drvdata(dev);
+
+ /* Disable monitoring */
+ tmr = tmu_read(data, &data->regs->tmr);
+ tmr &= ~TMR_ME;
+ tmu_write(data, tmr, &data->regs->tmr);
+
+ return 0;
+}
+
+static int qoriq_tmu_resume(struct device *dev)
+{
+ u32 tmr;
+ struct qoriq_tmu_data *data = dev_get_drvdata(dev);
+
+ /* Enable monitoring */
+ tmr = tmu_read(data, &data->regs->tmr);
+ tmr |= TMR_ME;
+ tmu_write(data, tmr, &data->regs->tmr);
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
+ qoriq_tmu_suspend, qoriq_tmu_resume);
+
+static const struct of_device_id qoriq_tmu_match[] = {
+ { .compatible = "fsl,qoriq-tmu", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
+
+static struct platform_driver qoriq_tmu = {
+ .driver = {
+ .name = "qoriq_thermal",
+ .pm = &qoriq_tmu_pm_ops,
+ .of_match_table = qoriq_tmu_match,
+ },
+ .probe = qoriq_tmu_probe,
+ .remove = qoriq_tmu_remove,
+};
+module_platform_driver(qoriq_tmu);
+
+MODULE_AUTHOR("Jia Hongtao <hongtao.jia@nxp.com>");
+MODULE_DESCRIPTION("QorIQ Thermal Monitoring Unit driver");
+MODULE_LICENSE("GPL v2");
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH 7/7] thermal: qoriq: Add thermal management support
2016-06-03 6:57 ` Jia Hongtao
(?)
@ 2016-06-05 17:51 ` kbuild test robot
-1 siblings, 0 replies; 29+ messages in thread
From: kbuild test robot @ 2016-06-05 17:51 UTC (permalink / raw)
To: Jia Hongtao
Cc: kbuild-all, edubezval, rui.zhang, robh+dt, galak, scott.wood,
shawnguo, linux-pm, devicetree, linux-kernel, linuxppc-dev,
linux-arm-kernel, hongtao.jia
[-- Attachment #1: Type: text/plain, Size: 1338 bytes --]
Hi,
[auto build test ERROR on v4.7-rc1]
[also build test ERROR on next-20160603]
[cannot apply to robh/for-next soc-thermal/next]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Jia-Hongtao/dt-bindings-Update-QorIQ-TMU-thermal-bindings/20160603-154428
config: um-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.1.1-1) 6.1.1 20160430
reproduce:
# save the attached .config to linux build tree
make ARCH=um
All errors (new ones prefixed by >>):
drivers/thermal/qoriq_thermal.c: In function 'qoriq_tmu_probe':
>> drivers/thermal/qoriq_thermal.c:255:2: error: implicit declaration of function 'iounmap' [-Werror=implicit-function-declaration]
iounmap(data->regs);
^~~~~~~
cc1: some warnings being treated as errors
vim +/iounmap +255 drivers/thermal/qoriq_thermal.c
249 site |= 0x1 << (15 - data->sensor_id);
250 tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr);
251
252 return 0;
253
254 err_tmu:
> 255 iounmap(data->regs);
256
257 err_iomap:
258 platform_set_drvdata(pdev, NULL);
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/octet-stream, Size: 18145 bytes --]
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 7/7] thermal: qoriq: Add thermal management support
@ 2016-06-05 17:51 ` kbuild test robot
0 siblings, 0 replies; 29+ messages in thread
From: kbuild test robot @ 2016-06-05 17:51 UTC (permalink / raw)
Cc: kbuild-all, edubezval, rui.zhang, robh+dt, galak, scott.wood,
shawnguo, linux-pm, devicetree, linux-kernel, linuxppc-dev,
linux-arm-kernel, hongtao.jia
[-- Attachment #1: Type: text/plain, Size: 1338 bytes --]
Hi,
[auto build test ERROR on v4.7-rc1]
[also build test ERROR on next-20160603]
[cannot apply to robh/for-next soc-thermal/next]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Jia-Hongtao/dt-bindings-Update-QorIQ-TMU-thermal-bindings/20160603-154428
config: um-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.1.1-1) 6.1.1 20160430
reproduce:
# save the attached .config to linux build tree
make ARCH=um
All errors (new ones prefixed by >>):
drivers/thermal/qoriq_thermal.c: In function 'qoriq_tmu_probe':
>> drivers/thermal/qoriq_thermal.c:255:2: error: implicit declaration of function 'iounmap' [-Werror=implicit-function-declaration]
iounmap(data->regs);
^~~~~~~
cc1: some warnings being treated as errors
vim +/iounmap +255 drivers/thermal/qoriq_thermal.c
249 site |= 0x1 << (15 - data->sensor_id);
250 tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr);
251
252 return 0;
253
254 err_tmu:
> 255 iounmap(data->regs);
256
257 err_iomap:
258 platform_set_drvdata(pdev, NULL);
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/octet-stream, Size: 18145 bytes --]
^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 7/7] thermal: qoriq: Add thermal management support
@ 2016-06-05 17:51 ` kbuild test robot
0 siblings, 0 replies; 29+ messages in thread
From: kbuild test robot @ 2016-06-05 17:51 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
[auto build test ERROR on v4.7-rc1]
[also build test ERROR on next-20160603]
[cannot apply to robh/for-next soc-thermal/next]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Jia-Hongtao/dt-bindings-Update-QorIQ-TMU-thermal-bindings/20160603-154428
config: um-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.1.1-1) 6.1.1 20160430
reproduce:
# save the attached .config to linux build tree
make ARCH=um
All errors (new ones prefixed by >>):
drivers/thermal/qoriq_thermal.c: In function 'qoriq_tmu_probe':
>> drivers/thermal/qoriq_thermal.c:255:2: error: implicit declaration of function 'iounmap' [-Werror=implicit-function-declaration]
iounmap(data->regs);
^~~~~~~
cc1: some warnings being treated as errors
vim +/iounmap +255 drivers/thermal/qoriq_thermal.c
249 site |= 0x1 << (15 - data->sensor_id);
250 tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr);
251
252 return 0;
253
254 err_tmu:
> 255 iounmap(data->regs);
256
257 err_iomap:
258 platform_set_drvdata(pdev, NULL);
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
-------------- next part --------------
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Size: 18145 bytes
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URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160606/66e2140f/attachment-0001.obj>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
2016-06-03 6:57 ` Jia Hongtao
@ 2016-06-06 13:47 ` Rob Herring
-1 siblings, 0 replies; 29+ messages in thread
From: Rob Herring @ 2016-06-06 13:47 UTC (permalink / raw)
To: Jia Hongtao
Cc: edubezval, rui.zhang, galak, scott.wood, shawnguo, devicetree,
linux-pm, linux-kernel, linuxppc-dev, linux-arm-kernel
On Fri, Jun 03, 2016 at 02:57:33PM +0800, Jia Hongtao wrote:
> For different types of SoC the sensor id and endianness may vary.
> "#thermal-sensor-cells" is used to provide sensor id information.
> "little-endian" property is to tell the endianness of TMU.
>
> Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
> ---
> .../devicetree/bindings/thermal/qoriq-thermal.txt | 19 +++++++++++++------
> 1 file changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> index 66223d5..8eeef80 100644
> --- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> @@ -1,22 +1,28 @@
> * Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
>
> Required properties:
> -- compatible : Must include "fsl,qoriq-tmu". The version of the device is
> +- compatible: Must include "fsl,qoriq-tmu". The version of the device is
Please split functional changes from formatting changes. This one seems
pretty pointless.
> determined by the TMU IP Block Revision Register (IPBRR0) at
> offset 0x0BF8.
> - Table of correspondences between IPBRR0 values and example chips:
> + Table of correspondences between IPBRR0 values and example chips:
> Value Device
> ---------- -----
> 0x01900102 T1040
> -- reg : Address range of TMU registers.
> -- interrupts : Contains the interrupt for TMU.
> -- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
> +- reg: Address range of TMU registers.
> +- interrupts: Contains the interrupt for TMU.
> +- fsl,tmu-range: The values to be programmed into TTRnCR, as specified by
> the SoC reference manual. The first cell is TTR0CR, the second is
> TTR1CR, etc.
> -- fsl,tmu-calibration : A list of cell pairs containing temperature
> +- fsl,tmu-calibration: A list of cell pairs containing temperature
> calibration data, as specified by the SoC reference manual.
> The first cell of each pair is the value to be written to TTCFGR,
> and the second is the value to be written to TSCFGR.
> +- #thermal-sensor-cells: Must be 1. The sensor specifier is the monitoring
> + site ID, and represents the "n" in TRITSRn and TRATSRn.
> +
> +Optional property:
> +- little-endian: If present, the TMU registers are little endian. If absent,
> + the default is big endian.
>
> Example:
>
> @@ -60,4 +66,5 @@ tmu@f0000 {
>
> 0x00030000 0x00000012
> 0x00030001 0x0000001d>;
> + #thermal-sensor-cells = <1>;
> };
> --
> 2.1.0.27.g96db324
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
@ 2016-06-06 13:47 ` Rob Herring
0 siblings, 0 replies; 29+ messages in thread
From: Rob Herring @ 2016-06-06 13:47 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jun 03, 2016 at 02:57:33PM +0800, Jia Hongtao wrote:
> For different types of SoC the sensor id and endianness may vary.
> "#thermal-sensor-cells" is used to provide sensor id information.
> "little-endian" property is to tell the endianness of TMU.
>
> Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
> ---
> .../devicetree/bindings/thermal/qoriq-thermal.txt | 19 +++++++++++++------
> 1 file changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> index 66223d5..8eeef80 100644
> --- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> @@ -1,22 +1,28 @@
> * Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
>
> Required properties:
> -- compatible : Must include "fsl,qoriq-tmu". The version of the device is
> +- compatible: Must include "fsl,qoriq-tmu". The version of the device is
Please split functional changes from formatting changes. This one seems
pretty pointless.
> determined by the TMU IP Block Revision Register (IPBRR0) at
> offset 0x0BF8.
> - Table of correspondences between IPBRR0 values and example chips:
> + Table of correspondences between IPBRR0 values and example chips:
> Value Device
> ---------- -----
> 0x01900102 T1040
> -- reg : Address range of TMU registers.
> -- interrupts : Contains the interrupt for TMU.
> -- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
> +- reg: Address range of TMU registers.
> +- interrupts: Contains the interrupt for TMU.
> +- fsl,tmu-range: The values to be programmed into TTRnCR, as specified by
> the SoC reference manual. The first cell is TTR0CR, the second is
> TTR1CR, etc.
> -- fsl,tmu-calibration : A list of cell pairs containing temperature
> +- fsl,tmu-calibration: A list of cell pairs containing temperature
> calibration data, as specified by the SoC reference manual.
> The first cell of each pair is the value to be written to TTCFGR,
> and the second is the value to be written to TSCFGR.
> +- #thermal-sensor-cells: Must be 1. The sensor specifier is the monitoring
> + site ID, and represents the "n" in TRITSRn and TRATSRn.
> +
> +Optional property:
> +- little-endian: If present, the TMU registers are little endian. If absent,
> + the default is big endian.
>
> Example:
>
> @@ -60,4 +66,5 @@ tmu at f0000 {
>
> 0x00030000 0x00000012
> 0x00030001 0x0000001d>;
> + #thermal-sensor-cells = <1>;
> };
> --
> 2.1.0.27.g96db324
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 29+ messages in thread
* 答复: [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
2016-06-06 13:47 ` Rob Herring
(?)
@ 2016-06-07 2:26 ` Hongtao Jia
-1 siblings, 0 replies; 29+ messages in thread
From: Hongtao Jia @ 2016-06-07 2:26 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, linux-pm, linuxppc-dev, linux-kernel, Scott Wood,
edubezval, galak, rui.zhang, shawnguo, linux-arm-kernel
> -----邮件原件-----
> 发件人: Rob Herring [mailto:robh@kernel.org]
> 发送时间: Monday, June 06, 2016 9:47 PM
> 收件人: Hongtao Jia <hongtao.jia@nxp.com>
> 抄送: edubezval@gmail.com; rui.zhang@intel.com; galak@codeaurora.org;
> Scott Wood <scott.wood@nxp.com>; shawnguo@kernel.org;
> devicetree@vger.kernel.org; linux-pm@vger.kernel.org; linux-
> kernel@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux-arm-
> kernel@lists.infradead.org
> 主题: Re: [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
>
> On Fri, Jun 03, 2016 at 02:57:33PM +0800, Jia Hongtao wrote:
> > For different types of SoC the sensor id and endianness may vary.
> > "#thermal-sensor-cells" is used to provide sensor id information.
> > "little-endian" property is to tell the endianness of TMU.
> >
> > Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
> > ---
> > .../devicetree/bindings/thermal/qoriq-thermal.txt | 19 +++++++++++++---
> ---
> > 1 file changed, 13 insertions(+), 6 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> > index 66223d5..8eeef80 100644
> > --- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> > +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> > @@ -1,22 +1,28 @@
> > * Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
> >
> > Required properties:
> > -- compatible : Must include "fsl,qoriq-tmu". The version of the device is
> > +- compatible: Must include "fsl,qoriq-tmu". The version of the device is
>
> Please split functional changes from formatting changes. This one seems
> pretty pointless.
I will remove formatting changes in the next version.
Thanks.
>
> > determined by the TMU IP Block Revision Register (IPBRR0) at
> > offset 0x0BF8.
> > - Table of correspondences between IPBRR0 values and example chips:
> > + Table of correspondences between IPBRR0 values and example chips:
> > Value Device
> > ---------- -----
> > 0x01900102 T1040
> > -- reg : Address range of TMU registers.
> > -- interrupts : Contains the interrupt for TMU.
> > -- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
> > +- reg: Address range of TMU registers.
> > +- interrupts: Contains the interrupt for TMU.
> > +- fsl,tmu-range: The values to be programmed into TTRnCR, as specified by
> > the SoC reference manual. The first cell is TTR0CR, the second is
> > TTR1CR, etc.
> > -- fsl,tmu-calibration : A list of cell pairs containing temperature
> > +- fsl,tmu-calibration: A list of cell pairs containing temperature
> > calibration data, as specified by the SoC reference manual.
> > The first cell of each pair is the value to be written to TTCFGR,
> > and the second is the value to be written to TSCFGR.
> > +- #thermal-sensor-cells: Must be 1. The sensor specifier is the monitoring
> > + site ID, and represents the "n" in TRITSRn and TRATSRn.
> > +
> > +Optional property:
> > +- little-endian: If present, the TMU registers are little endian. If absent,
> > + the default is big endian.
> >
> > Example:
> >
> > @@ -60,4 +66,5 @@ tmu@f0000 {
> >
> > 0x00030000 0x00000012
> > 0x00030001 0x0000001d>;
> > + #thermal-sensor-cells = <1>;
> > };
> > --
> > 2.1.0.27.g96db324
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 29+ messages in thread
* 答复: [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
@ 2016-06-07 2:26 ` Hongtao Jia
0 siblings, 0 replies; 29+ messages in thread
From: Hongtao Jia @ 2016-06-07 2:26 UTC (permalink / raw)
To: Rob Herring
Cc: edubezval, rui.zhang, galak, Scott Wood, shawnguo, devicetree,
linux-pm, linux-kernel, linuxppc-dev, linux-arm-kernel
DQo+IC0tLS0t08q8/tStvP4tLS0tLQ0KPiC3orz+yMs6IFJvYiBIZXJyaW5nIFttYWlsdG86cm9i
aEBrZXJuZWwub3JnXQ0KPiC3osvNyrG85DogTW9uZGF5LCBKdW5lIDA2LCAyMDE2IDk6NDcgUE0N
Cj4gytW8/sjLOiBIb25ndGFvIEppYSA8aG9uZ3Rhby5qaWFAbnhwLmNvbT4NCj4gs63LzTogZWR1
YmV6dmFsQGdtYWlsLmNvbTsgcnVpLnpoYW5nQGludGVsLmNvbTsgZ2FsYWtAY29kZWF1cm9yYS5v
cmc7DQo+IFNjb3R0IFdvb2QgPHNjb3R0Lndvb2RAbnhwLmNvbT47IHNoYXduZ3VvQGtlcm5lbC5v
cmc7DQo+IGRldmljZXRyZWVAdmdlci5rZXJuZWwub3JnOyBsaW51eC1wbUB2Z2VyLmtlcm5lbC5v
cmc7IGxpbnV4LQ0KPiBrZXJuZWxAdmdlci5rZXJuZWwub3JnOyBsaW51eHBwYy1kZXZAbGlzdHMu
b3psYWJzLm9yZzsgbGludXgtYXJtLQ0KPiBrZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZw0KPiDW
98ziOiBSZTogW1BBVENIIDEvN10gZHQtYmluZGluZ3M6IFVwZGF0ZSBRb3JJUSBUTVUgdGhlcm1h
bCBiaW5kaW5ncw0KPiANCj4gT24gRnJpLCBKdW4gMDMsIDIwMTYgYXQgMDI6NTc6MzNQTSArMDgw
MCwgSmlhIEhvbmd0YW8gd3JvdGU6DQo+ID4gRm9yIGRpZmZlcmVudCB0eXBlcyBvZiBTb0MgdGhl
IHNlbnNvciBpZCBhbmQgZW5kaWFubmVzcyBtYXkgdmFyeS4NCj4gPiAiI3RoZXJtYWwtc2Vuc29y
LWNlbGxzIiBpcyB1c2VkIHRvIHByb3ZpZGUgc2Vuc29yIGlkIGluZm9ybWF0aW9uLg0KPiA+ICJs
aXR0bGUtZW5kaWFuIiBwcm9wZXJ0eSBpcyB0byB0ZWxsIHRoZSBlbmRpYW5uZXNzIG9mIFRNVS4N
Cj4gPg0KPiA+IFNpZ25lZC1vZmYtYnk6IEppYSBIb25ndGFvIDxob25ndGFvLmppYUBueHAuY29t
Pg0KPiA+IC0tLQ0KPiA+ICAuLi4vZGV2aWNldHJlZS9iaW5kaW5ncy90aGVybWFsL3FvcmlxLXRo
ZXJtYWwudHh0ICAgICB8IDE5ICsrKysrKysrKysrKystLS0NCj4gLS0tDQo+ID4gIDEgZmlsZSBj
aGFuZ2VkLCAxMyBpbnNlcnRpb25zKCspLCA2IGRlbGV0aW9ucygtKQ0KPiA+DQo+ID4gZGlmZiAt
LWdpdCBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy90aGVybWFsL3FvcmlxLXRo
ZXJtYWwudHh0DQo+IGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3RoZXJtYWwv
cW9yaXEtdGhlcm1hbC50eHQNCj4gPiBpbmRleCA2NjIyM2Q1Li44ZWVlZjgwIDEwMDY0NA0KPiA+
IC0tLSBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy90aGVybWFsL3FvcmlxLXRo
ZXJtYWwudHh0DQo+ID4gKysrIGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3Ro
ZXJtYWwvcW9yaXEtdGhlcm1hbC50eHQNCj4gPiBAQCAtMSwyMiArMSwyOCBAQA0KPiA+ICAqIFRo
ZXJtYWwgTW9uaXRvcmluZyBVbml0IChUTVUpIG9uIEZyZWVzY2FsZSBRb3JJUSBTb0NzDQo+ID4N
Cj4gPiAgUmVxdWlyZWQgcHJvcGVydGllczoNCj4gPiAtLSBjb21wYXRpYmxlIDogTXVzdCBpbmNs
dWRlICJmc2wscW9yaXEtdG11Ii4gVGhlIHZlcnNpb24gb2YgdGhlIGRldmljZSBpcw0KPiA+ICst
IGNvbXBhdGlibGU6IE11c3QgaW5jbHVkZSAiZnNsLHFvcmlxLXRtdSIuIFRoZSB2ZXJzaW9uIG9m
IHRoZSBkZXZpY2UgaXMNCj4gDQo+IFBsZWFzZSBzcGxpdCBmdW5jdGlvbmFsIGNoYW5nZXMgZnJv
bSBmb3JtYXR0aW5nIGNoYW5nZXMuIFRoaXMgb25lIHNlZW1zDQo+IHByZXR0eSBwb2ludGxlc3Mu
DQoNCkkgd2lsbCByZW1vdmUgZm9ybWF0dGluZyBjaGFuZ2VzIGluIHRoZSBuZXh0IHZlcnNpb24u
DQpUaGFua3MuDQoNCj4gDQo+ID4gIAlkZXRlcm1pbmVkIGJ5IHRoZSBUTVUgSVAgQmxvY2sgUmV2
aXNpb24gUmVnaXN0ZXIgKElQQlJSMCkgYXQNCj4gPiAgCW9mZnNldCAweDBCRjguDQo+ID4gLQlU
YWJsZSBvZiBjb3JyZXNwb25kZW5jZXMgYmV0d2VlbiBJUEJSUjAgdmFsdWVzIGFuZCBleGFtcGxl
ICBjaGlwczoNCj4gPiArCVRhYmxlIG9mIGNvcnJlc3BvbmRlbmNlcyBiZXR3ZWVuIElQQlJSMCB2
YWx1ZXMgYW5kIGV4YW1wbGUgY2hpcHM6DQo+ID4gIAkJVmFsdWUgICAgICAgICAgIERldmljZQ0K
PiA+ICAJCS0tLS0tLS0tLS0gICAgICAtLS0tLQ0KPiA+ICAJCTB4MDE5MDAxMDIgICAgICBUMTA0
MA0KPiA+IC0tIHJlZyA6IEFkZHJlc3MgcmFuZ2Ugb2YgVE1VIHJlZ2lzdGVycy4NCj4gPiAtLSBp
bnRlcnJ1cHRzIDogQ29udGFpbnMgdGhlIGludGVycnVwdCBmb3IgVE1VLg0KPiA+IC0tIGZzbCx0
bXUtcmFuZ2UgOiBUaGUgdmFsdWVzIHRvIGJlIHByb2dyYW1tZWQgaW50byBUVFJuQ1IsIGFzIHNw
ZWNpZmllZCBieQ0KPiA+ICstIHJlZzogQWRkcmVzcyByYW5nZSBvZiBUTVUgcmVnaXN0ZXJzLg0K
PiA+ICstIGludGVycnVwdHM6IENvbnRhaW5zIHRoZSBpbnRlcnJ1cHQgZm9yIFRNVS4NCj4gPiAr
LSBmc2wsdG11LXJhbmdlOiBUaGUgdmFsdWVzIHRvIGJlIHByb2dyYW1tZWQgaW50byBUVFJuQ1Is
IGFzIHNwZWNpZmllZCBieQ0KPiA+ICAJdGhlIFNvQyByZWZlcmVuY2UgbWFudWFsLiBUaGUgZmly
c3QgY2VsbCBpcyBUVFIwQ1IsIHRoZSBzZWNvbmQgaXMNCj4gPiAgCVRUUjFDUiwgZXRjLg0KPiA+
IC0tIGZzbCx0bXUtY2FsaWJyYXRpb24gOiBBIGxpc3Qgb2YgY2VsbCBwYWlycyBjb250YWluaW5n
IHRlbXBlcmF0dXJlDQo+ID4gKy0gZnNsLHRtdS1jYWxpYnJhdGlvbjogQSBsaXN0IG9mIGNlbGwg
cGFpcnMgY29udGFpbmluZyB0ZW1wZXJhdHVyZQ0KPiA+ICAJY2FsaWJyYXRpb24gZGF0YSwgYXMg
c3BlY2lmaWVkIGJ5IHRoZSBTb0MgcmVmZXJlbmNlIG1hbnVhbC4NCj4gPiAgCVRoZSBmaXJzdCBj
ZWxsIG9mIGVhY2ggcGFpciBpcyB0aGUgdmFsdWUgdG8gYmUgd3JpdHRlbiB0byBUVENGR1IsDQo+
ID4gIAlhbmQgdGhlIHNlY29uZCBpcyB0aGUgdmFsdWUgdG8gYmUgd3JpdHRlbiB0byBUU0NGR1Iu
DQo+ID4gKy0gI3RoZXJtYWwtc2Vuc29yLWNlbGxzOiBNdXN0IGJlIDEuIFRoZSBzZW5zb3Igc3Bl
Y2lmaWVyIGlzIHRoZSBtb25pdG9yaW5nDQo+ID4gKwlzaXRlIElELCBhbmQgcmVwcmVzZW50cyB0
aGUgIm4iIGluIFRSSVRTUm4gYW5kIFRSQVRTUm4uDQo+ID4gKw0KPiA+ICtPcHRpb25hbCBwcm9w
ZXJ0eToNCj4gPiArLSBsaXR0bGUtZW5kaWFuOiBJZiBwcmVzZW50LCB0aGUgVE1VIHJlZ2lzdGVy
cyBhcmUgbGl0dGxlIGVuZGlhbi4gIElmIGFic2VudCwNCj4gPiArCXRoZSBkZWZhdWx0IGlzIGJp
ZyBlbmRpYW4uDQo+ID4NCj4gPiAgRXhhbXBsZToNCj4gPg0KPiA+IEBAIC02MCw0ICs2Niw1IEBA
IHRtdUBmMDAwMCB7DQo+ID4NCj4gPiAgCQkJICAgICAgIDB4MDAwMzAwMDAgMHgwMDAwMDAxMg0K
PiA+ICAJCQkgICAgICAgMHgwMDAzMDAwMSAweDAwMDAwMDFkPjsNCj4gPiArCSN0aGVybWFsLXNl
bnNvci1jZWxscyA9IDwxPjsNCj4gPiAgfTsNCj4gPiAtLQ0KPiA+IDIuMS4wLjI3Lmc5NmRiMzI0
DQo+ID4NCj4gPg0KPiA+IF9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
X19fX19fDQo+ID4gbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QNCj4gPiBsaW51eC1hcm0t
a2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcNCj4gPiBodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9y
Zy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwNCg==
^ permalink raw reply [flat|nested] 29+ messages in thread
* 答复: [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
@ 2016-06-07 2:26 ` Hongtao Jia
0 siblings, 0 replies; 29+ messages in thread
From: Hongtao Jia @ 2016-06-07 2:26 UTC (permalink / raw)
To: linux-arm-kernel
> -----????-----
> ???: Rob Herring [mailto:robh at kernel.org]
> ????: Monday, June 06, 2016 9:47 PM
> ???: Hongtao Jia <hongtao.jia@nxp.com>
> ??: edubezval at gmail.com; rui.zhang at intel.com; galak at codeaurora.org;
> Scott Wood <scott.wood@nxp.com>; shawnguo at kernel.org;
> devicetree at vger.kernel.org; linux-pm at vger.kernel.org; linux-
> kernel at vger.kernel.org; linuxppc-dev at lists.ozlabs.org; linux-arm-
> kernel at lists.infradead.org
> ??: Re: [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
>
> On Fri, Jun 03, 2016 at 02:57:33PM +0800, Jia Hongtao wrote:
> > For different types of SoC the sensor id and endianness may vary.
> > "#thermal-sensor-cells" is used to provide sensor id information.
> > "little-endian" property is to tell the endianness of TMU.
> >
> > Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
> > ---
> > .../devicetree/bindings/thermal/qoriq-thermal.txt | 19 +++++++++++++---
> ---
> > 1 file changed, 13 insertions(+), 6 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> > index 66223d5..8eeef80 100644
> > --- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> > +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> > @@ -1,22 +1,28 @@
> > * Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
> >
> > Required properties:
> > -- compatible : Must include "fsl,qoriq-tmu". The version of the device is
> > +- compatible: Must include "fsl,qoriq-tmu". The version of the device is
>
> Please split functional changes from formatting changes. This one seems
> pretty pointless.
I will remove formatting changes in the next version.
Thanks.
>
> > determined by the TMU IP Block Revision Register (IPBRR0) at
> > offset 0x0BF8.
> > - Table of correspondences between IPBRR0 values and example chips:
> > + Table of correspondences between IPBRR0 values and example chips:
> > Value Device
> > ---------- -----
> > 0x01900102 T1040
> > -- reg : Address range of TMU registers.
> > -- interrupts : Contains the interrupt for TMU.
> > -- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
> > +- reg: Address range of TMU registers.
> > +- interrupts: Contains the interrupt for TMU.
> > +- fsl,tmu-range: The values to be programmed into TTRnCR, as specified by
> > the SoC reference manual. The first cell is TTR0CR, the second is
> > TTR1CR, etc.
> > -- fsl,tmu-calibration : A list of cell pairs containing temperature
> > +- fsl,tmu-calibration: A list of cell pairs containing temperature
> > calibration data, as specified by the SoC reference manual.
> > The first cell of each pair is the value to be written to TTCFGR,
> > and the second is the value to be written to TSCFGR.
> > +- #thermal-sensor-cells: Must be 1. The sensor specifier is the monitoring
> > + site ID, and represents the "n" in TRITSRn and TRATSRn.
> > +
> > +Optional property:
> > +- little-endian: If present, the TMU registers are little endian. If absent,
> > + the default is big endian.
> >
> > Example:
> >
> > @@ -60,4 +66,5 @@ tmu at f0000 {
> >
> > 0x00030000 0x00000012
> > 0x00030001 0x0000001d>;
> > + #thermal-sensor-cells = <1>;
> > };
> > --
> > 2.1.0.27.g96db324
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 29+ messages in thread
end of thread, other threads:[~2016-06-07 2:43 UTC | newest]
Thread overview: 29+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-06-03 6:57 [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` [PATCH 2/7] powerpc/mpc85xx: Update TMU device tree node for T1040/T1042 Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` [PATCH 3/7] powerpc/mpc85xx: Update TMU device tree node for T1023/T1024 Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` [PATCH 4/7] arm:dt:ls1021a: Add TMU device tree support for LS1021A Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` [PATCH 5/7] arm64:dt:ls1043a: Add TMU device tree support for LS1043A Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` [PATCH 6/7] arm64:dt:ls2080a: Add TMU device tree support for LS2080A Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` [PATCH 7/7] thermal: qoriq: Add thermal management support Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-03 6:57 ` Jia Hongtao
2016-06-05 17:51 ` kbuild test robot
2016-06-05 17:51 ` kbuild test robot
2016-06-05 17:51 ` kbuild test robot
2016-06-06 13:47 ` [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings Rob Herring
2016-06-06 13:47 ` Rob Herring
2016-06-07 2:26 ` 答复: " Hongtao Jia
2016-06-07 2:26 ` Hongtao Jia
2016-06-07 2:26 ` Hongtao Jia
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