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From: Andrew Jones <drjones@redhat.com>
To: Alexander Gordeev <agordeev@redhat.com>
Cc: kvm@vger.kernel.org, Thomas Huth <thuth@redhat.com>
Subject: Re: [kvm-unit-tests PATCH v4 11/12] pci: Add pci-testdev PCI bus test device
Date: Mon, 6 Jun 2016 19:00:42 +0200	[thread overview]
Message-ID: <20160606170042.eg4fxrquvv2q77xd@hawk.localdomain> (raw)
In-Reply-To: <fdf72f01c5a4d54c9874d5f790ef06eb5f2ce2cd.1465214743.git.agordeev@redhat.com>

On Mon, Jun 06, 2016 at 02:46:40PM +0200, Alexander Gordeev wrote:
> Cc: Thomas Huth <thuth@redhat.com>
> Cc: Andrew Jones <drjones@redhat.com>
> Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
> ---
>  lib/pci-testdev.c | 184 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  lib/pci.h         |   7 +++
>  2 files changed, 191 insertions(+)
>  create mode 100644 lib/pci-testdev.c
> 
> diff --git a/lib/pci-testdev.c b/lib/pci-testdev.c
> new file mode 100644
> index 000000000000..32a4abe117b6
> --- /dev/null
> +++ b/lib/pci-testdev.c
> @@ -0,0 +1,184 @@
> +/*
> + * QEMU "pci-testdev" PCI test device
> + *
> + * Copyright (C) 2016, Red Hat Inc, Alexander Gordeev <agordeev@redhat.com>
> + *
> + * This work is licensed under the terms of the GNU LGPL, version 2.
> + */
> +#include "pci.h"
> +#include "asm/io.h"
> +
> +struct pci_testdev_ops {
> +	u8 (*io_readb)(const volatile void *addr);
> +	u16 (*io_readw)(const volatile void *addr);
> +	u32 (*io_readl)(const volatile void *addr);
> +	void (*io_writeb)(u8 value, volatile void *addr);
> +	void (*io_writew)(u16 value, volatile void *addr);
> +	void (*io_writel)(u32 value, volatile void *addr);
> +};
> +
> +static u8 pio_readb(const volatile void *addr)
> +{
> +	return inb((unsigned long)addr);
> +}
> +
> +static u16 pio_readw(const volatile void *addr)
> +{
> +	return inw((unsigned long)addr);
> +}
> +
> +static u32 pio_readl(const volatile void *addr)
> +{
> +	return inl((unsigned long)addr);
> +}
> +
> +static void pio_writeb(u8 value, volatile void *addr)
> +{
> +	outb(value, (unsigned long)addr);
> +}
> +
> +static void pio_writew(u16 value, volatile void *addr)
> +{
> +	outw(value, (unsigned long)addr);
> +}
> +
> +static void pio_writel(u32 value, volatile void *addr)
> +{
> +	outl(value, (unsigned long)addr);
> +}
> +
> +static struct pci_testdev_ops pci_testdev_io_ops = {
> +	.io_readb	= pio_readb,
> +	.io_readw	= pio_readw,
> +	.io_readl	= pio_readl,
> +	.io_writeb	= pio_writeb,
> +	.io_writew	= pio_writew,
> +	.io_writel	= pio_writel
> +};
> +
> +static u8 mmio_readb(const volatile void *addr)
> +{
> +	return *(const volatile u8 __force *)addr;
> +}
> +
> +static u16 mmio_readw(const volatile void *addr)
> +{
> +	return *(const volatile u16 __force *)addr;
> +}
> +
> +static u32 mmio_readl(const volatile void *addr)
> +{
> +	return *(const volatile u32 __force *)addr;
> +}
> +
> +static void mmio_writeb(u8 value, volatile void *addr)
> +{
> +	*(volatile u8 __force *)addr = value;
> +}
> +
> +static void mmio_writew(u16 value, volatile void *addr)
> +{
> +	*(volatile u16 __force *)addr = value;
> +}
> +
> +static void mmio_writel(u32 value, volatile void *addr)
> +{
> +	*(volatile u32 __force *)addr = value;
> +}
> +
> +static struct pci_testdev_ops pci_testdev_mem_ops = {
> +	.io_readb	= mmio_readb,
> +	.io_readw	= mmio_readw,
> +	.io_readl	= mmio_readl,
> +	.io_writeb	= mmio_writeb,
> +	.io_writew	= mmio_writew,
> +	.io_writel	= mmio_writel
> +};
> +
> +static bool pci_testdev_one(struct pci_test_dev_hdr *test,
> +			    int test_nr,
> +			    struct pci_testdev_ops *ops)
> +{
> +	u8 width;
> +	u32 count, sig, off;
> +	const int nr_writes = 16;
> +	int i;
> +
> +	ops->io_writeb(test_nr, &test->test);
> +	count = ops->io_readl(&test->count);
> +	if (count != 0)
> +		return false;
> +
> +	width = ops->io_readb(&test->width);
> +	if ((width != 1) && (width != 2) && (width != 4))

nit: no need for all the ()'s

> +		return false;
> +
> +	sig = ops->io_readl(&test->data);
> +	off = ops->io_readl(&test->offset);
> +
> +	for (i = 0; i < nr_writes; i++) {
> +		switch (width) {
> +		case 1: ops->io_writeb(sig, (void *)test + off); break;
> +		case 2: ops->io_writew(sig, (void *)test + off); break;
> +		case 4: ops->io_writel(sig, (void *)test + off); break;
> +		}
> +	}
> +
> +	return (int)ops->io_readl(&test->count) == nr_writes;
> +}
> +
> +void pci_testdev_print(struct pci_test_dev_hdr *test,
> +		       struct pci_testdev_ops *ops)
> +{
> +	bool io = (ops == &pci_testdev_io_ops);
> +	int i;
> +
> +	printf("pci-testdev %3s: ", io ? "io" : "mem");
> +	for (i = 0;; ++i) {
> +		char c = ops->io_readb(&test->name[i]);
> +		if (!c)
> +			break;
> +		printf("%c", c);
> +	}
> +	printf("\n");
> +}
> +
> +static int pci_testdev_all(struct pci_test_dev_hdr *test,
> +			   struct pci_testdev_ops *ops)
> +{
> +	int i;
> +
> +	for (i = 0;; i++) {
> +		if (!pci_testdev_one(test, i, ops))
> +			break;
> +		pci_testdev_print(test, ops);
> +	}
> +
> +	return i;
> +}
> +
> +int pci_testdev(void)
> +{
> +	phys_addr_t addr;
> +	void __iomem *mem, *io;
> +	pcidevaddr_t dev;
> +	int nr_tests = 0;
> +
> +	dev = pci_find_dev(PCI_VENDOR_ID_REDHAT, PCI_DEVICE_ID_REDHAT_TEST);
> +	if (dev == PCIDEVADDR_INVALID)
> +		return -1;
> +
> +	if (!pci_bar_is_valid(dev, 0) || !pci_bar_is_valid(dev, 1))
> +		return -1;
> +
> +	addr = pci_bar_get_addr(dev, 0);
> +	mem = ioremap(addr, 0);
> +
> +	addr = pci_bar_get_addr(dev, 1);
> +	io = (void *)(unsigned long)addr;
> +
> +	nr_tests += pci_testdev_all(mem, &pci_testdev_mem_ops);
> +	nr_tests += pci_testdev_all(io, &pci_testdev_io_ops);
> +
> +	return nr_tests;
> +}
> diff --git a/lib/pci.h b/lib/pci.h
> index 37b282169a4e..ee64ab315030 100644
> --- a/lib/pci.h
> +++ b/lib/pci.h
> @@ -39,6 +39,8 @@ bool pci_bar_is64(pcidevaddr_t dev, int bar_num);
>  bool pci_bar_is_memory(pcidevaddr_t dev, int bar_num);
>  bool pci_bar_is_valid(pcidevaddr_t dev, int bar_num);
>  
> +int pci_testdev(void);
> +
>  /*
>   * pci-testdev is a driver for the pci-testdev qemu pci device. The
>   * device enables testing mmio and portio exits, and measuring their
> @@ -47,7 +49,12 @@ bool pci_bar_is_valid(pcidevaddr_t dev, int bar_num);
>  #define PCI_VENDOR_ID_REDHAT		0x1b36
>  #define PCI_DEVICE_ID_REDHAT_TEST	0x0005
>  
> +/*
> + * pci-testdev supports at least three types of tests (via mmio and
> + * portio BARs): no-eventfd, wildcard-eventfd and datamatch-eventfd
> + */
>  #define PCI_TESTDEV_NUM_BARS		2
> +#define PCI_TESTDEV_NUM_TESTS		3
>  
>  struct pci_test_dev_hdr {
>  	uint8_t  test;
> -- 
> 1.8.3.1

Just one nit. Looks great.

Reviewed-by: Andrew Jones <drjones@redhat.com>

  reply	other threads:[~2016-06-06 17:00 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-06 12:46 [kvm-unit-tests PATCH v4 00/12] PCI bus support Alexander Gordeev
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 01/12] pci: Fix coding style in generic PCI files Alexander Gordeev
2016-06-06 13:22   ` Andrew Jones
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 02/12] pci: x86: Rename pci_config_read() to pci_config_readl() Alexander Gordeev
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 03/12] pci: x86: Add remaining PCI configuration space accessors Alexander Gordeev
2016-06-07  6:48   ` Thomas Huth
2016-06-08  6:21     ` Alexander Gordeev
2016-06-08 10:08       ` Andrew Jones
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 04/12] pci: Rework pci_bar_addr() Alexander Gordeev
2016-06-06 14:12   ` Andrew Jones
2016-06-07  6:38     ` Alexander Gordeev
2016-06-07  7:03       ` Andrew Jones
2016-06-07 10:33         ` Alexander Gordeev
2016-06-07 11:23           ` Alexander Gordeev
2016-06-07 14:10             ` Andrew Jones
2016-06-07 14:08           ` Andrew Jones
2016-06-07 20:00             ` Alexander Gordeev
2016-06-08 11:59               ` Andrew Jones
2016-06-09 20:41                 ` Alexander Gordeev
2016-06-10  7:14                   ` Andrew Jones
2016-06-07  6:55     ` Alexander Gordeev
2016-06-10 18:56     ` Alexander Gordeev
2016-06-12 13:41       ` Andrew Jones
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 05/12] pci: Factor out pci_bar_get() Alexander Gordeev
2016-06-06 15:19   ` Andrew Jones
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 06/12] pci: Add pci_bar_set_addr() Alexander Gordeev
2016-06-06 15:38   ` Andrew Jones
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 07/12] pci: Add pci_dev_exists() Alexander Gordeev
2016-06-06 15:40   ` Andrew Jones
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 08/12] pci: Add pci_print() Alexander Gordeev
2016-06-06 15:48   ` Andrew Jones
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 09/12] pci: Add generic ECAM host support Alexander Gordeev
2016-06-06 16:27   ` Andrew Jones
2016-06-08  6:36     ` Alexander Gordeev
2016-06-11 20:10     ` Alexander Gordeev
2016-06-12 13:42       ` Andrew Jones
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 10/12] arm/arm64: pci: Add PCI bus operation test Alexander Gordeev
2016-06-06 16:39   ` Andrew Jones
2016-06-08  6:53     ` Alexander Gordeev
2016-06-08 12:08       ` Andrew Jones
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 11/12] pci: Add pci-testdev PCI bus test device Alexander Gordeev
2016-06-06 17:00   ` Andrew Jones [this message]
2016-06-06 12:46 ` [kvm-unit-tests PATCH v4 12/12] arm/arm64: pci: Add pci-testdev PCI device operation test Alexander Gordeev
2016-06-06 17:04   ` Andrew Jones
2016-06-06 17:11 ` [kvm-unit-tests PATCH v4 00/12] PCI bus support Andrew Jones
2016-06-21  7:02   ` Alexander Gordeev
2016-06-27 12:59     ` Alexander Gordeev
2016-06-27 13:46       ` Andrew Jones
2016-06-28 10:54   ` Alexander Gordeev
2016-06-28 11:18     ` Andrew Jones
2016-06-28 11:28       ` Alexander Gordeev
2016-06-28 11:32         ` Andrew Jones
2016-06-28 11:56           ` Alexander Gordeev
2016-06-28 12:38             ` Andrew Jones
2016-06-28 13:04               ` Alexander Gordeev

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