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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	Mike Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Daniel Vetter <daniel.vetter@intel.com>,
	David Airlie <airlied@linux.ie>,
	Boris Brezillon <boris.brezillon@free-electrons.com>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>
Subject: Re: [PATCH 04/20] clk: sunxi: display: Add per-clock flags
Date: Fri, 10 Jun 2016 11:50:31 +0200	[thread overview]
Message-ID: <20160610095031.GT5242@lukather> (raw)
In-Reply-To: <CAGb2v66-GzV=1wrJnHBObLVPVHPk87o0PaJtNyYasp2wFsZabw@mail.gmail.com>

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On Mon, May 16, 2016 at 11:21:41PM +0800, Chen-Yu Tsai wrote:
> Hi,
> 
> On Mon, May 16, 2016 at 8:47 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > The TCON channel 0 clock that is the parent clock of our pixel clock is
> > expected to change its rate depending on the resolution we want to output
> > in our display engine.
> >
> > However, since it's only a mux, the only way it can do that is by changing
> > its parents rate.
> >
> > Allow to give flags in our display clocks description, and add the
> > CLK_SET_RATE_PARENT flag for the TCON channel 0 flag.
> >
> > Fixes: a3b4956ee6d9 ("clk: sunxi: display: Add per-clock flags")
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  drivers/clk/sunxi/clk-sun4i-display.c | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/sunxi/clk-sun4i-display.c b/drivers/clk/sunxi/clk-sun4i-display.c
> > index 445a7498d6df..9780fac6d029 100644
> > --- a/drivers/clk/sunxi/clk-sun4i-display.c
> > +++ b/drivers/clk/sunxi/clk-sun4i-display.c
> > @@ -33,6 +33,8 @@ struct sun4i_a10_display_clk_data {
> >
> >         u8      width_div;
> >         u8      width_mux;
> > +
> 
> Don't really need this separator, but I'm ok either way.
> 
> > +       u32     flags;
> >  };
> >
> >  struct reset_data {
> > @@ -166,7 +168,7 @@ static void __init sun4i_a10_display_init(struct device_node *node,
> >                                      data->has_div ? &div->hw : NULL,
> >                                      data->has_div ? &clk_divider_ops : NULL,
> >                                      &gate->hw, &clk_gate_ops,
> > -                                    0);
> > +                                    data->flags);
> >         if (IS_ERR(clk)) {
> >                 pr_err("%s: Couldn't register the clock\n", clk_name);
> >                 goto free_div;
> > @@ -232,6 +234,7 @@ static const struct sun4i_a10_display_clk_data sun4i_a10_tcon_ch0_data __initcon
> >         .offset_rst     = 29,
> >         .offset_mux     = 24,
> >         .width_mux      = 2,
> > +       .flags          = CLK_SET_RATE_PARENT,
> >  };
> >
> >  static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node)
> > --
> > 2.8.2
> >
> 
> Acked-by: Chen-Yu Tsai <wens@csie.org>

Applied,

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 04/20] clk: sunxi: display: Add per-clock flags
Date: Fri, 10 Jun 2016 11:50:31 +0200	[thread overview]
Message-ID: <20160610095031.GT5242@lukather> (raw)
In-Reply-To: <CAGb2v66-GzV=1wrJnHBObLVPVHPk87o0PaJtNyYasp2wFsZabw@mail.gmail.com>

On Mon, May 16, 2016 at 11:21:41PM +0800, Chen-Yu Tsai wrote:
> Hi,
> 
> On Mon, May 16, 2016 at 8:47 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > The TCON channel 0 clock that is the parent clock of our pixel clock is
> > expected to change its rate depending on the resolution we want to output
> > in our display engine.
> >
> > However, since it's only a mux, the only way it can do that is by changing
> > its parents rate.
> >
> > Allow to give flags in our display clocks description, and add the
> > CLK_SET_RATE_PARENT flag for the TCON channel 0 flag.
> >
> > Fixes: a3b4956ee6d9 ("clk: sunxi: display: Add per-clock flags")
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  drivers/clk/sunxi/clk-sun4i-display.c | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/sunxi/clk-sun4i-display.c b/drivers/clk/sunxi/clk-sun4i-display.c
> > index 445a7498d6df..9780fac6d029 100644
> > --- a/drivers/clk/sunxi/clk-sun4i-display.c
> > +++ b/drivers/clk/sunxi/clk-sun4i-display.c
> > @@ -33,6 +33,8 @@ struct sun4i_a10_display_clk_data {
> >
> >         u8      width_div;
> >         u8      width_mux;
> > +
> 
> Don't really need this separator, but I'm ok either way.
> 
> > +       u32     flags;
> >  };
> >
> >  struct reset_data {
> > @@ -166,7 +168,7 @@ static void __init sun4i_a10_display_init(struct device_node *node,
> >                                      data->has_div ? &div->hw : NULL,
> >                                      data->has_div ? &clk_divider_ops : NULL,
> >                                      &gate->hw, &clk_gate_ops,
> > -                                    0);
> > +                                    data->flags);
> >         if (IS_ERR(clk)) {
> >                 pr_err("%s: Couldn't register the clock\n", clk_name);
> >                 goto free_div;
> > @@ -232,6 +234,7 @@ static const struct sun4i_a10_display_clk_data sun4i_a10_tcon_ch0_data __initcon
> >         .offset_rst     = 29,
> >         .offset_mux     = 24,
> >         .width_mux      = 2,
> > +       .flags          = CLK_SET_RATE_PARENT,
> >  };
> >
> >  static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node)
> > --
> > 2.8.2
> >
> 
> Acked-by: Chen-Yu Tsai <wens@csie.org>

Applied,

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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  reply	other threads:[~2016-06-10  9:50 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-16 12:47 [PATCH 00/20] drm: Add Support for Passive RGB to VGA bridges Maxime Ripard
2016-05-16 12:47 ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 01/20] clk: fixed-factor: Pass clk rates change to the parent Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-06-10 12:30   ` Maxime Ripard
2016-06-10 12:30     ` Maxime Ripard
     [not found]   ` <1463402840-17062-2-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-06-17 23:05     ` Michael Turquette
2016-06-17 23:05       ` Michael Turquette
2016-06-17 23:05       ` Michael Turquette
2016-06-20  8:54       ` Maxime Ripard
2016-06-20  8:54         ` Maxime Ripard
2016-06-20  8:54         ` Maxime Ripard
2016-06-20 19:57         ` Michael Turquette
2016-06-20 19:57           ` Michael Turquette
2016-06-20 19:57           ` Michael Turquette
2016-05-16 12:47 ` [PATCH 03/20] clk: sunxi: tcon-ch1: Do not return a negative error in get_parent Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 16:05   ` Chen-Yu Tsai
2016-05-16 16:05     ` Chen-Yu Tsai
2016-06-10  9:50     ` Maxime Ripard
2016-06-10  9:50       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 04/20] clk: sunxi: display: Add per-clock flags Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 15:21   ` Chen-Yu Tsai
2016-05-16 15:21     ` Chen-Yu Tsai
2016-06-10  9:50     ` Maxime Ripard [this message]
2016-06-10  9:50       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 05/20] drm/sun4i: request exact rates to our parents Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 06/20] drm/sun4i: allow dclk to modify its parent rate Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 17:18   ` Chen-Yu Tsai
2016-05-16 17:18     ` Chen-Yu Tsai
2016-05-25 12:01     ` Maxime Ripard
2016-05-25 12:01       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 07/20] drm/sun4i: rgb: Validate the clock rate Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 08/20] drm/sun4i: rgb: panel is an error pointer Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-17  3:51   ` Chen-Yu Tsai
2016-05-17  3:51     ` Chen-Yu Tsai
2016-05-25 12:06     ` Maxime Ripard
2016-05-25 12:06       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 09/20] drm/sun4i: defer only if we didn't find our panel Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
     [not found]   ` <1463402840-17062-10-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-05-17  3:52     ` Chen-Yu Tsai
2016-05-17  3:52       ` Chen-Yu Tsai
2016-05-17  3:52       ` Chen-Yu Tsai
2016-05-25 12:09       ` Maxime Ripard
2016-05-25 12:09         ` Maxime Ripard
2016-05-25 12:09         ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 10/20] drm/sun4i: remove simplefb at probe Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 11/20] drm/sun4i: Convert to connector register helpers Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 12/20] drm/sun4i: Add bridge support Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 13:12   ` Daniel Vetter
2016-05-16 13:12     ` Daniel Vetter
2016-05-25 16:29     ` Maxime Ripard
2016-05-25 16:29       ` Maxime Ripard
2016-05-25 16:29       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 13/20] drm/bridge: Add RGB to VGA " Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 13:24   ` Laurent Pinchart
2016-05-16 13:24     ` Laurent Pinchart
2016-05-16 13:24     ` Laurent Pinchart
2016-05-26  8:53     ` Maxime Ripard
2016-05-26  8:53       ` Maxime Ripard
2016-05-26  9:16       ` Russell King - ARM Linux
2016-05-26  9:16         ` Russell King - ARM Linux
2016-05-16 14:07   ` Rob Herring
2016-05-16 14:07     ` Rob Herring
2016-05-16 14:07     ` Rob Herring
2016-05-26  9:38     ` Maxime Ripard
2016-05-26  9:38       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 14/20] ARM: sun5i: a13: Add LCD pins Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 17:13   ` Chen-Yu Tsai
2016-05-16 17:13     ` Chen-Yu Tsai
2016-05-25 12:33     ` Maxime Ripard
2016-05-25 12:33       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 16/20] ARM: sun5i: a13-olinuxino: Enable VGA bridge Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 17/20] ARM: multi_v7: Enable sun4i DRM driver Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-17  3:36   ` Chen-Yu Tsai
2016-05-17  3:36     ` Chen-Yu Tsai
2016-05-16 12:47 ` [PATCH 18/20] ARM: multi_v7: enable VGA bridge Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
     [not found] ` <1463402840-17062-1-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-05-16 12:47   ` [PATCH 02/20] clk: multiplier: Prevent the multiplier from under / over flowing Maxime Ripard
2016-05-16 12:47     ` Maxime Ripard
2016-05-16 12:47     ` Maxime Ripard
2016-06-10 12:31     ` Maxime Ripard
2016-06-10 12:31       ` Maxime Ripard
2016-06-20 20:50     ` Michael Turquette
2016-06-20 20:50       ` Michael Turquette
2016-06-20 20:50       ` Michael Turquette
2016-06-21  9:20       ` Maxime Ripard
2016-06-21  9:20         ` Maxime Ripard
2016-06-21  9:20         ` Maxime Ripard
2016-05-16 12:47   ` [PATCH 15/20] ARM: sun5i: Move display blocks to A13 Maxime Ripard
2016-05-16 12:47     ` Maxime Ripard
2016-05-16 12:47     ` Maxime Ripard
2016-05-16 12:47   ` [PATCH 19/20] ARM: sunxi: Enable sun4i DRM driver Maxime Ripard
2016-05-16 12:47     ` Maxime Ripard
2016-05-16 12:47     ` Maxime Ripard
2016-05-16 15:01     ` Chen-Yu Tsai
2016-05-16 15:01       ` Chen-Yu Tsai
2016-05-16 12:47   ` [PATCH 20/20] ARM: sunxi: Enable VGA bridge Maxime Ripard
2016-05-16 12:47     ` Maxime Ripard
2016-05-16 12:47     ` Maxime Ripard

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