From: Haozhong Zhang <haozhong.zhang@intel.com> To: qemu-devel@nongnu.org Cc: Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <rth@twiddle.net>, Eduardo Habkost <ehabkost@redhat.com>, "Michael S . Tsirkin" <mst@redhat.com>, Marcelo Tosatti <mtosatti@redhat.com>, kvm@vger.kernel.org, Boris Petkov <bp@suse.de>, Tony Luck <tony.luck@intel.com>, Andi Kleen <andi.kleen@intel.com>, rkrcmar@redhat.com, Ashok Raj <ashok.raj@intel.com>, Haozhong Zhang <haozhong.zhang@intel.com> Subject: [PATCH v5 3/4] target-i386: enable LMCE for '-cpu host' if supported by host Date: Wed, 22 Jun 2016 14:56:23 +0800 [thread overview] Message-ID: <20160622065624.25291-4-haozhong.zhang@intel.com> (raw) In-Reply-To: <20160622065624.25291-1-haozhong.zhang@intel.com> If -cpu host is used, LMCE will be automatically enabled when it's supported by host. Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> --- target-i386/cpu.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index cdab4f1..610554f 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1493,6 +1493,17 @@ static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w, #ifdef CONFIG_KVM +static bool lmce_supported(void) +{ + uint64_t mce_cap; + + if (kvm_ioctl(kvm_state, KVM_X86_GET_MCE_CAP_SUPPORTED, &mce_cap) < 0) { + return false; + } + + return !!(mce_cap & MCG_LMCE_P); +} + static int cpu_x86_fill_model_id(char *str) { uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; @@ -1565,6 +1576,10 @@ static void host_x86_cpu_initfn(Object *obj) env->cpuid_level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); env->cpuid_xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX); env->cpuid_xlevel2 = kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX); + + if (lmce_supported()) { + object_property_set_bool(OBJECT(cpu), true, "lmce", &error_abort); + } } object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort); -- 2.9.0
WARNING: multiple messages have this Message-ID (diff)
From: Haozhong Zhang <haozhong.zhang@intel.com> To: qemu-devel@nongnu.org Cc: Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <rth@twiddle.net>, Eduardo Habkost <ehabkost@redhat.com>, "Michael S . Tsirkin" <mst@redhat.com>, Marcelo Tosatti <mtosatti@redhat.com>, kvm@vger.kernel.org, Boris Petkov <bp@suse.de>, Tony Luck <tony.luck@intel.com>, Andi Kleen <andi.kleen@intel.com>, rkrcmar@redhat.com, Ashok Raj <ashok.raj@intel.com>, Haozhong Zhang <haozhong.zhang@intel.com> Subject: [Qemu-devel] [PATCH v5 3/4] target-i386: enable LMCE for '-cpu host' if supported by host Date: Wed, 22 Jun 2016 14:56:23 +0800 [thread overview] Message-ID: <20160622065624.25291-4-haozhong.zhang@intel.com> (raw) In-Reply-To: <20160622065624.25291-1-haozhong.zhang@intel.com> If -cpu host is used, LMCE will be automatically enabled when it's supported by host. Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> --- target-i386/cpu.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index cdab4f1..610554f 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1493,6 +1493,17 @@ static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w, #ifdef CONFIG_KVM +static bool lmce_supported(void) +{ + uint64_t mce_cap; + + if (kvm_ioctl(kvm_state, KVM_X86_GET_MCE_CAP_SUPPORTED, &mce_cap) < 0) { + return false; + } + + return !!(mce_cap & MCG_LMCE_P); +} + static int cpu_x86_fill_model_id(char *str) { uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; @@ -1565,6 +1576,10 @@ static void host_x86_cpu_initfn(Object *obj) env->cpuid_level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); env->cpuid_xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX); env->cpuid_xlevel2 = kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX); + + if (lmce_supported()) { + object_property_set_bool(OBJECT(cpu), true, "lmce", &error_abort); + } } object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort); -- 2.9.0
next prev parent reply other threads:[~2016-06-22 6:58 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-06-22 6:56 [PATCH v5 0/4] Add QEMU support for Intel local MCE Haozhong Zhang 2016-06-22 6:56 ` [Qemu-devel] " Haozhong Zhang 2016-06-22 6:56 ` [PATCH v5 1/4] target-i386: KVM: add basic Intel LMCE support Haozhong Zhang 2016-06-22 6:56 ` [Qemu-devel] " Haozhong Zhang 2016-07-07 17:04 ` Eduardo Habkost 2016-06-22 6:56 ` [PATCH v5 2/4] i386: publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg Haozhong Zhang 2016-06-22 6:56 ` [Qemu-devel] " Haozhong Zhang 2016-06-22 17:08 ` Paolo Bonzini 2016-06-22 17:08 ` [Qemu-devel] " Paolo Bonzini 2016-06-23 6:08 ` Haozhong Zhang 2016-06-23 6:08 ` [Qemu-devel] " Haozhong Zhang 2016-06-23 6:15 ` [RESEND PATCH " Haozhong Zhang 2016-06-23 6:15 ` [Qemu-devel] " Haozhong Zhang 2016-07-07 17:06 ` Eduardo Habkost 2016-06-22 6:56 ` Haozhong Zhang [this message] 2016-06-22 6:56 ` [Qemu-devel] [PATCH v5 3/4] target-i386: enable LMCE for '-cpu host' if supported by host Haozhong Zhang 2016-07-07 17:05 ` Eduardo Habkost 2016-06-22 6:56 ` [PATCH v5 4/4] target-i386: abort migration if LMCE config mismatch Haozhong Zhang 2016-06-22 6:56 ` [Qemu-devel] " Haozhong Zhang 2016-07-07 17:10 ` Eduardo Habkost 2016-07-08 2:41 ` Haozhong Zhang 2016-07-06 8:26 ` [Qemu-devel] [PATCH v5 0/4] Add QEMU support for Intel local MCE Laszlo Ersek 2016-07-06 8:35 ` Haozhong Zhang 2016-07-06 8:37 ` Laszlo Ersek
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