[PATCH 0/4] Get kexec working on SMP omap variants

[PATCH 0/4] Get kexec working on SMP omap variants

[Tony Lindgren]

Hi all,

Here are some patches to make kexec work for SMP omaps. To test
these you need to use the latest kexec-tools.git kexec with
Russell's recent patches in "[PATCH 0/2] Simple fix to the ARM
kexec tools implementation" thread fixed for 6x. Or else you
need to use appended DTB.

I've tested these so far on 4430 duovero, omap5-uevm, and
beagle-x15.

Regards,

Tony


Tony Lindgren (4):
  ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for
    kexec
  ARM: OMAP4+: Prevent CPU1 related hang with kexec
  ARM: OMAP4+: Reset CPU1 properly for kexec
  ARM: OMAP4+: Allow kexec on SMP variants

 arch/arm/mach-omap2/Makefile              |  4 +-
 arch/arm/mach-omap2/common.h              |  8 ++-
 arch/arm/mach-omap2/io.c                  |  3 +
 arch/arm/mach-omap2/omap-hotplug.c        |  6 ++
 arch/arm/mach-omap2/omap-mpuss-lowpower.c | 29 ++++++++--
 arch/arm/mach-omap2/omap-smp.c            | 96 ++++++++++++++++++++++---------
 arch/arm/mach-omap2/omap4-common.c        | 14 ++---
 7 files changed, 118 insertions(+), 42 deletions(-)

-- 
2.8.1

[PATCH 0/4] Get kexec working on SMP omap variants

[Tony Lindgren]

Hi all,

Here are some patches to make kexec work for SMP omaps. To test
these you need to use the latest kexec-tools.git kexec with
Russell's recent patches in "[PATCH 0/2] Simple fix to the ARM
kexec tools implementation" thread fixed for 6x. Or else you
need to use appended DTB.

I've tested these so far on 4430 duovero, omap5-uevm, and
beagle-x15.

Regards,

Tony


Tony Lindgren (4):
  ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for
    kexec
  ARM: OMAP4+: Prevent CPU1 related hang with kexec
  ARM: OMAP4+: Reset CPU1 properly for kexec
  ARM: OMAP4+: Allow kexec on SMP variants

 arch/arm/mach-omap2/Makefile              |  4 +-
 arch/arm/mach-omap2/common.h              |  8 ++-
 arch/arm/mach-omap2/io.c                  |  3 +
 arch/arm/mach-omap2/omap-hotplug.c        |  6 ++
 arch/arm/mach-omap2/omap-mpuss-lowpower.c | 29 ++++++++--
 arch/arm/mach-omap2/omap-smp.c            | 96 ++++++++++++++++++++++---------
 arch/arm/mach-omap2/omap4-common.c        | 14 ++---
 7 files changed, 118 insertions(+), 42 deletions(-)

-- 
2.8.1

[PATCH 1/4] ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for kexec

[Tony Lindgren]

Prepare things for making kexec work on SMP omap variants by initializing
SARM RAM base early. This allows us to configure CPU1 for kexec in case
the previous kernel has put CPU1 in low power mode.

Note that this should not prevent moving other SAR RAM code to live
under drivers. However for kexec, we will need this very early.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/common.h       |  1 +
 arch/arm/mach-omap2/io.c           |  2 ++
 arch/arm/mach-omap2/omap4-common.c | 14 ++++++--------
 3 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index f7666b9..9cbae6e 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -257,6 +257,7 @@ extern void gic_dist_enable(void);
 extern bool gic_dist_disabled(void);
 extern void gic_timer_retrigger(void);
 extern void omap_smc1(u32 fn, u32 arg);
+extern void omap4_sar_ram_init(void);
 extern void __iomem *omap4_get_sar_ram_base(void);
 extern void omap_do_wfi(void);
 
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 49de4dd..4548cb9 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -690,6 +690,7 @@ void __init omap4430_init_early(void)
 	omap4xxx_check_revision();
 	omap4xxx_check_features();
 	omap2_prcm_base_init();
+	omap4_sar_ram_init();
 	omap4_pm_init_early();
 	omap44xx_voltagedomains_init();
 	omap44xx_powerdomains_init();
@@ -718,6 +719,7 @@ void __init omap5_init_early(void)
 	omap4_pm_init_early();
 	omap2_prcm_base_init();
 	omap5xxx_check_revision();
+	omap4_sar_ram_init();
 	omap54xx_voltagedomains_init();
 	omap54xx_powerdomains_init();
 	omap54xx_clockdomains_init();
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index fb6fe26..cf65ab8 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -266,10 +266,11 @@ void __iomem *omap4_get_sar_ram_base(void)
 }
 
 /*
- * SAR RAM used to save and restore the HW
- * context in low power modes
+ * SAR RAM used to save and restore the HW context in low power modes.
+ * Note that we need to initialize this very early for kexec. See
+ * omap4_mpuss_early_init().
  */
-static int __init omap4_sar_ram_init(void)
+void __init omap4_sar_ram_init(void)
 {
 	unsigned long sar_base;
 
@@ -282,16 +283,13 @@ static int __init omap4_sar_ram_init(void)
 	else if (soc_is_omap54xx())
 		sar_base = OMAP54XX_SAR_RAM_BASE;
 	else
-		return -ENOMEM;
+		return;
 
 	/* Static mapping, never released */
 	sar_ram_base = ioremap(sar_base, SZ_16K);
 	if (WARN_ON(!sar_ram_base))
-		return -ENOMEM;
-
-	return 0;
+		return;
 }
-omap_early_initcall(omap4_sar_ram_init);
 
 static const struct of_device_id intc_match[] = {
 	{ .compatible = "ti,omap4-wugen-mpu", },
-- 
2.8.1

[PATCH 1/4] ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for kexec

[Tony Lindgren]

Prepare things for making kexec work on SMP omap variants by initializing
SARM RAM base early. This allows us to configure CPU1 for kexec in case
the previous kernel has put CPU1 in low power mode.

Note that this should not prevent moving other SAR RAM code to live
under drivers. However for kexec, we will need this very early.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/common.h       |  1 +
 arch/arm/mach-omap2/io.c           |  2 ++
 arch/arm/mach-omap2/omap4-common.c | 14 ++++++--------
 3 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index f7666b9..9cbae6e 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -257,6 +257,7 @@ extern void gic_dist_enable(void);
 extern bool gic_dist_disabled(void);
 extern void gic_timer_retrigger(void);
 extern void omap_smc1(u32 fn, u32 arg);
+extern void omap4_sar_ram_init(void);
 extern void __iomem *omap4_get_sar_ram_base(void);
 extern void omap_do_wfi(void);
 
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 49de4dd..4548cb9 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -690,6 +690,7 @@ void __init omap4430_init_early(void)
 	omap4xxx_check_revision();
 	omap4xxx_check_features();
 	omap2_prcm_base_init();
+	omap4_sar_ram_init();
 	omap4_pm_init_early();
 	omap44xx_voltagedomains_init();
 	omap44xx_powerdomains_init();
@@ -718,6 +719,7 @@ void __init omap5_init_early(void)
 	omap4_pm_init_early();
 	omap2_prcm_base_init();
 	omap5xxx_check_revision();
+	omap4_sar_ram_init();
 	omap54xx_voltagedomains_init();
 	omap54xx_powerdomains_init();
 	omap54xx_clockdomains_init();
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index fb6fe26..cf65ab8 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -266,10 +266,11 @@ void __iomem *omap4_get_sar_ram_base(void)
 }
 
 /*
- * SAR RAM used to save and restore the HW
- * context in low power modes
+ * SAR RAM used to save and restore the HW context in low power modes.
+ * Note that we need to initialize this very early for kexec. See
+ * omap4_mpuss_early_init().
  */
-static int __init omap4_sar_ram_init(void)
+void __init omap4_sar_ram_init(void)
 {
 	unsigned long sar_base;
 
@@ -282,16 +283,13 @@ static int __init omap4_sar_ram_init(void)
 	else if (soc_is_omap54xx())
 		sar_base = OMAP54XX_SAR_RAM_BASE;
 	else
-		return -ENOMEM;
+		return;
 
 	/* Static mapping, never released */
 	sar_ram_base = ioremap(sar_base, SZ_16K);
 	if (WARN_ON(!sar_ram_base))
-		return -ENOMEM;
-
-	return 0;
+		return;
 }
-omap_early_initcall(omap4_sar_ram_init);
 
 static const struct of_device_id intc_match[] = {
 	{ .compatible = "ti,omap4-wugen-mpu", },
-- 
2.8.1

[PATCH 2/4] ARM: OMAP4+: Prevent CPU1 related hang with kexec

[Tony Lindgren]

Kexec booted kernels on omap4 will hang early during the boot if the
booted kernel is different version from the previous kernel.

This is because the previous kernel may have configured low-power mode
using CPU1_WAKEUP_NS_PA_ADDR. In that case it points to the previous
kernel's omap4_secondary_startup(), and CPU1 can be in low power mode
from the previous kernel. When the new kernel configures the CPU1
clockdomain, CPU1 can wake from low power state prematurely during
omap44xx_clockdomains_init() running random code.

Let's fix the issue by configuring CPU1_WAKEUP_NS_PA_ADDR before we
call omap44xx_clockdomains_init(). Note that this is very early during
the init, and we will do proper CPU1 reset during SMP init a bit later
on in omap4_smp_prepare_cpus(). And we need to do this when SMP is
not enabled as the previous kernel may have had it enabled.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/Makefile              |  4 ++--
 arch/arm/mach-omap2/common.h              |  6 ++++--
 arch/arm/mach-omap2/io.c                  |  1 +
 arch/arm/mach-omap2/omap-mpuss-lowpower.c | 29 +++++++++++++++++++++++++----
 4 files changed, 32 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 04e276c..cd820f5 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -8,7 +8,7 @@ ccflags-y := -I$(srctree)/$(src)/include \
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o timer.o pm.o \
 	 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
-	 omap_device.o sram.o drm.o
+	 omap_device.o omap-headsmp.o sram.o drm.o
 
 hwmod-common				= omap_hwmod.o omap_hwmod_reset.o \
 					  omap_hwmod_common_data.o
@@ -32,7 +32,7 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC)	+= sdrc.o
 
 # SMP support ONLY available for OMAP4
 
-smp-$(CONFIG_SMP)			+= omap-smp.o omap-headsmp.o
+smp-$(CONFIG_SMP)			+= omap-smp.o
 smp-$(CONFIG_HOTPLUG_CPU)		+= omap-hotplug.o
 omap-4-5-common				=  omap4-common.o omap-wakeupgen.o
 obj-$(CONFIG_ARCH_OMAP4)		+= $(omap-4-5-common) $(smp-y) sleep44xx.o
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 9cbae6e..0136405 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -259,12 +259,14 @@ extern void gic_timer_retrigger(void);
 extern void omap_smc1(u32 fn, u32 arg);
 extern void omap4_sar_ram_init(void);
 extern void __iomem *omap4_get_sar_ram_base(void);
+extern void omap4_mpuss_early_init(void);
 extern void omap_do_wfi(void);
 
-#ifdef CONFIG_SMP
-/* Needed for secondary core boot */
 extern void omap4_secondary_startup(void);
 extern void omap4460_secondary_startup(void);
+
+#ifdef CONFIG_SMP
+/* Needed for secondary core boot */
 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
 extern void omap_auxcoreboot_addr(u32 cpu_addr);
 extern u32 omap_read_auxcoreboot0(void);
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4548cb9..0e9acdd 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -691,6 +691,7 @@ void __init omap4430_init_early(void)
 	omap4xxx_check_features();
 	omap2_prcm_base_init();
 	omap4_sar_ram_init();
+	omap4_mpuss_early_init();
 	omap4_pm_init_early();
 	omap44xx_voltagedomains_init();
 	omap44xx_powerdomains_init();
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 65024af..1751517 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -62,6 +62,8 @@
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
 
+static void __iomem *sar_base;
+
 #ifdef CONFIG_SMP
 
 struct omap4_cpu_pm_info {
@@ -90,7 +92,6 @@ struct cpu_pm_ops {
 
 static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
 static struct powerdomain *mpuss_pd;
-static void __iomem *sar_base;
 static u32 cpu_context_offset;
 
 static int default_finish_suspend(unsigned long cpu_state)
@@ -366,9 +367,6 @@ int __init omap4_mpuss_init(void)
 		return -ENODEV;
 	}
 
-	if (cpu_is_omap44xx())
-		sar_base = omap4_get_sar_ram_base();
-
 	/* Initilaise per CPU PM information */
 	pm_info = &per_cpu(omap4_pm_info, 0x0);
 	if (sar_base) {
@@ -444,3 +442,26 @@ int __init omap4_mpuss_init(void)
 }
 
 #endif
+
+/*
+ * For kexec, we must set CPU1_WAKEUP_NS_PA_ADDR to point to
+ * current kernel's secondary_startup() early before
+ * clockdomains_init(). Otherwise clockdomain_init() can
+ * wake CPU1 and cause a hang.
+ */
+void __init omap4_mpuss_early_init(void)
+{
+	unsigned long startup_pa;
+
+	if (!cpu_is_omap44xx())
+		return;
+
+	sar_base = omap4_get_sar_ram_base();
+
+	if (cpu_is_omap443x())
+		startup_pa = virt_to_phys(omap4_secondary_startup);
+	else
+		startup_pa = virt_to_phys(omap4460_secondary_startup);
+
+	writel_relaxed(startup_pa, sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
+}
-- 
2.8.1

[PATCH 2/4] ARM: OMAP4+: Prevent CPU1 related hang with kexec

[Tony Lindgren]

Kexec booted kernels on omap4 will hang early during the boot if the
booted kernel is different version from the previous kernel.

This is because the previous kernel may have configured low-power mode
using CPU1_WAKEUP_NS_PA_ADDR. In that case it points to the previous
kernel's omap4_secondary_startup(), and CPU1 can be in low power mode
from the previous kernel. When the new kernel configures the CPU1
clockdomain, CPU1 can wake from low power state prematurely during
omap44xx_clockdomains_init() running random code.

Let's fix the issue by configuring CPU1_WAKEUP_NS_PA_ADDR before we
call omap44xx_clockdomains_init(). Note that this is very early during
the init, and we will do proper CPU1 reset during SMP init a bit later
on in omap4_smp_prepare_cpus(). And we need to do this when SMP is
not enabled as the previous kernel may have had it enabled.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/Makefile              |  4 ++--
 arch/arm/mach-omap2/common.h              |  6 ++++--
 arch/arm/mach-omap2/io.c                  |  1 +
 arch/arm/mach-omap2/omap-mpuss-lowpower.c | 29 +++++++++++++++++++++++++----
 4 files changed, 32 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 04e276c..cd820f5 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -8,7 +8,7 @@ ccflags-y := -I$(srctree)/$(src)/include \
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o timer.o pm.o \
 	 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
-	 omap_device.o sram.o drm.o
+	 omap_device.o omap-headsmp.o sram.o drm.o
 
 hwmod-common				= omap_hwmod.o omap_hwmod_reset.o \
 					  omap_hwmod_common_data.o
@@ -32,7 +32,7 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC)	+= sdrc.o
 
 # SMP support ONLY available for OMAP4
 
-smp-$(CONFIG_SMP)			+= omap-smp.o omap-headsmp.o
+smp-$(CONFIG_SMP)			+= omap-smp.o
 smp-$(CONFIG_HOTPLUG_CPU)		+= omap-hotplug.o
 omap-4-5-common				=  omap4-common.o omap-wakeupgen.o
 obj-$(CONFIG_ARCH_OMAP4)		+= $(omap-4-5-common) $(smp-y) sleep44xx.o
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 9cbae6e..0136405 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -259,12 +259,14 @@ extern void gic_timer_retrigger(void);
 extern void omap_smc1(u32 fn, u32 arg);
 extern void omap4_sar_ram_init(void);
 extern void __iomem *omap4_get_sar_ram_base(void);
+extern void omap4_mpuss_early_init(void);
 extern void omap_do_wfi(void);
 
-#ifdef CONFIG_SMP
-/* Needed for secondary core boot */
 extern void omap4_secondary_startup(void);
 extern void omap4460_secondary_startup(void);
+
+#ifdef CONFIG_SMP
+/* Needed for secondary core boot */
 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
 extern void omap_auxcoreboot_addr(u32 cpu_addr);
 extern u32 omap_read_auxcoreboot0(void);
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4548cb9..0e9acdd 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -691,6 +691,7 @@ void __init omap4430_init_early(void)
 	omap4xxx_check_features();
 	omap2_prcm_base_init();
 	omap4_sar_ram_init();
+	omap4_mpuss_early_init();
 	omap4_pm_init_early();
 	omap44xx_voltagedomains_init();
 	omap44xx_powerdomains_init();
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 65024af..1751517 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -62,6 +62,8 @@
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
 
+static void __iomem *sar_base;
+
 #ifdef CONFIG_SMP
 
 struct omap4_cpu_pm_info {
@@ -90,7 +92,6 @@ struct cpu_pm_ops {
 
 static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
 static struct powerdomain *mpuss_pd;
-static void __iomem *sar_base;
 static u32 cpu_context_offset;
 
 static int default_finish_suspend(unsigned long cpu_state)
@@ -366,9 +367,6 @@ int __init omap4_mpuss_init(void)
 		return -ENODEV;
 	}
 
-	if (cpu_is_omap44xx())
-		sar_base = omap4_get_sar_ram_base();
-
 	/* Initilaise per CPU PM information */
 	pm_info = &per_cpu(omap4_pm_info, 0x0);
 	if (sar_base) {
@@ -444,3 +442,26 @@ int __init omap4_mpuss_init(void)
 }
 
 #endif
+
+/*
+ * For kexec, we must set CPU1_WAKEUP_NS_PA_ADDR to point to
+ * current kernel's secondary_startup() early before
+ * clockdomains_init(). Otherwise clockdomain_init() can
+ * wake CPU1 and cause a hang.
+ */
+void __init omap4_mpuss_early_init(void)
+{
+	unsigned long startup_pa;
+
+	if (!cpu_is_omap44xx())
+		return;
+
+	sar_base = omap4_get_sar_ram_base();
+
+	if (cpu_is_omap443x())
+		startup_pa = virt_to_phys(omap4_secondary_startup);
+	else
+		startup_pa = virt_to_phys(omap4460_secondary_startup);
+
+	writel_relaxed(startup_pa, sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
+}
-- 
2.8.1

[PATCH 3/4] ARM: OMAP4+: Reset CPU1 properly for kexec

[Tony Lindgren]

We need to reset CPU1 properly for kexec when booting different
kernel versions. Otherwise CPU1 will attempt to boot the the
previous kernel's start_secondary(). Note that the restctrl
register is different from the low-power mode wakeup register
CPU1_WAKEUP_NS_PA_ADDR. We need to configure both.

Let's fix the issue by defining SoC specific data to initialize
things in a more generic way. And let's also standardize omap-smp.c
to use soc_is instead of cpu_is while at it.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/omap-smp.c | 95 ++++++++++++++++++++++++++++++------------
 1 file changed, 69 insertions(+), 26 deletions(-)

diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 8cd1de9..81bb053 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -40,14 +40,35 @@
 
 #define OMAP5_CORE_COUNT	0x2
 
-/* SCU base address */
-static void __iomem *scu_base;
+struct omap_smp_config {
+	unsigned long cpu1_rstctrl_pa;
+	void __iomem *cpu1_rstctrl_va;
+	void __iomem *scu_base;
+	void *startup_addr;
+};
+
+static struct omap_smp_config cfg;
+
+static const struct omap_smp_config omap443x_cfg __initconst = {
+	.cpu1_rstctrl_pa = 0x4824380c,
+	.startup_addr = omap4_secondary_startup,
+};
+
+static const struct omap_smp_config omap446x_cfg __initconst = {
+	.cpu1_rstctrl_pa = 0x4824380c,
+	.startup_addr = omap4460_secondary_startup,
+};
+
+static const struct omap_smp_config omap5_cfg __initconst = {
+	.cpu1_rstctrl_pa = 0x48243810,
+	.startup_addr = omap5_secondary_startup,
+};
 
 static DEFINE_SPINLOCK(boot_lock);
 
 void __iomem *omap4_get_scu_base(void)
 {
-	return scu_base;
+	return cfg.scu_base;
 }
 
 #ifdef CONFIG_OMAP5_ERRATA_801819
@@ -93,7 +114,7 @@ static void omap4_secondary_init(unsigned int cpu)
 	 * OMAP443X GP devices- SMP bit isn't accessible.
 	 * OMAP446X GP devices - SMP bit access is enabled on both CPUs.
 	 */
-	if (cpu_is_omap443x() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
+	if (soc_is_omap443x() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
 		omap_secure_dispatcher(OMAP4_PPA_CPU_ACTRL_SMP_INDEX,
 							4, 0, 0, 0, 0, 0);
 
@@ -222,9 +243,9 @@ static void __init omap4_smp_init_cpus(void)
 		 * Currently we can't call ioremap here because
 		 * SoC detection won't work until after init_early.
 		 */
-		scu_base =  OMAP2_L4_IO_ADDRESS(scu_a9_get_base());
-		BUG_ON(!scu_base);
-		ncores = scu_get_core_count(scu_base);
+		cfg.scu_base =  OMAP2_L4_IO_ADDRESS(scu_a9_get_base());
+		BUG_ON(!cfg.scu_base);
+		ncores = scu_get_core_count(cfg.scu_base);
 	} else if (cpu_id == CPU_CORTEX_A15) {
 		ncores = OMAP5_CORE_COUNT;
 	}
@@ -242,20 +263,51 @@ static void __init omap4_smp_init_cpus(void)
 
 static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
 {
-	void *startup_addr = omap4_secondary_startup;
 	void __iomem *base = omap_get_wakeupgen_base();
+	const struct omap_smp_config *c = NULL;
+
+	if (soc_is_omap443x())
+		c = &omap443x_cfg;
+	else if (soc_is_omap446x())
+		c = &omap446x_cfg;
+	else if (soc_is_dra74x() || soc_is_omap54xx())
+		c = &omap5_cfg;
+
+	if (!c) {
+		pr_err("%s Unknown SMP SoC?\n", __func__);
+		return;
+	}
+
+	/* Must preserve cfg.scu_base set earlier */
+	cfg.cpu1_rstctrl_pa = c->cpu1_rstctrl_pa;
+	cfg.startup_addr = c->startup_addr;
+
+	if (soc_is_dra74x() || soc_is_omap54xx()) {
+		if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
+			cfg.startup_addr = omap5_secondary_hyp_startup;
+		omap5_erratum_workaround_801819();
+	}
+
+	cfg.cpu1_rstctrl_va = ioremap(cfg.cpu1_rstctrl_pa, 4);
+	if (!cfg.cpu1_rstctrl_va)
+		return;
 
 	/*
 	 * Initialise the SCU and wake up the secondary core using
 	 * wakeup_secondary().
 	 */
-	if (scu_base)
-		scu_enable(scu_base);
+	if (cfg.scu_base)
+		scu_enable(cfg.scu_base);
 
-	if (cpu_is_omap446x())
-		startup_addr = omap4460_secondary_startup;
-	if (soc_is_dra74x() || soc_is_omap54xx())
-		omap5_erratum_workaround_801819();
+	/*
+	 * Reset CPU1 before configuring, otherwise kexec will
+	 * end up trying to use old kernel startup address.
+	 */
+	if (cfg.cpu1_rstctrl_va) {
+		writel_relaxed(1, cfg.cpu1_rstctrl_va);
+		readl_relaxed(cfg.cpu1_rstctrl_va);
+		writel_relaxed(0, cfg.cpu1_rstctrl_va);
+	}
 
 	/*
 	 * Write the address of secondary startup routine into the
@@ -264,19 +316,10 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
 	 * A barrier is added to ensure that write buffer is drained
 	 */
 	if (omap_secure_apis_support())
-		omap_auxcoreboot_addr(virt_to_phys(startup_addr));
+		omap_auxcoreboot_addr(virt_to_phys(cfg.startup_addr));
 	else
-		/*
-		 * If the boot CPU is in HYP mode then start secondary
-		 * CPU in HYP mode as well.
-		 */
-		if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
-			writel_relaxed(virt_to_phys(omap5_secondary_hyp_startup),
-				       base + OMAP_AUX_CORE_BOOT_1);
-		else
-			writel_relaxed(virt_to_phys(omap5_secondary_startup),
-				       base + OMAP_AUX_CORE_BOOT_1);
-
+		writel_relaxed(virt_to_phys(cfg.startup_addr),
+			       base + OMAP_AUX_CORE_BOOT_1);
 }
 
 const struct smp_operations omap4_smp_ops __initconst = {
-- 
2.8.1

[PATCH 3/4] ARM: OMAP4+: Reset CPU1 properly for kexec

[Tony Lindgren]

We need to reset CPU1 properly for kexec when booting different
kernel versions. Otherwise CPU1 will attempt to boot the the
previous kernel's start_secondary(). Note that the restctrl
register is different from the low-power mode wakeup register
CPU1_WAKEUP_NS_PA_ADDR. We need to configure both.

Let's fix the issue by defining SoC specific data to initialize
things in a more generic way. And let's also standardize omap-smp.c
to use soc_is instead of cpu_is while at it.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/omap-smp.c | 95 ++++++++++++++++++++++++++++++------------
 1 file changed, 69 insertions(+), 26 deletions(-)

diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 8cd1de9..81bb053 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -40,14 +40,35 @@
 
 #define OMAP5_CORE_COUNT	0x2
 
-/* SCU base address */
-static void __iomem *scu_base;
+struct omap_smp_config {
+	unsigned long cpu1_rstctrl_pa;
+	void __iomem *cpu1_rstctrl_va;
+	void __iomem *scu_base;
+	void *startup_addr;
+};
+
+static struct omap_smp_config cfg;
+
+static const struct omap_smp_config omap443x_cfg __initconst = {
+	.cpu1_rstctrl_pa = 0x4824380c,
+	.startup_addr = omap4_secondary_startup,
+};
+
+static const struct omap_smp_config omap446x_cfg __initconst = {
+	.cpu1_rstctrl_pa = 0x4824380c,
+	.startup_addr = omap4460_secondary_startup,
+};
+
+static const struct omap_smp_config omap5_cfg __initconst = {
+	.cpu1_rstctrl_pa = 0x48243810,
+	.startup_addr = omap5_secondary_startup,
+};
 
 static DEFINE_SPINLOCK(boot_lock);
 
 void __iomem *omap4_get_scu_base(void)
 {
-	return scu_base;
+	return cfg.scu_base;
 }
 
 #ifdef CONFIG_OMAP5_ERRATA_801819
@@ -93,7 +114,7 @@ static void omap4_secondary_init(unsigned int cpu)
 	 * OMAP443X GP devices- SMP bit isn't accessible.
 	 * OMAP446X GP devices - SMP bit access is enabled on both CPUs.
 	 */
-	if (cpu_is_omap443x() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
+	if (soc_is_omap443x() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
 		omap_secure_dispatcher(OMAP4_PPA_CPU_ACTRL_SMP_INDEX,
 							4, 0, 0, 0, 0, 0);
 
@@ -222,9 +243,9 @@ static void __init omap4_smp_init_cpus(void)
 		 * Currently we can't call ioremap here because
 		 * SoC detection won't work until after init_early.
 		 */
-		scu_base =  OMAP2_L4_IO_ADDRESS(scu_a9_get_base());
-		BUG_ON(!scu_base);
-		ncores = scu_get_core_count(scu_base);
+		cfg.scu_base =  OMAP2_L4_IO_ADDRESS(scu_a9_get_base());
+		BUG_ON(!cfg.scu_base);
+		ncores = scu_get_core_count(cfg.scu_base);
 	} else if (cpu_id == CPU_CORTEX_A15) {
 		ncores = OMAP5_CORE_COUNT;
 	}
@@ -242,20 +263,51 @@ static void __init omap4_smp_init_cpus(void)
 
 static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
 {
-	void *startup_addr = omap4_secondary_startup;
 	void __iomem *base = omap_get_wakeupgen_base();
+	const struct omap_smp_config *c = NULL;
+
+	if (soc_is_omap443x())
+		c = &omap443x_cfg;
+	else if (soc_is_omap446x())
+		c = &omap446x_cfg;
+	else if (soc_is_dra74x() || soc_is_omap54xx())
+		c = &omap5_cfg;
+
+	if (!c) {
+		pr_err("%s Unknown SMP SoC?\n", __func__);
+		return;
+	}
+
+	/* Must preserve cfg.scu_base set earlier */
+	cfg.cpu1_rstctrl_pa = c->cpu1_rstctrl_pa;
+	cfg.startup_addr = c->startup_addr;
+
+	if (soc_is_dra74x() || soc_is_omap54xx()) {
+		if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
+			cfg.startup_addr = omap5_secondary_hyp_startup;
+		omap5_erratum_workaround_801819();
+	}
+
+	cfg.cpu1_rstctrl_va = ioremap(cfg.cpu1_rstctrl_pa, 4);
+	if (!cfg.cpu1_rstctrl_va)
+		return;
 
 	/*
 	 * Initialise the SCU and wake up the secondary core using
 	 * wakeup_secondary().
 	 */
-	if (scu_base)
-		scu_enable(scu_base);
+	if (cfg.scu_base)
+		scu_enable(cfg.scu_base);
 
-	if (cpu_is_omap446x())
-		startup_addr = omap4460_secondary_startup;
-	if (soc_is_dra74x() || soc_is_omap54xx())
-		omap5_erratum_workaround_801819();
+	/*
+	 * Reset CPU1 before configuring, otherwise kexec will
+	 * end up trying to use old kernel startup address.
+	 */
+	if (cfg.cpu1_rstctrl_va) {
+		writel_relaxed(1, cfg.cpu1_rstctrl_va);
+		readl_relaxed(cfg.cpu1_rstctrl_va);
+		writel_relaxed(0, cfg.cpu1_rstctrl_va);
+	}
 
 	/*
 	 * Write the address of secondary startup routine into the
@@ -264,19 +316,10 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
 	 * A barrier is added to ensure that write buffer is drained
 	 */
 	if (omap_secure_apis_support())
-		omap_auxcoreboot_addr(virt_to_phys(startup_addr));
+		omap_auxcoreboot_addr(virt_to_phys(cfg.startup_addr));
 	else
-		/*
-		 * If the boot CPU is in HYP mode then start secondary
-		 * CPU in HYP mode as well.
-		 */
-		if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
-			writel_relaxed(virt_to_phys(omap5_secondary_hyp_startup),
-				       base + OMAP_AUX_CORE_BOOT_1);
-		else
-			writel_relaxed(virt_to_phys(omap5_secondary_startup),
-				       base + OMAP_AUX_CORE_BOOT_1);
-
+		writel_relaxed(virt_to_phys(cfg.startup_addr),
+			       base + OMAP_AUX_CORE_BOOT_1);
 }
 
 const struct smp_operations omap4_smp_ops __initconst = {
-- 
2.8.1

[PATCH 4/4] ARM: OMAP4+: Allow kexec on SMP variants

[Tony Lindgren]

Kexec needs omap4_cpu_kill, otherwise kexec will produce on SMP:

kexec_load failed: Invalid argument

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/common.h       | 1 +
 arch/arm/mach-omap2/omap-hotplug.c | 6 ++++++
 arch/arm/mach-omap2/omap-smp.c     | 1 +
 3 files changed, 8 insertions(+)

diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 0136405..deed42e 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -272,6 +272,7 @@ extern void omap_auxcoreboot_addr(u32 cpu_addr);
 extern u32 omap_read_auxcoreboot0(void);
 
 extern void omap4_cpu_die(unsigned int cpu);
+extern int omap4_cpu_kill(unsigned int cpu);
 
 extern const struct smp_operations omap4_smp_ops;
 
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index 593fec7..d3fb566 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -64,3 +64,9 @@ void omap4_cpu_die(unsigned int cpu)
 		pr_debug("CPU%u: spurious wakeup call\n", cpu);
 	}
 }
+
+/* Needed by kexec and platform_can_cpu_hotplug() */
+int omap4_cpu_kill(unsigned int cpu)
+{
+	return 1;
+}
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 81bb053..d53a0de 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -329,5 +329,6 @@ const struct smp_operations omap4_smp_ops __initconst = {
 	.smp_boot_secondary	= omap4_boot_secondary,
 #ifdef CONFIG_HOTPLUG_CPU
 	.cpu_die		= omap4_cpu_die,
+	.cpu_kill		= omap4_cpu_kill,
 #endif
 };
-- 
2.8.1

[PATCH 4/4] ARM: OMAP4+: Allow kexec on SMP variants

[Tony Lindgren]

Kexec needs omap4_cpu_kill, otherwise kexec will produce on SMP:

kexec_load failed: Invalid argument

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/common.h       | 1 +
 arch/arm/mach-omap2/omap-hotplug.c | 6 ++++++
 arch/arm/mach-omap2/omap-smp.c     | 1 +
 3 files changed, 8 insertions(+)

diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 0136405..deed42e 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -272,6 +272,7 @@ extern void omap_auxcoreboot_addr(u32 cpu_addr);
 extern u32 omap_read_auxcoreboot0(void);
 
 extern void omap4_cpu_die(unsigned int cpu);
+extern int omap4_cpu_kill(unsigned int cpu);
 
 extern const struct smp_operations omap4_smp_ops;
 
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index 593fec7..d3fb566 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -64,3 +64,9 @@ void omap4_cpu_die(unsigned int cpu)
 		pr_debug("CPU%u: spurious wakeup call\n", cpu);
 	}
 }
+
+/* Needed by kexec and platform_can_cpu_hotplug() */
+int omap4_cpu_kill(unsigned int cpu)
+{
+	return 1;
+}
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 81bb053..d53a0de 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -329,5 +329,6 @@ const struct smp_operations omap4_smp_ops __initconst = {
 	.smp_boot_secondary	= omap4_boot_secondary,
 #ifdef CONFIG_HOTPLUG_CPU
 	.cpu_die		= omap4_cpu_die,
+	.cpu_kill		= omap4_cpu_kill,
 #endif
 };
-- 
2.8.1

Re: [PATCH 0/4] Get kexec working on SMP omap variants

[Santosh Shilimkar]

On 6/21/2016 12:52 AM, Tony Lindgren wrote:
> Hi all,
>
> Here are some patches to make kexec work for SMP omaps. To test
> these you need to use the latest kexec-tools.git kexec with
> Russell's recent patches in "[PATCH 0/2] Simple fix to the ARM
> kexec tools implementation" thread fixed for 6x. Or else you
> need to use appended DTB.
>
> I've tested these so far on 4430 duovero, omap5-uevm, and
> beagle-x15.
>

>
>
> Tony Lindgren (4):
>   ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for
>     kexec
>   ARM: OMAP4+: Prevent CPU1 related hang with kexec
>   ARM: OMAP4+: Reset CPU1 properly for kexec
>   ARM: OMAP4+: Allow kexec on SMP variants
>

I suggest to do bit wider testing including PM. From
quick scan, the series looks fine to me.

FWIW, Acked-by: Santosh Shilimkar <ssantosh@kernel.org>

[PATCH 0/4] Get kexec working on SMP omap variants

[Santosh Shilimkar]

On 6/21/2016 12:52 AM, Tony Lindgren wrote:
> Hi all,
>
> Here are some patches to make kexec work for SMP omaps. To test
> these you need to use the latest kexec-tools.git kexec with
> Russell's recent patches in "[PATCH 0/2] Simple fix to the ARM
> kexec tools implementation" thread fixed for 6x. Or else you
> need to use appended DTB.
>
> I've tested these so far on 4430 duovero, omap5-uevm, and
> beagle-x15.
>

>
>
> Tony Lindgren (4):
>   ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for
>     kexec
>   ARM: OMAP4+: Prevent CPU1 related hang with kexec
>   ARM: OMAP4+: Reset CPU1 properly for kexec
>   ARM: OMAP4+: Allow kexec on SMP variants
>

I suggest to do bit wider testing including PM. From
quick scan, the series looks fine to me.

FWIW, Acked-by: Santosh Shilimkar <ssantosh@kernel.org>

Re: [PATCH 0/4] Get kexec working on SMP omap variants

[Keerthy]

On Tuesday 21 June 2016 01:22 PM, Tony Lindgren wrote:
> Hi all,
>
> Here are some patches to make kexec work for SMP omaps. To test
> these you need to use the latest kexec-tools.git kexec with
> Russell's recent patches in "[PATCH 0/2] Simple fix to the ARM
> kexec tools implementation" thread fixed for 6x. Or else you
> need to use appended DTB.
>
> I've tested these so far on 4430 duovero, omap5-uevm, and
> beagle-x15.

More testing done with above configuration + kexec_tools change below:
initrd_base = kernel_base + _ALIGN(len * 7, getpagesize());

kexec works fine on:

am437x-gp-evm, am437x-sk-evm
am335x-bone
dra72-evm
dra7-evm
omap5-uevm

Tested-by: Keerthy <j-keerthy@ti.com>

Regards,
Keerthy

>
> Regards,
>
> Tony
>
>
> Tony Lindgren (4):
>    ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for
>      kexec
>    ARM: OMAP4+: Prevent CPU1 related hang with kexec
>    ARM: OMAP4+: Reset CPU1 properly for kexec
>    ARM: OMAP4+: Allow kexec on SMP variants
>
>   arch/arm/mach-omap2/Makefile              |  4 +-
>   arch/arm/mach-omap2/common.h              |  8 ++-
>   arch/arm/mach-omap2/io.c                  |  3 +
>   arch/arm/mach-omap2/omap-hotplug.c        |  6 ++
>   arch/arm/mach-omap2/omap-mpuss-lowpower.c | 29 ++++++++--
>   arch/arm/mach-omap2/omap-smp.c            | 96 ++++++++++++++++++++++---------
>   arch/arm/mach-omap2/omap4-common.c        | 14 ++---
>   7 files changed, 118 insertions(+), 42 deletions(-)
>

[PATCH 0/4] Get kexec working on SMP omap variants

[Keerthy]

On Tuesday 21 June 2016 01:22 PM, Tony Lindgren wrote:
> Hi all,
>
> Here are some patches to make kexec work for SMP omaps. To test
> these you need to use the latest kexec-tools.git kexec with
> Russell's recent patches in "[PATCH 0/2] Simple fix to the ARM
> kexec tools implementation" thread fixed for 6x. Or else you
> need to use appended DTB.
>
> I've tested these so far on 4430 duovero, omap5-uevm, and
> beagle-x15.

More testing done with above configuration + kexec_tools change below:
initrd_base = kernel_base + _ALIGN(len * 7, getpagesize());

kexec works fine on:

am437x-gp-evm, am437x-sk-evm
am335x-bone
dra72-evm
dra7-evm
omap5-uevm

Tested-by: Keerthy <j-keerthy@ti.com>

Regards,
Keerthy

>
> Regards,
>
> Tony
>
>
> Tony Lindgren (4):
>    ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for
>      kexec
>    ARM: OMAP4+: Prevent CPU1 related hang with kexec
>    ARM: OMAP4+: Reset CPU1 properly for kexec
>    ARM: OMAP4+: Allow kexec on SMP variants
>
>   arch/arm/mach-omap2/Makefile              |  4 +-
>   arch/arm/mach-omap2/common.h              |  8 ++-
>   arch/arm/mach-omap2/io.c                  |  3 +
>   arch/arm/mach-omap2/omap-hotplug.c        |  6 ++
>   arch/arm/mach-omap2/omap-mpuss-lowpower.c | 29 ++++++++--
>   arch/arm/mach-omap2/omap-smp.c            | 96 ++++++++++++++++++++++---------
>   arch/arm/mach-omap2/omap4-common.c        | 14 ++---
>   7 files changed, 118 insertions(+), 42 deletions(-)
>

Re: [PATCH 0/4] Get kexec working on SMP omap variants

[Tony Lindgren]

* Santosh Shilimkar <santosh.shilimkar@oracle.com> [160621 09:10]:
> 
> I suggest to do bit wider testing including PM. From
> quick scan, the series looks fine to me.

Looks like the /sys/kernel/debug/pm_debug/count values for
both cores for off increse just fine with these patches
both before and after kexec.

> FWIW, Acked-by: Santosh Shilimkar <ssantosh@kernel.org>

Thanks,

Tony

[PATCH 0/4] Get kexec working on SMP omap variants

[Tony Lindgren]

* Santosh Shilimkar <santosh.shilimkar@oracle.com> [160621 09:10]:
> 
> I suggest to do bit wider testing including PM. From
> quick scan, the series looks fine to me.

Looks like the /sys/kernel/debug/pm_debug/count values for
both cores for off increse just fine with these patches
both before and after kexec.

> FWIW, Acked-by: Santosh Shilimkar <ssantosh@kernel.org>

Thanks,

Tony

Re: [PATCH 2/4] ARM: OMAP4+: Prevent CPU1 related hang with kexec

[Arnd Bergmann]

On Tuesday, June 21, 2016 12:52:43 AM CEST Tony Lindgren wrote:
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index 04e276c..cd820f5 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -8,7 +8,7 @@ ccflags-y := -I$(srctree)/$(src)/include \
>  # Common support
>  obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o timer.o pm.o \
>          common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
> -        omap_device.o sram.o drm.o
> +        omap_device.o omap-headsmp.o sram.o drm.o
>  
>  hwmod-common                           = omap_hwmod.o omap_hwmod_reset.o \
>                                           omap_hwmod_common_data.o
> @@ -32,7 +32,7 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC)      += sdrc.o
>  
>  # SMP support ONLY available for OMAP4
>  
> -smp-$(CONFIG_SMP)                      += omap-smp.o omap-headsmp.o
> +smp-$(CONFIG_SMP)                      += omap-smp.o
>  smp-$(CONFIG_HOTPLUG_CPU)              += omap-hotplug.o
>  omap-4-5-common                                =  omap4-common.o omap-wakeupgen.o
> 

This doesn't work:

arch/arm/mach-omap2/built-in.o: In function `omap5_secondary_startup':
dss-common.c:(.text+0x4cc4): undefined reference to `secondary_startup'
arch/arm/mach-omap2/built-in.o: In function `hyp_boot':
dss-common.c:(.text+0x4cf0): undefined reference to `secondary_startup'
arch/arm/mach-omap2/built-in.o: In function `omap4_secondary_startup':
dss-common.c:(.text+0x4d14): undefined reference to `secondary_startup'
arch/arm/mach-omap2/built-in.o: In function `omap4460_secondary_startup':
dss-common.c:(.text+0x4d48): undefined reference to `secondary_startup'

secondary_startup() is not defined when CONFIG_SMP is disabled.

	Arnd

[PATCH 2/4] ARM: OMAP4+: Prevent CPU1 related hang with kexec

[Arnd Bergmann]

On Tuesday, June 21, 2016 12:52:43 AM CEST Tony Lindgren wrote:
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index 04e276c..cd820f5 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -8,7 +8,7 @@ ccflags-y := -I$(srctree)/$(src)/include \
>  # Common support
>  obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o timer.o pm.o \
>          common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
> -        omap_device.o sram.o drm.o
> +        omap_device.o omap-headsmp.o sram.o drm.o
>  
>  hwmod-common                           = omap_hwmod.o omap_hwmod_reset.o \
>                                           omap_hwmod_common_data.o
> @@ -32,7 +32,7 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC)      += sdrc.o
>  
>  # SMP support ONLY available for OMAP4
>  
> -smp-$(CONFIG_SMP)                      += omap-smp.o omap-headsmp.o
> +smp-$(CONFIG_SMP)                      += omap-smp.o
>  smp-$(CONFIG_HOTPLUG_CPU)              += omap-hotplug.o
>  omap-4-5-common                                =  omap4-common.o omap-wakeupgen.o
> 

This doesn't work:

arch/arm/mach-omap2/built-in.o: In function `omap5_secondary_startup':
dss-common.c:(.text+0x4cc4): undefined reference to `secondary_startup'
arch/arm/mach-omap2/built-in.o: In function `hyp_boot':
dss-common.c:(.text+0x4cf0): undefined reference to `secondary_startup'
arch/arm/mach-omap2/built-in.o: In function `omap4_secondary_startup':
dss-common.c:(.text+0x4d14): undefined reference to `secondary_startup'
arch/arm/mach-omap2/built-in.o: In function `omap4460_secondary_startup':
dss-common.c:(.text+0x4d48): undefined reference to `secondary_startup'

secondary_startup() is not defined when CONFIG_SMP is disabled.

	Arnd

Re: [PATCH 2/4] ARM: OMAP4+: Prevent CPU1 related hang with kexec

[Tony Lindgren]

* Arnd Bergmann <arnd@arndb.de> [160624 00:41]:
> This doesn't work:
> 
> arch/arm/mach-omap2/built-in.o: In function `omap5_secondary_startup':
> dss-common.c:(.text+0x4cc4): undefined reference to `secondary_startup'
> arch/arm/mach-omap2/built-in.o: In function `hyp_boot':
> dss-common.c:(.text+0x4cf0): undefined reference to `secondary_startup'
> arch/arm/mach-omap2/built-in.o: In function `omap4_secondary_startup':
> dss-common.c:(.text+0x4d14): undefined reference to `secondary_startup'
> arch/arm/mach-omap2/built-in.o: In function `omap4460_secondary_startup':
> dss-common.c:(.text+0x4d48): undefined reference to `secondary_startup'
> 
> secondary_startup() is not defined when CONFIG_SMP is disabled.

Oh sorry. Looks like I did not properly check the compiler output
while fixing up the randconfig errors I got earlier. Below is a
fix for this build error.

Regards,

Tony

8< -----------------
From: Tony Lindgren <tony@atomide.com>
Date: Sun, 26 Jun 2016 22:47:06 -0700
Subject: [PATCH] ARM: OMAP2+: Fix build if CONFIG_SMP is not set

Looks like I only partially fixed up things if CONFIG_SMP
is not set for the recent kexec changes. We don't have
boot_secondary available without SMP as reported by Arnd.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 6d1dffc..fe36ce2 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -24,6 +24,16 @@
 #define AUX_CORE_BOOT0_PA			0x48281800
 #define API_HYP_ENTRY				0x102
 
+ENTRY(omap_secondary_startup)
+#ifdef CONFIG_SMP
+	b	secondary_startup
+#else
+/* Should never get here */
+again:	wfi
+	b	again
+#endif
+#ENDPROC(omap_secondary_startup)
+
 /*
  * OMAP5 specific entry point for secondary CPU to jump from ROM
  * code.  This routine also provides a holding flag into which
@@ -39,7 +49,7 @@ wait:	ldr	r2, =AUX_CORE_BOOT0_PA	@ read from AuxCoreBoot0
 	and	r4, r4, #0x0f
 	cmp	r0, r4
 	bne	wait
-	b	secondary_startup
+	b	omap_secondary_startup
 ENDPROC(omap5_secondary_startup)
 /*
  * Same as omap5_secondary_startup except we call into the ROM to
@@ -59,7 +69,7 @@ wait_2:	ldr	r2, =AUX_CORE_BOOT0_PA	@ read from AuxCoreBoot0
 	adr	r0, hyp_boot
 	smc	#0
 hyp_boot:
-	b	secondary_startup
+	b	omap_secondary_startup
 ENDPROC(omap5_secondary_hyp_startup)
 /*
  * OMAP4 specific entry point for secondary CPU to jump from ROM
@@ -82,7 +92,7 @@ hold:	ldr	r12,=0x103
 	 * we've been released from the wait loop,secondary_stack
 	 * should now contain the SVC stack for this core
 	 */
-	b	secondary_startup
+	b	omap_secondary_startup
 ENDPROC(omap4_secondary_startup)
 
 ENTRY(omap4460_secondary_startup)
@@ -119,5 +129,5 @@ hold_2:	ldr	r12,=0x103
 	 * we've been released from the wait loop,secondary_stack
 	 * should now contain the SVC stack for this core
 	 */
-	b	secondary_startup
+	b	omap_secondary_startup
 ENDPROC(omap4460_secondary_startup)

[PATCH 2/4] ARM: OMAP4+: Prevent CPU1 related hang with kexec

[Tony Lindgren]

* Arnd Bergmann <arnd@arndb.de> [160624 00:41]:
> This doesn't work:
> 
> arch/arm/mach-omap2/built-in.o: In function `omap5_secondary_startup':
> dss-common.c:(.text+0x4cc4): undefined reference to `secondary_startup'
> arch/arm/mach-omap2/built-in.o: In function `hyp_boot':
> dss-common.c:(.text+0x4cf0): undefined reference to `secondary_startup'
> arch/arm/mach-omap2/built-in.o: In function `omap4_secondary_startup':
> dss-common.c:(.text+0x4d14): undefined reference to `secondary_startup'
> arch/arm/mach-omap2/built-in.o: In function `omap4460_secondary_startup':
> dss-common.c:(.text+0x4d48): undefined reference to `secondary_startup'
> 
> secondary_startup() is not defined when CONFIG_SMP is disabled.

Oh sorry. Looks like I did not properly check the compiler output
while fixing up the randconfig errors I got earlier. Below is a
fix for this build error.

Regards,

Tony

8< -----------------
From: Tony Lindgren <tony@atomide.com>
Date: Sun, 26 Jun 2016 22:47:06 -0700
Subject: [PATCH] ARM: OMAP2+: Fix build if CONFIG_SMP is not set

Looks like I only partially fixed up things if CONFIG_SMP
is not set for the recent kexec changes. We don't have
boot_secondary available without SMP as reported by Arnd.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 6d1dffc..fe36ce2 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -24,6 +24,16 @@
 #define AUX_CORE_BOOT0_PA			0x48281800
 #define API_HYP_ENTRY				0x102
 
+ENTRY(omap_secondary_startup)
+#ifdef CONFIG_SMP
+	b	secondary_startup
+#else
+/* Should never get here */
+again:	wfi
+	b	again
+#endif
+#ENDPROC(omap_secondary_startup)
+
 /*
  * OMAP5 specific entry point for secondary CPU to jump from ROM
  * code.  This routine also provides a holding flag into which
@@ -39,7 +49,7 @@ wait:	ldr	r2, =AUX_CORE_BOOT0_PA	@ read from AuxCoreBoot0
 	and	r4, r4, #0x0f
 	cmp	r0, r4
 	bne	wait
-	b	secondary_startup
+	b	omap_secondary_startup
 ENDPROC(omap5_secondary_startup)
 /*
  * Same as omap5_secondary_startup except we call into the ROM to
@@ -59,7 +69,7 @@ wait_2:	ldr	r2, =AUX_CORE_BOOT0_PA	@ read from AuxCoreBoot0
 	adr	r0, hyp_boot
 	smc	#0
 hyp_boot:
-	b	secondary_startup
+	b	omap_secondary_startup
 ENDPROC(omap5_secondary_hyp_startup)
 /*
  * OMAP4 specific entry point for secondary CPU to jump from ROM
@@ -82,7 +92,7 @@ hold:	ldr	r12,=0x103
 	 * we've been released from the wait loop,secondary_stack
 	 * should now contain the SVC stack for this core
 	 */
-	b	secondary_startup
+	b	omap_secondary_startup
 ENDPROC(omap4_secondary_startup)
 
 ENTRY(omap4460_secondary_startup)
@@ -119,5 +129,5 @@ hold_2:	ldr	r12,=0x103
 	 * we've been released from the wait loop,secondary_stack
 	 * should now contain the SVC stack for this core
 	 */
-	b	secondary_startup
+	b	omap_secondary_startup
 ENDPROC(omap4460_secondary_startup)