From: Christoffer Dall <christoffer.dall@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Laszlo Ersek <lersek@redhat.com>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>
Subject: Re: issues with emulated PCI MMIO backed by host memory under KVM
Date: Tue, 28 Jun 2016 12:05:33 +0200 [thread overview]
Message-ID: <20160628100533.GL26498@cbox> (raw)
In-Reply-To: <CAFEAcA-n4ZuHs7ioxngm_2+ys5qNJSde2LNgQ4C2-Lh3NKb_ZA@mail.gmail.com>
On Mon, Jun 27, 2016 at 03:10:20PM +0100, Peter Maydell wrote:
> On 27 June 2016 at 14:49, Mark Rutland <mark.rutland@arm.com> wrote:
> > On Mon, Jun 27, 2016 at 02:15:29PM +0100, Peter Maydell wrote:
> >> I get the impression dma-coherent is the right thing to advertise
> >> anyway. Do you have the documentation to hand that specifies what
> >> "dma-coherent" means? The Documentation/devicetree docs in the
> >> kernel tree seem to rather unhelpfully define it as "Present if
> >> dma operations are coherent", which doesn't really clarify anything
> >> to me...
> >
> > It's ill-defined today, and the precise definition is an open question.
> > See replies to [1], which seems to have stalled as of [2].
> >
> > My view is that for arm/arm64 this should mean the device makes accesses
> > which are coherent with Inner Shareable Normal Inner-WB Outer-WB
> > attributes, as this is the functional de-facto semantics today, and
> > anything short of that is not well-defined or usable.
>
> OK, so for any emulated device in QEMU we should specify
> dma-coherent by those rules. I think our only DMA devices
> in the virt board are the emulated PCI devices; dma-coherent
> here is a property of the pci-controller and applies to any
> device on it, right? Presumably this means that if the host
> pci-controller doesn't advertise itself as dma-coherent then
> we cannot do any PCI passthrough of host hardware?
>
Someone suggested a while back to have a second PCI controller
matching the host properties for this purpose...
-Christoffer
prev parent reply other threads:[~2016-06-28 9:59 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-24 14:04 issues with emulated PCI MMIO backed by host memory under KVM Ard Biesheuvel
2016-06-24 14:57 ` Andrew Jones
2016-06-27 8:17 ` Marc Zyngier
2016-06-24 18:16 ` Ard Biesheuvel
2016-06-25 7:15 ` Alexander Graf
2016-06-25 7:19 ` Alexander Graf
2016-06-27 8:11 ` Marc Zyngier
2016-06-27 9:16 ` Christoffer Dall
2016-06-27 9:47 ` Ard Biesheuvel
2016-06-27 10:34 ` Christoffer Dall
2016-06-27 12:30 ` Ard Biesheuvel
2016-06-27 13:35 ` Christoffer Dall
2016-06-27 13:57 ` Ard Biesheuvel
2016-06-27 14:29 ` Alexander Graf
2016-06-28 11:02 ` Laszlo Ersek
2016-06-28 10:04 ` Christoffer Dall
2016-06-28 11:06 ` Laszlo Ersek
2016-06-28 12:20 ` Christoffer Dall
2016-06-28 13:10 ` Catalin Marinas
2016-06-28 13:19 ` Ard Biesheuvel
2016-06-28 13:25 ` Catalin Marinas
2016-06-28 14:02 ` Andrew Jones
2016-06-27 14:24 ` Alexander Graf
2016-06-28 10:55 ` Laszlo Ersek
2016-06-28 13:14 ` Ard Biesheuvel
2016-06-28 13:32 ` Laszlo Ersek
2016-06-29 7:12 ` Gerd Hoffmann
2016-06-28 15:23 ` Alexander Graf
2016-06-27 13:15 ` Peter Maydell
2016-06-27 13:49 ` Mark Rutland
2016-06-27 14:10 ` Peter Maydell
2016-06-28 10:05 ` Christoffer Dall [this message]
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