* [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support
@ 2016-07-13 7:25 Stefan Agner
2016-07-13 7:25 ` [U-Boot] [PATCH v2 1/9] dm: imx: serial: Support DTE mode when using driver model Stefan Agner
` (9 more replies)
0 siblings, 10 replies; 27+ messages in thread
From: Stefan Agner @ 2016-07-13 7:25 UTC (permalink / raw)
To: u-boot
From: Stefan Agner <stefan.agner@toradex.com>
This patchset adds support for the Toradex i.MX 7Solo and 7Dual
based computer on modules Colibri iMX7S/iMX7D.
It also brings several smaller i.MX 7 related fixes/cleanups.
Changes since v1:
- Dropped Ricoh RN5T567 PMIC support (for now)
- Use CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG for runtime variables
- Convert USB OTG Power Pin Polarity to Kconfig
- Use gpio_request in lcd_setup
Stefan Agner (9):
dm: imx: serial: Support DTE mode when using driver model
usb: move CONFIG_USB_EHCI_MX7 to Kconfig
usb: ehci-mx6: configure power polarity in usb_power_config
usb: ehci-mx6: introduce config for high active power pin
mx7: set soc environment according to exact SoC type
mx7_common: Put display board info config into board file
mx7_common: use Kconfig for ARMv7 non-secure mode
imx_watchdog: add weak attribute to reset_cpu function
colibri_imx7: add Colibri iMX7S/iMX7D module support
arch/arm/cpu/armv7/mx7/Kconfig | 9 +
arch/arm/cpu/armv7/mx7/soc.c | 14 +
board/toradex/colibri_imx7/Kconfig | 12 +
board/toradex/colibri_imx7/MAINTAINERS | 6 +
board/toradex/colibri_imx7/Makefile | 6 +
board/toradex/colibri_imx7/colibri_imx7.c | 420 ++++++++++++++++++++++++++++++
board/toradex/colibri_imx7/imximage.cfg | 150 +++++++++++
configs/colibri_imx7_defconfig | 40 +++
configs/mx7dsabresd_defconfig | 3 +
configs/warp7_defconfig | 4 +
drivers/serial/serial_mxc.c | 9 +-
drivers/usb/host/Kconfig | 16 ++
drivers/usb/host/ehci-mx6.c | 14 +-
drivers/watchdog/imx_watchdog.c | 2 +-
include/configs/colibri_imx7.h | 248 ++++++++++++++++++
include/configs/mx7_common.h | 10 +-
include/configs/mx7dsabresd.h | 4 +-
include/configs/warp7.h | 4 +-
include/dm/platform_data/serial_mxc.h | 1 +
19 files changed, 953 insertions(+), 19 deletions(-)
create mode 100644 board/toradex/colibri_imx7/Kconfig
create mode 100644 board/toradex/colibri_imx7/MAINTAINERS
create mode 100644 board/toradex/colibri_imx7/Makefile
create mode 100644 board/toradex/colibri_imx7/colibri_imx7.c
create mode 100644 board/toradex/colibri_imx7/imximage.cfg
create mode 100644 configs/colibri_imx7_defconfig
create mode 100644 include/configs/colibri_imx7.h
--
2.9.0
^ permalink raw reply [flat|nested] 27+ messages in thread* [U-Boot] [PATCH v2 1/9] dm: imx: serial: Support DTE mode when using driver model 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner @ 2016-07-13 7:25 ` Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 2/9] usb: move CONFIG_USB_EHCI_MX7 to Kconfig Stefan Agner ` (8 subsequent siblings) 9 siblings, 0 replies; 27+ messages in thread From: Stefan Agner @ 2016-07-13 7:25 UTC (permalink / raw) To: u-boot From: Stefan Agner <stefan.agner@toradex.com> The MXC UART IP can be run in DTE or DCE mode. This depends on the board wiring and the pinmux used and hence is board specific. This extends platform data with a new field to choose wheather DTE mode shall be used. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> --- drivers/serial/serial_mxc.c | 9 ++++++++- include/dm/platform_data/serial_mxc.h | 1 + 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index 1563bb3..1960bbc 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -76,6 +76,7 @@ #define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ #define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ #define UFCR_RFDIV_SHF 7 /* Reference freq divider shift */ +#define UFCR_DCEDTE (1<<6) /* DTE mode select */ #define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ #define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ #define USR1_RTSS (1<<14) /* RTS pin status */ @@ -150,6 +151,7 @@ static void mxc_serial_setbrg(void) __REG(UART_PHYS + UFCR) = (RFDIV << UFCR_RFDIV_SHF) | (TXTL << UFCR_TXTL_SHF) | (RXTL << UFCR_RXTL_SHF); + __REG(UART_PHYS + UFCR) |= UFCR_DCEDTE; __REG(UART_PHYS + UBIR) = 0xf; __REG(UART_PHYS + UBMR) = clk / (2 * gd->baudrate); @@ -269,8 +271,13 @@ int mxc_serial_setbrg(struct udevice *dev, int baudrate) struct mxc_serial_platdata *plat = dev->platdata; struct mxc_uart *const uart = plat->reg; u32 clk = imx_get_uartclk(); + u32 tmp; + + tmp = 4 << UFCR_RFDIV_SHF; + if (plat->use_dte) + tmp |= UFCR_DCEDTE; + writel(tmp, &uart->fcr); - writel(4 << 7, &uart->fcr); /* divide input clock by 2 */ writel(0xf, &uart->bir); writel(clk / (2 * baudrate), &uart->bmr); diff --git a/include/dm/platform_data/serial_mxc.h b/include/dm/platform_data/serial_mxc.h index 7d3ace2..7bcd280 100644 --- a/include/dm/platform_data/serial_mxc.h +++ b/include/dm/platform_data/serial_mxc.h @@ -9,6 +9,7 @@ /* Information about a serial port */ struct mxc_serial_platdata { struct mxc_uart *reg; /* address of registers in physical memory */ + bool use_dte; }; #endif -- 2.9.0 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 2/9] usb: move CONFIG_USB_EHCI_MX7 to Kconfig 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 1/9] dm: imx: serial: Support DTE mode when using driver model Stefan Agner @ 2016-07-13 7:25 ` Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 3/9] usb: ehci-mx6: configure power polarity in usb_power_config Stefan Agner ` (7 subsequent siblings) 9 siblings, 0 replies; 27+ messages in thread From: Stefan Agner @ 2016-07-13 7:25 UTC (permalink / raw) To: u-boot From: Stefan Agner <stefan.agner@toradex.com> Create an entry for "config USB_EHCI_MX7" in Kconfig and switch over to it for all boards. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> --- configs/mx7dsabresd_defconfig | 1 + configs/warp7_defconfig | 2 ++ drivers/usb/host/Kconfig | 7 +++++++ include/configs/mx7dsabresd.h | 2 -- include/configs/warp7.h | 2 -- 5 files changed, 10 insertions(+), 4 deletions(-) diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index 09716a7..9dbc9c7 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y CONFIG_USB_GADGET=y CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 102b5b1..ba56c84 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -23,4 +23,6 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y CONFIG_OF_LIBFDT=y diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 89580cc..7992cb4 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -74,6 +74,13 @@ config USB_EHCI_MX6 ---help--- Enables support for the on-chip EHCI controller on i.MX6 SoCs. +config USB_EHCI_MX7 + bool "Support for i.MX7 on-chip EHCI USB controller" + depends on ARCH_MX7 + default y + ---help--- + Enables support for the on-chip EHCI controller on i.MX7 SoCs. + config USB_EHCI_MSM bool "Support for Qualcomm on-chip EHCI USB controller" depends on DM_USB diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index ece8a03..cfaf59b 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -237,8 +237,6 @@ #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ /* USB Configs */ -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_MX7 #define CONFIG_USB_STORAGE #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_USB_HOST_ETHER diff --git a/include/configs/warp7.h b/include/configs/warp7.h index fc0e51a..af39817 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -114,8 +114,6 @@ #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USB Configs */ -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_MX7 #define CONFIG_USB_STORAGE #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -- 2.9.0 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 3/9] usb: ehci-mx6: configure power polarity in usb_power_config 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 1/9] dm: imx: serial: Support DTE mode when using driver model Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 2/9] usb: move CONFIG_USB_EHCI_MX7 to Kconfig Stefan Agner @ 2016-07-13 7:25 ` Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 4/9] usb: ehci-mx6: introduce config for high active power pin Stefan Agner ` (6 subsequent siblings) 9 siblings, 0 replies; 27+ messages in thread From: Stefan Agner @ 2016-07-13 7:25 UTC (permalink / raw) To: u-boot From: Stefan Agner <stefan.agner@toradex.com> USBNC_n_CTRL1 bit 9 actually controls the power pin polarity. Rename UCTRL_PM to align reference manual and set the bit in the appropriate callback usb_power_config. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> --- drivers/usb/host/ehci-mx6.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 069f116..277f461 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -49,7 +49,7 @@ #define USBNC_OFFSET 0x200 #define USBNC_PHYSTATUS_ID_DIG (1 << 4) /* otg_id status */ #define USBNC_PHYCFG2_ACAENB (1 << 4) /* otg_id detection enable */ -#define UCTRL_PM (1 << 9) /* OTG Power Mask */ +#define UCTRL_PWR_POL (1 << 9) /* OTG Polarity of Power Pin */ #define UCTRL_OVER_CUR_POL (1 << 8) /* OTG Polarity of Overcurrent */ #define UCTRL_OVER_CUR_DIS (1 << 7) /* Disable OTG Overcurrent Detection */ @@ -207,12 +207,16 @@ static void usb_power_config(int index) struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR + (0x10000 * index) + USBNC_OFFSET); void __iomem *phy_cfg2 = (void __iomem *)(&usbnc->phy_cfg2); + void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl1); /* * Clear the ACAENB to enable usb_otg_id detection, * otherwise it is the ACA detection enabled. */ clrbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB); + + /* Set power polarity to high active */ + setbits_le32(ctrl, UCTRL_PWR_POL); } int usb_phy_mode(int port) @@ -250,11 +254,7 @@ static void usb_oc_config(int index) setbits_le32(ctrl, UCTRL_OVER_CUR_POL); #endif -#if defined(CONFIG_MX6) setbits_le32(ctrl, UCTRL_OVER_CUR_DIS); -#elif defined(CONFIG_MX7) - setbits_le32(ctrl, UCTRL_OVER_CUR_DIS | UCTRL_PM); -#endif } /** -- 2.9.0 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 4/9] usb: ehci-mx6: introduce config for high active power pin 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner ` (2 preceding siblings ...) 2016-07-13 7:25 ` [U-Boot] [PATCH v2 3/9] usb: ehci-mx6: configure power polarity in usb_power_config Stefan Agner @ 2016-07-13 7:25 ` Stefan Agner 2016-07-13 12:11 ` Otavio Salvador 2016-07-13 7:25 ` [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type Stefan Agner ` (5 subsequent siblings) 9 siblings, 1 reply; 27+ messages in thread From: Stefan Agner @ 2016-07-13 7:25 UTC (permalink / raw) To: u-boot From: Stefan Agner <stefan.agner@toradex.com> Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the OTG Power Pin to be high active. Low active is the reset value of the affected configuration register, hence the config option is named by the non-reset configuration. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> --- configs/mx7dsabresd_defconfig | 1 + configs/warp7_defconfig | 1 + drivers/usb/host/Kconfig | 9 +++++++++ drivers/usb/host/ehci-mx6.c | 4 ++++ 4 files changed, 15 insertions(+) diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index 9dbc9c7..d6dafcd 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y CONFIG_USB_GADGET=y CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index ba56c84..f0c165b 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -25,4 +25,5 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y CONFIG_OF_LIBFDT=y diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 7992cb4..09db938 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -81,6 +81,15 @@ config USB_EHCI_MX7 ---help--- Enables support for the on-chip EHCI controller on i.MX7 SoCs. +if USB_EHCI_MX7 + +config MXC_USB_OTG_HACTIVE + bool "USB Power pin high active" + ---help--- + Set the USB Power pin polarity to be high active (PWR_POL) + +endif + config USB_EHCI_MSM bool "Support for Qualcomm on-chip EHCI USB controller" depends on DM_USB diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 277f461..8352c2b 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -216,7 +216,11 @@ static void usb_power_config(int index) clrbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB); /* Set power polarity to high active */ +#ifdef CONFIG_MXC_USB_OTG_HACTIVE setbits_le32(ctrl, UCTRL_PWR_POL); +#else + clrbits_le32(ctrl, UCTRL_PWR_POL); +#endif } int usb_phy_mode(int port) -- 2.9.0 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 4/9] usb: ehci-mx6: introduce config for high active power pin 2016-07-13 7:25 ` [U-Boot] [PATCH v2 4/9] usb: ehci-mx6: introduce config for high active power pin Stefan Agner @ 2016-07-13 12:11 ` Otavio Salvador 2016-07-13 16:03 ` Stefan Agner 0 siblings, 1 reply; 27+ messages in thread From: Otavio Salvador @ 2016-07-13 12:11 UTC (permalink / raw) To: u-boot On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <stefan@agner.ch> wrote: > From: Stefan Agner <stefan.agner@toradex.com> > > Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the > OTG Power Pin to be high active. Low active is the reset value > of the affected configuration register, hence the config option > is named by the non-reset configuration. > > Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Does all i.MX7 uses it? If so, kconfig could depends on it. -- Otavio Salvador O.S. Systems http://www.ossystems.com.br http://code.ossystems.com.br Mobile: +55 (53) 9981-7854 Mobile: +1 (347) 903-9750 ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 4/9] usb: ehci-mx6: introduce config for high active power pin 2016-07-13 12:11 ` Otavio Salvador @ 2016-07-13 16:03 ` Stefan Agner 0 siblings, 0 replies; 27+ messages in thread From: Stefan Agner @ 2016-07-13 16:03 UTC (permalink / raw) To: u-boot On 2016-07-13 05:11, Otavio Salvador wrote: > On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <stefan@agner.ch> wrote: >> From: Stefan Agner <stefan.agner@toradex.com> >> >> Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the >> OTG Power Pin to be high active. Low active is the reset value >> of the affected configuration register, hence the config option >> is named by the non-reset configuration. >> >> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> > > Does all i.MX7 uses it? If so, kconfig could depends on it. No, this is board specific. It happens that our board uses the reset value (low active), whereas all other board seem to use high active (which is now a Kconfig option). I decided to create a config option to set the "non-default" (reset) value, and make the reset value as new default. I assume that the currently supported boards use high active polarity since that was the code did before... -- Stefan ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner ` (3 preceding siblings ...) 2016-07-13 7:25 ` [U-Boot] [PATCH v2 4/9] usb: ehci-mx6: introduce config for high active power pin Stefan Agner @ 2016-07-13 7:25 ` Stefan Agner 2016-07-18 22:19 ` Fabio Estevam 2016-07-13 7:25 ` [U-Boot] [PATCH v2 6/9] mx7_common: Put display board info config into board file Stefan Agner ` (4 subsequent siblings) 9 siblings, 1 reply; 27+ messages in thread From: Stefan Agner @ 2016-07-13 7:25 UTC (permalink / raw) To: u-boot From: Stefan Agner <stefan.agner@toradex.com> This can be useful if the same U-Boot binary is used for boards available with a i.MX 7Solo and i.MX 7Dual. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> --- arch/arm/cpu/armv7/mx7/soc.c | 14 ++++++++++++++ include/configs/mx7_common.h | 2 ++ 2 files changed, 16 insertions(+) diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c index ef46c92..dead1d3 100644 --- a/arch/arm/cpu/armv7/mx7/soc.c +++ b/arch/arm/cpu/armv7/mx7/soc.c @@ -248,6 +248,20 @@ int arch_cpu_init(void) return 0; } +#ifdef CONFIG_ARCH_MISC_INIT +int arch_misc_init(void) +{ +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + if (is_mx7d()) + setenv("soc", "imx7d"); + else + setenv("soc", "imx7s"); +#endif + + return 0; +} +#endif + #ifdef CONFIG_SERIAL_TAG void get_board_serial(struct tag_serialnr *serialnr) { diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index fbc6de6..bc2833c 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -28,6 +28,8 @@ /* Enable iomux-lpsr support */ #define CONFIG_IOMUX_LPSR +#define CONFIG_ARCH_MISC_INIT + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -- 2.9.0 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type 2016-07-13 7:25 ` [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type Stefan Agner @ 2016-07-18 22:19 ` Fabio Estevam 2016-07-18 22:21 ` Stefan Agner 0 siblings, 1 reply; 27+ messages in thread From: Fabio Estevam @ 2016-07-18 22:19 UTC (permalink / raw) To: u-boot On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <stefan@agner.ch> wrote: > From: Stefan Agner <stefan.agner@toradex.com> > > This can be useful if the same U-Boot binary is used for boards > available with a i.MX 7Solo and i.MX 7Dual. > > Signed-off-by: Stefan Agner <stefan.agner@toradex.com> > Reviewed-by: Simon Glass <sjg@chromium.org> > --- > > arch/arm/cpu/armv7/mx7/soc.c | 14 ++++++++++++++ > include/configs/mx7_common.h | 2 ++ > 2 files changed, 16 insertions(+) > > diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c > index ef46c92..dead1d3 100644 > --- a/arch/arm/cpu/armv7/mx7/soc.c > +++ b/arch/arm/cpu/armv7/mx7/soc.c > @@ -248,6 +248,20 @@ int arch_cpu_init(void) > return 0; > } > > +#ifdef CONFIG_ARCH_MISC_INIT > +int arch_misc_init(void) > +{ > +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG > + if (is_mx7d()) > + setenv("soc", "imx7d"); > + else > + setenv("soc", "imx7s"); > +#endif > + > + return 0; > +} > +#endif What about adding the following code in your board file? int board_late_init(void) { #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG if (is_mx7d()) setenv("board_rev", "MX7D"); else setenv("board_rev", "MX7S"); #endif return 0; } This was the suggestion I got from Tom when I was doing runtime SoC detection for mx6cubox. ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type 2016-07-18 22:19 ` Fabio Estevam @ 2016-07-18 22:21 ` Stefan Agner 2016-07-19 0:36 ` Tom Rini 0 siblings, 1 reply; 27+ messages in thread From: Stefan Agner @ 2016-07-18 22:21 UTC (permalink / raw) To: u-boot On 2016-07-18 15:19, Fabio Estevam wrote: > On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <stefan@agner.ch> wrote: >> From: Stefan Agner <stefan.agner@toradex.com> >> >> This can be useful if the same U-Boot binary is used for boards >> available with a i.MX 7Solo and i.MX 7Dual. >> >> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> >> Reviewed-by: Simon Glass <sjg@chromium.org> >> --- >> >> arch/arm/cpu/armv7/mx7/soc.c | 14 ++++++++++++++ >> include/configs/mx7_common.h | 2 ++ >> 2 files changed, 16 insertions(+) >> >> diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c >> index ef46c92..dead1d3 100644 >> --- a/arch/arm/cpu/armv7/mx7/soc.c >> +++ b/arch/arm/cpu/armv7/mx7/soc.c >> @@ -248,6 +248,20 @@ int arch_cpu_init(void) >> return 0; >> } >> >> +#ifdef CONFIG_ARCH_MISC_INIT >> +int arch_misc_init(void) >> +{ >> +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG >> + if (is_mx7d()) >> + setenv("soc", "imx7d"); >> + else >> + setenv("soc", "imx7s"); >> +#endif >> + >> + return 0; >> +} >> +#endif > > What about adding the following code in your board file? > > int board_late_init(void) > { > #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG > if (is_mx7d()) > setenv("board_rev", "MX7D"); > else > setenv("board_rev", "MX7S"); > #endif > > return 0; > } > > This was the suggestion I got from Tom when I was doing runtime SoC > detection for mx6cubox. I followed the runtime detection for Vybrid in: arch/arm/cpu/armv7/vf610/generic.c But sure, doing it at board level would be possible too. Due to the similarity of i.MX 7Solo and 7Dual there will probably be many board designs available in this two variants, hence I feel it would be worthwhile to have it on arch level... -- Stefan ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type 2016-07-18 22:21 ` Stefan Agner @ 2016-07-19 0:36 ` Tom Rini 2016-07-19 2:19 ` Stefan Agner 2016-07-19 13:59 ` Stefano Babic 0 siblings, 2 replies; 27+ messages in thread From: Tom Rini @ 2016-07-19 0:36 UTC (permalink / raw) To: u-boot On Mon, Jul 18, 2016 at 03:21:39PM -0700, Stefan Agner wrote: > On 2016-07-18 15:19, Fabio Estevam wrote: > > On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <stefan@agner.ch> wrote: > >> From: Stefan Agner <stefan.agner@toradex.com> > >> > >> This can be useful if the same U-Boot binary is used for boards > >> available with a i.MX 7Solo and i.MX 7Dual. > >> > >> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> > >> Reviewed-by: Simon Glass <sjg@chromium.org> > >> --- > >> > >> arch/arm/cpu/armv7/mx7/soc.c | 14 ++++++++++++++ > >> include/configs/mx7_common.h | 2 ++ > >> 2 files changed, 16 insertions(+) > >> > >> diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c > >> index ef46c92..dead1d3 100644 > >> --- a/arch/arm/cpu/armv7/mx7/soc.c > >> +++ b/arch/arm/cpu/armv7/mx7/soc.c > >> @@ -248,6 +248,20 @@ int arch_cpu_init(void) > >> return 0; > >> } > >> > >> +#ifdef CONFIG_ARCH_MISC_INIT > >> +int arch_misc_init(void) > >> +{ > >> +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG > >> + if (is_mx7d()) > >> + setenv("soc", "imx7d"); > >> + else > >> + setenv("soc", "imx7s"); > >> +#endif > >> + > >> + return 0; > >> +} > >> +#endif > > > > What about adding the following code in your board file? > > > > int board_late_init(void) > > { > > #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG > > if (is_mx7d()) > > setenv("board_rev", "MX7D"); > > else > > setenv("board_rev", "MX7S"); > > #endif > > > > return 0; > > } > > > > This was the suggestion I got from Tom when I was doing runtime SoC > > detection for mx6cubox. > > I followed the runtime detection for Vybrid in: > arch/arm/cpu/armv7/vf610/generic.c > > But sure, doing it at board level would be possible too. > > Due to the similarity of i.MX 7Solo and 7Dual there will probably be > many board designs available in this two variants, hence I feel it would > be worthwhile to have it on arch level... So, yeah, I may have said the wrong thing for cubox, maybe not. I think that for the actual SoC (and 'soc') we should set that as high as we easily and _correctly_ can. We set 'board_rev' today in the board files, and this makes sense to me, especially when used as the "board" part, eg: board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c: setenv("board_rev", "9X9"); board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c: setenv("board_rev", "14X14") We set 'board_rev' today in a number of board files and a quick review just now tells me that yes, we should have done that higher up. Probably. Using the mx6cubox example, I see: static bool is_mx6q(void) { if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) return true; Can we move this to global code, check for each of the MX6 variants, MX7 variants and always be returning what we return today? -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20160718/387189e6/attachment.sig> ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type 2016-07-19 0:36 ` Tom Rini @ 2016-07-19 2:19 ` Stefan Agner 2016-07-19 12:33 ` Tom Rini 2016-07-19 13:59 ` Stefano Babic 1 sibling, 1 reply; 27+ messages in thread From: Stefan Agner @ 2016-07-19 2:19 UTC (permalink / raw) To: u-boot On 2016-07-18 17:36, Tom Rini wrote: > On Mon, Jul 18, 2016 at 03:21:39PM -0700, Stefan Agner wrote: >> On 2016-07-18 15:19, Fabio Estevam wrote: >> > On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <stefan@agner.ch> wrote: >> >> From: Stefan Agner <stefan.agner@toradex.com> >> >> >> >> This can be useful if the same U-Boot binary is used for boards >> >> available with a i.MX 7Solo and i.MX 7Dual. >> >> >> >> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> >> >> Reviewed-by: Simon Glass <sjg@chromium.org> >> >> --- >> >> >> >> arch/arm/cpu/armv7/mx7/soc.c | 14 ++++++++++++++ >> >> include/configs/mx7_common.h | 2 ++ >> >> 2 files changed, 16 insertions(+) >> >> >> >> diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c >> >> index ef46c92..dead1d3 100644 >> >> --- a/arch/arm/cpu/armv7/mx7/soc.c >> >> +++ b/arch/arm/cpu/armv7/mx7/soc.c >> >> @@ -248,6 +248,20 @@ int arch_cpu_init(void) >> >> return 0; >> >> } >> >> >> >> +#ifdef CONFIG_ARCH_MISC_INIT >> >> +int arch_misc_init(void) >> >> +{ >> >> +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG >> >> + if (is_mx7d()) >> >> + setenv("soc", "imx7d"); >> >> + else >> >> + setenv("soc", "imx7s"); >> >> +#endif >> >> + >> >> + return 0; >> >> +} >> >> +#endif >> > >> > What about adding the following code in your board file? >> > >> > int board_late_init(void) >> > { >> > #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG >> > if (is_mx7d()) >> > setenv("board_rev", "MX7D"); >> > else >> > setenv("board_rev", "MX7S"); >> > #endif >> > >> > return 0; >> > } >> > >> > This was the suggestion I got from Tom when I was doing runtime SoC >> > detection for mx6cubox. >> >> I followed the runtime detection for Vybrid in: >> arch/arm/cpu/armv7/vf610/generic.c >> >> But sure, doing it at board level would be possible too. >> >> Due to the similarity of i.MX 7Solo and 7Dual there will probably be >> many board designs available in this two variants, hence I feel it would >> be worthwhile to have it on arch level... > > So, yeah, I may have said the wrong thing for cubox, maybe not. I think > that for the actual SoC (and 'soc') we should set that as high as we > easily and _correctly_ can. We set 'board_rev' today in the board Can I take this as an Ack from your side Tom? Also note that the current default for i.MX 7 is "mx7" which is not useful to build the typically used (Linux) device tree file name. It also seems that no i.MX 6/7 board uses ${soc} in its default environment... IMHO ${soc} should be the first part of the device tree file, which is in this case imx7d- (and imx7s-...) > files, and this makes sense to me, especially when used as the "board" > part, eg: > board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c: setenv("board_rev", "9X9"); > board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c: setenv("board_rev", "14X14") > > We set 'board_rev' today in a number of board files and a quick review > just now tells me that yes, we should have done that higher up. > Probably. Using the mx6cubox example, I see: > static bool is_mx6q(void) > { > if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) > return true; > > Can we move this to global code, check for each of the MX6 variants, MX7 > variants and always be returning what we return today? What is board_rev commonly used for? It sounds more board specific, so we certainly would have to have a way to overwrite it on board level (e.g. if somebody has two MX6Q SKUs?) -- Stefan ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type 2016-07-19 2:19 ` Stefan Agner @ 2016-07-19 12:33 ` Tom Rini 0 siblings, 0 replies; 27+ messages in thread From: Tom Rini @ 2016-07-19 12:33 UTC (permalink / raw) To: u-boot On Mon, Jul 18, 2016 at 07:19:05PM -0700, Stefan Agner wrote: > On 2016-07-18 17:36, Tom Rini wrote: > > On Mon, Jul 18, 2016 at 03:21:39PM -0700, Stefan Agner wrote: > >> On 2016-07-18 15:19, Fabio Estevam wrote: > >> > On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <stefan@agner.ch> wrote: > >> >> From: Stefan Agner <stefan.agner@toradex.com> > >> >> > >> >> This can be useful if the same U-Boot binary is used for boards > >> >> available with a i.MX 7Solo and i.MX 7Dual. > >> >> > >> >> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> > >> >> Reviewed-by: Simon Glass <sjg@chromium.org> > >> >> --- > >> >> > >> >> arch/arm/cpu/armv7/mx7/soc.c | 14 ++++++++++++++ > >> >> include/configs/mx7_common.h | 2 ++ > >> >> 2 files changed, 16 insertions(+) > >> >> > >> >> diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c > >> >> index ef46c92..dead1d3 100644 > >> >> --- a/arch/arm/cpu/armv7/mx7/soc.c > >> >> +++ b/arch/arm/cpu/armv7/mx7/soc.c > >> >> @@ -248,6 +248,20 @@ int arch_cpu_init(void) > >> >> return 0; > >> >> } > >> >> > >> >> +#ifdef CONFIG_ARCH_MISC_INIT > >> >> +int arch_misc_init(void) > >> >> +{ > >> >> +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG > >> >> + if (is_mx7d()) > >> >> + setenv("soc", "imx7d"); > >> >> + else > >> >> + setenv("soc", "imx7s"); > >> >> +#endif > >> >> + > >> >> + return 0; > >> >> +} > >> >> +#endif > >> > > >> > What about adding the following code in your board file? > >> > > >> > int board_late_init(void) > >> > { > >> > #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG > >> > if (is_mx7d()) > >> > setenv("board_rev", "MX7D"); > >> > else > >> > setenv("board_rev", "MX7S"); > >> > #endif > >> > > >> > return 0; > >> > } > >> > > >> > This was the suggestion I got from Tom when I was doing runtime SoC > >> > detection for mx6cubox. > >> > >> I followed the runtime detection for Vybrid in: > >> arch/arm/cpu/armv7/vf610/generic.c > >> > >> But sure, doing it at board level would be possible too. > >> > >> Due to the similarity of i.MX 7Solo and 7Dual there will probably be > >> many board designs available in this two variants, hence I feel it would > >> be worthwhile to have it on arch level... > > > > So, yeah, I may have said the wrong thing for cubox, maybe not. I think > > that for the actual SoC (and 'soc') we should set that as high as we > > easily and _correctly_ can. We set 'board_rev' today in the board > > Can I take this as an Ack from your side Tom? > > Also note that the current default for i.MX 7 is "mx7" which is not > useful to build the typically used (Linux) device tree file name. It > also seems that no i.MX 6/7 board uses ${soc} in its default > environment... > > IMHO ${soc} should be the first part of the device tree file, which is > in this case imx7d- (and imx7s-...) Making ${soc} have the correct and useful value, when CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is set seems fine to me, yes. > > files, and this makes sense to me, especially when used as the "board" > > part, eg: > > board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c: setenv("board_rev", "9X9"); > > board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c: setenv("board_rev", "14X14") > > > > We set 'board_rev' today in a number of board files and a quick review > > just now tells me that yes, we should have done that higher up. > > Probably. Using the mx6cubox example, I see: > > static bool is_mx6q(void) > > { > > if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) > > return true; > > > > Can we move this to global code, check for each of the MX6 variants, MX7 > > variants and always be returning what we return today? > > What is board_rev commonly used for? > > It sounds more board specific, so we certainly would have to have a way > to overwrite it on board level (e.g. if somebody has two MX6Q SKUs?) board_rev is really a board-specific variable, yes. The most common use of board_name / board_rev is to do shell logic to determine what the devicetree to load is. -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20160719/b207290d/attachment.sig> ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type 2016-07-19 0:36 ` Tom Rini 2016-07-19 2:19 ` Stefan Agner @ 2016-07-19 13:59 ` Stefano Babic 2016-07-19 14:06 ` Fabio Estevam 1 sibling, 1 reply; 27+ messages in thread From: Stefano Babic @ 2016-07-19 13:59 UTC (permalink / raw) To: u-boot Hi Tom, On 19/07/2016 02:36, Tom Rini wrote: > On Mon, Jul 18, 2016 at 03:21:39PM -0700, Stefan Agner wrote: >> On 2016-07-18 15:19, Fabio Estevam wrote: >>> On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <stefan@agner.ch> wrote: >>>> From: Stefan Agner <stefan.agner@toradex.com> >>>> >>>> This can be useful if the same U-Boot binary is used for boards >>>> available with a i.MX 7Solo and i.MX 7Dual. >>>> >>>> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> >>>> Reviewed-by: Simon Glass <sjg@chromium.org> >>>> --- >>>> >>>> arch/arm/cpu/armv7/mx7/soc.c | 14 ++++++++++++++ >>>> include/configs/mx7_common.h | 2 ++ >>>> 2 files changed, 16 insertions(+) >>>> >>>> diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c >>>> index ef46c92..dead1d3 100644 >>>> --- a/arch/arm/cpu/armv7/mx7/soc.c >>>> +++ b/arch/arm/cpu/armv7/mx7/soc.c >>>> @@ -248,6 +248,20 @@ int arch_cpu_init(void) >>>> return 0; >>>> } >>>> >>>> +#ifdef CONFIG_ARCH_MISC_INIT >>>> +int arch_misc_init(void) >>>> +{ >>>> +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG >>>> + if (is_mx7d()) >>>> + setenv("soc", "imx7d"); >>>> + else >>>> + setenv("soc", "imx7s"); >>>> +#endif >>>> + >>>> + return 0; >>>> +} >>>> +#endif >>> >>> What about adding the following code in your board file? >>> >>> int board_late_init(void) >>> { >>> #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG >>> if (is_mx7d()) >>> setenv("board_rev", "MX7D"); >>> else >>> setenv("board_rev", "MX7S"); >>> #endif >>> >>> return 0; >>> } >>> >>> This was the suggestion I got from Tom when I was doing runtime SoC >>> detection for mx6cubox. >> >> I followed the runtime detection for Vybrid in: >> arch/arm/cpu/armv7/vf610/generic.c >> >> But sure, doing it at board level would be possible too. >> >> Due to the similarity of i.MX 7Solo and 7Dual there will probably be >> many board designs available in this two variants, hence I feel it would >> be worthwhile to have it on arch level... > > So, yeah, I may have said the wrong thing for cubox, maybe not. I think > that for the actual SoC (and 'soc') we should set that as high as we > easily and _correctly_ can. We set 'board_rev' today in the board > files, and this makes sense to me, especially when used as the "board" > part, eg: > board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c: setenv("board_rev", "9X9"); > board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c: setenv("board_rev", "14X14") > > We set 'board_rev' today in a number of board files and a quick review > just now tells me that yes, we should have done that higher up. > Probably. Using the mx6cubox example, I see: > static bool is_mx6q(void) > { > if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) > return true; > > Can we move this to global code, check for each of the MX6 variants, MX7 > variants and always be returning what we return today? > We have already a global code, rather there are some boards (cubox, but also cgtqmx6eval) with own function. All is_mx6X() macros / functions are in arch/arm/include/asm/imx-common/sys_proto.h. The function can be replaced by is_mx6dq() from sysproto.h Best regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type 2016-07-19 13:59 ` Stefano Babic @ 2016-07-19 14:06 ` Fabio Estevam 2016-07-19 14:21 ` Stefano Babic 0 siblings, 1 reply; 27+ messages in thread From: Fabio Estevam @ 2016-07-19 14:06 UTC (permalink / raw) To: u-boot Hi Stefano, On Tue, Jul 19, 2016 at 10:59 AM, Stefano Babic <sbabic@denx.de> wrote: > We have already a global code, rather there are some boards (cubox, but > also cgtqmx6eval) with own function. > > All is_mx6X() macros / functions are in > arch/arm/include/asm/imx-common/sys_proto.h. The function can be > replaced by is_mx6dq() from sysproto.h Yes, I will send a patch converting these boards to use the common is_mx6 common macros. Thanks ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type 2016-07-19 14:06 ` Fabio Estevam @ 2016-07-19 14:21 ` Stefano Babic 0 siblings, 0 replies; 27+ messages in thread From: Stefano Babic @ 2016-07-19 14:21 UTC (permalink / raw) To: u-boot Hi Fabio, On 19/07/2016 16:06, Fabio Estevam wrote: > Hi Stefano, > > On Tue, Jul 19, 2016 at 10:59 AM, Stefano Babic <sbabic@denx.de> wrote: > >> We have already a global code, rather there are some boards (cubox, but >> also cgtqmx6eval) with own function. >> >> All is_mx6X() macros / functions are in >> arch/arm/include/asm/imx-common/sys_proto.h. The function can be >> replaced by is_mx6dq() from sysproto.h > > Yes, I will send a patch converting these boards to use the common > is_mx6 common macros. Thanks !! Regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 6/9] mx7_common: Put display board info config into board file 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner ` (4 preceding siblings ...) 2016-07-13 7:25 ` [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type Stefan Agner @ 2016-07-13 7:25 ` Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 7/9] mx7_common: use Kconfig for ARMv7 non-secure mode Stefan Agner ` (3 subsequent siblings) 9 siblings, 0 replies; 27+ messages in thread From: Stefan Agner @ 2016-07-13 7:25 UTC (permalink / raw) To: u-boot CONFIG_DISPLAY_BOARDINFO should not be placed in mx7_common because some boards might need a different config such as CONFIG_DISPLAY_BOARDINFO_LATE. Move it to the board file instead. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> --- include/configs/mx7_common.h | 1 - include/configs/mx7dsabresd.h | 2 ++ include/configs/warp7.h | 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index bc2833c..5dd6207 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -31,7 +31,6 @@ #define CONFIG_ARCH_MISC_INIT #define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_LOADADDR 0x80800000 #define CONFIG_SYS_TEXT_BASE 0x87800000 diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index cfaf59b..822d81f 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -22,6 +22,8 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT +#define CONFIG_DISPLAY_BOARDINFO + /* Uncomment to enable secure boot support */ /* #define CONFIG_SECURE_BOOT */ #define CONFIG_CSF_SIZE 0x4000 diff --git a/include/configs/warp7.h b/include/configs/warp7.h index af39817..4c6e23c 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -21,6 +21,8 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT +#define CONFIG_DISPLAY_BOARDINFO + /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR #define CONFIG_SUPPORT_EMMC_BOOT -- 2.9.0 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 7/9] mx7_common: use Kconfig for ARMv7 non-secure mode 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner ` (5 preceding siblings ...) 2016-07-13 7:25 ` [U-Boot] [PATCH v2 6/9] mx7_common: Put display board info config into board file Stefan Agner @ 2016-07-13 7:25 ` Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 8/9] imx_watchdog: add weak attribute to reset_cpu function Stefan Agner ` (2 subsequent siblings) 9 siblings, 0 replies; 27+ messages in thread From: Stefan Agner @ 2016-07-13 7:25 UTC (permalink / raw) To: u-boot From: Stefan Agner <stefan.agner@toradex.com> Use existing Kconfig symbols to let the user configure whether to build a U-Boot with non-secure mode support or not. This also allows to enable virtualization extension easily. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> --- arch/arm/cpu/armv7/mx7/Kconfig | 2 ++ configs/mx7dsabresd_defconfig | 1 + configs/warp7_defconfig | 1 + include/configs/mx7_common.h | 7 ------- 4 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig index ecfa4a2..dd51384 100644 --- a/arch/arm/cpu/armv7/mx7/Kconfig +++ b/arch/arm/cpu/armv7/mx7/Kconfig @@ -3,6 +3,8 @@ if ARCH_MX7 config MX7 bool select ROM_UNIFIED_SECTIONS + select CPU_V7_HAS_VIRT + select CPU_V7_HAS_NONSEC default y config MX7D diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index d6dafcd..b3a708e 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_TARGET_MX7DSABRESD=y +# CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index f0c165b..28a3dfd 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_TARGET_WARP7=y +# CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg" diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 5dd6207..9f80f9f 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -71,15 +71,8 @@ #define CONFIG_CMD_FUSE #define CONFIG_MXC_OCOTP -/* - * Default boot linux kernel in no secure mode. - * If want to boot kernel in secure mode, please define CONFIG_MX7_SEC - */ -#ifndef CONFIG_MX7_SEC -#define CONFIG_ARMV7_NONSEC #define CONFIG_ARMV7_PSCI #define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE 0x00900000 -#endif #endif -- 2.9.0 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 8/9] imx_watchdog: add weak attribute to reset_cpu function 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner ` (6 preceding siblings ...) 2016-07-13 7:25 ` [U-Boot] [PATCH v2 7/9] mx7_common: use Kconfig for ARMv7 non-secure mode Stefan Agner @ 2016-07-13 7:25 ` Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 9/9] colibri_imx7: add Colibri iMX7S/iMX7D module support Stefan Agner 2016-07-18 20:59 ` [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner 9 siblings, 0 replies; 27+ messages in thread From: Stefan Agner @ 2016-07-13 7:25 UTC (permalink / raw) To: u-boot This allows to overwrite reset_cpu function in case a board level reset is preferred (e.g. through PMIC). Signed-off-by: Stefan Agner <stefan.agner@toradex.com> --- drivers/watchdog/imx_watchdog.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index f9f8175..2938d9f 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -39,7 +39,7 @@ void hw_watchdog_init(void) } #endif -void reset_cpu(ulong addr) +void __attribute__((weak)) reset_cpu(ulong addr) { struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; -- 2.9.0 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 9/9] colibri_imx7: add Colibri iMX7S/iMX7D module support 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner ` (7 preceding siblings ...) 2016-07-13 7:25 ` [U-Boot] [PATCH v2 8/9] imx_watchdog: add weak attribute to reset_cpu function Stefan Agner @ 2016-07-13 7:25 ` Stefan Agner 2016-07-19 14:14 ` Stefano Babic 2016-07-18 20:59 ` [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner 9 siblings, 1 reply; 27+ messages in thread From: Stefan Agner @ 2016-07-13 7:25 UTC (permalink / raw) To: u-boot From: Stefan Agner <stefan.agner@toradex.com> This commit adds support for the Toradex Computer on Modules Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence can be easily supported by one board. The board code detects RAM size at runtime which is one of the differences between the two boards. The board also uses the UART's in DTE mode, hence making use of the new DTE support via serial DM. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> --- arch/arm/cpu/armv7/mx7/Kconfig | 7 + board/toradex/colibri_imx7/Kconfig | 12 + board/toradex/colibri_imx7/MAINTAINERS | 6 + board/toradex/colibri_imx7/Makefile | 6 + board/toradex/colibri_imx7/colibri_imx7.c | 420 ++++++++++++++++++++++++++++++ board/toradex/colibri_imx7/imximage.cfg | 150 +++++++++++ configs/colibri_imx7_defconfig | 40 +++ include/configs/colibri_imx7.h | 248 ++++++++++++++++++ 8 files changed, 889 insertions(+) create mode 100644 board/toradex/colibri_imx7/Kconfig create mode 100644 board/toradex/colibri_imx7/MAINTAINERS create mode 100644 board/toradex/colibri_imx7/Makefile create mode 100644 board/toradex/colibri_imx7/colibri_imx7.c create mode 100644 board/toradex/colibri_imx7/imximage.cfg create mode 100644 configs/colibri_imx7_defconfig create mode 100644 include/configs/colibri_imx7.h diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig index dd51384..5fdc8dd 100644 --- a/arch/arm/cpu/armv7/mx7/Kconfig +++ b/arch/arm/cpu/armv7/mx7/Kconfig @@ -27,12 +27,19 @@ config TARGET_WARP7 select DM select DM_THERMAL +config TARGET_COLIBRI_IMX7 + bool "Support Colibri iMX7S/iMX7D modules" + select DM + select DM_SERIAL + select DM_THERMAL + endchoice config SYS_SOC default "mx7" source "board/freescale/mx7dsabresd/Kconfig" +source "board/toradex/colibri_imx7/Kconfig" source "board/warp7/Kconfig" endif diff --git a/board/toradex/colibri_imx7/Kconfig b/board/toradex/colibri_imx7/Kconfig new file mode 100644 index 0000000..622ce66 --- /dev/null +++ b/board/toradex/colibri_imx7/Kconfig @@ -0,0 +1,12 @@ +if TARGET_COLIBRI_IMX7 + +config SYS_BOARD + default "colibri_imx7" + +config SYS_VENDOR + default "toradex" + +config SYS_CONFIG_NAME + default "colibri_imx7" + +endif diff --git a/board/toradex/colibri_imx7/MAINTAINERS b/board/toradex/colibri_imx7/MAINTAINERS new file mode 100644 index 0000000..5ffb241 --- /dev/null +++ b/board/toradex/colibri_imx7/MAINTAINERS @@ -0,0 +1,6 @@ +Colibri iMX7 +M: Stefan Agner <stefan.agner@toradex.com> +S: Maintained +F: board/toradex/colibri_imx7/ +F: include/configs/colibri_imx7.h +F: configs/colibri_imx7_defconfig diff --git a/board/toradex/colibri_imx7/Makefile b/board/toradex/colibri_imx7/Makefile new file mode 100644 index 0000000..ea597de --- /dev/null +++ b/board/toradex/colibri_imx7/Makefile @@ -0,0 +1,6 @@ +# Copyright (C) 2016 Toradex AG +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := colibri_imx7.o diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c new file mode 100644 index 0000000..b36f580 --- /dev/null +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -0,0 +1,420 @@ +/* + * Copyright (C) 2016 Toradex AG + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx7-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/imx-common/boot_mode.h> +#include <asm/imx-common/iomux-v3.h> +#include <asm/imx-common/mxc_i2c.h> +#include <asm/io.h> +#include <common.h> +#include <dm.h> +#include <dm/platform_data/serial_mxc.h> +#include <fsl_esdhc.h> +#include <i2c.h> +#include <linux/sizes.h> +#include <mmc.h> +#include <miiphy.h> +#include <netdev.h> +#include <usb/ehci-ci.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ + PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ + PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) +#define ENET_PAD_CTRL_MII (PAD_CTL_DSE_3P3V_32OHM) + +#define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) + +#define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ + PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM) + +#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \ + PAD_CTL_DSE_3P3V_49OHM) + +#define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS) + +#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM) + +#ifdef CONFIG_SYS_I2C_MXC +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +/* I2C1 for PMIC */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX7D_PAD_GPIO1_IO04__I2C1_SCL | PC, + .gpio_mode = MX7D_PAD_GPIO1_IO04__GPIO1_IO4 | PC, + .gp = IMX_GPIO_NR(1, 4), + }, + .sda = { + .i2c_mode = MX7D_PAD_GPIO1_IO05__I2C1_SDA | PC, + .gpio_mode = MX7D_PAD_GPIO1_IO05__GPIO1_IO5 | PC, + .gp = IMX_GPIO_NR(1, 5), + }, +}; +/* I2C4 for Colibri I2C */ +static struct i2c_pads_info i2c_pad_info4 = { + .scl = { + .i2c_mode = MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL | PC, + .gpio_mode = MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 | PC, + .gp = IMX_GPIO_NR(7, 8), + }, + .sda = { + .i2c_mode = MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA | PC, + .gpio_mode = MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 | PC, + .gp = IMX_GPIO_NR(7, 9), + }, +}; +#endif + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc1_pads[] = { + MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + + MX7D_PAD_GPIO1_IO00__GPIO1_IO0 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#ifdef CONFIG_NAND_MXS +static iomux_v3_cfg_t const gpmi_pads[] = { + MX7D_PAD_SD3_DATA0__NAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_DATA1__NAND_DATA01 | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_DATA2__NAND_DATA02 | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_DATA3__NAND_DATA03 | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_DATA4__NAND_DATA04 | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_DATA5__NAND_DATA05 | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_DATA6__NAND_DATA06 | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_DATA7__NAND_DATA07 | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_CLK__NAND_CLE | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_CMD__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_STROBE__NAND_RE_B | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SD3_RESET_B__NAND_WE_B | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL), + MX7D_PAD_SAI1_TX_DATA__NAND_READY_B | MUX_PAD_CTRL(NAND_PAD_READY0_CTRL), +}; + +static void setup_gpmi_nand(void) +{ + imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads)); + + /* NAND_USDHC_BUS_CLK is set in rom */ + set_clk_nand(); +} +#endif + +static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { + MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_STROBE__SD3_STROBE | MUX_PAD_CTRL(USDHC_PAD_CTRL), + + MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +#ifdef CONFIG_VIDEO_MXS +static iomux_v3_cfg_t const lcd_pads[] = { + MX7D_PAD_LCD_CLK__LCD_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_ENABLE__LCD_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_HSYNC__LCD_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_VSYNC__LCD_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA00__LCD_DATA0 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA01__LCD_DATA1 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA02__LCD_DATA2 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA03__LCD_DATA3 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA04__LCD_DATA4 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA05__LCD_DATA5 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA06__LCD_DATA6 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA07__LCD_DATA7 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA08__LCD_DATA8 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA09__LCD_DATA9 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA10__LCD_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA11__LCD_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA12__LCD_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA13__LCD_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA14__LCD_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA15__LCD_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA16__LCD_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX7D_PAD_LCD_DATA17__LCD_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL), +}; + +static iomux_v3_cfg_t const backlight_pads[] = { + /* Backlight On */ + MX7D_PAD_SD1_WP__GPIO5_IO1 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* Backlight PWM<A> (multiplexed pin) */ + MX7D_PAD_GPIO1_IO08__GPIO1_IO8 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#define GPIO_BL_ON IMX_GPIO_NR(5, 1) +#define GPIO_PWM_A IMX_GPIO_NR(1, 8) + +static int setup_lcd(void) +{ + imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); + + imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); + + /* Set BL_ON */ + gpio_request(GPIO_BL_ON, "BL_ON"); + gpio_direction_output(GPIO_BL_ON, 1); + + /* Set PWM<A> to full brightness (assuming inversed polarity) */ + gpio_request(GPIO_PWM_A, "PWM<A>"); + gpio_direction_output(GPIO_PWM_A, 0); + + return 0; +} +#endif + +#ifdef CONFIG_FEC_MXC +static iomux_v3_cfg_t const fec1_pads[] = { +#ifndef CONFIG_COLIBRI_EXT_PHYCLK + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 | MUX_PAD_CTRL(ENET_PAD_CTRL) | MUX_MODE_SION, +#else + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 | MUX_PAD_CTRL(ENET_PAD_CTRL), +#endif + MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), + MX7D_PAD_SD2_WP__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static void setup_iomux_fec(void) +{ + imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads)); +} +#endif + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); +} + +#ifdef CONFIG_FSL_ESDHC + +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 0) + +static struct fsl_esdhc_cfg usdhc_cfg[] = { + {USDHC1_BASE_ADDR, 0, 4}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = !gpio_get_value(USDHC1_CD_GPIO); + break; + } + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + int i, ret; + /* USDHC1 is mmc0 */ + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + switch (i) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); + gpio_request(USDHC1_CD_GPIO, "usdhc1_cd"); + gpio_direction_input(USDHC1_CD_GPIO); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) than supported by the board\n", i + 1); + return -EINVAL; + } + + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + if (ret) + return ret; + } + + return 0; +} +#endif + +#ifdef CONFIG_FEC_MXC +int board_eth_init(bd_t *bis) +{ + int ret; + + setup_iomux_fec(); + + ret = fecmxc_initialize_multi(bis, 0, + CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE); + if (ret) + printf("FEC1 MXC: %s:failed\n", __func__); + + return ret; +} + +static int setup_fec(void) +{ + struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs + = (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + +#ifndef CONFIG_COLIBRI_EXT_PHYCLK + /* + * Use 50M anatop REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17] + * and output it on the pin + */ + clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], + IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK, + IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK); +#else + /* Use 50M external CLK for ENET1, set gpr1[13], clear gpr1[17] */ + clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], + IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK, + IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK); +#endif + + return set_clk_enet(ENET_50MHz); +} + +int board_phy_config(struct phy_device *phydev) +{ + if (phydev->drv->config) + phydev->drv->config(phydev); + return 0; +} +#endif + +int board_early_init_f(void) +{ + setup_iomux_uart(); + +#ifdef CONFIG_SYS_I2C_MXC + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info4); +#endif + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_FEC_MXC + setup_fec(); +#endif + +#ifdef CONFIG_NAND_MXS + setup_gpmi_nand(); +#endif + +#ifdef CONFIG_VIDEO_MXS + setup_lcd(); +#endif + + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)}, + {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int board_late_init(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + + return 0; +} + +int checkboard(void) +{ + printf("Model: Toradex Colibri iMX7%c\n", + is_cpu_type(MXC_CPU_MX7D) ? 'D' : 'S'); + + return 0; +} + +#ifdef CONFIG_USB_EHCI_MX7 +static iomux_v3_cfg_t const usb_otg2_pads[] = { + MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int board_ehci_hcd_init(int port) +{ + switch (port) { + case 0: + break; + case 1: + if (is_cpu_type(MXC_CPU_MX7S)) + return -ENODEV; + + imx_iomux_v3_setup_multiple_pads(usb_otg2_pads, + ARRAY_SIZE(usb_otg2_pads)); + break; + default: + return -EINVAL; + } + return 0; +} +#endif + +static struct mxc_serial_platdata mxc_serial_plat = { + .reg = (struct mxc_uart *)UART1_IPS_BASE_ADDR, + .use_dte = true, +}; + +U_BOOT_DEVICE(mxc_serial) = { + .name = "serial_mxc", + .platdata = &mxc_serial_plat, +}; diff --git a/board/toradex/colibri_imx7/imximage.cfg b/board/toradex/colibri_imx7/imximage.cfg new file mode 100644 index 0000000..d891e82 --- /dev/null +++ b/board/toradex/colibri_imx7/imximage.cfg @@ -0,0 +1,150 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * 2015 Toradex AG + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include <config.h> + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : sd + */ + +BOOT_FROM sd + +/* + * Secure boot support + */ +#ifdef CONFIG_SECURE_BOOT +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* IOMUXC_GPR_GPR1 */ +DATA 4 0x30340004 0x4F400005 + +/* DDR3L */ +/* assuming MEMC_FREQ_RATIO = 2 */ +/* SRC_DDRC_RCR */ +DATA 4 0x30391000 0x00000002 +/* DDRC_MSTR */ +DATA 4 0x307a0000 0x01040001 +/* DDRC_DFIUPD0 */ +DATA 4 0x307a01a0 0x80400003 +/* DDRC_DFIUPD1 */ +DATA 4 0x307a01a4 0x00100020 +/* DDRC_DFIUPD2 */ +DATA 4 0x307a01a8 0x80100004 +/* DDRC_RFSHTMG */ +DATA 4 0x307a0064 0x00400045 +/* DDRC_MP_PCTRL_0 */ +DATA 4 0x307a0490 0x00000001 +/* DDRC_INIT0 */ +DATA 4 0x307a00d0 0x00020083 +/* DDRC_INIT1 */ +DATA 4 0x307a00d4 0x00690000 +/* DDRC_INIT3 MR0/MR1 */ +DATA 4 0x307a00dc 0x09300004 +/* DDRC_INIT4 MR2/MR3 */ +DATA 4 0x307a00e0 0x04480000 +/* DDRC_INIT5 */ +DATA 4 0x307a00e4 0x00100004 +/* DDRC_RANKCTL */ +DATA 4 0x307a00f4 0x0000033f +/* DDRC_DRAMTMG0 */ +DATA 4 0x307a0100 0x090b090a +/* DDRC_DRAMTMG1 */ +DATA 4 0x307a0104 0x000d020d +/* DDRC_DRAMTMG2 */ +DATA 4 0x307a0108 0x03040307 +/* DDRC_DRAMTMG3 */ +DATA 4 0x307a010c 0x00002006 +/* DDRC_DRAMTMG4 */ +DATA 4 0x307a0110 0x04020205 +/* DDRC_DRAMTMG5 */ +DATA 4 0x307a0114 0x03030202 +/* DDRC_DRAMTMG8 */ +DATA 4 0x307a0120 0x00000803 +/* DDRC_ZQCTL0 */ +DATA 4 0x307a0180 0x00800020 +/* DDRC_ZQCTL1 */ +DATA 4 0x307a0184 0x02001000 +/* DDRC_DFITMG0 */ +DATA 4 0x307a0190 0x02098204 +/* DDRC_DFITMG1 */ +DATA 4 0x307a0194 0x00030303 +/* DDRC_ADDRMAP0 */ +DATA 4 0x307a0200 0x0000001f +/* DDRC_ADDRMAP1 */ +DATA 4 0x307a0204 0x00080808 +/* DDRC_ADDRMAP5 */ +DATA 4 0x307a0214 0x07070707 +/* DDRC_ADDRMAP6 */ +DATA 4 0x307a0218 0x07070707 +/* DDRC_ODTCFG */ +DATA 4 0x307a0240 0x06000601 +/* DDRC_ODTMAP */ +DATA 4 0x307a0244 0x00000011 +/* SRC_DDRC_RCR */ +DATA 4 0x30391000 0x00000000 +/* DDR_PHY_PHY_CON0 */ +DATA 4 0x30790000 0x17420f40 +/* DDR_PHY_PHY_CON1 */ +DATA 4 0x30790004 0x10210100 +/* DDR_PHY_PHY_CON4 */ +DATA 4 0x30790010 0x00060807 +/* DDR_PHY_MDLL_CON0 */ +DATA 4 0x307900b0 0x1010007e +/* DDR_PHY_DRVDS_CON0 */ +DATA 4 0x3079009c 0x00000d6e +/* DDR_PHY_OFFSET_RD_CON0 */ +DATA 4 0x30790020 0x08080808 +/* DDR_PHY_OFFSET_WR_CON0 */ +DATA 4 0x30790030 0x08080808 +/* DDR_PHY_CMD_SDLL_CON0 */ +DATA 4 0x30790050 0x01000010 +DATA 4 0x30790050 0x00000010 + +/* DDR_PHY_ZQ_CON0 */ +DATA 4 0x307900c0 0x0e407304 +DATA 4 0x307900c0 0x0e447304 +DATA 4 0x307900c0 0x0e447306 +/* DDR_PHY_ZQ_CON1 */ +CHECK_BITS_SET 4 0x307900c4 0x1 +/* DDR_PHY_ZQ_CON0 */ +DATA 4 0x307900c0 0x0e447304 +DATA 4 0x307900c0 0x0e407304 + +/* CCM_CCGRn */ +DATA 4 0x30384130 0x00000000 +/* IOMUXC_GPR_GPR8 */ +DATA 4 0x30340020 0x00000178 +/* CCM_CCGRn */ +DATA 4 0x30384130 0x00000002 +/* DDR_PHY_LP_CON0 */ +DATA 4 0x30790018 0x0000000f + +/* DDRC_STAT */ +CHECK_BITS_SET 4 0x307a0004 0x1 diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig new file mode 100644 index 0000000..50c1201 --- /dev/null +++ b/configs/colibri_imx7_defconfig @@ -0,0 +1,40 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_TARGET_COLIBRI_IMX7=y +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D" +CONFIG_BOOTDELAY=1 +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="Colibri iMX7 # " +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_ASKENV=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Toradex" +CONFIG_G_DNL_VENDOR_NUM=0x1b67 +CONFIG_G_DNL_PRODUCT_NUM=0x4020 +CONFIG_OF_LIBFDT=y diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h new file mode 100644 index 0000000..6dc429b --- /dev/null +++ b/include/configs/colibri_imx7.h @@ -0,0 +1,248 @@ +/* + * Copyright 2016 Toradex AG + * + * Configuration settings for the Colibri iMX7 module. + * + * based on mx7dsabresd.h: + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __COLIBRI_IMX7_CONFIG_H +#define __COLIBRI_IMX7_CONFIG_H + +#include "mx7_common.h" + +#define CONFIG_SYS_THUMB_BUILD +#define CONFIG_USE_ARCH_MEMCPY +#define CONFIG_USE_ARCH_MEMSET + +/*#define CONFIG_DBG_MONITOR*/ +#define PHYS_SDRAM_SIZE SZ_512M + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_DISPLAY_BOARDINFO_LATE + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) + +/* Uncomment to enable secure boot support */ +/* #define CONFIG_SECURE_BOOT */ +#define CONFIG_CSF_SIZE 0x4000 + +#define CONFIG_CMD_BMODE + +/* Network */ +#define CONFIG_COLIBRI_EXT_PHYCLK +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 + +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_TFTP_TSIZE +#define CONFIG_IP_DEFRAG +#define CONFIG_TFTP_BLOCKSIZE 16384 + +/* ENET1 */ +#define IMX_FEC_BASE ENET_IPS_BASE_ADDR + +/* MMC Config*/ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +#undef CONFIG_BOOTM_PLAN9 +#undef CONFIG_BOOTM_RTEMS + +/* I2C configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_SPEED 100000 + +#define CONFIG_IPADDR 192.168.10.2 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_SERVERIP 192.168.10.1 + +#define MEM_LAYOUT_ENV_SETTINGS \ + "fdt_addr_r=0x82000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "kernel_addr_r=0x81000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +#define SD_BOOTCMD \ + "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ + "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \ + "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ + "run m4boot && " \ + "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \ + "load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + +#define NFS_BOOTCMD \ + "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ + "nfsboot=run setup; " \ + "setenv bootargs ${defargs} ${nfsargs} " \ + "${setupargs} ${vidargs}; echo Booting from NFS...;" \ + "dhcp ${kernel_addr_r} && " \ + "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + +#define UBI_BOOTCMD \ + "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ + "ubi.fm_autoconvert=1\0" \ + "ubiboot=run setup; " \ + "setenv bootargs ${defargs} ${ubiargs} " \ + "${setupargs} ${vidargs}; echo Booting from NAND...; " \ + "ubi part ubi && run m4boot && " \ + "ubi read ${kernel_addr_r} kernel && " \ + "ubi read ${fdt_addr_r} dtb && " \ + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + +#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + MEM_LAYOUT_ENV_SETTINGS \ + NFS_BOOTCMD \ + SD_BOOTCMD \ + UBI_BOOTCMD \ + "console=ttymxc0\0" \ + "defargs=\0" \ + "fdt_board=eval-v3\0" \ + "fdt_fixup=;\0" \ + "m4boot=;\0" \ + "ip_dyn=yes\0" \ + "kernel_file=zImage\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ + "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ + "${board}/flash_eth.img && source ${loadaddr}\0" \ + "setsdupdate=mmc rescan && setenv interface mmc && " \ + "fatload ${interface} 0:1 ${loadaddr} " \ + "${board}/flash_blk.img && source ${loadaddr}\0" \ + "setup=setenv setupargs " \ + "console=tty1 console=${console}" \ + ",${baudrate}n8 ${memargs} consoleblank=0 ${mtdparts}\0" \ + "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ + "setusbupdate=usb start && setenv interface usb && " \ + "fatload ${interface} 0:1 ${loadaddr} " \ + "${board}/flash_blk.img && source ${loadaddr}\0" \ + "splashpos=m,m\0" \ + "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP + +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_STACKSIZE SZ_128K + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_IN_NAND + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ +#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ +#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ +#define CONFIG_ENV_OFFSET (8 * SZ_64K) +#elif defined(CONFIG_ENV_IS_IN_NAND) +#define CONFIG_ENV_OFFSET (4 * 1024 * 1024) +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#endif + +#define CONFIG_NAND_MXS +#define CONFIG_CMD_NAND_TRIMFFS + +/* NAND stuff */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES +#define CONFIG_CMD_NAND_TORTURE + +/* UBI stuff */ +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_CMD_UBI +#define CONFIG_MTD_UBI_FASTMAP +#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */ + +/* Dynamic MTD partition support */ +#define CONFIG_CMD_MTDPARTS /* Enable 'mtdparts' command line support */ +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define MTDIDS_DEFAULT "nand0=gpmi-nand" +#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:" \ + "512k(mx7-bcb)," \ + "3584k(u-boot)ro," \ + "512k(u-boot-env)," \ + "-(ubi)" + +/* DMA stuff, needed for GPMI/MXS NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 + +/* USB Configs */ +#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET + +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +#define CONFIG_IMX_THERMAL + +#define CONFIG_USBD_HS + +#define CONFIG_USB_FUNCTION_MASS_STORAGE + +/* USB Device Firmware Update support */ +#define CONFIG_USB_FUNCTION_DFU +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +#define CONFIG_VIDEO +#ifdef CONFIG_VIDEO +#define CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO_MXS +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_CMD_BMP +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_VIDEO_BMP_LOGO +#endif + +#endif -- 2.9.0 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 9/9] colibri_imx7: add Colibri iMX7S/iMX7D module support 2016-07-13 7:25 ` [U-Boot] [PATCH v2 9/9] colibri_imx7: add Colibri iMX7S/iMX7D module support Stefan Agner @ 2016-07-19 14:14 ` Stefano Babic 2016-07-19 16:05 ` Stefan Agner 0 siblings, 1 reply; 27+ messages in thread From: Stefano Babic @ 2016-07-19 14:14 UTC (permalink / raw) To: u-boot Hi Stefan, just a couple of minor things: On 13/07/2016 09:25, Stefan Agner wrote: > From: Stefan Agner <stefan.agner@toradex.com> > > This commit adds support for the Toradex Computer on Modules > Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence > can be easily supported by one board. The board code detects RAM > size at runtime which is one of the differences between the two > boards. The board also uses the UART's in DTE mode, hence making > use of the new DTE support via serial DM. > > Signed-off-by: Stefan Agner <stefan.agner@toradex.com> > --- > > arch/arm/cpu/armv7/mx7/Kconfig | 7 + > board/toradex/colibri_imx7/Kconfig | 12 + > board/toradex/colibri_imx7/MAINTAINERS | 6 + > board/toradex/colibri_imx7/Makefile | 6 + > board/toradex/colibri_imx7/colibri_imx7.c | 420 ++++++++++++++++++++++++++++++ > board/toradex/colibri_imx7/imximage.cfg | 150 +++++++++++ > configs/colibri_imx7_defconfig | 40 +++ > include/configs/colibri_imx7.h | 248 ++++++++++++++++++ > 8 files changed, 889 insertions(+) > create mode 100644 board/toradex/colibri_imx7/Kconfig > create mode 100644 board/toradex/colibri_imx7/MAINTAINERS > create mode 100644 board/toradex/colibri_imx7/Makefile > create mode 100644 board/toradex/colibri_imx7/colibri_imx7.c > create mode 100644 board/toradex/colibri_imx7/imximage.cfg > create mode 100644 configs/colibri_imx7_defconfig > create mode 100644 include/configs/colibri_imx7.h > > diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig > index dd51384..5fdc8dd 100644 > --- a/arch/arm/cpu/armv7/mx7/Kconfig > +++ b/arch/arm/cpu/armv7/mx7/Kconfig > @@ -27,12 +27,19 @@ config TARGET_WARP7 > select DM > select DM_THERMAL > > +config TARGET_COLIBRI_IMX7 > + bool "Support Colibri iMX7S/iMX7D modules" > + select DM > + select DM_SERIAL > + select DM_THERMAL > + > endchoice > > config SYS_SOC > default "mx7" > > source "board/freescale/mx7dsabresd/Kconfig" > +source "board/toradex/colibri_imx7/Kconfig" > source "board/warp7/Kconfig" > > endif > diff --git a/board/toradex/colibri_imx7/Kconfig b/board/toradex/colibri_imx7/Kconfig > new file mode 100644 > index 0000000..622ce66 > --- /dev/null > +++ b/board/toradex/colibri_imx7/Kconfig > @@ -0,0 +1,12 @@ > +if TARGET_COLIBRI_IMX7 > + > +config SYS_BOARD > + default "colibri_imx7" > + > +config SYS_VENDOR > + default "toradex" > + > +config SYS_CONFIG_NAME > + default "colibri_imx7" > + > +endif > diff --git a/board/toradex/colibri_imx7/MAINTAINERS b/board/toradex/colibri_imx7/MAINTAINERS > new file mode 100644 > index 0000000..5ffb241 > --- /dev/null > +++ b/board/toradex/colibri_imx7/MAINTAINERS > @@ -0,0 +1,6 @@ > +Colibri iMX7 > +M: Stefan Agner <stefan.agner@toradex.com> > +S: Maintained > +F: board/toradex/colibri_imx7/ > +F: include/configs/colibri_imx7.h > +F: configs/colibri_imx7_defconfig I wonder we never add imximage.cfg into the MAINTAINERS. Boards with SPL have a central and empty imximage.cfg, for the other ones we should add it to the list. (Note: I have currently seen that no board having its own imximage.cfg does not list it in the MAINTAINERS file). > diff --git a/board/toradex/colibri_imx7/Makefile b/board/toradex/colibri_imx7/Makefile > new file mode 100644 > index 0000000..ea597de > --- /dev/null > +++ b/board/toradex/colibri_imx7/Makefile > @@ -0,0 +1,6 @@ > +# Copyright (C) 2016 Toradex AG > +# > +# SPDX-License-Identifier: GPL-2.0+ > +# > + > +obj-y := colibri_imx7.o > diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c > new file mode 100644 > index 0000000..b36f580 > --- /dev/null > +++ b/board/toradex/colibri_imx7/colibri_imx7.c > @@ -0,0 +1,420 @@ > +/* > + * Copyright (C) 2016 Toradex AG > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#include <asm/arch/clock.h> > +#include <asm/arch/crm_regs.h> > +#include <asm/arch/imx-regs.h> > +#include <asm/arch/mx7-pins.h> > +#include <asm/arch/sys_proto.h> > +#include <asm/gpio.h> > +#include <asm/imx-common/boot_mode.h> > +#include <asm/imx-common/iomux-v3.h> > +#include <asm/imx-common/mxc_i2c.h> > +#include <asm/io.h> > +#include <common.h> > +#include <dm.h> > +#include <dm/platform_data/serial_mxc.h> > +#include <fsl_esdhc.h> > +#include <i2c.h> > +#include <linux/sizes.h> > +#include <mmc.h> > +#include <miiphy.h> > +#include <netdev.h> > +#include <usb/ehci-ci.h> > + > +DECLARE_GLOBAL_DATA_PTR; > + > +#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ > + PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) > + > +#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ > + PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM) > + > +#define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) > +#define ENET_PAD_CTRL_MII (PAD_CTL_DSE_3P3V_32OHM) > + > +#define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) > + > +#define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ > + PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM) > + > +#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \ > + PAD_CTL_DSE_3P3V_49OHM) > + > +#define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS) > + > +#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM) > + > +#ifdef CONFIG_SYS_I2C_MXC > +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) > +/* I2C1 for PMIC */ > +static struct i2c_pads_info i2c_pad_info1 = { > + .scl = { > + .i2c_mode = MX7D_PAD_GPIO1_IO04__I2C1_SCL | PC, > + .gpio_mode = MX7D_PAD_GPIO1_IO04__GPIO1_IO4 | PC, > + .gp = IMX_GPIO_NR(1, 4), > + }, > + .sda = { > + .i2c_mode = MX7D_PAD_GPIO1_IO05__I2C1_SDA | PC, > + .gpio_mode = MX7D_PAD_GPIO1_IO05__GPIO1_IO5 | PC, > + .gp = IMX_GPIO_NR(1, 5), > + }, > +}; > +/* I2C4 for Colibri I2C */ > +static struct i2c_pads_info i2c_pad_info4 = { > + .scl = { > + .i2c_mode = MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL | PC, > + .gpio_mode = MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 | PC, > + .gp = IMX_GPIO_NR(7, 8), > + }, > + .sda = { > + .i2c_mode = MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA | PC, > + .gpio_mode = MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 | PC, > + .gp = IMX_GPIO_NR(7, 9), > + }, > +}; > +#endif > + > +int dram_init(void) > +{ > + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); > + > + return 0; > +} > + > +static iomux_v3_cfg_t const uart1_pads[] = { > + MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), > + MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), > + MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS | MUX_PAD_CTRL(UART_PAD_CTRL), > + MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS | MUX_PAD_CTRL(UART_PAD_CTRL), > +}; > + > +static iomux_v3_cfg_t const usdhc1_pads[] = { > + MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + > + MX7D_PAD_GPIO1_IO00__GPIO1_IO0 | MUX_PAD_CTRL(NO_PAD_CTRL), > +}; > + > +#ifdef CONFIG_NAND_MXS > +static iomux_v3_cfg_t const gpmi_pads[] = { > + MX7D_PAD_SD3_DATA0__NAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_DATA1__NAND_DATA01 | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_DATA2__NAND_DATA02 | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_DATA3__NAND_DATA03 | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_DATA4__NAND_DATA04 | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_DATA5__NAND_DATA05 | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_DATA6__NAND_DATA06 | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_DATA7__NAND_DATA07 | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_CLK__NAND_CLE | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_CMD__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_STROBE__NAND_RE_B | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SD3_RESET_B__NAND_WE_B | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL), > + MX7D_PAD_SAI1_TX_DATA__NAND_READY_B | MUX_PAD_CTRL(NAND_PAD_READY0_CTRL), > +}; > + > +static void setup_gpmi_nand(void) > +{ > + imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads)); > + > + /* NAND_USDHC_BUS_CLK is set in rom */ > + set_clk_nand(); > +} > +#endif > + > +static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { > + MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + MX7D_PAD_SD3_STROBE__SD3_STROBE | MUX_PAD_CTRL(USDHC_PAD_CTRL), > + > + MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL), > +}; > + > +#ifdef CONFIG_VIDEO_MXS > +static iomux_v3_cfg_t const lcd_pads[] = { > + MX7D_PAD_LCD_CLK__LCD_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_ENABLE__LCD_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_HSYNC__LCD_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_VSYNC__LCD_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA00__LCD_DATA0 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA01__LCD_DATA1 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA02__LCD_DATA2 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA03__LCD_DATA3 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA04__LCD_DATA4 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA05__LCD_DATA5 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA06__LCD_DATA6 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA07__LCD_DATA7 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA08__LCD_DATA8 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA09__LCD_DATA9 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA10__LCD_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA11__LCD_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA12__LCD_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA13__LCD_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA14__LCD_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA15__LCD_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA16__LCD_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL), > + MX7D_PAD_LCD_DATA17__LCD_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL), > +}; > + > +static iomux_v3_cfg_t const backlight_pads[] = { > + /* Backlight On */ > + MX7D_PAD_SD1_WP__GPIO5_IO1 | MUX_PAD_CTRL(NO_PAD_CTRL), > + /* Backlight PWM<A> (multiplexed pin) */ > + MX7D_PAD_GPIO1_IO08__GPIO1_IO8 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), > +}; > + > +#define GPIO_BL_ON IMX_GPIO_NR(5, 1) > +#define GPIO_PWM_A IMX_GPIO_NR(1, 8) > + > +static int setup_lcd(void) > +{ > + imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); > + > + imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); > + > + /* Set BL_ON */ > + gpio_request(GPIO_BL_ON, "BL_ON"); > + gpio_direction_output(GPIO_BL_ON, 1); > + > + /* Set PWM<A> to full brightness (assuming inversed polarity) */ > + gpio_request(GPIO_PWM_A, "PWM<A>"); > + gpio_direction_output(GPIO_PWM_A, 0); > + > + return 0; > +} > +#endif > + > +#ifdef CONFIG_FEC_MXC > +static iomux_v3_cfg_t const fec1_pads[] = { > +#ifndef CONFIG_COLIBRI_EXT_PHYCLK This is a new CONFIG_, undocumented. We have really the setup for other boards, too. Anyway, moved to Kconfig ? > + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 | MUX_PAD_CTRL(ENET_PAD_CTRL) | MUX_MODE_SION, > +#else > + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 | MUX_PAD_CTRL(ENET_PAD_CTRL), > +#endif > + MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), > + MX7D_PAD_SD2_WP__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), > + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), > + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), > + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), > + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), > + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), > + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), > + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), > +}; > + > +static void setup_iomux_fec(void) > +{ > + imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads)); > +} > +#endif > + > +static void setup_iomux_uart(void) > +{ > + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); > +} > + > +#ifdef CONFIG_FSL_ESDHC > + > +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 0) > + > +static struct fsl_esdhc_cfg usdhc_cfg[] = { > + {USDHC1_BASE_ADDR, 0, 4}, > +}; > + > +int board_mmc_getcd(struct mmc *mmc) > +{ > + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; > + int ret = 0; > + > + switch (cfg->esdhc_base) { > + case USDHC1_BASE_ADDR: > + ret = !gpio_get_value(USDHC1_CD_GPIO); > + break; > + } > + > + return ret; > +} > + > +int board_mmc_init(bd_t *bis) > +{ > + int i, ret; > + /* USDHC1 is mmc0 */ > + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { > + switch (i) { > + case 0: > + imx_iomux_v3_setup_multiple_pads( > + usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); > + gpio_request(USDHC1_CD_GPIO, "usdhc1_cd"); > + gpio_direction_input(USDHC1_CD_GPIO); > + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); > + break; > + default: > + printf("Warning: you configured more USDHC controllers" > + "(%d) than supported by the board\n", i + 1); > + return -EINVAL; > + } > + > + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); > + if (ret) > + return ret; > + } > + > + return 0; > +} > +#endif > + > +#ifdef CONFIG_FEC_MXC > +int board_eth_init(bd_t *bis) > +{ > + int ret; > + > + setup_iomux_fec(); > + > + ret = fecmxc_initialize_multi(bis, 0, > + CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE); > + if (ret) > + printf("FEC1 MXC: %s:failed\n", __func__); > + > + return ret; > +} > + > +static int setup_fec(void) > +{ > + struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs > + = (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; > + > +#ifndef CONFIG_COLIBRI_EXT_PHYCLK Ditto. > + /* > + * Use 50M anatop REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17] > + * and output it on the pin > + */ > + clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], > + IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK, > + IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK); > +#else > + /* Use 50M external CLK for ENET1, set gpr1[13], clear gpr1[17] */ > + clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], > + IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK, > + IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK); > +#endif > + > + return set_clk_enet(ENET_50MHz); > +} > + > +int board_phy_config(struct phy_device *phydev) > +{ > + if (phydev->drv->config) > + phydev->drv->config(phydev); > + return 0; > +} > +#endif > + > +int board_early_init_f(void) > +{ > + setup_iomux_uart(); > + > +#ifdef CONFIG_SYS_I2C_MXC > + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); > + setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info4); > +#endif > + > + return 0; > +} > + > +int board_init(void) > +{ > + /* address of boot parameters */ > + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; > + > +#ifdef CONFIG_FEC_MXC > + setup_fec(); > +#endif > + > +#ifdef CONFIG_NAND_MXS > + setup_gpmi_nand(); > +#endif > + > +#ifdef CONFIG_VIDEO_MXS > + setup_lcd(); > +#endif > + > + return 0; > +} > + > +#ifdef CONFIG_CMD_BMODE > +static const struct boot_mode board_boot_modes[] = { > + /* 4 bit bus width */ > + {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)}, > + {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)}, > + {NULL, 0}, > +}; > +#endif > + > +int board_late_init(void) > +{ > +#ifdef CONFIG_CMD_BMODE > + add_board_boot_modes(board_boot_modes); > +#endif > + > + return 0; > +} > + > +int checkboard(void) > +{ > + printf("Model: Toradex Colibri iMX7%c\n", > + is_cpu_type(MXC_CPU_MX7D) ? 'D' : 'S'); > + > + return 0; > +} > + > +#ifdef CONFIG_USB_EHCI_MX7 > +static iomux_v3_cfg_t const usb_otg2_pads[] = { > + MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), > +}; > + > +int board_ehci_hcd_init(int port) > +{ > + switch (port) { > + case 0: > + break; > + case 1: > + if (is_cpu_type(MXC_CPU_MX7S)) > + return -ENODEV; > + > + imx_iomux_v3_setup_multiple_pads(usb_otg2_pads, > + ARRAY_SIZE(usb_otg2_pads)); > + break; > + default: > + return -EINVAL; > + } > + return 0; > +} > +#endif > + > +static struct mxc_serial_platdata mxc_serial_plat = { > + .reg = (struct mxc_uart *)UART1_IPS_BASE_ADDR, > + .use_dte = true, > +}; > + > +U_BOOT_DEVICE(mxc_serial) = { > + .name = "serial_mxc", > + .platdata = &mxc_serial_plat, > +}; > diff --git a/board/toradex/colibri_imx7/imximage.cfg b/board/toradex/colibri_imx7/imximage.cfg > new file mode 100644 > index 0000000..d891e82 > --- /dev/null > +++ b/board/toradex/colibri_imx7/imximage.cfg > @@ -0,0 +1,150 @@ > +/* > + * Copyright (C) 2015 Freescale Semiconductor, Inc. > + * 2015 Toradex AG > + * > + * SPDX-License-Identifier: GPL-2.0+ > + * > + * Refer docs/README.imxmage for more details about how-to configure > + * and create imximage boot image > + * > + * The syntax is taken as close as possible with the kwbimage > + */ > + > +#define __ASSEMBLY__ > +#include <config.h> > + > +/* image version */ > + > +IMAGE_VERSION 2 > + > +/* > + * Boot Device : sd > + */ > + > +BOOT_FROM sd > + > +/* > + * Secure boot support > + */ > +#ifdef CONFIG_SECURE_BOOT > +CSF CONFIG_CSF_SIZE > +#endif > + > +/* > + * Device Configuration Data (DCD) > + * > + * Each entry must have the format: > + * Addr-type Address Value > + * > + * where: > + * Addr-type register length (1,2 or 4 bytes) > + * Address absolute address of the register > + * value value to be stored in the register > + */ > + > +/* IOMUXC_GPR_GPR1 */ > +DATA 4 0x30340004 0x4F400005 > + > +/* DDR3L */ > +/* assuming MEMC_FREQ_RATIO = 2 */ > +/* SRC_DDRC_RCR */ > +DATA 4 0x30391000 0x00000002 > +/* DDRC_MSTR */ > +DATA 4 0x307a0000 0x01040001 > +/* DDRC_DFIUPD0 */ > +DATA 4 0x307a01a0 0x80400003 > +/* DDRC_DFIUPD1 */ > +DATA 4 0x307a01a4 0x00100020 > +/* DDRC_DFIUPD2 */ > +DATA 4 0x307a01a8 0x80100004 > +/* DDRC_RFSHTMG */ > +DATA 4 0x307a0064 0x00400045 > +/* DDRC_MP_PCTRL_0 */ > +DATA 4 0x307a0490 0x00000001 > +/* DDRC_INIT0 */ > +DATA 4 0x307a00d0 0x00020083 > +/* DDRC_INIT1 */ > +DATA 4 0x307a00d4 0x00690000 > +/* DDRC_INIT3 MR0/MR1 */ > +DATA 4 0x307a00dc 0x09300004 > +/* DDRC_INIT4 MR2/MR3 */ > +DATA 4 0x307a00e0 0x04480000 > +/* DDRC_INIT5 */ > +DATA 4 0x307a00e4 0x00100004 > +/* DDRC_RANKCTL */ > +DATA 4 0x307a00f4 0x0000033f > +/* DDRC_DRAMTMG0 */ > +DATA 4 0x307a0100 0x090b090a > +/* DDRC_DRAMTMG1 */ > +DATA 4 0x307a0104 0x000d020d > +/* DDRC_DRAMTMG2 */ > +DATA 4 0x307a0108 0x03040307 > +/* DDRC_DRAMTMG3 */ > +DATA 4 0x307a010c 0x00002006 > +/* DDRC_DRAMTMG4 */ > +DATA 4 0x307a0110 0x04020205 > +/* DDRC_DRAMTMG5 */ > +DATA 4 0x307a0114 0x03030202 > +/* DDRC_DRAMTMG8 */ > +DATA 4 0x307a0120 0x00000803 > +/* DDRC_ZQCTL0 */ > +DATA 4 0x307a0180 0x00800020 > +/* DDRC_ZQCTL1 */ > +DATA 4 0x307a0184 0x02001000 > +/* DDRC_DFITMG0 */ > +DATA 4 0x307a0190 0x02098204 > +/* DDRC_DFITMG1 */ > +DATA 4 0x307a0194 0x00030303 > +/* DDRC_ADDRMAP0 */ > +DATA 4 0x307a0200 0x0000001f > +/* DDRC_ADDRMAP1 */ > +DATA 4 0x307a0204 0x00080808 > +/* DDRC_ADDRMAP5 */ > +DATA 4 0x307a0214 0x07070707 > +/* DDRC_ADDRMAP6 */ > +DATA 4 0x307a0218 0x07070707 > +/* DDRC_ODTCFG */ > +DATA 4 0x307a0240 0x06000601 > +/* DDRC_ODTMAP */ > +DATA 4 0x307a0244 0x00000011 > +/* SRC_DDRC_RCR */ > +DATA 4 0x30391000 0x00000000 > +/* DDR_PHY_PHY_CON0 */ > +DATA 4 0x30790000 0x17420f40 > +/* DDR_PHY_PHY_CON1 */ > +DATA 4 0x30790004 0x10210100 > +/* DDR_PHY_PHY_CON4 */ > +DATA 4 0x30790010 0x00060807 > +/* DDR_PHY_MDLL_CON0 */ > +DATA 4 0x307900b0 0x1010007e > +/* DDR_PHY_DRVDS_CON0 */ > +DATA 4 0x3079009c 0x00000d6e > +/* DDR_PHY_OFFSET_RD_CON0 */ > +DATA 4 0x30790020 0x08080808 > +/* DDR_PHY_OFFSET_WR_CON0 */ > +DATA 4 0x30790030 0x08080808 > +/* DDR_PHY_CMD_SDLL_CON0 */ > +DATA 4 0x30790050 0x01000010 > +DATA 4 0x30790050 0x00000010 > + > +/* DDR_PHY_ZQ_CON0 */ > +DATA 4 0x307900c0 0x0e407304 > +DATA 4 0x307900c0 0x0e447304 > +DATA 4 0x307900c0 0x0e447306 > +/* DDR_PHY_ZQ_CON1 */ > +CHECK_BITS_SET 4 0x307900c4 0x1 > +/* DDR_PHY_ZQ_CON0 */ > +DATA 4 0x307900c0 0x0e447304 > +DATA 4 0x307900c0 0x0e407304 > + > +/* CCM_CCGRn */ > +DATA 4 0x30384130 0x00000000 > +/* IOMUXC_GPR_GPR8 */ > +DATA 4 0x30340020 0x00000178 > +/* CCM_CCGRn */ > +DATA 4 0x30384130 0x00000002 > +/* DDR_PHY_LP_CON0 */ > +DATA 4 0x30790018 0x0000000f > + > +/* DDRC_STAT */ > +CHECK_BITS_SET 4 0x307a0004 0x1 > diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig > new file mode 100644 > index 0000000..50c1201 > --- /dev/null > +++ b/configs/colibri_imx7_defconfig > @@ -0,0 +1,40 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_MX7=y > +CONFIG_TARGET_COLIBRI_IMX7=y > +CONFIG_IMX_RDC=y > +CONFIG_IMX_BOOTAUX=y > +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D" > +CONFIG_BOOTDELAY=1 > +CONFIG_HUSH_PARSER=y > +CONFIG_SYS_PROMPT="Colibri iMX7 # " > +# CONFIG_CMD_BOOTD is not set > +CONFIG_CMD_BOOTZ=y > +# CONFIG_CMD_IMI is not set > +# CONFIG_CMD_IMLS is not set > +# CONFIG_CMD_XIMG is not set > +CONFIG_CMD_ASKENV=y > +CONFIG_CMD_MEMTEST=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_NAND=y > +CONFIG_CMD_I2C=y > +CONFIG_CMD_USB=y > +CONFIG_CMD_DFU=y > +CONFIG_CMD_USB_MASS_STORAGE=y > +# CONFIG_CMD_FPGA is not set > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_DHCP=y > +CONFIG_CMD_MII=y > +CONFIG_CMD_PING=y > +CONFIG_CMD_CACHE=y > +CONFIG_CMD_EXT4=y > +CONFIG_CMD_FAT=y > +CONFIG_CMD_FS_GENERIC=y > +CONFIG_USB=y > +CONFIG_USB_EHCI_HCD=y > +CONFIG_USB_GADGET=y > +CONFIG_CI_UDC=y > +CONFIG_USB_GADGET_DOWNLOAD=y > +CONFIG_G_DNL_MANUFACTURER="Toradex" > +CONFIG_G_DNL_VENDOR_NUM=0x1b67 > +CONFIG_G_DNL_PRODUCT_NUM=0x4020 > +CONFIG_OF_LIBFDT=y > diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h > new file mode 100644 > index 0000000..6dc429b > --- /dev/null > +++ b/include/configs/colibri_imx7.h > @@ -0,0 +1,248 @@ > +/* > + * Copyright 2016 Toradex AG > + * > + * Configuration settings for the Colibri iMX7 module. > + * > + * based on mx7dsabresd.h: > + * Copyright (C) 2015 Freescale Semiconductor, Inc. > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#ifndef __COLIBRI_IMX7_CONFIG_H > +#define __COLIBRI_IMX7_CONFIG_H > + > +#include "mx7_common.h" > + > +#define CONFIG_SYS_THUMB_BUILD > +#define CONFIG_USE_ARCH_MEMCPY > +#define CONFIG_USE_ARCH_MEMSET > + > +/*#define CONFIG_DBG_MONITOR*/ > +#define PHYS_SDRAM_SIZE SZ_512M > + > +#define CONFIG_BOARD_EARLY_INIT_F > +#define CONFIG_BOARD_LATE_INIT > + > +#define CONFIG_DISPLAY_BOARDINFO_LATE > + > +/* Size of malloc() pool */ > +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) > + > +/* Uncomment to enable secure boot support */ > +/* #define CONFIG_SECURE_BOOT */ > +#define CONFIG_CSF_SIZE 0x4000 > + > +#define CONFIG_CMD_BMODE > + > +/* Network */ > +#define CONFIG_COLIBRI_EXT_PHYCLK > +#define CONFIG_FEC_MXC > +#define CONFIG_MII > +#define CONFIG_FEC_XCV_TYPE RMII > +#define CONFIG_ETHPRIME "FEC" > +#define CONFIG_FEC_MXC_PHYADDR 0 > + > +#define CONFIG_PHYLIB > +#define CONFIG_PHY_MICREL > +#define CONFIG_TFTP_TSIZE > +#define CONFIG_IP_DEFRAG > +#define CONFIG_TFTP_BLOCKSIZE 16384 > + > +/* ENET1 */ > +#define IMX_FEC_BASE ENET_IPS_BASE_ADDR > + > +/* MMC Config*/ > +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 > +#define CONFIG_SYS_FSL_USDHC_NUM 1 > + > +#undef CONFIG_BOOTM_PLAN9 > +#undef CONFIG_BOOTM_RTEMS > + > +/* I2C configs */ > +#define CONFIG_SYS_I2C > +#define CONFIG_SYS_I2C_MXC > +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ > +#define CONFIG_SYS_I2C_SPEED 100000 > + > +#define CONFIG_IPADDR 192.168.10.2 > +#define CONFIG_NETMASK 255.255.255.0 > +#define CONFIG_SERVERIP 192.168.10.1 > + > +#define MEM_LAYOUT_ENV_SETTINGS \ > + "fdt_addr_r=0x82000000\0" \ > + "fdt_high=0xffffffff\0" \ > + "initrd_high=0xffffffff\0" \ > + "kernel_addr_r=0x81000000\0" \ > + "ramdisk_addr_r=0x82100000\0" > + > +#define SD_BOOTCMD \ > + "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ > + "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \ > + "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ > + "run m4boot && " \ > + "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \ > + "load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ > + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ > + > +#define NFS_BOOTCMD \ > + "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ > + "nfsboot=run setup; " \ > + "setenv bootargs ${defargs} ${nfsargs} " \ > + "${setupargs} ${vidargs}; echo Booting from NFS...;" \ > + "dhcp ${kernel_addr_r} && " \ > + "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ > + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ > + > +#define UBI_BOOTCMD \ > + "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ > + "ubi.fm_autoconvert=1\0" \ > + "ubiboot=run setup; " \ > + "setenv bootargs ${defargs} ${ubiargs} " \ > + "${setupargs} ${vidargs}; echo Booting from NAND...; " \ > + "ubi part ubi && run m4boot && " \ > + "ubi read ${kernel_addr_r} kernel && " \ > + "ubi read ${fdt_addr_r} dtb && " \ > + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ > + > +#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" > + > +#define CONFIG_EXTRA_ENV_SETTINGS \ > + MEM_LAYOUT_ENV_SETTINGS \ > + NFS_BOOTCMD \ > + SD_BOOTCMD \ > + UBI_BOOTCMD \ > + "console=ttymxc0\0" \ > + "defargs=\0" \ > + "fdt_board=eval-v3\0" \ > + "fdt_fixup=;\0" \ > + "m4boot=;\0" \ > + "ip_dyn=yes\0" \ > + "kernel_file=zImage\0" \ > + "mtdparts=" MTDPARTS_DEFAULT "\0" \ > + "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ > + "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ > + "${board}/flash_eth.img && source ${loadaddr}\0" \ > + "setsdupdate=mmc rescan && setenv interface mmc && " \ > + "fatload ${interface} 0:1 ${loadaddr} " \ > + "${board}/flash_blk.img && source ${loadaddr}\0" \ > + "setup=setenv setupargs " \ > + "console=tty1 console=${console}" \ > + ",${baudrate}n8 ${memargs} consoleblank=0 ${mtdparts}\0" \ > + "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ > + "setusbupdate=usb start && setenv interface usb && " \ > + "fatload ${interface} 0:1 ${loadaddr} " \ > + "${board}/flash_blk.img && source ${loadaddr}\0" \ > + "splashpos=m,m\0" \ > + "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \ > + > +/* Miscellaneous configurable options */ > +#define CONFIG_SYS_LONGHELP > + > +#define CONFIG_SYS_MEMTEST_START 0x80000000 > +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000) > + > +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR > +#define CONFIG_SYS_HZ 1000 > + > +#define CONFIG_STACKSIZE SZ_128K > + > +/* Physical Memory Map */ > +#define CONFIG_NR_DRAM_BANKS 1 > +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR > + > +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM > +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR > +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE > + > +#define CONFIG_SYS_INIT_SP_OFFSET \ > + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) > +#define CONFIG_SYS_INIT_SP_ADDR \ > + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) > + > +/* FLASH and environment organization */ > +#define CONFIG_SYS_NO_FLASH > +#define CONFIG_ENV_IS_IN_NAND > + > +#if defined(CONFIG_ENV_IS_IN_MMC) > +#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ > +#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ > +#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ > +#define CONFIG_ENV_OFFSET (8 * SZ_64K) > +#elif defined(CONFIG_ENV_IS_IN_NAND) > +#define CONFIG_ENV_OFFSET (4 * 1024 * 1024) > +#define CONFIG_ENV_SECT_SIZE (128 * 1024) > +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE > +#endif > + > +#define CONFIG_NAND_MXS > +#define CONFIG_CMD_NAND_TRIMFFS > + > +/* NAND stuff */ > +#define CONFIG_SYS_MAX_NAND_DEVICE 1 > +#define CONFIG_SYS_NAND_BASE 0x40000000 > +#define CONFIG_SYS_NAND_5_ADDR_CYCLE > +#define CONFIG_SYS_NAND_ONFI_DETECTION > +#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES > +#define CONFIG_CMD_NAND_TORTURE > + > +/* UBI stuff */ > +#define CONFIG_RBTREE > +#define CONFIG_LZO > +#define CONFIG_CMD_UBI > +#define CONFIG_MTD_UBI_FASTMAP > +#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */ > + > +/* Dynamic MTD partition support */ > +#define CONFIG_CMD_MTDPARTS /* Enable 'mtdparts' command line support */ > +#define CONFIG_MTD_PARTITIONS > +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ > +#define MTDIDS_DEFAULT "nand0=gpmi-nand" > +#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:" \ > + "512k(mx7-bcb)," \ > + "3584k(u-boot)ro," \ > + "512k(u-boot-env)," \ > + "-(ubi)" > + > +/* DMA stuff, needed for GPMI/MXS NAND support */ > +#define CONFIG_APBH_DMA > +#define CONFIG_APBH_DMA_BURST > +#define CONFIG_APBH_DMA_BURST8 > + > +/* USB Configs */ > +#define CONFIG_USB_STORAGE > +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET > + > +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) > +#define CONFIG_MXC_USB_FLAGS 0 > +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 > + > +#define CONFIG_IMX_THERMAL > + > +#define CONFIG_USBD_HS > + > +#define CONFIG_USB_FUNCTION_MASS_STORAGE > + > +/* USB Device Firmware Update support */ > +#define CONFIG_USB_FUNCTION_DFU > +#define CONFIG_DFU_MMC > +#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M > +#define DFU_DEFAULT_POLL_TIMEOUT 300 > + > +#define CONFIG_VIDEO > +#ifdef CONFIG_VIDEO > +#define CONFIG_CFB_CONSOLE > +#define CONFIG_VIDEO_MXS > +#define CONFIG_VIDEO_LOGO > +#define CONFIG_VIDEO_SW_CURSOR > +#define CONFIG_VGA_AS_SINGLE_DEVICE > +#define CONFIG_SYS_CONSOLE_IS_IN_ENV > +#define CONFIG_SPLASH_SCREEN > +#define CONFIG_SPLASH_SCREEN_ALIGN > +#define CONFIG_CMD_BMP > +#define CONFIG_BMP_16BPP > +#define CONFIG_VIDEO_BMP_RLE8 > +#define CONFIG_VIDEO_BMP_LOGO > +#endif > + > +#endif > Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 9/9] colibri_imx7: add Colibri iMX7S/iMX7D module support 2016-07-19 14:14 ` Stefano Babic @ 2016-07-19 16:05 ` Stefan Agner 2016-07-19 16:26 ` Stefano Babic 0 siblings, 1 reply; 27+ messages in thread From: Stefan Agner @ 2016-07-19 16:05 UTC (permalink / raw) To: u-boot On 2016-07-19 07:14, Stefano Babic wrote: > Hi Stefan, > > > just a couple of minor things: > > > On 13/07/2016 09:25, Stefan Agner wrote: >> From: Stefan Agner <stefan.agner@toradex.com> >> >> This commit adds support for the Toradex Computer on Modules >> Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence >> can be easily supported by one board. The board code detects RAM >> size at runtime which is one of the differences between the two >> boards. The board also uses the UART's in DTE mode, hence making >> use of the new DTE support via serial DM. >> >> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> >> --- >> >> arch/arm/cpu/armv7/mx7/Kconfig | 7 + >> board/toradex/colibri_imx7/Kconfig | 12 + >> board/toradex/colibri_imx7/MAINTAINERS | 6 + >> board/toradex/colibri_imx7/Makefile | 6 + >> board/toradex/colibri_imx7/colibri_imx7.c | 420 ++++++++++++++++++++++++++++++ >> board/toradex/colibri_imx7/imximage.cfg | 150 +++++++++++ >> configs/colibri_imx7_defconfig | 40 +++ >> include/configs/colibri_imx7.h | 248 ++++++++++++++++++ >> 8 files changed, 889 insertions(+) >> create mode 100644 board/toradex/colibri_imx7/Kconfig >> create mode 100644 board/toradex/colibri_imx7/MAINTAINERS >> create mode 100644 board/toradex/colibri_imx7/Makefile >> create mode 100644 board/toradex/colibri_imx7/colibri_imx7.c >> create mode 100644 board/toradex/colibri_imx7/imximage.cfg >> create mode 100644 configs/colibri_imx7_defconfig >> create mode 100644 include/configs/colibri_imx7.h >> >> diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig >> index dd51384..5fdc8dd 100644 >> --- a/arch/arm/cpu/armv7/mx7/Kconfig >> +++ b/arch/arm/cpu/armv7/mx7/Kconfig >> @@ -27,12 +27,19 @@ config TARGET_WARP7 >> select DM >> select DM_THERMAL >> >> +config TARGET_COLIBRI_IMX7 >> + bool "Support Colibri iMX7S/iMX7D modules" >> + select DM >> + select DM_SERIAL >> + select DM_THERMAL >> + >> endchoice >> >> config SYS_SOC >> default "mx7" >> >> source "board/freescale/mx7dsabresd/Kconfig" >> +source "board/toradex/colibri_imx7/Kconfig" >> source "board/warp7/Kconfig" >> >> endif >> diff --git a/board/toradex/colibri_imx7/Kconfig b/board/toradex/colibri_imx7/Kconfig >> new file mode 100644 >> index 0000000..622ce66 >> --- /dev/null >> +++ b/board/toradex/colibri_imx7/Kconfig >> @@ -0,0 +1,12 @@ >> +if TARGET_COLIBRI_IMX7 >> + >> +config SYS_BOARD >> + default "colibri_imx7" >> + >> +config SYS_VENDOR >> + default "toradex" >> + >> +config SYS_CONFIG_NAME >> + default "colibri_imx7" >> + >> +endif >> diff --git a/board/toradex/colibri_imx7/MAINTAINERS b/board/toradex/colibri_imx7/MAINTAINERS >> new file mode 100644 >> index 0000000..5ffb241 >> --- /dev/null >> +++ b/board/toradex/colibri_imx7/MAINTAINERS >> @@ -0,0 +1,6 @@ >> +Colibri iMX7 >> +M: Stefan Agner <stefan.agner@toradex.com> >> +S: Maintained >> +F: board/toradex/colibri_imx7/ >> +F: include/configs/colibri_imx7.h >> +F: configs/colibri_imx7_defconfig > > I wonder we never add imximage.cfg into the MAINTAINERS. Boards with SPL > have a central and empty imximage.cfg, for the other ones we should add > it to the list. (Note: I have currently seen that no board having its > own imximage.cfg does not list it in the MAINTAINERS file). > I added the directory where imximage.cfg is located in (board/toradex/colibri_imx7/). We also don't add other files in there, I think the scripts work fine with directories specified without specifying the individual files... >> diff --git a/board/toradex/colibri_imx7/Makefile b/board/toradex/colibri_imx7/Makefile >> new file mode 100644 >> index 0000000..ea597de >> --- /dev/null >> +++ b/board/toradex/colibri_imx7/Makefile >> @@ -0,0 +1,6 @@ >> +# Copyright (C) 2016 Toradex AG >> +# >> +# SPDX-License-Identifier: GPL-2.0+ >> +# >> + >> +obj-y := colibri_imx7.o >> diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c >> new file mode 100644 >> index 0000000..b36f580 >> --- /dev/null >> +++ b/board/toradex/colibri_imx7/colibri_imx7.c >> @@ -0,0 +1,420 @@ >> +/* >> + * Copyright (C) 2016 Toradex AG >> + * >> + * SPDX-License-Identifier: GPL-2.0+ >> + */ >> + >> +#include <asm/arch/clock.h> >> +#include <asm/arch/crm_regs.h> >> +#include <asm/arch/imx-regs.h> >> +#include <asm/arch/mx7-pins.h> >> +#include <asm/arch/sys_proto.h> >> +#include <asm/gpio.h> >> +#include <asm/imx-common/boot_mode.h> >> +#include <asm/imx-common/iomux-v3.h> >> +#include <asm/imx-common/mxc_i2c.h> >> +#include <asm/io.h> >> +#include <common.h> >> +#include <dm.h> >> +#include <dm/platform_data/serial_mxc.h> >> +#include <fsl_esdhc.h> >> +#include <i2c.h> >> +#include <linux/sizes.h> >> +#include <mmc.h> >> +#include <miiphy.h> >> +#include <netdev.h> >> +#include <usb/ehci-ci.h> >> + >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ >> + PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) >> + >> +#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ >> + PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM) >> + >> +#define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) >> +#define ENET_PAD_CTRL_MII (PAD_CTL_DSE_3P3V_32OHM) >> + >> +#define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) >> + >> +#define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ >> + PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM) >> + >> +#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \ >> + PAD_CTL_DSE_3P3V_49OHM) >> + >> +#define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS) >> + >> +#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM) >> + >> +#ifdef CONFIG_SYS_I2C_MXC >> +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) >> +/* I2C1 for PMIC */ >> +static struct i2c_pads_info i2c_pad_info1 = { >> + .scl = { >> + .i2c_mode = MX7D_PAD_GPIO1_IO04__I2C1_SCL | PC, >> + .gpio_mode = MX7D_PAD_GPIO1_IO04__GPIO1_IO4 | PC, >> + .gp = IMX_GPIO_NR(1, 4), >> + }, >> + .sda = { >> + .i2c_mode = MX7D_PAD_GPIO1_IO05__I2C1_SDA | PC, >> + .gpio_mode = MX7D_PAD_GPIO1_IO05__GPIO1_IO5 | PC, >> + .gp = IMX_GPIO_NR(1, 5), >> + }, >> +}; >> +/* I2C4 for Colibri I2C */ >> +static struct i2c_pads_info i2c_pad_info4 = { >> + .scl = { >> + .i2c_mode = MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL | PC, >> + .gpio_mode = MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 | PC, >> + .gp = IMX_GPIO_NR(7, 8), >> + }, >> + .sda = { >> + .i2c_mode = MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA | PC, >> + .gpio_mode = MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 | PC, >> + .gp = IMX_GPIO_NR(7, 9), >> + }, >> +}; >> +#endif >> + >> +int dram_init(void) >> +{ >> + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); >> + >> + return 0; >> +} >> + >> +static iomux_v3_cfg_t const uart1_pads[] = { >> + MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), >> + MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), >> + MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS | MUX_PAD_CTRL(UART_PAD_CTRL), >> + MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS | MUX_PAD_CTRL(UART_PAD_CTRL), >> +}; >> + >> +static iomux_v3_cfg_t const usdhc1_pads[] = { >> + MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + >> + MX7D_PAD_GPIO1_IO00__GPIO1_IO0 | MUX_PAD_CTRL(NO_PAD_CTRL), >> +}; >> + >> +#ifdef CONFIG_NAND_MXS >> +static iomux_v3_cfg_t const gpmi_pads[] = { >> + MX7D_PAD_SD3_DATA0__NAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_DATA1__NAND_DATA01 | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_DATA2__NAND_DATA02 | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_DATA3__NAND_DATA03 | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_DATA4__NAND_DATA04 | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_DATA5__NAND_DATA05 | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_DATA6__NAND_DATA06 | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_DATA7__NAND_DATA07 | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_CLK__NAND_CLE | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_CMD__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_STROBE__NAND_RE_B | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SD3_RESET_B__NAND_WE_B | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL), >> + MX7D_PAD_SAI1_TX_DATA__NAND_READY_B | MUX_PAD_CTRL(NAND_PAD_READY0_CTRL), >> +}; >> + >> +static void setup_gpmi_nand(void) >> +{ >> + imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads)); >> + >> + /* NAND_USDHC_BUS_CLK is set in rom */ >> + set_clk_nand(); >> +} >> +#endif >> + >> +static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { >> + MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + MX7D_PAD_SD3_STROBE__SD3_STROBE | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> + >> + MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL), >> +}; >> + >> +#ifdef CONFIG_VIDEO_MXS >> +static iomux_v3_cfg_t const lcd_pads[] = { >> + MX7D_PAD_LCD_CLK__LCD_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_ENABLE__LCD_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_HSYNC__LCD_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_VSYNC__LCD_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA00__LCD_DATA0 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA01__LCD_DATA1 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA02__LCD_DATA2 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA03__LCD_DATA3 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA04__LCD_DATA4 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA05__LCD_DATA5 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA06__LCD_DATA6 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA07__LCD_DATA7 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA08__LCD_DATA8 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA09__LCD_DATA9 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA10__LCD_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA11__LCD_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA12__LCD_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA13__LCD_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA14__LCD_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA15__LCD_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA16__LCD_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> + MX7D_PAD_LCD_DATA17__LCD_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL), >> +}; >> + >> +static iomux_v3_cfg_t const backlight_pads[] = { >> + /* Backlight On */ >> + MX7D_PAD_SD1_WP__GPIO5_IO1 | MUX_PAD_CTRL(NO_PAD_CTRL), >> + /* Backlight PWM<A> (multiplexed pin) */ >> + MX7D_PAD_GPIO1_IO08__GPIO1_IO8 | MUX_PAD_CTRL(NO_PAD_CTRL), >> + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), >> +}; >> + >> +#define GPIO_BL_ON IMX_GPIO_NR(5, 1) >> +#define GPIO_PWM_A IMX_GPIO_NR(1, 8) >> + >> +static int setup_lcd(void) >> +{ >> + imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); >> + >> + imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); >> + >> + /* Set BL_ON */ >> + gpio_request(GPIO_BL_ON, "BL_ON"); >> + gpio_direction_output(GPIO_BL_ON, 1); >> + >> + /* Set PWM<A> to full brightness (assuming inversed polarity) */ >> + gpio_request(GPIO_PWM_A, "PWM<A>"); >> + gpio_direction_output(GPIO_PWM_A, 0); >> + >> + return 0; >> +} >> +#endif >> + >> +#ifdef CONFIG_FEC_MXC >> +static iomux_v3_cfg_t const fec1_pads[] = { >> +#ifndef CONFIG_COLIBRI_EXT_PHYCLK > > This is a new CONFIG_, undocumented. We have really the setup for other > boards, too. Anyway, moved to Kconfig ? > Ok, will do. >> + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 | MUX_PAD_CTRL(ENET_PAD_CTRL) | MUX_MODE_SION, >> +#else >> + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 | MUX_PAD_CTRL(ENET_PAD_CTRL), >> +#endif >> + MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), >> + MX7D_PAD_SD2_WP__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), >> + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), >> + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), >> + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), >> + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), >> + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), >> + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), >> + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), >> +}; >> + >> +static void setup_iomux_fec(void) >> +{ >> + imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads)); >> +} >> +#endif >> + >> +static void setup_iomux_uart(void) >> +{ >> + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); >> +} >> + >> +#ifdef CONFIG_FSL_ESDHC >> + >> +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 0) >> + >> +static struct fsl_esdhc_cfg usdhc_cfg[] = { >> + {USDHC1_BASE_ADDR, 0, 4}, >> +}; >> + >> +int board_mmc_getcd(struct mmc *mmc) >> +{ >> + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; >> + int ret = 0; >> + >> + switch (cfg->esdhc_base) { >> + case USDHC1_BASE_ADDR: >> + ret = !gpio_get_value(USDHC1_CD_GPIO); >> + break; >> + } >> + >> + return ret; >> +} >> + >> +int board_mmc_init(bd_t *bis) >> +{ >> + int i, ret; >> + /* USDHC1 is mmc0 */ >> + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { >> + switch (i) { >> + case 0: >> + imx_iomux_v3_setup_multiple_pads( >> + usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); >> + gpio_request(USDHC1_CD_GPIO, "usdhc1_cd"); >> + gpio_direction_input(USDHC1_CD_GPIO); >> + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); >> + break; >> + default: >> + printf("Warning: you configured more USDHC controllers" >> + "(%d) than supported by the board\n", i + 1); >> + return -EINVAL; >> + } >> + >> + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); >> + if (ret) >> + return ret; >> + } >> + >> + return 0; >> +} >> +#endif >> + >> +#ifdef CONFIG_FEC_MXC >> +int board_eth_init(bd_t *bis) >> +{ >> + int ret; >> + >> + setup_iomux_fec(); >> + >> + ret = fecmxc_initialize_multi(bis, 0, >> + CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE); >> + if (ret) >> + printf("FEC1 MXC: %s:failed\n", __func__); >> + >> + return ret; >> +} >> + >> +static int setup_fec(void) >> +{ >> + struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs >> + = (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; >> + >> +#ifndef CONFIG_COLIBRI_EXT_PHYCLK > > Ditto. It's the same config, but yes, will move it to Kconfig. -- Stefan > >> + /* >> + * Use 50M anatop REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17] >> + * and output it on the pin >> + */ >> + clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], >> + IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK, >> + IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK); >> +#else >> + /* Use 50M external CLK for ENET1, set gpr1[13], clear gpr1[17] */ >> + clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], >> + IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK, >> + IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK); >> +#endif >> + >> + return set_clk_enet(ENET_50MHz); >> +} >> + >> +int board_phy_config(struct phy_device *phydev) >> +{ >> + if (phydev->drv->config) >> + phydev->drv->config(phydev); >> + return 0; >> +} >> +#endif >> + >> +int board_early_init_f(void) >> +{ >> + setup_iomux_uart(); >> + >> +#ifdef CONFIG_SYS_I2C_MXC >> + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); >> + setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info4); >> +#endif >> + >> + return 0; >> +} >> + >> +int board_init(void) >> +{ >> + /* address of boot parameters */ >> + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; >> + >> +#ifdef CONFIG_FEC_MXC >> + setup_fec(); >> +#endif >> + >> +#ifdef CONFIG_NAND_MXS >> + setup_gpmi_nand(); >> +#endif >> + >> +#ifdef CONFIG_VIDEO_MXS >> + setup_lcd(); >> +#endif >> + >> + return 0; >> +} >> + >> +#ifdef CONFIG_CMD_BMODE >> +static const struct boot_mode board_boot_modes[] = { >> + /* 4 bit bus width */ >> + {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)}, >> + {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)}, >> + {NULL, 0}, >> +}; >> +#endif >> + >> +int board_late_init(void) >> +{ >> +#ifdef CONFIG_CMD_BMODE >> + add_board_boot_modes(board_boot_modes); >> +#endif >> + >> + return 0; >> +} >> + >> +int checkboard(void) >> +{ >> + printf("Model: Toradex Colibri iMX7%c\n", >> + is_cpu_type(MXC_CPU_MX7D) ? 'D' : 'S'); >> + >> + return 0; >> +} >> + >> +#ifdef CONFIG_USB_EHCI_MX7 >> +static iomux_v3_cfg_t const usb_otg2_pads[] = { >> + MX7D_PAD_UART3_CTS_B__USB_OTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), >> +}; >> + >> +int board_ehci_hcd_init(int port) >> +{ >> + switch (port) { >> + case 0: >> + break; >> + case 1: >> + if (is_cpu_type(MXC_CPU_MX7S)) >> + return -ENODEV; >> + >> + imx_iomux_v3_setup_multiple_pads(usb_otg2_pads, >> + ARRAY_SIZE(usb_otg2_pads)); >> + break; >> + default: >> + return -EINVAL; >> + } >> + return 0; >> +} >> +#endif >> + >> +static struct mxc_serial_platdata mxc_serial_plat = { >> + .reg = (struct mxc_uart *)UART1_IPS_BASE_ADDR, >> + .use_dte = true, >> +}; >> + >> +U_BOOT_DEVICE(mxc_serial) = { >> + .name = "serial_mxc", >> + .platdata = &mxc_serial_plat, >> +}; >> diff --git a/board/toradex/colibri_imx7/imximage.cfg b/board/toradex/colibri_imx7/imximage.cfg >> new file mode 100644 >> index 0000000..d891e82 >> --- /dev/null >> +++ b/board/toradex/colibri_imx7/imximage.cfg >> @@ -0,0 +1,150 @@ >> +/* >> + * Copyright (C) 2015 Freescale Semiconductor, Inc. >> + * 2015 Toradex AG >> + * >> + * SPDX-License-Identifier: GPL-2.0+ >> + * >> + * Refer docs/README.imxmage for more details about how-to configure >> + * and create imximage boot image >> + * >> + * The syntax is taken as close as possible with the kwbimage >> + */ >> + >> +#define __ASSEMBLY__ >> +#include <config.h> >> + >> +/* image version */ >> + >> +IMAGE_VERSION 2 >> + >> +/* >> + * Boot Device : sd >> + */ >> + >> +BOOT_FROM sd >> + >> +/* >> + * Secure boot support >> + */ >> +#ifdef CONFIG_SECURE_BOOT >> +CSF CONFIG_CSF_SIZE >> +#endif >> + >> +/* >> + * Device Configuration Data (DCD) >> + * >> + * Each entry must have the format: >> + * Addr-type Address Value >> + * >> + * where: >> + * Addr-type register length (1,2 or 4 bytes) >> + * Address absolute address of the register >> + * value value to be stored in the register >> + */ >> + >> +/* IOMUXC_GPR_GPR1 */ >> +DATA 4 0x30340004 0x4F400005 >> + >> +/* DDR3L */ >> +/* assuming MEMC_FREQ_RATIO = 2 */ >> +/* SRC_DDRC_RCR */ >> +DATA 4 0x30391000 0x00000002 >> +/* DDRC_MSTR */ >> +DATA 4 0x307a0000 0x01040001 >> +/* DDRC_DFIUPD0 */ >> +DATA 4 0x307a01a0 0x80400003 >> +/* DDRC_DFIUPD1 */ >> +DATA 4 0x307a01a4 0x00100020 >> +/* DDRC_DFIUPD2 */ >> +DATA 4 0x307a01a8 0x80100004 >> +/* DDRC_RFSHTMG */ >> +DATA 4 0x307a0064 0x00400045 >> +/* DDRC_MP_PCTRL_0 */ >> +DATA 4 0x307a0490 0x00000001 >> +/* DDRC_INIT0 */ >> +DATA 4 0x307a00d0 0x00020083 >> +/* DDRC_INIT1 */ >> +DATA 4 0x307a00d4 0x00690000 >> +/* DDRC_INIT3 MR0/MR1 */ >> +DATA 4 0x307a00dc 0x09300004 >> +/* DDRC_INIT4 MR2/MR3 */ >> +DATA 4 0x307a00e0 0x04480000 >> +/* DDRC_INIT5 */ >> +DATA 4 0x307a00e4 0x00100004 >> +/* DDRC_RANKCTL */ >> +DATA 4 0x307a00f4 0x0000033f >> +/* DDRC_DRAMTMG0 */ >> +DATA 4 0x307a0100 0x090b090a >> +/* DDRC_DRAMTMG1 */ >> +DATA 4 0x307a0104 0x000d020d >> +/* DDRC_DRAMTMG2 */ >> +DATA 4 0x307a0108 0x03040307 >> +/* DDRC_DRAMTMG3 */ >> +DATA 4 0x307a010c 0x00002006 >> +/* DDRC_DRAMTMG4 */ >> +DATA 4 0x307a0110 0x04020205 >> +/* DDRC_DRAMTMG5 */ >> +DATA 4 0x307a0114 0x03030202 >> +/* DDRC_DRAMTMG8 */ >> +DATA 4 0x307a0120 0x00000803 >> +/* DDRC_ZQCTL0 */ >> +DATA 4 0x307a0180 0x00800020 >> +/* DDRC_ZQCTL1 */ >> +DATA 4 0x307a0184 0x02001000 >> +/* DDRC_DFITMG0 */ >> +DATA 4 0x307a0190 0x02098204 >> +/* DDRC_DFITMG1 */ >> +DATA 4 0x307a0194 0x00030303 >> +/* DDRC_ADDRMAP0 */ >> +DATA 4 0x307a0200 0x0000001f >> +/* DDRC_ADDRMAP1 */ >> +DATA 4 0x307a0204 0x00080808 >> +/* DDRC_ADDRMAP5 */ >> +DATA 4 0x307a0214 0x07070707 >> +/* DDRC_ADDRMAP6 */ >> +DATA 4 0x307a0218 0x07070707 >> +/* DDRC_ODTCFG */ >> +DATA 4 0x307a0240 0x06000601 >> +/* DDRC_ODTMAP */ >> +DATA 4 0x307a0244 0x00000011 >> +/* SRC_DDRC_RCR */ >> +DATA 4 0x30391000 0x00000000 >> +/* DDR_PHY_PHY_CON0 */ >> +DATA 4 0x30790000 0x17420f40 >> +/* DDR_PHY_PHY_CON1 */ >> +DATA 4 0x30790004 0x10210100 >> +/* DDR_PHY_PHY_CON4 */ >> +DATA 4 0x30790010 0x00060807 >> +/* DDR_PHY_MDLL_CON0 */ >> +DATA 4 0x307900b0 0x1010007e >> +/* DDR_PHY_DRVDS_CON0 */ >> +DATA 4 0x3079009c 0x00000d6e >> +/* DDR_PHY_OFFSET_RD_CON0 */ >> +DATA 4 0x30790020 0x08080808 >> +/* DDR_PHY_OFFSET_WR_CON0 */ >> +DATA 4 0x30790030 0x08080808 >> +/* DDR_PHY_CMD_SDLL_CON0 */ >> +DATA 4 0x30790050 0x01000010 >> +DATA 4 0x30790050 0x00000010 >> + >> +/* DDR_PHY_ZQ_CON0 */ >> +DATA 4 0x307900c0 0x0e407304 >> +DATA 4 0x307900c0 0x0e447304 >> +DATA 4 0x307900c0 0x0e447306 >> +/* DDR_PHY_ZQ_CON1 */ >> +CHECK_BITS_SET 4 0x307900c4 0x1 >> +/* DDR_PHY_ZQ_CON0 */ >> +DATA 4 0x307900c0 0x0e447304 >> +DATA 4 0x307900c0 0x0e407304 >> + >> +/* CCM_CCGRn */ >> +DATA 4 0x30384130 0x00000000 >> +/* IOMUXC_GPR_GPR8 */ >> +DATA 4 0x30340020 0x00000178 >> +/* CCM_CCGRn */ >> +DATA 4 0x30384130 0x00000002 >> +/* DDR_PHY_LP_CON0 */ >> +DATA 4 0x30790018 0x0000000f >> + >> +/* DDRC_STAT */ >> +CHECK_BITS_SET 4 0x307a0004 0x1 >> diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig >> new file mode 100644 >> index 0000000..50c1201 >> --- /dev/null >> +++ b/configs/colibri_imx7_defconfig >> @@ -0,0 +1,40 @@ >> +CONFIG_ARM=y >> +CONFIG_ARCH_MX7=y >> +CONFIG_TARGET_COLIBRI_IMX7=y >> +CONFIG_IMX_RDC=y >> +CONFIG_IMX_BOOTAUX=y >> +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D" >> +CONFIG_BOOTDELAY=1 >> +CONFIG_HUSH_PARSER=y >> +CONFIG_SYS_PROMPT="Colibri iMX7 # " >> +# CONFIG_CMD_BOOTD is not set >> +CONFIG_CMD_BOOTZ=y >> +# CONFIG_CMD_IMI is not set >> +# CONFIG_CMD_IMLS is not set >> +# CONFIG_CMD_XIMG is not set >> +CONFIG_CMD_ASKENV=y >> +CONFIG_CMD_MEMTEST=y >> +CONFIG_CMD_MMC=y >> +CONFIG_CMD_NAND=y >> +CONFIG_CMD_I2C=y >> +CONFIG_CMD_USB=y >> +CONFIG_CMD_DFU=y >> +CONFIG_CMD_USB_MASS_STORAGE=y >> +# CONFIG_CMD_FPGA is not set >> +CONFIG_CMD_GPIO=y >> +CONFIG_CMD_DHCP=y >> +CONFIG_CMD_MII=y >> +CONFIG_CMD_PING=y >> +CONFIG_CMD_CACHE=y >> +CONFIG_CMD_EXT4=y >> +CONFIG_CMD_FAT=y >> +CONFIG_CMD_FS_GENERIC=y >> +CONFIG_USB=y >> +CONFIG_USB_EHCI_HCD=y >> +CONFIG_USB_GADGET=y >> +CONFIG_CI_UDC=y >> +CONFIG_USB_GADGET_DOWNLOAD=y >> +CONFIG_G_DNL_MANUFACTURER="Toradex" >> +CONFIG_G_DNL_VENDOR_NUM=0x1b67 >> +CONFIG_G_DNL_PRODUCT_NUM=0x4020 >> +CONFIG_OF_LIBFDT=y >> diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h >> new file mode 100644 >> index 0000000..6dc429b >> --- /dev/null >> +++ b/include/configs/colibri_imx7.h >> @@ -0,0 +1,248 @@ >> +/* >> + * Copyright 2016 Toradex AG >> + * >> + * Configuration settings for the Colibri iMX7 module. >> + * >> + * based on mx7dsabresd.h: >> + * Copyright (C) 2015 Freescale Semiconductor, Inc. >> + * >> + * SPDX-License-Identifier: GPL-2.0+ >> + */ >> + >> +#ifndef __COLIBRI_IMX7_CONFIG_H >> +#define __COLIBRI_IMX7_CONFIG_H >> + >> +#include "mx7_common.h" >> + >> +#define CONFIG_SYS_THUMB_BUILD >> +#define CONFIG_USE_ARCH_MEMCPY >> +#define CONFIG_USE_ARCH_MEMSET >> + >> +/*#define CONFIG_DBG_MONITOR*/ >> +#define PHYS_SDRAM_SIZE SZ_512M >> + >> +#define CONFIG_BOARD_EARLY_INIT_F >> +#define CONFIG_BOARD_LATE_INIT >> + >> +#define CONFIG_DISPLAY_BOARDINFO_LATE >> + >> +/* Size of malloc() pool */ >> +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) >> + >> +/* Uncomment to enable secure boot support */ >> +/* #define CONFIG_SECURE_BOOT */ >> +#define CONFIG_CSF_SIZE 0x4000 >> + >> +#define CONFIG_CMD_BMODE >> + >> +/* Network */ >> +#define CONFIG_COLIBRI_EXT_PHYCLK >> +#define CONFIG_FEC_MXC >> +#define CONFIG_MII >> +#define CONFIG_FEC_XCV_TYPE RMII >> +#define CONFIG_ETHPRIME "FEC" >> +#define CONFIG_FEC_MXC_PHYADDR 0 >> + >> +#define CONFIG_PHYLIB >> +#define CONFIG_PHY_MICREL >> +#define CONFIG_TFTP_TSIZE >> +#define CONFIG_IP_DEFRAG >> +#define CONFIG_TFTP_BLOCKSIZE 16384 >> + >> +/* ENET1 */ >> +#define IMX_FEC_BASE ENET_IPS_BASE_ADDR >> + >> +/* MMC Config*/ >> +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 >> +#define CONFIG_SYS_FSL_USDHC_NUM 1 >> + >> +#undef CONFIG_BOOTM_PLAN9 >> +#undef CONFIG_BOOTM_RTEMS >> + >> +/* I2C configs */ >> +#define CONFIG_SYS_I2C >> +#define CONFIG_SYS_I2C_MXC >> +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ >> +#define CONFIG_SYS_I2C_SPEED 100000 >> + >> +#define CONFIG_IPADDR 192.168.10.2 >> +#define CONFIG_NETMASK 255.255.255.0 >> +#define CONFIG_SERVERIP 192.168.10.1 >> + >> +#define MEM_LAYOUT_ENV_SETTINGS \ >> + "fdt_addr_r=0x82000000\0" \ >> + "fdt_high=0xffffffff\0" \ >> + "initrd_high=0xffffffff\0" \ >> + "kernel_addr_r=0x81000000\0" \ >> + "ramdisk_addr_r=0x82100000\0" >> + >> +#define SD_BOOTCMD \ >> + "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ >> + "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \ >> + "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ >> + "run m4boot && " \ >> + "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \ >> + "load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ >> + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ >> + >> +#define NFS_BOOTCMD \ >> + "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ >> + "nfsboot=run setup; " \ >> + "setenv bootargs ${defargs} ${nfsargs} " \ >> + "${setupargs} ${vidargs}; echo Booting from NFS...;" \ >> + "dhcp ${kernel_addr_r} && " \ >> + "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ >> + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ >> + >> +#define UBI_BOOTCMD \ >> + "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ >> + "ubi.fm_autoconvert=1\0" \ >> + "ubiboot=run setup; " \ >> + "setenv bootargs ${defargs} ${ubiargs} " \ >> + "${setupargs} ${vidargs}; echo Booting from NAND...; " \ >> + "ubi part ubi && run m4boot && " \ >> + "ubi read ${kernel_addr_r} kernel && " \ >> + "ubi read ${fdt_addr_r} dtb && " \ >> + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ >> + >> +#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" >> + >> +#define CONFIG_EXTRA_ENV_SETTINGS \ >> + MEM_LAYOUT_ENV_SETTINGS \ >> + NFS_BOOTCMD \ >> + SD_BOOTCMD \ >> + UBI_BOOTCMD \ >> + "console=ttymxc0\0" \ >> + "defargs=\0" \ >> + "fdt_board=eval-v3\0" \ >> + "fdt_fixup=;\0" \ >> + "m4boot=;\0" \ >> + "ip_dyn=yes\0" \ >> + "kernel_file=zImage\0" \ >> + "mtdparts=" MTDPARTS_DEFAULT "\0" \ >> + "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ >> + "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ >> + "${board}/flash_eth.img && source ${loadaddr}\0" \ >> + "setsdupdate=mmc rescan && setenv interface mmc && " \ >> + "fatload ${interface} 0:1 ${loadaddr} " \ >> + "${board}/flash_blk.img && source ${loadaddr}\0" \ >> + "setup=setenv setupargs " \ >> + "console=tty1 console=${console}" \ >> + ",${baudrate}n8 ${memargs} consoleblank=0 ${mtdparts}\0" \ >> + "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ >> + "setusbupdate=usb start && setenv interface usb && " \ >> + "fatload ${interface} 0:1 ${loadaddr} " \ >> + "${board}/flash_blk.img && source ${loadaddr}\0" \ >> + "splashpos=m,m\0" \ >> + "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \ >> + >> +/* Miscellaneous configurable options */ >> +#define CONFIG_SYS_LONGHELP >> + >> +#define CONFIG_SYS_MEMTEST_START 0x80000000 >> +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000) >> + >> +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR >> +#define CONFIG_SYS_HZ 1000 >> + >> +#define CONFIG_STACKSIZE SZ_128K >> + >> +/* Physical Memory Map */ >> +#define CONFIG_NR_DRAM_BANKS 1 >> +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR >> + >> +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM >> +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR >> +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE >> + >> +#define CONFIG_SYS_INIT_SP_OFFSET \ >> + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) >> +#define CONFIG_SYS_INIT_SP_ADDR \ >> + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) >> + >> +/* FLASH and environment organization */ >> +#define CONFIG_SYS_NO_FLASH >> +#define CONFIG_ENV_IS_IN_NAND >> + >> +#if defined(CONFIG_ENV_IS_IN_MMC) >> +#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ >> +#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ >> +#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ >> +#define CONFIG_ENV_OFFSET (8 * SZ_64K) >> +#elif defined(CONFIG_ENV_IS_IN_NAND) >> +#define CONFIG_ENV_OFFSET (4 * 1024 * 1024) >> +#define CONFIG_ENV_SECT_SIZE (128 * 1024) >> +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE >> +#endif >> + >> +#define CONFIG_NAND_MXS >> +#define CONFIG_CMD_NAND_TRIMFFS >> + >> +/* NAND stuff */ >> +#define CONFIG_SYS_MAX_NAND_DEVICE 1 >> +#define CONFIG_SYS_NAND_BASE 0x40000000 >> +#define CONFIG_SYS_NAND_5_ADDR_CYCLE >> +#define CONFIG_SYS_NAND_ONFI_DETECTION >> +#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES >> +#define CONFIG_CMD_NAND_TORTURE >> + >> +/* UBI stuff */ >> +#define CONFIG_RBTREE >> +#define CONFIG_LZO >> +#define CONFIG_CMD_UBI >> +#define CONFIG_MTD_UBI_FASTMAP >> +#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */ >> + >> +/* Dynamic MTD partition support */ >> +#define CONFIG_CMD_MTDPARTS /* Enable 'mtdparts' command line support */ >> +#define CONFIG_MTD_PARTITIONS >> +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ >> +#define MTDIDS_DEFAULT "nand0=gpmi-nand" >> +#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:" \ >> + "512k(mx7-bcb)," \ >> + "3584k(u-boot)ro," \ >> + "512k(u-boot-env)," \ >> + "-(ubi)" >> + >> +/* DMA stuff, needed for GPMI/MXS NAND support */ >> +#define CONFIG_APBH_DMA >> +#define CONFIG_APBH_DMA_BURST >> +#define CONFIG_APBH_DMA_BURST8 >> + >> +/* USB Configs */ >> +#define CONFIG_USB_STORAGE >> +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET >> + >> +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) >> +#define CONFIG_MXC_USB_FLAGS 0 >> +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 >> + >> +#define CONFIG_IMX_THERMAL >> + >> +#define CONFIG_USBD_HS >> + >> +#define CONFIG_USB_FUNCTION_MASS_STORAGE >> + >> +/* USB Device Firmware Update support */ >> +#define CONFIG_USB_FUNCTION_DFU >> +#define CONFIG_DFU_MMC >> +#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M >> +#define DFU_DEFAULT_POLL_TIMEOUT 300 >> + >> +#define CONFIG_VIDEO >> +#ifdef CONFIG_VIDEO >> +#define CONFIG_CFB_CONSOLE >> +#define CONFIG_VIDEO_MXS >> +#define CONFIG_VIDEO_LOGO >> +#define CONFIG_VIDEO_SW_CURSOR >> +#define CONFIG_VGA_AS_SINGLE_DEVICE >> +#define CONFIG_SYS_CONSOLE_IS_IN_ENV >> +#define CONFIG_SPLASH_SCREEN >> +#define CONFIG_SPLASH_SCREEN_ALIGN >> +#define CONFIG_CMD_BMP >> +#define CONFIG_BMP_16BPP >> +#define CONFIG_VIDEO_BMP_RLE8 >> +#define CONFIG_VIDEO_BMP_LOGO >> +#endif >> + >> +#endif >> > > Best regards, > Stefano Babic ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 9/9] colibri_imx7: add Colibri iMX7S/iMX7D module support 2016-07-19 16:05 ` Stefan Agner @ 2016-07-19 16:26 ` Stefano Babic 0 siblings, 0 replies; 27+ messages in thread From: Stefano Babic @ 2016-07-19 16:26 UTC (permalink / raw) To: u-boot Hi Stefan, On 19/07/2016 18:05, Stefan Agner wrote: >> I wonder we never add imximage.cfg into the MAINTAINERS. Boards with SPL >> have a central and empty imximage.cfg, for the other ones we should add >> it to the list. (Note: I have currently seen that no board having its >> own imximage.cfg does not list it in the MAINTAINERS file). >> > > I added the directory where imximage.cfg is located in > (board/toradex/colibri_imx7/). We also don't add other files in there, I > think the scripts work fine with directories specified without > specifying the individual files... Of course, you're right - sorry for noise. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner ` (8 preceding siblings ...) 2016-07-13 7:25 ` [U-Boot] [PATCH v2 9/9] colibri_imx7: add Colibri iMX7S/iMX7D module support Stefan Agner @ 2016-07-18 20:59 ` Stefan Agner 2016-07-19 14:18 ` stefano 9 siblings, 1 reply; 27+ messages in thread From: Stefan Agner @ 2016-07-18 20:59 UTC (permalink / raw) To: u-boot On 2016-07-13 00:25, Stefan Agner wrote: > From: Stefan Agner <stefan.agner@toradex.com> > > This patchset adds support for the Toradex i.MX 7Solo and 7Dual > based computer on modules Colibri iMX7S/iMX7D. > > It also brings several smaller i.MX 7 related fixes/cleanups. Is there anything holding us back merging this patchset? It touches several subsystems, ultimately the final patch adding the new board is depending on all of them. What is the plan how to merge it? -- Stefan > > Changes since v1: > - Dropped Ricoh RN5T567 PMIC support (for now) > - Use CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG for runtime variables > - Convert USB OTG Power Pin Polarity to Kconfig > - Use gpio_request in lcd_setup > > Stefan Agner (9): > dm: imx: serial: Support DTE mode when using driver model > usb: move CONFIG_USB_EHCI_MX7 to Kconfig > usb: ehci-mx6: configure power polarity in usb_power_config > usb: ehci-mx6: introduce config for high active power pin > mx7: set soc environment according to exact SoC type > mx7_common: Put display board info config into board file > mx7_common: use Kconfig for ARMv7 non-secure mode > imx_watchdog: add weak attribute to reset_cpu function > colibri_imx7: add Colibri iMX7S/iMX7D module support > > arch/arm/cpu/armv7/mx7/Kconfig | 9 + > arch/arm/cpu/armv7/mx7/soc.c | 14 + > board/toradex/colibri_imx7/Kconfig | 12 + > board/toradex/colibri_imx7/MAINTAINERS | 6 + > board/toradex/colibri_imx7/Makefile | 6 + > board/toradex/colibri_imx7/colibri_imx7.c | 420 ++++++++++++++++++++++++++++++ > board/toradex/colibri_imx7/imximage.cfg | 150 +++++++++++ > configs/colibri_imx7_defconfig | 40 +++ > configs/mx7dsabresd_defconfig | 3 + > configs/warp7_defconfig | 4 + > drivers/serial/serial_mxc.c | 9 +- > drivers/usb/host/Kconfig | 16 ++ > drivers/usb/host/ehci-mx6.c | 14 +- > drivers/watchdog/imx_watchdog.c | 2 +- > include/configs/colibri_imx7.h | 248 ++++++++++++++++++ > include/configs/mx7_common.h | 10 +- > include/configs/mx7dsabresd.h | 4 +- > include/configs/warp7.h | 4 +- > include/dm/platform_data/serial_mxc.h | 1 + > 19 files changed, 953 insertions(+), 19 deletions(-) > create mode 100644 board/toradex/colibri_imx7/Kconfig > create mode 100644 board/toradex/colibri_imx7/MAINTAINERS > create mode 100644 board/toradex/colibri_imx7/Makefile > create mode 100644 board/toradex/colibri_imx7/colibri_imx7.c > create mode 100644 board/toradex/colibri_imx7/imximage.cfg > create mode 100644 configs/colibri_imx7_defconfig > create mode 100644 include/configs/colibri_imx7.h ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support 2016-07-18 20:59 ` [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner @ 2016-07-19 14:18 ` stefano 2016-07-19 16:09 ` Stefan Agner 0 siblings, 1 reply; 27+ messages in thread From: stefano @ 2016-07-19 14:18 UTC (permalink / raw) To: u-boot Hi Stefan, On 18/07/2016 22:59, Stefan Agner wrote: > On 2016-07-13 00:25, Stefan Agner wrote: >> From: Stefan Agner <stefan.agner@toradex.com> >> >> This patchset adds support for the Toradex i.MX 7Solo and 7Dual >> based computer on modules Colibri iMX7S/iMX7D. >> >> It also brings several smaller i.MX 7 related fixes/cleanups. > > Is there anything holding us back merging this patchset? > > It touches several subsystems, ultimately the final patch adding the new > board is depending on all of them. What is the plan how to merge it? > I see all patches are assigned to me - that makes sense to avoid some kind of breakages. IMHO patches 1-4, 6-8 are ready to be merged. The best plan could be I start to apply them, and you resend an updated just for the ones to be changed. This should makes integration easier. Stefano > -- > Stefan > >> >> Changes since v1: >> - Dropped Ricoh RN5T567 PMIC support (for now) >> - Use CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG for runtime variables >> - Convert USB OTG Power Pin Polarity to Kconfig >> - Use gpio_request in lcd_setup >> >> Stefan Agner (9): >> dm: imx: serial: Support DTE mode when using driver model >> usb: move CONFIG_USB_EHCI_MX7 to Kconfig >> usb: ehci-mx6: configure power polarity in usb_power_config >> usb: ehci-mx6: introduce config for high active power pin >> mx7: set soc environment according to exact SoC type >> mx7_common: Put display board info config into board file >> mx7_common: use Kconfig for ARMv7 non-secure mode >> imx_watchdog: add weak attribute to reset_cpu function >> colibri_imx7: add Colibri iMX7S/iMX7D module support >> >> arch/arm/cpu/armv7/mx7/Kconfig | 9 + >> arch/arm/cpu/armv7/mx7/soc.c | 14 + >> board/toradex/colibri_imx7/Kconfig | 12 + >> board/toradex/colibri_imx7/MAINTAINERS | 6 + >> board/toradex/colibri_imx7/Makefile | 6 + >> board/toradex/colibri_imx7/colibri_imx7.c | 420 ++++++++++++++++++++++++++++++ >> board/toradex/colibri_imx7/imximage.cfg | 150 +++++++++++ >> configs/colibri_imx7_defconfig | 40 +++ >> configs/mx7dsabresd_defconfig | 3 + >> configs/warp7_defconfig | 4 + >> drivers/serial/serial_mxc.c | 9 +- >> drivers/usb/host/Kconfig | 16 ++ >> drivers/usb/host/ehci-mx6.c | 14 +- >> drivers/watchdog/imx_watchdog.c | 2 +- >> include/configs/colibri_imx7.h | 248 ++++++++++++++++++ >> include/configs/mx7_common.h | 10 +- >> include/configs/mx7dsabresd.h | 4 +- >> include/configs/warp7.h | 4 +- >> include/dm/platform_data/serial_mxc.h | 1 + >> 19 files changed, 953 insertions(+), 19 deletions(-) >> create mode 100644 board/toradex/colibri_imx7/Kconfig >> create mode 100644 board/toradex/colibri_imx7/MAINTAINERS >> create mode 100644 board/toradex/colibri_imx7/Makefile >> create mode 100644 board/toradex/colibri_imx7/colibri_imx7.c >> create mode 100644 board/toradex/colibri_imx7/imximage.cfg >> create mode 100644 configs/colibri_imx7_defconfig >> create mode 100644 include/configs/colibri_imx7.h -- stefano <stefano.babic@babic.homelinux.org> GPG Key: 0x55814DDE Fingerprint 4E85 2A66 4CBA 497A 2A7B D3BF 5973 F216 5581 4DDE ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support 2016-07-19 14:18 ` stefano @ 2016-07-19 16:09 ` Stefan Agner 2016-07-19 16:58 ` Stefano Babic 0 siblings, 1 reply; 27+ messages in thread From: Stefan Agner @ 2016-07-19 16:09 UTC (permalink / raw) To: u-boot On 2016-07-19 07:18, stefano wrote: > Hi Stefan, > > On 18/07/2016 22:59, Stefan Agner wrote: >> On 2016-07-13 00:25, Stefan Agner wrote: >>> From: Stefan Agner <stefan.agner@toradex.com> >>> >>> This patchset adds support for the Toradex i.MX 7Solo and 7Dual >>> based computer on modules Colibri iMX7S/iMX7D. >>> >>> It also brings several smaller i.MX 7 related fixes/cleanups. >> >> Is there anything holding us back merging this patchset? >> >> It touches several subsystems, ultimately the final patch adding the new >> board is depending on all of them. What is the plan how to merge it? >> > > I see all patches are assigned to me - that makes sense to avoid some > kind of breakages. > > IMHO patches 1-4, 6-8 are ready to be merged. The best plan could be I > start to apply them, and you resend an updated just for the ones to be > changed. This should makes integration easier. Afait, 5 should be fine too. The i.MX 6 changes will be in a separate patch, and Tom agreed to the approach for the soc variable... Will resend 9. -- Stefan > > Stefano > >> -- >> Stefan >> >>> >>> Changes since v1: >>> - Dropped Ricoh RN5T567 PMIC support (for now) >>> - Use CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG for runtime variables >>> - Convert USB OTG Power Pin Polarity to Kconfig >>> - Use gpio_request in lcd_setup >>> >>> Stefan Agner (9): >>> dm: imx: serial: Support DTE mode when using driver model >>> usb: move CONFIG_USB_EHCI_MX7 to Kconfig >>> usb: ehci-mx6: configure power polarity in usb_power_config >>> usb: ehci-mx6: introduce config for high active power pin >>> mx7: set soc environment according to exact SoC type >>> mx7_common: Put display board info config into board file >>> mx7_common: use Kconfig for ARMv7 non-secure mode >>> imx_watchdog: add weak attribute to reset_cpu function >>> colibri_imx7: add Colibri iMX7S/iMX7D module support >>> >>> arch/arm/cpu/armv7/mx7/Kconfig | 9 + >>> arch/arm/cpu/armv7/mx7/soc.c | 14 + >>> board/toradex/colibri_imx7/Kconfig | 12 + >>> board/toradex/colibri_imx7/MAINTAINERS | 6 + >>> board/toradex/colibri_imx7/Makefile | 6 + >>> board/toradex/colibri_imx7/colibri_imx7.c | 420 ++++++++++++++++++++++++++++++ >>> board/toradex/colibri_imx7/imximage.cfg | 150 +++++++++++ >>> configs/colibri_imx7_defconfig | 40 +++ >>> configs/mx7dsabresd_defconfig | 3 + >>> configs/warp7_defconfig | 4 + >>> drivers/serial/serial_mxc.c | 9 +- >>> drivers/usb/host/Kconfig | 16 ++ >>> drivers/usb/host/ehci-mx6.c | 14 +- >>> drivers/watchdog/imx_watchdog.c | 2 +- >>> include/configs/colibri_imx7.h | 248 ++++++++++++++++++ >>> include/configs/mx7_common.h | 10 +- >>> include/configs/mx7dsabresd.h | 4 +- >>> include/configs/warp7.h | 4 +- >>> include/dm/platform_data/serial_mxc.h | 1 + >>> 19 files changed, 953 insertions(+), 19 deletions(-) >>> create mode 100644 board/toradex/colibri_imx7/Kconfig >>> create mode 100644 board/toradex/colibri_imx7/MAINTAINERS >>> create mode 100644 board/toradex/colibri_imx7/Makefile >>> create mode 100644 board/toradex/colibri_imx7/colibri_imx7.c >>> create mode 100644 board/toradex/colibri_imx7/imximage.cfg >>> create mode 100644 configs/colibri_imx7_defconfig >>> create mode 100644 include/configs/colibri_imx7.h ^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support 2016-07-19 16:09 ` Stefan Agner @ 2016-07-19 16:58 ` Stefano Babic 0 siblings, 0 replies; 27+ messages in thread From: Stefano Babic @ 2016-07-19 16:58 UTC (permalink / raw) To: u-boot Hi Stefan, On 19/07/2016 18:09, Stefan Agner wrote: > On 2016-07-19 07:18, stefano wrote: >> Hi Stefan, >> >> On 18/07/2016 22:59, Stefan Agner wrote: >>> On 2016-07-13 00:25, Stefan Agner wrote: >>>> From: Stefan Agner <stefan.agner@toradex.com> >>>> >>>> This patchset adds support for the Toradex i.MX 7Solo and 7Dual >>>> based computer on modules Colibri iMX7S/iMX7D. >>>> >>>> It also brings several smaller i.MX 7 related fixes/cleanups. >>> >>> Is there anything holding us back merging this patchset? >>> >>> It touches several subsystems, ultimately the final patch adding the new >>> board is depending on all of them. What is the plan how to merge it? >>> >> >> I see all patches are assigned to me - that makes sense to avoid some >> kind of breakages. >> >> IMHO patches 1-4, 6-8 are ready to be merged. The best plan could be I >> start to apply them, and you resend an updated just for the ones to be >> changed. This should makes integration easier. > > Afait, 5 should be fine too. The i.MX 6 changes will be in a separate > patch, and Tom agreed to the approach for the soc variable... > I see, agree on that. I merge patch 1-8, and I will wait for 9. > Will resend 9. Fine with me. Stefano -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2016-07-19 16:58 UTC | newest] Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-07-13 7:25 [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 1/9] dm: imx: serial: Support DTE mode when using driver model Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 2/9] usb: move CONFIG_USB_EHCI_MX7 to Kconfig Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 3/9] usb: ehci-mx6: configure power polarity in usb_power_config Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 4/9] usb: ehci-mx6: introduce config for high active power pin Stefan Agner 2016-07-13 12:11 ` Otavio Salvador 2016-07-13 16:03 ` Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 5/9] mx7: set soc environment according to exact SoC type Stefan Agner 2016-07-18 22:19 ` Fabio Estevam 2016-07-18 22:21 ` Stefan Agner 2016-07-19 0:36 ` Tom Rini 2016-07-19 2:19 ` Stefan Agner 2016-07-19 12:33 ` Tom Rini 2016-07-19 13:59 ` Stefano Babic 2016-07-19 14:06 ` Fabio Estevam 2016-07-19 14:21 ` Stefano Babic 2016-07-13 7:25 ` [U-Boot] [PATCH v2 6/9] mx7_common: Put display board info config into board file Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 7/9] mx7_common: use Kconfig for ARMv7 non-secure mode Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 8/9] imx_watchdog: add weak attribute to reset_cpu function Stefan Agner 2016-07-13 7:25 ` [U-Boot] [PATCH v2 9/9] colibri_imx7: add Colibri iMX7S/iMX7D module support Stefan Agner 2016-07-19 14:14 ` Stefano Babic 2016-07-19 16:05 ` Stefan Agner 2016-07-19 16:26 ` Stefano Babic 2016-07-18 20:59 ` [U-Boot] [PATCH v2 0/9] mx7: add Colibri iMX7S/iMX7D support Stefan Agner 2016-07-19 14:18 ` stefano 2016-07-19 16:09 ` Stefan Agner 2016-07-19 16:58 ` Stefano Babic
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