* [PATCH 0/4] Add device nodes for BCM7xxx SoCs
@ 2016-08-08 2:17 Jaedon Shin
2016-08-08 2:17 ` [PATCH 1/4] MIPS: BMIPS: Add support PWM device nodes Jaedon Shin
` (3 more replies)
0 siblings, 4 replies; 18+ messages in thread
From: Jaedon Shin @ 2016-08-08 2:17 UTC (permalink / raw)
To: Florian Fainelli
Cc: Ralf Baechle, Kevin Cernekee, Rob Herring, linux-mips, Jaedon Shin
Hi all,
This patch series adds support for Broadcom BCM7xxx MIPS based SoCs.
The NAND device nodes have common file including chip select, BCH
and partitions for the reference board with the same properties.
Jaedon Shin (4):
MIPS: BMIPS: Add support PWM device nodes
MIPS: BMIPS: Add support GPIO device nodes
MIPS: BMIPS: Add support SDHCI device nodes
MIPS: BMIPS: Add support NAND device nodes
arch/mips/boot/dts/brcm/bcm7125.dtsi | 46 ++++++++++
arch/mips/boot/dts/brcm/bcm7346.dtsi | 87 +++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7358.dtsi | 79 +++++++++++++++++
arch/mips/boot/dts/brcm/bcm7360.dtsi | 79 +++++++++++++++++
arch/mips/boot/dts/brcm/bcm7362.dtsi | 79 +++++++++++++++++
arch/mips/boot/dts/brcm/bcm7420.dtsi | 54 ++++++++++++
arch/mips/boot/dts/brcm/bcm7425.dtsi | 99 ++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7435.dtsi | 99 ++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi | 24 ++++++
arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 13 +++
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 25 ++++++
arch/mips/boot/dts/brcm/bcm97358svmb.dts | 21 +++++
arch/mips/boot/dts/brcm/bcm97360svmb.dts | 21 +++++
arch/mips/boot/dts/brcm/bcm97362svmb.dts | 21 +++++
arch/mips/boot/dts/brcm/bcm97420c.dts | 17 ++++
arch/mips/boot/dts/brcm/bcm97425svmb.dts | 29 +++++++
arch/mips/boot/dts/brcm/bcm97435svmb.dts | 29 +++++++
17 files changed, 822 insertions(+)
create mode 100644 arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi
--
2.9.2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/4] MIPS: BMIPS: Add support PWM device nodes
2016-08-08 2:17 [PATCH 0/4] Add device nodes for BCM7xxx SoCs Jaedon Shin
@ 2016-08-08 2:17 ` Jaedon Shin
2016-08-08 2:17 ` [PATCH 2/4] MIPS: BMIPS: Add support GPIO " Jaedon Shin
` (2 subsequent siblings)
3 siblings, 0 replies; 18+ messages in thread
From: Jaedon Shin @ 2016-08-08 2:17 UTC (permalink / raw)
To: Florian Fainelli
Cc: Ralf Baechle, Kevin Cernekee, Rob Herring, linux-mips, Jaedon Shin
Adds PWM device nodes to BCM7xxx MIPS based SoCs.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
---
arch/mips/boot/dts/brcm/bcm7125.dtsi | 14 ++++++++++++++
arch/mips/boot/dts/brcm/bcm7346.dtsi | 22 ++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7358.dtsi | 22 ++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7360.dtsi | 14 ++++++++++++++
arch/mips/boot/dts/brcm/bcm7362.dtsi | 14 ++++++++++++++
arch/mips/boot/dts/brcm/bcm7420.dtsi | 22 ++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7425.dtsi | 22 ++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7435.dtsi | 22 ++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 4 ++++
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 8 ++++++++
arch/mips/boot/dts/brcm/bcm97358svmb.dts | 8 ++++++++
arch/mips/boot/dts/brcm/bcm97360svmb.dts | 4 ++++
arch/mips/boot/dts/brcm/bcm97362svmb.dts | 4 ++++
arch/mips/boot/dts/brcm/bcm97420c.dts | 8 ++++++++
arch/mips/boot/dts/brcm/bcm97425svmb.dts | 8 ++++++++
arch/mips/boot/dts/brcm/bcm97435svmb.dts | 8 ++++++++
16 files changed, 204 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 550e1d9e3ee0..97191f6bca28 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -40,6 +40,12 @@
#clock-cells = <0>;
clock-frequency = <81000000>;
};
+
+ upg_clk: upg_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
rdb {
@@ -183,6 +189,14 @@
status = "disabled";
};
+ pwma: pwm@406580 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406580 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
ehci0: usb@488300 {
compatible = "brcm,bcm7125-ehci", "generic-ehci";
reg = <0x488300 0x100>;
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index ec959061d52e..eb7b19a32e3e 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -40,6 +40,12 @@
#clock-cells = <0>;
clock-frequency = <81000000>;
};
+
+ upg_clk: upg_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
rdb {
@@ -210,6 +216,22 @@
status = "disabled";
};
+ pwma: pwm@406580 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406580 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
+ pwmb: pwm@406800 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406800 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index ca57fb5eb122..b2276b1e12d4 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -34,6 +34,12 @@
#clock-cells = <0>;
clock-frequency = <81000000>;
};
+
+ upg_clk: upg_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
rdb {
@@ -194,6 +200,22 @@
status = "disabled";
};
+ pwma: pwm@406400 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406400 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
+ pwmb: pwm@406700 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406700 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index 1c0c3d438c7a..e414af1e14ff 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -34,6 +34,12 @@
#clock-cells = <0>;
clock-frequency = <81000000>;
};
+
+ upg_clk: upg_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
rdb {
@@ -194,6 +200,14 @@
status = "disabled";
};
+ pwma: pwm@406400 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406400 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index 6b4713add4b8..3bd1c0111d43 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -40,6 +40,12 @@
#clock-cells = <0>;
clock-frequency = <81000000>;
};
+
+ upg_clk: upg_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
rdb {
@@ -190,6 +196,14 @@
status = "disabled";
};
+ pwma: pwm@406400 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406400 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index 0586bf662571..27c3d45556b9 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -40,6 +40,12 @@
#clock-cells = <0>;
clock-frequency = <81000000>;
};
+
+ upg_clk: upg_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
rdb {
@@ -191,6 +197,22 @@
status = "disabled";
};
+ pwma: pwm@406580 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406580 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
+ pwmb: pwm@406880 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406880 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
enet0: ethernet@468000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index c1c15edaf829..9ab65d64e948 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -40,6 +40,12 @@
#clock-cells = <0>;
clock-frequency = <81000000>;
};
+
+ upg_clk: upg_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
rdb {
@@ -209,6 +215,22 @@
status = "disabled";
};
+ pwma: pwm@406580 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406580 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
+ pwmb: pwm@406800 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406800 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
enet0: ethernet@b80000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index a874d3a0e2ee..7801169416e7 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -52,6 +52,12 @@
#clock-cells = <0>;
clock-frequency = <81000000>;
};
+
+ upg_clk: upg_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
rdb {
@@ -224,6 +230,22 @@
status = "disabled";
};
+ pwma: pwm@406580 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406580 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
+ pwmb: pwm@406800 {
+ compatible = "brcm,bcm7038-pwm";
+ reg = <0x406800 0x28>;
+ #pwm-cells = <2>;
+ clocks = <&upg_clk>;
+ status = "disabled";
+ };
+
enet0: ethernet@b80000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
index f2449d147c6d..5c24eacd72dd 100644
--- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
@@ -45,6 +45,10 @@
status = "okay";
};
+&pwma {
+ status = "okay";
+};
+
/* FIXME: USB is wonky; disable it for now */
&ehci0 {
status = "disabled";
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
index d3d28816a027..2c55ab094a29 100644
--- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -49,6 +49,14 @@
status = "okay";
};
+&pwma {
+ status = "okay";
+};
+
+&pwmb {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
index 02ce6b429dc4..757fe9d5f4df 100644
--- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
@@ -45,6 +45,14 @@
status = "okay";
};
+&pwma {
+ status = "okay";
+};
+
+&pwmb {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index 73124be9548a..496e6ed9fae3 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -45,6 +45,10 @@
status = "okay";
};
+&pwma {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
index 3cfcaebe7f79..b880c018f3d8 100644
--- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -41,6 +41,10 @@
status = "okay";
};
+&pwma {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
index 600d57abee05..e66271af055e 100644
--- a/arch/mips/boot/dts/brcm/bcm97420c.dts
+++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
@@ -51,6 +51,14 @@
status = "okay";
};
+&pwma {
+ status = "okay";
+};
+
+&pwmb {
+ status = "okay";
+};
+
/* FIXME: MAC driver comes up but cannot attach to PHY */
&enet0 {
status = "disabled";
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index 119c714805cb..f091e91b11c5 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -51,6 +51,14 @@
status = "okay";
};
+&pwma {
+ status = "okay";
+};
+
+&pwmb {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index 43e3ba27f07b..9db84f2a6664 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -51,6 +51,14 @@
status = "okay";
};
+&pwma {
+ status = "okay";
+};
+
+&pwmb {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
--
2.9.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
2016-08-08 2:17 [PATCH 0/4] Add device nodes for BCM7xxx SoCs Jaedon Shin
2016-08-08 2:17 ` [PATCH 1/4] MIPS: BMIPS: Add support PWM device nodes Jaedon Shin
@ 2016-08-08 2:17 ` Jaedon Shin
[not found] ` <20160808021719.4680-3-jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-08-08 2:17 ` [PATCH 3/4] MIPS: BMIPS: Add support SDHCI " Jaedon Shin
2016-08-08 2:17 ` [PATCH 4/4] MIPS: BMIPS: Add support NAND " Jaedon Shin
3 siblings, 1 reply; 18+ messages in thread
From: Jaedon Shin @ 2016-08-08 2:17 UTC (permalink / raw)
To: Florian Fainelli
Cc: Ralf Baechle, Kevin Cernekee, Rob Herring, linux-mips, Jaedon Shin
Adds GPIO device nodes to BCM7xxx MIPS based SoCs.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
---
arch/mips/boot/dts/brcm/bcm7125.dtsi | 12 ++++++++++
arch/mips/boot/dts/brcm/bcm7346.dtsi | 37 +++++++++++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7358.dtsi | 37 +++++++++++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7360.dtsi | 37 +++++++++++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7362.dtsi | 37 +++++++++++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7420.dtsi | 12 ++++++++++
arch/mips/boot/dts/brcm/bcm7425.dtsi | 37 +++++++++++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7435.dtsi | 37 +++++++++++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 4 ++++
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 8 +++++++
arch/mips/boot/dts/brcm/bcm97358svmb.dts | 8 +++++++
arch/mips/boot/dts/brcm/bcm97360svmb.dts | 8 +++++++
arch/mips/boot/dts/brcm/bcm97362svmb.dts | 8 +++++++
arch/mips/boot/dts/brcm/bcm97420c.dts | 4 ++++
arch/mips/boot/dts/brcm/bcm97425svmb.dts | 8 +++++++
arch/mips/boot/dts/brcm/bcm97435svmb.dts | 8 +++++++
16 files changed, 302 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 97191f6bca28..746ed06c85de 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -197,6 +197,18 @@
status = "disabled";
};
+ upg_gio: gpio@406700 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x406700 0x80>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_irq0_intc>;
+ interrupts = <6>;
+ brcm,gpio-bank-widths = <32 32 32 18>;
+ };
+
ehci0: usb@488300 {
compatible = "brcm,bcm7125-ehci", "generic-ehci";
reg = <0x488300 0x100>;
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index eb7b19a32e3e..1ef7540238be 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -232,6 +232,43 @@
status = "disabled";
};
+ aon_pm_l2_intc: aon_pm_l2_intc@408440 {
+ compatible = "brcm,l2-intc";
+ reg = <0x408440 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <52>;
+ brcm,irq-can-wake;
+ };
+
+ upg_gio: gpio@406700 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x406700 0x60>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_irq0_intc>;
+ interrupts = <6>;
+ brcm,gpio-bank-widths = <32 32 16>;
+ };
+
+ upg_gio_aon: gpio@408c00 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x408c00 0x60>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_aon_irq0_intc>;
+ interrupts = <6>;
+ interrupts-extended = <&upg_aon_irq0_intc 6>,
+ <&aon_pm_l2_intc 5>;
+ wakeup-source;
+ brcm,gpio-bank-widths = <27 32 2>;
+ };
+
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index b2276b1e12d4..bb099ee046a1 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -216,6 +216,43 @@
status = "disabled";
};
+ aon_pm_l2_intc: aon_pm_l2_intc@408240 {
+ compatible = "brcm,l2-intc";
+ reg = <0x408240 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <49>;
+ brcm,irq-can-wake;
+ };
+
+ upg_gio: gpio@406500 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x406500 0xa0>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_irq0_intc>;
+ interrupts = <6>;
+ brcm,gpio-bank-widths = <32 32 32 29 4>;
+ };
+
+ upg_gio_aon: gpio@408c00 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x408c00 0x60>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_aon_irq0_intc>;
+ interrupts = <6>;
+ interrupts-extended = <&upg_aon_irq0_intc 6>,
+ <&aon_pm_l2_intc 5>;
+ wakeup-source;
+ brcm,gpio-bank-widths = <21 32 2>;
+ };
+
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index e414af1e14ff..0aeb3de7fbc2 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -208,6 +208,43 @@
status = "disabled";
};
+ aon_pm_l2_intc: aon_pm_l2_intc@408440 {
+ compatible = "brcm,l2-intc";
+ reg = <0x408440 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <49>;
+ brcm,irq-can-wake;
+ };
+
+ upg_gio: gpio@406500 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x406500 0xa0>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_irq0_intc>;
+ interrupts = <6>;
+ brcm,gpio-bank-widths = <32 32 32 29 4>;
+ };
+
+ upg_gio_aon: gpio@408c00 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x408c00 0x60>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_aon_irq0_intc>;
+ interrupts = <6>;
+ interrupts-extended = <&upg_aon_irq0_intc 6>,
+ <&aon_pm_l2_intc 5>;
+ wakeup-source;
+ brcm,gpio-bank-widths = <21 32 2>;
+ };
+
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index 3bd1c0111d43..9a1f6ffc343d 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -204,6 +204,43 @@
status = "disabled";
};
+ aon_pm_l2_intc: aon_pm_l2_intc@408440 {
+ compatible = "brcm,l2-intc";
+ reg = <0x408440 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <49>;
+ brcm,irq-can-wake;
+ };
+
+ upg_gio: gpio@406500 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x406500 0xa0>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_irq0_intc>;
+ interrupts = <6>;
+ brcm,gpio-bank-widths = <32 32 32 29 4>;
+ };
+
+ upg_gio_aon: gpio@408c00 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x408c00 0x60>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_aon_irq0_intc>;
+ interrupts = <6>;
+ interrupts-extended = <&upg_aon_irq0_intc 6>,
+ <&aon_pm_l2_intc 5>;
+ wakeup-source;
+ brcm,gpio-bank-widths = <21 32 2>;
+ };
+
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index 27c3d45556b9..0d391d77c780 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -213,6 +213,18 @@
status = "disabled";
};
+ upg_gio: gpio@406700 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x406700 0x80>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_irq0_intc>;
+ interrupts = <6>;
+ brcm,gpio-bank-widths = <32 32 32 27>;
+ };
+
enet0: ethernet@468000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index 9ab65d64e948..04306a92b8eb 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -231,6 +231,43 @@
status = "disabled";
};
+ aon_pm_l2_intc: aon_pm_l2_intc@408440 {
+ compatible = "brcm,l2-intc";
+ reg = <0x408440 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <48>;
+ brcm,irq-can-wake;
+ };
+
+ upg_gio: gpio@406700 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x406700 0x80>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_irq0_intc>;
+ interrupts = <6>;
+ brcm,gpio-bank-widths = <32 32 32 21>;
+ };
+
+ upg_gio_aon: gpio@4094c0 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x4094c0 0x40>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_aon_irq0_intc>;
+ interrupts = <6>;
+ interrupts-extended = <&upg_aon_irq0_intc 6>,
+ <&aon_pm_l2_intc 5>;
+ wakeup-source;
+ brcm,gpio-bank-widths = <18 4>;
+ };
+
enet0: ethernet@b80000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index 7801169416e7..c4883643ab61 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -246,6 +246,43 @@
status = "disabled";
};
+ aon_pm_l2_intc: aon_pm_l2_intc@408440 {
+ compatible = "brcm,l2-intc";
+ reg = <0x408440 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <53>;
+ brcm,irq-can-wake;
+ };
+
+ upg_gio: gpio@406700 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x406700 0x80>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_irq0_intc>;
+ interrupts = <6>;
+ brcm,gpio-bank-widths = <32 32 32 21>;
+ };
+
+ upg_gio_aon: gpio@4094c0 {
+ compatible = "brcm,brcmstb-gpio";
+ reg = <0x4094c0 0x40>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <&upg_aon_irq0_intc>;
+ interrupts = <6>;
+ interrupts-extended = <&upg_aon_irq0_intc 6>,
+ <&aon_pm_l2_intc 5>;
+ wakeup-source;
+ brcm,gpio-bank-widths = <18 4>;
+ };
+
enet0: ethernet@b80000 {
phy-mode = "internal";
phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
index 5c24eacd72dd..91590ff55d52 100644
--- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
@@ -49,6 +49,10 @@
status = "okay";
};
+&upg_gio {
+ status = "okay";
+};
+
/* FIXME: USB is wonky; disable it for now */
&ehci0 {
status = "disabled";
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
index 2c55ab094a29..e91a21f75a13 100644
--- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -57,6 +57,14 @@
status = "okay";
};
+&upg_gio {
+ status = "okay";
+};
+
+&upg_gio_aon {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
index 757fe9d5f4df..d475a152eb2a 100644
--- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
@@ -53,6 +53,14 @@
status = "okay";
};
+&upg_gio {
+ status = "okay";
+};
+
+&upg_gio_aon {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index 496e6ed9fae3..a445a45f51cb 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -49,6 +49,14 @@
status = "okay";
};
+&upg_gio {
+ status = "okay";
+};
+
+&upg_gio_aon {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
index b880c018f3d8..22b1b506594f 100644
--- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -45,6 +45,14 @@
status = "okay";
};
+&upg_gio {
+ status = "okay";
+};
+
+&upg_gio_aon {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
index e66271af055e..428c36da91b6 100644
--- a/arch/mips/boot/dts/brcm/bcm97420c.dts
+++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
@@ -59,6 +59,10 @@
status = "okay";
};
+&upg_gio {
+ status = "okay";
+};
+
/* FIXME: MAC driver comes up but cannot attach to PHY */
&enet0 {
status = "disabled";
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index f091e91b11c5..6adfcd505a03 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -59,6 +59,14 @@
status = "okay";
};
+&upg_gio {
+ status = "okay";
+};
+
+&upg_gio_aon {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index 9db84f2a6664..dd8b8fb97053 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -59,6 +59,14 @@
status = "okay";
};
+&upg_gio {
+ status = "okay";
+};
+
+&upg_gio_aon {
+ status = "okay";
+};
+
&enet0 {
status = "okay";
};
--
2.9.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 3/4] MIPS: BMIPS: Add support SDHCI device nodes
2016-08-08 2:17 [PATCH 0/4] Add device nodes for BCM7xxx SoCs Jaedon Shin
2016-08-08 2:17 ` [PATCH 1/4] MIPS: BMIPS: Add support PWM device nodes Jaedon Shin
2016-08-08 2:17 ` [PATCH 2/4] MIPS: BMIPS: Add support GPIO " Jaedon Shin
@ 2016-08-08 2:17 ` Jaedon Shin
2016-08-08 2:17 ` [PATCH 4/4] MIPS: BMIPS: Add support NAND " Jaedon Shin
3 siblings, 0 replies; 18+ messages in thread
From: Jaedon Shin @ 2016-08-08 2:17 UTC (permalink / raw)
To: Florian Fainelli
Cc: Ralf Baechle, Kevin Cernekee, Rob Herring, linux-mips, Jaedon Shin
Adds SDHCI device nodes to BCM7xxx MIPS based SoCs.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
---
arch/mips/boot/dts/brcm/bcm7346.dtsi | 8 ++++++++
arch/mips/boot/dts/brcm/bcm7360.dtsi | 8 ++++++++
arch/mips/boot/dts/brcm/bcm7362.dtsi | 8 ++++++++
arch/mips/boot/dts/brcm/bcm7425.dtsi | 20 ++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7435.dtsi | 20 ++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 4 ++++
arch/mips/boot/dts/brcm/bcm97360svmb.dts | 4 ++++
arch/mips/boot/dts/brcm/bcm97362svmb.dts | 4 ++++
arch/mips/boot/dts/brcm/bcm97425svmb.dts | 8 ++++++++
arch/mips/boot/dts/brcm/bcm97435svmb.dts | 8 ++++++++
10 files changed, 92 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index 1ef7540238be..30af896ddb60 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -411,5 +411,13 @@
#phy-cells = <0>;
};
};
+
+ sdhci0: sdhci@413500 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x413500 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <85>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index 0aeb3de7fbc2..05d868cbb5c0 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -330,5 +330,13 @@
#phy-cells = <0>;
};
};
+
+ sdhci0: sdhci@410000 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x410000 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <82>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index 9a1f6ffc343d..ff555e52c088 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -326,5 +326,13 @@
#phy-cells = <0>;
};
};
+
+ sdhci0: sdhci@410000 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x410000 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <82>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index 04306a92b8eb..4e387d05bb5b 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -410,5 +410,25 @@
#phy-cells = <0>;
};
};
+
+ sdhci0: sdhci@419000 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x419000 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <43>;
+ sd-uhs-sdr50;
+ mmc-hs200-1_8v;
+ status = "disabled";
+ };
+
+ sdhci1: sdhci@419200 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x419200 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <44>;
+ sd-uhs-sdr50;
+ mmc-hs200-1_8v;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index c4883643ab61..d3130f7b7b70 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -425,5 +425,25 @@
#phy-cells = <0>;
};
};
+
+ sdhci0: sdhci@41a000 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x41a000 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <47>;
+ sd-uhs-sdr50;
+ mmc-hs200-1_8v;
+ status = "disabled";
+ };
+
+ sdhci1: sdhci@41a200 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x41a200 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <48>;
+ sd-uhs-sdr50;
+ mmc-hs200-1_8v;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
index e91a21f75a13..ee4867ec03c4 100644
--- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -108,3 +108,7 @@
&sata_phy {
status = "okay";
};
+
+&sdhci0 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index a445a45f51cb..bb1e0474510d 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -76,3 +76,7 @@
&sata_phy {
status = "okay";
};
+
+&sdhci0 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
index 22b1b506594f..1c7c15679dff 100644
--- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -72,3 +72,7 @@
&sata_phy {
status = "okay";
};
+
+&sdhci0 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index 6adfcd505a03..b9222f72d063 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -102,3 +102,11 @@
&ohci3 {
status = "okay";
};
+
+&sdhci0 {
+ status = "okay";
+};
+
+&sdhci1 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index dd8b8fb97053..6bca6449f86a 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -110,3 +110,11 @@
&sata_phy {
status = "okay";
};
+
+&sdhci0 {
+ status = "okay";
+};
+
+&sdhci1 {
+ status = "okay";
+};
--
2.9.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 4/4] MIPS: BMIPS: Add support NAND device nodes
2016-08-08 2:17 [PATCH 0/4] Add device nodes for BCM7xxx SoCs Jaedon Shin
` (2 preceding siblings ...)
2016-08-08 2:17 ` [PATCH 3/4] MIPS: BMIPS: Add support SDHCI " Jaedon Shin
@ 2016-08-08 2:17 ` Jaedon Shin
2016-08-08 22:35 ` Florian Fainelli
3 siblings, 1 reply; 18+ messages in thread
From: Jaedon Shin @ 2016-08-08 2:17 UTC (permalink / raw)
To: Florian Fainelli
Cc: Ralf Baechle, Kevin Cernekee, Rob Herring, linux-mips, Jaedon Shin
Adds NAND device nodes to BCM7xxx MIPS based SoCs.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
---
arch/mips/boot/dts/brcm/bcm7125.dtsi | 20 ++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7346.dtsi | 20 ++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7358.dtsi | 20 ++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7360.dtsi | 20 ++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7362.dtsi | 20 ++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7420.dtsi | 20 ++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7425.dtsi | 20 ++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7435.dtsi | 20 ++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi | 24 ++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 5 +++++
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 5 +++++
arch/mips/boot/dts/brcm/bcm97358svmb.dts | 5 +++++
arch/mips/boot/dts/brcm/bcm97360svmb.dts | 5 +++++
arch/mips/boot/dts/brcm/bcm97362svmb.dts | 5 +++++
arch/mips/boot/dts/brcm/bcm97420c.dts | 5 +++++
arch/mips/boot/dts/brcm/bcm97425svmb.dts | 5 +++++
arch/mips/boot/dts/brcm/bcm97435svmb.dts | 5 +++++
17 files changed, 224 insertions(+)
create mode 100644 arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 746ed06c85de..8642631a8451 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -226,5 +226,25 @@
interrupts = <61>;
status = "disabled";
};
+
+ hif_l2_intc: hif_l2_intc@411000 {
+ compatible = "brcm,l2-intc";
+ reg = <0x411000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <0>;
+ };
+
+ nand: nand@412800 {
+ compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "nand";
+ reg = <0x412800 0x400>;
+ interrupt-parent = <&hif_l2_intc>;
+ interrupts = <24>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index 30af896ddb60..1e19050825b5 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -372,6 +372,26 @@
status = "disabled";
};
+ hif_l2_intc: hif_l2_intc@411000 {
+ compatible = "brcm,l2-intc";
+ reg = <0x411000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <30>;
+ };
+
+ nand: nand@412800 {
+ compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "nand";
+ reg = <0x412800 0x400>;
+ interrupt-parent = <&hif_l2_intc>;
+ interrupts = <24>;
+ status = "disabled";
+ };
+
sata: sata@181000 {
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
reg-names = "ahci", "top-ctrl";
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index bb099ee046a1..079163b00994 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -298,5 +298,25 @@
interrupts = <66>;
status = "disabled";
};
+
+ hif_l2_intc: hif_l2_intc@411000 {
+ compatible = "brcm,l2-intc";
+ reg = <0x411000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <30>;
+ };
+
+ nand: nand@412800 {
+ compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "nand";
+ reg = <0x412800 0x400>;
+ interrupt-parent = <&hif_l2_intc>;
+ interrupts = <24>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index 05d868cbb5c0..37dc60a3e730 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -291,6 +291,26 @@
status = "disabled";
};
+ hif_l2_intc: hif_l2_intc@411000 {
+ compatible = "brcm,l2-intc";
+ reg = <0x411000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <30>;
+ };
+
+ nand: nand@412800 {
+ compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "nand";
+ reg = <0x412800 0x400>;
+ interrupt-parent = <&hif_l2_intc>;
+ interrupts = <24>;
+ status = "disabled";
+ };
+
sata: sata@181000 {
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
reg-names = "ahci", "top-ctrl";
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index ff555e52c088..b148acb7e116 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -287,6 +287,26 @@
status = "disabled";
};
+ hif_l2_intc: hif_l2_intc@411000 {
+ compatible = "brcm,l2-intc";
+ reg = <0x411000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <30>;
+ };
+
+ nand: nand@412800 {
+ compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "nand";
+ reg = <0x412800 0x400>;
+ interrupt-parent = <&hif_l2_intc>;
+ interrupts = <24>;
+ status = "disabled";
+ };
+
sata: sata@181000 {
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
reg-names = "ahci", "top-ctrl";
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index 0d391d77c780..6f42ae70ffff 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -287,5 +287,25 @@
interrupts = <62>;
status = "disabled";
};
+
+ hif_l2_intc: hif_l2_intc@411000 {
+ compatible = "brcm,l2-intc";
+ reg = <0x411000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <0>;
+ };
+
+ nand: nand@412800 {
+ compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "nand";
+ reg = <0x412800 0x400>;
+ interrupt-parent = <&hif_l2_intc>;
+ interrupts = <24>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index 4e387d05bb5b..a80d5d1e31ed 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -371,6 +371,26 @@
status = "disabled";
};
+ hif_l2_intc: hif_l2_intc@41a000 {
+ compatible = "brcm,l2-intc";
+ reg = <0x41a000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <24>;
+ };
+
+ nand: nand@41b800 {
+ compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "nand";
+ reg = <0x41b800 0x400>;
+ interrupt-parent = <&hif_l2_intc>;
+ interrupts = <24>;
+ status = "disabled";
+ };
+
sata: sata@181000 {
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
reg-names = "ahci", "top-ctrl";
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index d3130f7b7b70..ae5c6311db59 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -386,6 +386,26 @@
status = "disabled";
};
+ hif_l2_intc: hif_l2_intc@41b000 {
+ compatible = "brcm,l2-intc";
+ reg = <0x41b000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <24>;
+ };
+
+ nand: nand@41c800 {
+ compatible = "brcm,brcmnand-v6.2", "brcm,brcmnand";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "nand", "flash-dma";
+ reg = <0x41c800 0x600>, <0x41d000 0x100>;
+ interrupt-parent = <&hif_l2_intc>;
+ interrupts = <24>, <4>;
+ status = "disabled";
+ };
+
sata: sata@181000 {
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
reg-names = "ahci", "top-ctrl";
diff --git a/arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi b/arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi
new file mode 100644
index 000000000000..5f17f149fcf7
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi
@@ -0,0 +1,24 @@
+&nand {
+ nandcs@1 {
+ compatible = "brcm,nandcs";
+ reg = <1>;
+
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <8>;
+ nand-on-flash-bbt;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ flash1.rootfs@0 {
+ reg = <0x0 0x10000000>;
+ };
+
+ flash1.kernel@10000000 {
+ reg = <0x10000000 0x400000>;
+ };
+ };
+ };
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
index 91590ff55d52..391d0ce642bc 100644
--- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
@@ -1,6 +1,7 @@
/dts-v1/;
/include/ "bcm7125.dtsi"
+/include/ "bcm7xxx-nand-cs1-bch8.dtsi"
/ {
compatible = "brcm,bcm97125cbmb", "brcm,bcm7125";
@@ -61,3 +62,7 @@
&ohci0 {
status = "disabled";
};
+
+&nand {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
index ee4867ec03c4..dc6b5a0b548c 100644
--- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -1,6 +1,7 @@
/dts-v1/;
/include/ "bcm7346.dtsi"
+/include/ "bcm7xxx-nand-cs1-bch8.dtsi"
/ {
compatible = "brcm,bcm97346dbsmb", "brcm,bcm7346";
@@ -101,6 +102,10 @@
status = "okay";
};
+&nand {
+ status = "okay";
+};
+
&sata {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
index d475a152eb2a..3390dac81fff 100644
--- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
@@ -1,6 +1,7 @@
/dts-v1/;
/include/ "bcm7358.dtsi"
+/include/ "bcm7xxx-nand-cs1-bch8.dtsi"
/ {
compatible = "brcm,bcm97358svmb", "brcm,bcm7358";
@@ -72,3 +73,7 @@
&ohci0 {
status = "okay";
};
+
+&nand {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index bb1e0474510d..82d7ffe6769e 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -1,6 +1,7 @@
/dts-v1/;
/include/ "bcm7360.dtsi"
+/include/ "bcm7xxx-nand-cs1-bch8.dtsi"
/ {
compatible = "brcm,bcm97360svmb", "brcm,bcm7360";
@@ -69,6 +70,10 @@
status = "okay";
};
+&nand {
+ status = "okay";
+};
+
&sata {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
index 1c7c15679dff..aa1a92ab678e 100644
--- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -1,6 +1,7 @@
/dts-v1/;
/include/ "bcm7362.dtsi"
+/include/ "bcm7xxx-nand-cs1-bch8.dtsi"
/ {
compatible = "brcm,bcm97362svmb", "brcm,bcm7362";
@@ -65,6 +66,10 @@
status = "okay";
};
+&nand {
+ status = "okay";
+};
+
&sata {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
index 428c36da91b6..25dcf0955ca0 100644
--- a/arch/mips/boot/dts/brcm/bcm97420c.dts
+++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
@@ -1,6 +1,7 @@
/dts-v1/;
/include/ "bcm7420.dtsi"
+/include/ "bcm7xxx-nand-cs1-bch8.dtsi"
/ {
compatible = "brcm,bcm97420c", "brcm,bcm7420";
@@ -76,6 +77,10 @@
status = "okay";
};
+&nand {
+ status = "okay";
+};
+
&ehci1 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index b9222f72d063..2cfe9088e508 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -1,6 +1,7 @@
/dts-v1/;
/include/ "bcm7425.dtsi"
+/include/ "bcm7xxx-nand-cs1-bch8.dtsi"
/ {
compatible = "brcm,bcm97425svmb", "brcm,bcm7425";
@@ -103,6 +104,10 @@
status = "okay";
};
+&nand {
+ status = "okay";
+};
+
&sdhci0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index 6bca6449f86a..2693f707d113 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -1,6 +1,7 @@
/dts-v1/;
/include/ "bcm7435.dtsi"
+/include/ "bcm7xxx-nand-cs1-bch8.dtsi"
/ {
compatible = "brcm,bcm97435svmb", "brcm,bcm7435";
@@ -103,6 +104,10 @@
status = "okay";
};
+&nand {
+ status = "okay";
+};
+
&sata {
status = "okay";
};
--
2.9.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
2016-08-08 2:17 ` [PATCH 2/4] MIPS: BMIPS: Add support GPIO " Jaedon Shin
@ 2016-08-08 14:06 ` Jonas Gorski
0 siblings, 0 replies; 18+ messages in thread
From: Jonas Gorski @ 2016-08-08 14:06 UTC (permalink / raw)
To: Jaedon Shin
Cc: Florian Fainelli, Ralf Baechle, Kevin Cernekee, Rob Herring,
MIPS Mailing List, devicetree-u79uwXL29TY76Z2rM5mHXA
Hi,
please always include devicetree for any dts(i) related changes.
On 8 August 2016 at 04:17, Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> Adds GPIO device nodes to BCM7xxx MIPS based SoCs.
>
> Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> arch/mips/boot/dts/brcm/bcm7125.dtsi | 12 ++++++++++
> arch/mips/boot/dts/brcm/bcm7346.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7358.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7360.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7362.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7420.dtsi | 12 ++++++++++
> arch/mips/boot/dts/brcm/bcm7425.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7435.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 4 ++++
> arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 8 +++++++
> arch/mips/boot/dts/brcm/bcm97358svmb.dts | 8 +++++++
> arch/mips/boot/dts/brcm/bcm97360svmb.dts | 8 +++++++
> arch/mips/boot/dts/brcm/bcm97362svmb.dts | 8 +++++++
> arch/mips/boot/dts/brcm/bcm97420c.dts | 4 ++++
> arch/mips/boot/dts/brcm/bcm97425svmb.dts | 8 +++++++
> arch/mips/boot/dts/brcm/bcm97435svmb.dts | 8 +++++++
> 16 files changed, 302 insertions(+)
>
> diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
> index 97191f6bca28..746ed06c85de 100644
> --- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
> @@ -197,6 +197,18 @@
> status = "disabled";
> };
>
> + upg_gio: gpio@406700 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406700 0x80>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 18>;
> + };
> +
> ehci0: usb@488300 {
> compatible = "brcm,bcm7125-ehci", "generic-ehci";
> reg = <0x488300 0x100>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
> index eb7b19a32e3e..1ef7540238be 100644
> --- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
> @@ -232,6 +232,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408440 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <52>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406700 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406700 0x60>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 16>;
> + };
> +
> + upg_gio_aon: gpio@408c00 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x408c00 0x60>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <27 32 2>;
> + };
> +
> enet0: ethernet@430000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
> index b2276b1e12d4..bb099ee046a1 100644
> --- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
> @@ -216,6 +216,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408240 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408240 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <49>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406500 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406500 0xa0>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 29 4>;
> + };
> +
> + upg_gio_aon: gpio@408c00 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x408c00 0x60>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <21 32 2>;
> + };
> +
> enet0: ethernet@430000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
> index e414af1e14ff..0aeb3de7fbc2 100644
> --- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
> @@ -208,6 +208,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408440 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <49>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406500 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406500 0xa0>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 29 4>;
> + };
> +
> + upg_gio_aon: gpio@408c00 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x408c00 0x60>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <21 32 2>;
> + };
> +
> enet0: ethernet@430000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
> index 3bd1c0111d43..9a1f6ffc343d 100644
> --- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
> @@ -204,6 +204,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408440 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <49>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406500 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406500 0xa0>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 29 4>;
> + };
> +
> + upg_gio_aon: gpio@408c00 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x408c00 0x60>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <21 32 2>;
> + };
> +
> enet0: ethernet@430000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
> index 27c3d45556b9..0d391d77c780 100644
> --- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
> @@ -213,6 +213,18 @@
> status = "disabled";
> };
>
> + upg_gio: gpio@406700 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406700 0x80>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 27>;
> + };
> +
> enet0: ethernet@468000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
> index 9ab65d64e948..04306a92b8eb 100644
> --- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
> @@ -231,6 +231,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408440 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <48>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406700 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406700 0x80>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 21>;
> + };
> +
> + upg_gio_aon: gpio@4094c0 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x4094c0 0x40>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <18 4>;
> + };
> +
> enet0: ethernet@b80000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
> index 7801169416e7..c4883643ab61 100644
> --- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
> @@ -246,6 +246,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408440 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <53>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406700 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406700 0x80>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 21>;
> + };
> +
> + upg_gio_aon: gpio@4094c0 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x4094c0 0x40>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <18 4>;
> + };
> +
> enet0: ethernet@b80000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
> index 5c24eacd72dd..91590ff55d52 100644
> --- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
> @@ -49,6 +49,10 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
You don't set its status in the dtsi, it will be enabled by default,
and you can drop this change.
> /* FIXME: USB is wonky; disable it for now */
> &ehci0 {
> status = "disabled";
> diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
> index 2c55ab094a29..e91a21f75a13 100644
> --- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
> @@ -57,6 +57,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
> index 757fe9d5f4df..d475a152eb2a 100644
> --- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
> @@ -53,6 +53,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
> index 496e6ed9fae3..a445a45f51cb 100644
> --- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
> @@ -49,6 +49,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
> index b880c018f3d8..22b1b506594f 100644
> --- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
> @@ -45,6 +45,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
> index e66271af055e..428c36da91b6 100644
> --- a/arch/mips/boot/dts/brcm/bcm97420c.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
> @@ -59,6 +59,10 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
You don't set its status in the dtsi, it will be enabled by default,
and you can drop this change.
> /* FIXME: MAC driver comes up but cannot attach to PHY */
> &enet0 {
> status = "disabled";
> diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
> index f091e91b11c5..6adfcd505a03 100644
> --- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
> @@ -59,6 +59,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
> index 9db84f2a6664..dd8b8fb97053 100644
> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
> @@ -59,6 +59,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
Regards
Jonas
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
@ 2016-08-08 14:06 ` Jonas Gorski
0 siblings, 0 replies; 18+ messages in thread
From: Jonas Gorski @ 2016-08-08 14:06 UTC (permalink / raw)
To: Jaedon Shin
Cc: Florian Fainelli, Ralf Baechle, Kevin Cernekee, Rob Herring,
MIPS Mailing List, devicetree
Hi,
please always include devicetree for any dts(i) related changes.
On 8 August 2016 at 04:17, Jaedon Shin <jaedon.shin@gmail.com> wrote:
> Adds GPIO device nodes to BCM7xxx MIPS based SoCs.
>
> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
> ---
> arch/mips/boot/dts/brcm/bcm7125.dtsi | 12 ++++++++++
> arch/mips/boot/dts/brcm/bcm7346.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7358.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7360.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7362.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7420.dtsi | 12 ++++++++++
> arch/mips/boot/dts/brcm/bcm7425.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7435.dtsi | 37 +++++++++++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 4 ++++
> arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 8 +++++++
> arch/mips/boot/dts/brcm/bcm97358svmb.dts | 8 +++++++
> arch/mips/boot/dts/brcm/bcm97360svmb.dts | 8 +++++++
> arch/mips/boot/dts/brcm/bcm97362svmb.dts | 8 +++++++
> arch/mips/boot/dts/brcm/bcm97420c.dts | 4 ++++
> arch/mips/boot/dts/brcm/bcm97425svmb.dts | 8 +++++++
> arch/mips/boot/dts/brcm/bcm97435svmb.dts | 8 +++++++
> 16 files changed, 302 insertions(+)
>
> diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
> index 97191f6bca28..746ed06c85de 100644
> --- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
> @@ -197,6 +197,18 @@
> status = "disabled";
> };
>
> + upg_gio: gpio@406700 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406700 0x80>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 18>;
> + };
> +
> ehci0: usb@488300 {
> compatible = "brcm,bcm7125-ehci", "generic-ehci";
> reg = <0x488300 0x100>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
> index eb7b19a32e3e..1ef7540238be 100644
> --- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
> @@ -232,6 +232,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408440 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <52>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406700 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406700 0x60>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 16>;
> + };
> +
> + upg_gio_aon: gpio@408c00 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x408c00 0x60>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <27 32 2>;
> + };
> +
> enet0: ethernet@430000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
> index b2276b1e12d4..bb099ee046a1 100644
> --- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
> @@ -216,6 +216,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408240 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408240 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <49>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406500 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406500 0xa0>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 29 4>;
> + };
> +
> + upg_gio_aon: gpio@408c00 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x408c00 0x60>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <21 32 2>;
> + };
> +
> enet0: ethernet@430000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
> index e414af1e14ff..0aeb3de7fbc2 100644
> --- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
> @@ -208,6 +208,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408440 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <49>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406500 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406500 0xa0>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 29 4>;
> + };
> +
> + upg_gio_aon: gpio@408c00 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x408c00 0x60>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <21 32 2>;
> + };
> +
> enet0: ethernet@430000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
> index 3bd1c0111d43..9a1f6ffc343d 100644
> --- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
> @@ -204,6 +204,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408440 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <49>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406500 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406500 0xa0>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 29 4>;
> + };
> +
> + upg_gio_aon: gpio@408c00 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x408c00 0x60>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <21 32 2>;
> + };
> +
> enet0: ethernet@430000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
> index 27c3d45556b9..0d391d77c780 100644
> --- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
> @@ -213,6 +213,18 @@
> status = "disabled";
> };
>
> + upg_gio: gpio@406700 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406700 0x80>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 27>;
> + };
> +
> enet0: ethernet@468000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
> index 9ab65d64e948..04306a92b8eb 100644
> --- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
> @@ -231,6 +231,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408440 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <48>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406700 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406700 0x80>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 21>;
> + };
> +
> + upg_gio_aon: gpio@4094c0 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x4094c0 0x40>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <18 4>;
> + };
> +
> enet0: ethernet@b80000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
> index 7801169416e7..c4883643ab61 100644
> --- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
> @@ -246,6 +246,43 @@
> status = "disabled";
> };
>
> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
interrupt-controller@
> + compatible = "brcm,l2-intc";
> + reg = <0x408440 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <53>;
> + brcm,irq-can-wake;
> + };
> +
> + upg_gio: gpio@406700 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x406700 0x80>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_irq0_intc>;
> + interrupts = <6>;
> + brcm,gpio-bank-widths = <32 32 32 21>;
> + };
> +
> + upg_gio_aon: gpio@4094c0 {
> + compatible = "brcm,brcmstb-gpio";
> + reg = <0x4094c0 0x40>;
> + #gpio-cells = <2>;
> + #interrupt-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + interrupt-parent = <&upg_aon_irq0_intc>;
> + interrupts = <6>;
> + interrupts-extended = <&upg_aon_irq0_intc 6>,
> + <&aon_pm_l2_intc 5>;
> + wakeup-source;
> + brcm,gpio-bank-widths = <18 4>;
> + };
> +
> enet0: ethernet@b80000 {
> phy-mode = "internal";
> phy-handle = <&phy1>;
> diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
> index 5c24eacd72dd..91590ff55d52 100644
> --- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
> @@ -49,6 +49,10 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
You don't set its status in the dtsi, it will be enabled by default,
and you can drop this change.
> /* FIXME: USB is wonky; disable it for now */
> &ehci0 {
> status = "disabled";
> diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
> index 2c55ab094a29..e91a21f75a13 100644
> --- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
> @@ -57,6 +57,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
> index 757fe9d5f4df..d475a152eb2a 100644
> --- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
> @@ -53,6 +53,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
> index 496e6ed9fae3..a445a45f51cb 100644
> --- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
> @@ -49,6 +49,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
> index b880c018f3d8..22b1b506594f 100644
> --- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
> @@ -45,6 +45,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
> index e66271af055e..428c36da91b6 100644
> --- a/arch/mips/boot/dts/brcm/bcm97420c.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
> @@ -59,6 +59,10 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
You don't set its status in the dtsi, it will be enabled by default,
and you can drop this change.
> /* FIXME: MAC driver comes up but cannot attach to PHY */
> &enet0 {
> status = "disabled";
> diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
> index f091e91b11c5..6adfcd505a03 100644
> --- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
> @@ -59,6 +59,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
> index 9db84f2a6664..dd8b8fb97053 100644
> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
> @@ -59,6 +59,14 @@
> status = "okay";
> };
>
> +&upg_gio {
> + status = "okay";
> +};
> +
> +&upg_gio_aon {
> + status = "okay";
> +};
> +
You don't set their status in the dtsi, they will be enabled by
default, and you can drop this change.
> &enet0 {
> status = "okay";
> };
Regards
Jonas
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/4] MIPS: BMIPS: Add support NAND device nodes
2016-08-08 2:17 ` [PATCH 4/4] MIPS: BMIPS: Add support NAND " Jaedon Shin
@ 2016-08-08 22:35 ` Florian Fainelli
2016-08-08 22:40 ` Florian Fainelli
0 siblings, 1 reply; 18+ messages in thread
From: Florian Fainelli @ 2016-08-08 22:35 UTC (permalink / raw)
To: Jaedon Shin; +Cc: Ralf Baechle, Kevin Cernekee, Rob Herring, linux-mips
On 08/07/2016 07:17 PM, Jaedon Shin wrote:
> Adds NAND device nodes to BCM7xxx MIPS based SoCs.
>
> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
> ---
> arch/mips/boot/dts/brcm/bcm7125.dtsi | 20 ++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7346.dtsi | 20 ++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7358.dtsi | 20 ++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7360.dtsi | 20 ++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7362.dtsi | 20 ++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7420.dtsi | 20 ++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7425.dtsi | 20 ++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7435.dtsi | 20 ++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi | 24 ++++++++++++++++++++++
> arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 5 +++++
> arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 5 +++++
> arch/mips/boot/dts/brcm/bcm97358svmb.dts | 5 +++++
> arch/mips/boot/dts/brcm/bcm97360svmb.dts | 5 +++++
> arch/mips/boot/dts/brcm/bcm97362svmb.dts | 5 +++++
> arch/mips/boot/dts/brcm/bcm97420c.dts | 5 +++++
> arch/mips/boot/dts/brcm/bcm97425svmb.dts | 5 +++++
> arch/mips/boot/dts/brcm/bcm97435svmb.dts | 5 +++++
> 17 files changed, 224 insertions(+)
> create mode 100644 arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi
>
> diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
> index 746ed06c85de..8642631a8451 100644
> --- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
> @@ -226,5 +226,25 @@
> interrupts = <61>;
> status = "disabled";
> };
> +
> + hif_l2_intc: hif_l2_intc@411000 {
> + compatible = "brcm,l2-intc";
> + reg = <0x411000 0x30>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&periph_intc>;
> + interrupts = <0>;
> + };
> +
> + nand: nand@412800 {
> + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg-names = "nand";
> + reg = <0x412800 0x400>;
> + interrupt-parent = <&hif_l2_intc>;
> + interrupts = <24>;
> + status = "disabled";
> + };
This is a NAND v3.3 controller here not a v5.0 and it uses the EDU
registers for DMA transfers which is not supported in the mainline
driver, so with that dropped, the series looks fine. At any rate this
would require additional brcmnand changes to be supported.
--
Florian
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/4] MIPS: BMIPS: Add support NAND device nodes
2016-08-08 22:35 ` Florian Fainelli
@ 2016-08-08 22:40 ` Florian Fainelli
2016-08-09 1:52 ` Jaedon Shin
0 siblings, 1 reply; 18+ messages in thread
From: Florian Fainelli @ 2016-08-08 22:40 UTC (permalink / raw)
To: Jaedon Shin; +Cc: Ralf Baechle, Kevin Cernekee, Rob Herring, linux-mips
On 08/08/2016 03:35 PM, Florian Fainelli wrote:
> On 08/07/2016 07:17 PM, Jaedon Shin wrote:
>> Adds NAND device nodes to BCM7xxx MIPS based SoCs.
>>
>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>> ---
>> arch/mips/boot/dts/brcm/bcm7125.dtsi | 20 ++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7346.dtsi | 20 ++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7358.dtsi | 20 ++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7360.dtsi | 20 ++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7362.dtsi | 20 ++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7420.dtsi | 20 ++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7425.dtsi | 20 ++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7435.dtsi | 20 ++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi | 24 ++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 5 +++++
>> arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 5 +++++
>> arch/mips/boot/dts/brcm/bcm97358svmb.dts | 5 +++++
>> arch/mips/boot/dts/brcm/bcm97360svmb.dts | 5 +++++
>> arch/mips/boot/dts/brcm/bcm97362svmb.dts | 5 +++++
>> arch/mips/boot/dts/brcm/bcm97420c.dts | 5 +++++
>> arch/mips/boot/dts/brcm/bcm97425svmb.dts | 5 +++++
>> arch/mips/boot/dts/brcm/bcm97435svmb.dts | 5 +++++
>> 17 files changed, 224 insertions(+)
>> create mode 100644 arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi
>>
>> diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> index 746ed06c85de..8642631a8451 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> @@ -226,5 +226,25 @@
>> interrupts = <61>;
>> status = "disabled";
>> };
>> +
>> + hif_l2_intc: hif_l2_intc@411000 {
>> + compatible = "brcm,l2-intc";
>> + reg = <0x411000 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <0>;
>> + };
>> +
>> + nand: nand@412800 {
>> + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg-names = "nand";
>> + reg = <0x412800 0x400>;
>> + interrupt-parent = <&hif_l2_intc>;
>> + interrupts = <24>;
>> + status = "disabled";
>> + };
>
> This is a NAND v3.3 controller here not a v5.0 and it uses the EDU
> registers for DMA transfers which is not supported in the mainline
> driver, so with that dropped, the series looks fine. At any rate this
> would require additional brcmnand changes to be supported.
The same applies to the 7420 DTS, it's also a v3.3 NAND controller
--
Florian
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
2016-08-08 14:06 ` Jonas Gorski
(?)
@ 2016-08-09 1:44 ` Jaedon Shin
-1 siblings, 0 replies; 18+ messages in thread
From: Jaedon Shin @ 2016-08-09 1:44 UTC (permalink / raw)
To: Jonas Gorski
Cc: Florian Fainelli, Ralf Baechle, Kevin Cernekee, Rob Herring,
MIPS Mailing List, devicetree-u79uwXL29TY76Z2rM5mHXA
Hi Jonas,
On Aug 8, 2016, at 11:06 PM, Jonas Gorski <jonas.gorski-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>
> Hi,
>
> please always include devicetree for any dts(i) related changes.
>
> On 8 August 2016 at 04:17, Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>> Adds GPIO device nodes to BCM7xxx MIPS based SoCs.
>>
>> Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>> ---
>> arch/mips/boot/dts/brcm/bcm7125.dtsi | 12 ++++++++++
>> arch/mips/boot/dts/brcm/bcm7346.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7358.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7360.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7362.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7420.dtsi | 12 ++++++++++
>> arch/mips/boot/dts/brcm/bcm7425.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7435.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 4 ++++
>> arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97358svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97360svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97362svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97420c.dts | 4 ++++
>> arch/mips/boot/dts/brcm/bcm97425svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97435svmb.dts | 8 +++++++
>> 16 files changed, 302 insertions(+)
>>
>> diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> index 97191f6bca28..746ed06c85de 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> @@ -197,6 +197,18 @@
>> status = "disabled";
>> };
>>
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 18>;
>> + };
>> +
>> ehci0: usb@488300 {
>> compatible = "brcm,bcm7125-ehci", "generic-ehci";
>> reg = <0x488300 0x100>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
>> index eb7b19a32e3e..1ef7540238be 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
>> @@ -232,6 +232,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <52>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 16>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <27 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
>> index b2276b1e12d4..bb099ee046a1 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
>> @@ -216,6 +216,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408240 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408240 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <49>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406500 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406500 0xa0>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 29 4>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <21 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
>> index e414af1e14ff..0aeb3de7fbc2 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
>> @@ -208,6 +208,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <49>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406500 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406500 0xa0>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 29 4>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <21 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
>> index 3bd1c0111d43..9a1f6ffc343d 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
>> @@ -204,6 +204,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <49>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406500 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406500 0xa0>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 29 4>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <21 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
>> index 27c3d45556b9..0d391d77c780 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
>> @@ -213,6 +213,18 @@
>> status = "disabled";
>> };
>>
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 27>;
>> + };
>> +
>> enet0: ethernet@468000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
>> index 9ab65d64e948..04306a92b8eb 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
>> @@ -231,6 +231,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <48>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 21>;
>> + };
>> +
>> + upg_gio_aon: gpio@4094c0 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x4094c0 0x40>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <18 4>;
>> + };
>> +
>> enet0: ethernet@b80000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
>> index 7801169416e7..c4883643ab61 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
>> @@ -246,6 +246,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <53>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 21>;
>> + };
>> +
>> + upg_gio_aon: gpio@4094c0 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x4094c0 0x40>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <18 4>;
>> + };
>> +
>> enet0: ethernet@b80000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
>> index 5c24eacd72dd..91590ff55d52 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
>> @@ -49,6 +49,10 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>
> You don't set its status in the dtsi, it will be enabled by default,
> and you can drop this change.
>
>> /* FIXME: USB is wonky; disable it for now */
>> &ehci0 {
>> status = "disabled";
>> diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
>> index 2c55ab094a29..e91a21f75a13 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
>> @@ -57,6 +57,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
>> index 757fe9d5f4df..d475a152eb2a 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
>> @@ -53,6 +53,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
>> index 496e6ed9fae3..a445a45f51cb 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
>> @@ -49,6 +49,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
>> index b880c018f3d8..22b1b506594f 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
>> @@ -45,6 +45,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
>> index e66271af055e..428c36da91b6 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97420c.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
>> @@ -59,6 +59,10 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>
> You don't set its status in the dtsi, it will be enabled by default,
> and you can drop this change.
>
>> /* FIXME: MAC driver comes up but cannot attach to PHY */
>> &enet0 {
>> status = "disabled";
>> diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
>> index f091e91b11c5..6adfcd505a03 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
>> @@ -59,6 +59,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>> index 9db84f2a6664..dd8b8fb97053 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>> @@ -59,6 +59,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>
>
> Regards
> Jonas
The status="disabled" has been missing. It will be added in v2.
The interrupt-controller@ will also be changed.
Thanks,
Jaedon--
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
@ 2016-08-09 1:44 ` Jaedon Shin
0 siblings, 0 replies; 18+ messages in thread
From: Jaedon Shin @ 2016-08-09 1:44 UTC (permalink / raw)
To: Jonas Gorski
Cc: Florian Fainelli, Ralf Baechle, Kevin Cernekee, Rob Herring,
MIPS Mailing List, devicetree
Hi Jonas,
On Aug 8, 2016, at 11:06 PM, Jonas Gorski <jonas.gorski@gmail.com> wrote:
>
> Hi,
>
> please always include devicetree for any dts(i) related changes.
>
> On 8 August 2016 at 04:17, Jaedon Shin <jaedon.shin@gmail.com> wrote:
>> Adds GPIO device nodes to BCM7xxx MIPS based SoCs.
>>
>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>> ---
>> arch/mips/boot/dts/brcm/bcm7125.dtsi | 12 ++++++++++
>> arch/mips/boot/dts/brcm/bcm7346.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7358.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7360.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7362.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7420.dtsi | 12 ++++++++++
>> arch/mips/boot/dts/brcm/bcm7425.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7435.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 4 ++++
>> arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97358svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97360svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97362svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97420c.dts | 4 ++++
>> arch/mips/boot/dts/brcm/bcm97425svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97435svmb.dts | 8 +++++++
>> 16 files changed, 302 insertions(+)
>>
>> diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> index 97191f6bca28..746ed06c85de 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> @@ -197,6 +197,18 @@
>> status = "disabled";
>> };
>>
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 18>;
>> + };
>> +
>> ehci0: usb@488300 {
>> compatible = "brcm,bcm7125-ehci", "generic-ehci";
>> reg = <0x488300 0x100>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
>> index eb7b19a32e3e..1ef7540238be 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
>> @@ -232,6 +232,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <52>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 16>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <27 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
>> index b2276b1e12d4..bb099ee046a1 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
>> @@ -216,6 +216,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408240 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408240 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <49>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406500 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406500 0xa0>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 29 4>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <21 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
>> index e414af1e14ff..0aeb3de7fbc2 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
>> @@ -208,6 +208,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <49>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406500 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406500 0xa0>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 29 4>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <21 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
>> index 3bd1c0111d43..9a1f6ffc343d 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
>> @@ -204,6 +204,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <49>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406500 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406500 0xa0>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 29 4>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <21 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
>> index 27c3d45556b9..0d391d77c780 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
>> @@ -213,6 +213,18 @@
>> status = "disabled";
>> };
>>
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 27>;
>> + };
>> +
>> enet0: ethernet@468000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
>> index 9ab65d64e948..04306a92b8eb 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
>> @@ -231,6 +231,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <48>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 21>;
>> + };
>> +
>> + upg_gio_aon: gpio@4094c0 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x4094c0 0x40>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <18 4>;
>> + };
>> +
>> enet0: ethernet@b80000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
>> index 7801169416e7..c4883643ab61 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
>> @@ -246,6 +246,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <53>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 21>;
>> + };
>> +
>> + upg_gio_aon: gpio@4094c0 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x4094c0 0x40>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <18 4>;
>> + };
>> +
>> enet0: ethernet@b80000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
>> index 5c24eacd72dd..91590ff55d52 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
>> @@ -49,6 +49,10 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>
> You don't set its status in the dtsi, it will be enabled by default,
> and you can drop this change.
>
>> /* FIXME: USB is wonky; disable it for now */
>> &ehci0 {
>> status = "disabled";
>> diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
>> index 2c55ab094a29..e91a21f75a13 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
>> @@ -57,6 +57,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
>> index 757fe9d5f4df..d475a152eb2a 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
>> @@ -53,6 +53,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
>> index 496e6ed9fae3..a445a45f51cb 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
>> @@ -49,6 +49,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
>> index b880c018f3d8..22b1b506594f 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
>> @@ -45,6 +45,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
>> index e66271af055e..428c36da91b6 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97420c.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
>> @@ -59,6 +59,10 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>
> You don't set its status in the dtsi, it will be enabled by default,
> and you can drop this change.
>
>> /* FIXME: MAC driver comes up but cannot attach to PHY */
>> &enet0 {
>> status = "disabled";
>> diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
>> index f091e91b11c5..6adfcd505a03 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
>> @@ -59,6 +59,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>> index 9db84f2a6664..dd8b8fb97053 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>> @@ -59,6 +59,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>
>
> Regards
> Jonas
The status="disabled" has been missing. It will be added in v2.
The interrupt-controller@ will also be changed.
Thanks,
Jaedon
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Subject: Re: [PATCH 4/4] MIPS: BMIPS: Add support NAND device nodes
From: Jaedon Shin <jaedon.shin@gmail.com>
In-Reply-To: <b6df94ac-9e29-f52d-c44e-f096a8735901@gmail.com>
Date: Tue, 9 Aug 2016 10:52:30 +0900
Cc: Ralf Baechle <ralf@linux-mips.org>,
Kevin Cernekee <cernekee@gmail.com>,
Rob Herring <robh+dt@kernel.org>, linux-mips@linux-mips.org
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References: <20160808021719.4680-1-jaedon.shin@gmail.com> <20160808021719.4680-5-jaedon.shin@gmail.com> <bbc4731f-7d67-435b-0249-c823b8d158bb@gmail.com> <b6df94ac-9e29-f52d-c44e-f096a8735901@gmail.com>
To: Florian Fainelli <f.fainelli@gmail.com>
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Hi Florian,
On Aug 9, 2016, at 7:40 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>
> On 08/08/2016 03:35 PM, Florian Fainelli wrote:
>> On 08/07/2016 07:17 PM, Jaedon Shin wrote:
>>> Adds NAND device nodes to BCM7xxx MIPS based SoCs.
>>>
>>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>>> ---
>>> arch/mips/boot/dts/brcm/bcm7125.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7346.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7358.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7360.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7362.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7420.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7425.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7435.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi | 24 ++++++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97358svmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97360svmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97362svmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97420c.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97425svmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97435svmb.dts | 5 +++++
>>> 17 files changed, 224 insertions(+)
>>> create mode 100644 arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi
>>>
>>> diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>>> index 746ed06c85de..8642631a8451 100644
>>> --- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
>>> +++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>>> @@ -226,5 +226,25 @@
>>> interrupts = <61>;
>>> status = "disabled";
>>> };
>>> +
>>> + hif_l2_intc: hif_l2_intc@411000 {
>>> + compatible = "brcm,l2-intc";
>>> + reg = <0x411000 0x30>;
>>> + interrupt-controller;
>>> + #interrupt-cells = <1>;
>>> + interrupt-parent = <&periph_intc>;
>>> + interrupts = <0>;
>>> + };
>>> +
>>> + nand: nand@412800 {
>>> + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + reg-names = "nand";
>>> + reg = <0x412800 0x400>;
>>> + interrupt-parent = <&hif_l2_intc>;
>>> + interrupts = <24>;
>>> + status = "disabled";
>>> + };
>>
>> This is a NAND v3.3 controller here not a v5.0 and it uses the EDU
>> registers for DMA transfers which is not supported in the mainline
>> driver, so with that dropped, the series looks fine. At any rate this
>> would require additional brcmnand changes to be supported.
>
> The same applies to the 7420 DTS, it's also a v3.3 NAND controller
> --
> Florian
The NAND device nodes of v3.3 NAND controller will be removed in v2.
Thanks,
Jaedon
From keguang.zhang@gmail.com Tue Aug 9 10:22:50 2016
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From: Keguang Zhang <keguang.zhang@gmail.com>
To: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Cc: Ralf Baechle <ralf@linux-mips.org>,
Kelvin Cheung <keguang.zhang@gmail.com>
Subject: [PATCH V1] MIPS: Loongson1B: Provide DMA filter callbacks via platform data
Date: Tue, 9 Aug 2016 16:22:25 +0800
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From: Kelvin Cheung <keguang.zhang@gmail.com>
This patch provides DMA filter callbacks via platform data
to make NAND driver independent of single DMA engine driver.
Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
---
v1:
Fix the build error
---
arch/mips/include/asm/mach-loongson32/dma.h | 4 ++++
arch/mips/include/asm/mach-loongson32/nand.h | 3 +--
arch/mips/loongson32/ls1b/board.c | 3 +++
3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/mach-loongson32/dma.h b/arch/mips/include/asm/mach-loongson32/dma.h
index ad1dec7..d3ae391 100644
--- a/arch/mips/include/asm/mach-loongson32/dma.h
+++ b/arch/mips/include/asm/mach-loongson32/dma.h
@@ -12,6 +12,8 @@
#ifndef __ASM_MACH_LOONGSON32_DMA_H
#define __ASM_MACH_LOONGSON32_DMA_H
+#include <linux/dmaengine.h>
+
#define LS1X_DMA_CHANNEL0 0
#define LS1X_DMA_CHANNEL1 1
#define LS1X_DMA_CHANNEL2 2
@@ -22,4 +24,6 @@ struct plat_ls1x_dma {
extern struct plat_ls1x_dma ls1b_dma_pdata;
+bool ls1x_dma_filter(struct dma_chan *chan, void *param);
+
#endif /* __ASM_MACH_LOONGSON32_DMA_H */
diff --git a/arch/mips/include/asm/mach-loongson32/nand.h b/arch/mips/include/asm/mach-loongson32/nand.h
index e274912..a1f8704 100644
--- a/arch/mips/include/asm/mach-loongson32/nand.h
+++ b/arch/mips/include/asm/mach-loongson32/nand.h
@@ -21,10 +21,9 @@ struct plat_ls1x_nand {
int hold_cycle;
int wait_cycle;
+ bool (*dma_filter)(struct dma_chan *chan, void *param);
};
extern struct plat_ls1x_nand ls1b_nand_pdata;
-bool ls1x_dma_filter_fn(struct dma_chan *chan, void *param);
-
#endif /* __ASM_MACH_LOONGSON32_NAND_H */
diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
index 38a1d40..dac1cbb 100644
--- a/arch/mips/loongson32/ls1b/board.c
+++ b/arch/mips/loongson32/ls1b/board.c
@@ -38,6 +38,9 @@ struct plat_ls1x_nand ls1x_nand_pdata = {
.nr_parts = ARRAY_SIZE(ls1x_nand_parts),
.hold_cycle = 0x2,
.wait_cycle = 0xc,
+#ifdef CONFIG_LOONGSON1_DMA
+ .dma_filter = ls1x_dma_filter,
+#endif
};
static const struct gpio_led ls1x_gpio_leds[] __initconst = {
--
1.9.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
@ 2016-08-09 1:44 ` Jaedon Shin
0 siblings, 0 replies; 18+ messages in thread
From: Jaedon Shin @ 2016-08-09 1:44 UTC (permalink / raw)
To: Jonas Gorski
Cc: Florian Fainelli, Ralf Baechle, Kevin Cernekee, Rob Herring,
MIPS Mailing List, devicetree
Hi Jonas,
On Aug 8, 2016, at 11:06 PM, Jonas Gorski <jonas.gorski@gmail.com> wrote:
>
> Hi,
>
> please always include devicetree for any dts(i) related changes.
>
> On 8 August 2016 at 04:17, Jaedon Shin <jaedon.shin@gmail.com> wrote:
>> Adds GPIO device nodes to BCM7xxx MIPS based SoCs.
>>
>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>> ---
>> arch/mips/boot/dts/brcm/bcm7125.dtsi | 12 ++++++++++
>> arch/mips/boot/dts/brcm/bcm7346.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7358.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7360.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7362.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7420.dtsi | 12 ++++++++++
>> arch/mips/boot/dts/brcm/bcm7425.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm7435.dtsi | 37 +++++++++++++++++++++++++++++++
>> arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 4 ++++
>> arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97358svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97360svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97362svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97420c.dts | 4 ++++
>> arch/mips/boot/dts/brcm/bcm97425svmb.dts | 8 +++++++
>> arch/mips/boot/dts/brcm/bcm97435svmb.dts | 8 +++++++
>> 16 files changed, 302 insertions(+)
>>
>> diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> index 97191f6bca28..746ed06c85de 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>> @@ -197,6 +197,18 @@
>> status = "disabled";
>> };
>>
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 18>;
>> + };
>> +
>> ehci0: usb@488300 {
>> compatible = "brcm,bcm7125-ehci", "generic-ehci";
>> reg = <0x488300 0x100>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
>> index eb7b19a32e3e..1ef7540238be 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
>> @@ -232,6 +232,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <52>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 16>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <27 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
>> index b2276b1e12d4..bb099ee046a1 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
>> @@ -216,6 +216,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408240 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408240 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <49>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406500 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406500 0xa0>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 29 4>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <21 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
>> index e414af1e14ff..0aeb3de7fbc2 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
>> @@ -208,6 +208,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <49>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406500 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406500 0xa0>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 29 4>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <21 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
>> index 3bd1c0111d43..9a1f6ffc343d 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
>> @@ -204,6 +204,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <49>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406500 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406500 0xa0>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 29 4>;
>> + };
>> +
>> + upg_gio_aon: gpio@408c00 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x408c00 0x60>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <21 32 2>;
>> + };
>> +
>> enet0: ethernet@430000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
>> index 27c3d45556b9..0d391d77c780 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
>> @@ -213,6 +213,18 @@
>> status = "disabled";
>> };
>>
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 27>;
>> + };
>> +
>> enet0: ethernet@468000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
>> index 9ab65d64e948..04306a92b8eb 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
>> @@ -231,6 +231,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <48>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 21>;
>> + };
>> +
>> + upg_gio_aon: gpio@4094c0 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x4094c0 0x40>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <18 4>;
>> + };
>> +
>> enet0: ethernet@b80000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
>> index 7801169416e7..c4883643ab61 100644
>> --- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
>> +++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
>> @@ -246,6 +246,43 @@
>> status = "disabled";
>> };
>>
>> + aon_pm_l2_intc: aon_pm_l2_intc@408440 {
>
> interrupt-controller@
>
>> + compatible = "brcm,l2-intc";
>> + reg = <0x408440 0x30>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&periph_intc>;
>> + interrupts = <53>;
>> + brcm,irq-can-wake;
>> + };
>> +
>> + upg_gio: gpio@406700 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x406700 0x80>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_irq0_intc>;
>> + interrupts = <6>;
>> + brcm,gpio-bank-widths = <32 32 32 21>;
>> + };
>> +
>> + upg_gio_aon: gpio@4094c0 {
>> + compatible = "brcm,brcmstb-gpio";
>> + reg = <0x4094c0 0x40>;
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + interrupt-parent = <&upg_aon_irq0_intc>;
>> + interrupts = <6>;
>> + interrupts-extended = <&upg_aon_irq0_intc 6>,
>> + <&aon_pm_l2_intc 5>;
>> + wakeup-source;
>> + brcm,gpio-bank-widths = <18 4>;
>> + };
>> +
>> enet0: ethernet@b80000 {
>> phy-mode = "internal";
>> phy-handle = <&phy1>;
>> diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
>> index 5c24eacd72dd..91590ff55d52 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
>> @@ -49,6 +49,10 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>
> You don't set its status in the dtsi, it will be enabled by default,
> and you can drop this change.
>
>> /* FIXME: USB is wonky; disable it for now */
>> &ehci0 {
>> status = "disabled";
>> diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
>> index 2c55ab094a29..e91a21f75a13 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
>> @@ -57,6 +57,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
>> index 757fe9d5f4df..d475a152eb2a 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
>> @@ -53,6 +53,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
>> index 496e6ed9fae3..a445a45f51cb 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
>> @@ -49,6 +49,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
>> index b880c018f3d8..22b1b506594f 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
>> @@ -45,6 +45,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
>> index e66271af055e..428c36da91b6 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97420c.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
>> @@ -59,6 +59,10 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>
> You don't set its status in the dtsi, it will be enabled by default,
> and you can drop this change.
>
>> /* FIXME: MAC driver comes up but cannot attach to PHY */
>> &enet0 {
>> status = "disabled";
>> diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
>> index f091e91b11c5..6adfcd505a03 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
>> @@ -59,6 +59,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>> index 9db84f2a6664..dd8b8fb97053 100644
>> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>> @@ -59,6 +59,14 @@
>> status = "okay";
>> };
>>
>> +&upg_gio {
>> + status = "okay";
>> +};
>> +
>> +&upg_gio_aon {
>> + status = "okay";
>> +};
>> +
>
> You don't set their status in the dtsi, they will be enabled by
> default, and you can drop this change.
>
>> &enet0 {
>> status = "okay";
>> };
>
>
> Regards
> Jonas
The status="disabled" has been missing. It will be added in v2.
The interrupt-controller@ will also be changed.
Thanks,
Jaedon
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/4] MIPS: BMIPS: Add support NAND device nodes
2016-08-08 22:40 ` Florian Fainelli
@ 2016-08-09 1:52 ` Jaedon Shin
0 siblings, 0 replies; 18+ messages in thread
From: Jaedon Shin @ 2016-08-09 1:52 UTC (permalink / raw)
To: Florian Fainelli; +Cc: Ralf Baechle, Kevin Cernekee, Rob Herring, linux-mips
Hi Florian,
On Aug 9, 2016, at 7:40 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>
> On 08/08/2016 03:35 PM, Florian Fainelli wrote:
>> On 08/07/2016 07:17 PM, Jaedon Shin wrote:
>>> Adds NAND device nodes to BCM7xxx MIPS based SoCs.
>>>
>>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>>> ---
>>> arch/mips/boot/dts/brcm/bcm7125.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7346.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7358.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7360.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7362.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7420.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7425.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7435.dtsi | 20 ++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi | 24 ++++++++++++++++++++++
>>> arch/mips/boot/dts/brcm/bcm97125cbmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97358svmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97360svmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97362svmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97420c.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97425svmb.dts | 5 +++++
>>> arch/mips/boot/dts/brcm/bcm97435svmb.dts | 5 +++++
>>> 17 files changed, 224 insertions(+)
>>> create mode 100644 arch/mips/boot/dts/brcm/bcm7xxx-nand-cs1-bch8.dtsi
>>>
>>> diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>>> index 746ed06c85de..8642631a8451 100644
>>> --- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
>>> +++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
>>> @@ -226,5 +226,25 @@
>>> interrupts = <61>;
>>> status = "disabled";
>>> };
>>> +
>>> + hif_l2_intc: hif_l2_intc@411000 {
>>> + compatible = "brcm,l2-intc";
>>> + reg = <0x411000 0x30>;
>>> + interrupt-controller;
>>> + #interrupt-cells = <1>;
>>> + interrupt-parent = <&periph_intc>;
>>> + interrupts = <0>;
>>> + };
>>> +
>>> + nand: nand@412800 {
>>> + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + reg-names = "nand";
>>> + reg = <0x412800 0x400>;
>>> + interrupt-parent = <&hif_l2_intc>;
>>> + interrupts = <24>;
>>> + status = "disabled";
>>> + };
>>
>> This is a NAND v3.3 controller here not a v5.0 and it uses the EDU
>> registers for DMA transfers which is not supported in the mainline
>> driver, so with that dropped, the series looks fine. At any rate this
>> would require additional brcmnand changes to be supported.
>
> The same applies to the 7420 DTS, it's also a v3.3 NAND controller
> --
> Florian
The NAND device nodes of v3.3 NAND controller will be removed in v2.
Thanks,
Jaedon
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
2016-08-09 1:44 ` Jaedon Shin
@ 2016-08-09 14:14 ` Jonas Gorski
-1 siblings, 0 replies; 18+ messages in thread
From: Jonas Gorski @ 2016-08-09 14:14 UTC (permalink / raw)
To: Jaedon Shin
Cc: Florian Fainelli, Ralf Baechle, Kevin Cernekee, Rob Herring,
MIPS Mailing List, devicetree-u79uwXL29TY76Z2rM5mHXA
Hi,
On 9 August 2016 at 03:44, Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> Hi Jonas,
>
> On Aug 8, 2016, at 11:06 PM, Jonas Gorski <jonas.gorski-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>
>> Hi,
>>
>> please always include devicetree for any dts(i) related changes.
>>
>> On 8 August 2016 at 04:17, Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>> (snip)
>>> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>> index 9db84f2a6664..dd8b8fb97053 100644
>>> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>> @@ -59,6 +59,14 @@
>>> status = "okay";
>>> };
>>>
>>> +&upg_gio {
>>> + status = "okay";
>>> +};
>>> +
>>> +&upg_gio_aon {
>>> + status = "okay";
>>> +};
>>> +
>>
>> You don't set their status in the dtsi, they will be enabled by
>> default, and you can drop this change.
>>
>>> &enet0 {
>>> status = "okay";
>>> };
>>
>>
>> Regards
>> Jonas
>
> The status="disabled" has been missing. It will be added in v2.
> The interrupt-controller@ will also be changed.
I thought that was indented, since GPIO controllers usually are always
present (you don't disable the irq controllers by default either).
Not that I want to tell you how you do your dts(i) files, but I would
expect things that you usually always need (irq, clocks, gpios) are
present by default.
Regards
Jonas
--
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
@ 2016-08-09 14:14 ` Jonas Gorski
0 siblings, 0 replies; 18+ messages in thread
From: Jonas Gorski @ 2016-08-09 14:14 UTC (permalink / raw)
To: Jaedon Shin
Cc: Florian Fainelli, Ralf Baechle, Kevin Cernekee, Rob Herring,
MIPS Mailing List, devicetree
Hi,
On 9 August 2016 at 03:44, Jaedon Shin <jaedon.shin@gmail.com> wrote:
> Hi Jonas,
>
> On Aug 8, 2016, at 11:06 PM, Jonas Gorski <jonas.gorski@gmail.com> wrote:
>>
>> Hi,
>>
>> please always include devicetree for any dts(i) related changes.
>>
>> On 8 August 2016 at 04:17, Jaedon Shin <jaedon.shin@gmail.com> wrote:
>>> (snip)
>>> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>> index 9db84f2a6664..dd8b8fb97053 100644
>>> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>> @@ -59,6 +59,14 @@
>>> status = "okay";
>>> };
>>>
>>> +&upg_gio {
>>> + status = "okay";
>>> +};
>>> +
>>> +&upg_gio_aon {
>>> + status = "okay";
>>> +};
>>> +
>>
>> You don't set their status in the dtsi, they will be enabled by
>> default, and you can drop this change.
>>
>>> &enet0 {
>>> status = "okay";
>>> };
>>
>>
>> Regards
>> Jonas
>
> The status="disabled" has been missing. It will be added in v2.
> The interrupt-controller@ will also be changed.
I thought that was indented, since GPIO controllers usually are always
present (you don't disable the irq controllers by default either).
Not that I want to tell you how you do your dts(i) files, but I would
expect things that you usually always need (irq, clocks, gpios) are
present by default.
Regards
Jonas
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
2016-08-09 14:14 ` Jonas Gorski
(?)
@ 2016-08-11 2:00 ` Jaedon Shin
-1 siblings, 0 replies; 18+ messages in thread
From: Jaedon Shin @ 2016-08-11 2:00 UTC (permalink / raw)
To: Jonas Gorski
Cc: Florian Fainelli, Ralf Baechle, Kevin Cernekee, Rob Herring,
MIPS Mailing List, devicetree-u79uwXL29TY76Z2rM5mHXA
Hi Jonas,
On Aug 9, 2016, at 11:14 PM, Jonas Gorski <jonas.gorski-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>
> Hi,
>
> On 9 August 2016 at 03:44, Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>> Hi Jonas,
>>
>> On Aug 8, 2016, at 11:06 PM, Jonas Gorski <jonas.gorski-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>>
>>> Hi,
>>>
>>> please always include devicetree for any dts(i) related changes.
>>>
>>> On 8 August 2016 at 04:17, Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>>> (snip)
>>>> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>>> index 9db84f2a6664..dd8b8fb97053 100644
>>>> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>>> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>>> @@ -59,6 +59,14 @@
>>>> status = "okay";
>>>> };
>>>>
>>>> +&upg_gio {
>>>> + status = "okay";
>>>> +};
>>>> +
>>>> +&upg_gio_aon {
>>>> + status = "okay";
>>>> +};
>>>> +
>>>
>>> You don't set their status in the dtsi, they will be enabled by
>>> default, and you can drop this change.
>>>
>>>> &enet0 {
>>>> status = "okay";
>>>> };
>>>
>>>
>>> Regards
>>> Jonas
>>
>> The status="disabled" has been missing. It will be added in v2.
>> The interrupt-controller@ will also be changed.
>
> I thought that was indented, since GPIO controllers usually are always
> present (you don't disable the irq controllers by default either).
>
> Not that I want to tell you how you do your dts(i) files, but I would
> expect things that you usually always need (irq, clocks, gpios) are
> present by default.
>
>
> Regards
> Jonas
I checked the BCM7445 ARM based SoC device tree and other BRCM boards, and
I agree with your point. The status="okay" nodes will be removed in v2.
Thanks,
Jaedon--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
@ 2016-08-11 2:00 ` Jaedon Shin
0 siblings, 0 replies; 18+ messages in thread
From: Jaedon Shin @ 2016-08-11 2:00 UTC (permalink / raw)
To: Jonas Gorski
Cc: Florian Fainelli, Ralf Baechle, Kevin Cernekee, Rob Herring,
MIPS Mailing List, devicetree
Hi Jonas,
On Aug 9, 2016, at 11:14 PM, Jonas Gorski <jonas.gorski@gmail.com> wrote:
>
> Hi,
>
> On 9 August 2016 at 03:44, Jaedon Shin <jaedon.shin@gmail.com> wrote:
>> Hi Jonas,
>>
>> On Aug 8, 2016, at 11:06 PM, Jonas Gorski <jonas.gorski@gmail.com> wrote:
>>>
>>> Hi,
>>>
>>> please always include devicetree for any dts(i) related changes.
>>>
>>> On 8 August 2016 at 04:17, Jaedon Shin <jaedon.shin@gmail.com> wrote:
>>>> (snip)
>>>> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>>> index 9db84f2a6664..dd8b8fb97053 100644
>>>> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>>> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>>> @@ -59,6 +59,14 @@
>>>> status = "okay";
>>>> };
>>>>
>>>> +&upg_gio {
>>>> + status = "okay";
>>>> +};
>>>> +
>>>> +&upg_gio_aon {
>>>> + status = "okay";
>>>> +};
>>>> +
>>>
>>> You don't set their status in the dtsi, they will be enabled by
>>> default, and you can drop this change.
>>>
>>>> &enet0 {
>>>> status = "okay";
>>>> };
>>>
>>>
>>> Regards
>>> Jonas
>>
>> The status="disabled" has been missing. It will be added in v2.
>> The interrupt-controller@ will also be changed.
>
> I thought that was indented, since GPIO controllers usually are always
> present (you don't disable the irq controllers by default either).
>
> Not that I want to tell you how you do your dts(i) files, but I would
> expect things that you usually always need (irq, clocks, gpios) are
> present by default.
>
>
> Regards
> Jonas
I checked the BCM7445 ARM based SoC device tree and other BRCM boards, and
I agree with your point. The status="okay" nodes will be removed in v2.
Thanks,
Jaedon
From Marcin.Nowakowski@imgtec.com Thu Aug 11 09:02:49 2016
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From: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
To: <ralf@linux-mips.org>
CC: <linux-mips@linux-mips.org>
Subject: [PATCH] MIPS: uprobes: fix incorrect uprobe brk handling
Date: Thu, 11 Aug 2016 09:02:30 +0200
Message-ID: <1470898950-26077-1-git-send-email-marcin.nowakowski@imgtec.com>
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When a uprobe-replacement breakpoint instruction is handled, a notifier
is called with DIE_UPROBE argument, but a corresponding exception notify
handler for MIPS attempts to handle DIE_BREAK instead. As a result
the breakpoint instruction isn't handled by the uprobe code and the probed
application terminates with SIGTRAP.
Fix this by changing arch_uprobe_exception_notify code to handle
DIE_UPROBE as a pre-singlestep condition instead of DIE_BREAK.
Signed-off-by: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
---
arch/mips/kernel/uprobes.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/kernel/uprobes.c b/arch/mips/kernel/uprobes.c
index 8452d93..1149b30 100644
--- a/arch/mips/kernel/uprobes.c
+++ b/arch/mips/kernel/uprobes.c
@@ -222,7 +222,7 @@ int arch_uprobe_exception_notify(struct notifier_block *self,
return NOTIFY_DONE;
switch (val) {
- case DIE_BREAK:
+ case DIE_UPROBE:
if (uprobe_pre_sstep_notifier(regs))
return NOTIFY_STOP;
break;
--
2.7.4
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 2/4] MIPS: BMIPS: Add support GPIO device nodes
@ 2016-08-11 2:00 ` Jaedon Shin
0 siblings, 0 replies; 18+ messages in thread
From: Jaedon Shin @ 2016-08-11 2:00 UTC (permalink / raw)
To: Jonas Gorski
Cc: Florian Fainelli, Ralf Baechle, Kevin Cernekee, Rob Herring,
MIPS Mailing List, devicetree
Hi Jonas,
On Aug 9, 2016, at 11:14 PM, Jonas Gorski <jonas.gorski@gmail.com> wrote:
>
> Hi,
>
> On 9 August 2016 at 03:44, Jaedon Shin <jaedon.shin@gmail.com> wrote:
>> Hi Jonas,
>>
>> On Aug 8, 2016, at 11:06 PM, Jonas Gorski <jonas.gorski@gmail.com> wrote:
>>>
>>> Hi,
>>>
>>> please always include devicetree for any dts(i) related changes.
>>>
>>> On 8 August 2016 at 04:17, Jaedon Shin <jaedon.shin@gmail.com> wrote:
>>>> (snip)
>>>> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>>> index 9db84f2a6664..dd8b8fb97053 100644
>>>> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>>> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
>>>> @@ -59,6 +59,14 @@
>>>> status = "okay";
>>>> };
>>>>
>>>> +&upg_gio {
>>>> + status = "okay";
>>>> +};
>>>> +
>>>> +&upg_gio_aon {
>>>> + status = "okay";
>>>> +};
>>>> +
>>>
>>> You don't set their status in the dtsi, they will be enabled by
>>> default, and you can drop this change.
>>>
>>>> &enet0 {
>>>> status = "okay";
>>>> };
>>>
>>>
>>> Regards
>>> Jonas
>>
>> The status="disabled" has been missing. It will be added in v2.
>> The interrupt-controller@ will also be changed.
>
> I thought that was indented, since GPIO controllers usually are always
> present (you don't disable the irq controllers by default either).
>
> Not that I want to tell you how you do your dts(i) files, but I would
> expect things that you usually always need (irq, clocks, gpios) are
> present by default.
>
>
> Regards
> Jonas
I checked the BCM7445 ARM based SoC device tree and other BRCM boards, and
I agree with your point. The status="okay" nodes will be removed in v2.
Thanks,
Jaedon
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2016-08-11 2:00 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-08-08 2:17 [PATCH 0/4] Add device nodes for BCM7xxx SoCs Jaedon Shin
2016-08-08 2:17 ` [PATCH 1/4] MIPS: BMIPS: Add support PWM device nodes Jaedon Shin
2016-08-08 2:17 ` [PATCH 2/4] MIPS: BMIPS: Add support GPIO " Jaedon Shin
[not found] ` <20160808021719.4680-3-jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-08-08 14:06 ` Jonas Gorski
2016-08-08 14:06 ` Jonas Gorski
[not found] ` <CAOiHx=kxjXiYm_4S3rLOjB0wM-UpQsqfXn+EVq6+FGOH4whuuQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-08-09 1:44 ` Jaedon Shin
2016-08-09 1:44 ` Jaedon Shin
2016-08-09 1:44 ` Jaedon Shin
[not found] ` <D5F26D94-8312-4CAC-8577-205A1AAFB0E5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-08-09 14:14 ` Jonas Gorski
2016-08-09 14:14 ` Jonas Gorski
[not found] ` <CAOiHx=n19Sb3B1_FGkdzqxWqi5Vpy5PQbYWdaVvNaUTW+Njcog-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-08-11 2:00 ` Jaedon Shin
2016-08-11 2:00 ` Jaedon Shin
2016-08-11 2:00 ` Jaedon Shin
2016-08-08 2:17 ` [PATCH 3/4] MIPS: BMIPS: Add support SDHCI " Jaedon Shin
2016-08-08 2:17 ` [PATCH 4/4] MIPS: BMIPS: Add support NAND " Jaedon Shin
2016-08-08 22:35 ` Florian Fainelli
2016-08-08 22:40 ` Florian Fainelli
2016-08-09 1:52 ` Jaedon Shin
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