All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Mirza Krak <mirza.krak-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
	Thierry Reding
	<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Alexandre Courbot
	<gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org,
	pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	Prashant Gaikwad
	<pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Michael Turquette
	<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v2 3/6] dt/bindings: Add bindings for Tegra GMI controller
Date: Tue, 30 Aug 2016 12:06:36 -0500	[thread overview]
Message-ID: <20160830170636.GA8741@rob-hp-laptop> (raw)
In-Reply-To: <CALw8SCVcPymDZ8NyUbeanRF0TCT1TZzL6iRDticYA42FWrEWqw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On Wed, Aug 24, 2016 at 09:54:47PM +0200, Mirza Krak wrote:
> 2016-08-24 17:56 GMT+02:00 Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>:
> +
> >> +Example with two SJA1000 CAN controllers connected to the GMI bus. We wrap the
> >> +controllers with a simple-bus node since they are all connected to the same
> >> +chip-select (CS4), in this example external address decoding is provided:
> >> +
> >> +gmi@70090000 {
> >> +     compatible = "nvidia,tegra20-gmi";
> >> +     reg = <0x70009000 0x1000>;
> >> +     #address-cells = <1>;
> >> +     #size-cells = <1>;
> >> +     clocks = <&tegra_car TEGRA20_CLK_NOR>;
> >> +     clock-names = "gmi";
> >> +     resets = <&tegra_car 42>;
> >> +     reset-names = "gmi";
> >> +     ranges = <4 0x48000000 0x7ffffff>;
> >> +
> >> +     status = "disabled";
> >> +
> >> +     bus@4 {
> >> +             compatible = "simple-bus";
> >> +             reg = <4>;
> >> +             #address-cells = <1>;
> >> +             #size-cells = <1>;
> >> +             ranges = <0 4 0x40100>;
> >
> > Does this work? I tried to add an example like this and I got ...
> >
> > Warning (reg_format): "reg" property in /gmi@70009000/bus@4 has invalid
> > length (4 bytes) (#address-cells == 1, #size-cells == 1)
> 
> Shoot, to get rid of the warning it should be
> 
> reg = <4 0 >;
> 
> But it works either way.

The CS node should have #address-cells=2 with the first being CS# and 
the second being the offset (often 0).

> 
> >
> > I am wondering if we should just following the arm,pl172 example and
> > have ...
> >
> >         cs4 {
> >                 compatible = "simple-bus";
> >                 #address-cells = <1>;
> >                 #size-cells = <1>;
> >                 ranges;

Empty ranges is typically wrong and due to laziness...

This should have the CS# in it.

> >
> >                 nvidia,snor-cs = <4>;
> >                 nvidia,snor-mux-mode;
> >                 nvidia,snor-adv-inv;
> >
> >                 can@0 {
> >                         reg = <0 0x100>;

This can be 1 cell with just the offset.

> >                         ...
> >                 };
> >
> >                 ...
> >         };
> >
> 
> That means to go back to V1 really (almost :)). Which I do not mind.
> Will give it a test run.
> 
> But I am a little hesitant if will be any better/cleaner. In your example above:
> 
> can@0 {
>          reg = <0 0x100>;
>          ...
> };
> 
> Would this really translate correctly? In the pl172 example they have
> multiple ranges and address with "flash@0,0" which a range defined in
> parent node. "can@0" does not have valid match in parent node in our
> example. So I probably need add some more logic for it to properly
> translate.

pl172 has several things I don't like, so don't follow it. Mainly those 
are custom CS property and 3 levels of nodes. I'm fine with 3 levels if 
there is more than one device, but otherwise 2 levels with timing 
properties in the child device node.


> 
> I have an idea which is following:
> 
> gmi@70090000 {
>          status = "okay";
>          #address-cells = <2>;
>          #size-cells = <1>;
>          ranges = <4 0 0x48000000 0x00040000>;
> 
>          cs4 {

cs@4,0

>                  compatible = "simple-bus";
>                  #address-cells = <2>;

1 cell here.

>                  #size-cells = <1>;
>                  ranges;

Fill this in to drop the 2nd cell on child addresses and just have the 
offset.

> 
>                  nvidia,snor-cs = <4>;

NAK, no custom CS properties.

>                  nvidia,snor-mux-mode;
>                  nvidia,snor-adv-inv;
> 
>                  can@0 {
>                          compatible = "nxp,sja1000";
>                          reg = <4 0 0x100>;
>                          ...
>                  };
> 
> 
>                  can@40000 {
>                          compatible = "nxp,sja1000";
>                          reg = <4 0x40000 0x100>;
>                          ...
>                  };
>          };
> };
> 
> Do not know if above will work at all (not able to test at current
> location), anyway I will play around with it some more and get back to
> you.
> 
> Best Regards
> Mirza
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Mirza Krak <mirza.krak@gmail.com>
Cc: Jon Hunter <jonathanh@nvidia.com>,
	Stephen Warren <swarren@wwwdotorg.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Alexandre Courbot <gnurou@gmail.com>,
	linux@armlinux.org.uk, pdeschrijver@nvidia.com,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	Michael Turquette <mturquette@baylibre.com>,
	sboyd@codeaurora.org, mark.rutland@arm.com,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 3/6] dt/bindings: Add bindings for Tegra GMI controller
Date: Tue, 30 Aug 2016 12:06:36 -0500	[thread overview]
Message-ID: <20160830170636.GA8741@rob-hp-laptop> (raw)
In-Reply-To: <CALw8SCVcPymDZ8NyUbeanRF0TCT1TZzL6iRDticYA42FWrEWqw@mail.gmail.com>

On Wed, Aug 24, 2016 at 09:54:47PM +0200, Mirza Krak wrote:
> 2016-08-24 17:56 GMT+02:00 Jon Hunter <jonathanh@nvidia.com>:
> +
> >> +Example with two SJA1000 CAN controllers connected to the GMI bus. We wrap the
> >> +controllers with a simple-bus node since they are all connected to the same
> >> +chip-select (CS4), in this example external address decoding is provided:
> >> +
> >> +gmi@70090000 {
> >> +     compatible = "nvidia,tegra20-gmi";
> >> +     reg = <0x70009000 0x1000>;
> >> +     #address-cells = <1>;
> >> +     #size-cells = <1>;
> >> +     clocks = <&tegra_car TEGRA20_CLK_NOR>;
> >> +     clock-names = "gmi";
> >> +     resets = <&tegra_car 42>;
> >> +     reset-names = "gmi";
> >> +     ranges = <4 0x48000000 0x7ffffff>;
> >> +
> >> +     status = "disabled";
> >> +
> >> +     bus@4 {
> >> +             compatible = "simple-bus";
> >> +             reg = <4>;
> >> +             #address-cells = <1>;
> >> +             #size-cells = <1>;
> >> +             ranges = <0 4 0x40100>;
> >
> > Does this work? I tried to add an example like this and I got ...
> >
> > Warning (reg_format): "reg" property in /gmi@70009000/bus@4 has invalid
> > length (4 bytes) (#address-cells == 1, #size-cells == 1)
> 
> Shoot, to get rid of the warning it should be
> 
> reg = <4 0 >;
> 
> But it works either way.

The CS node should have #address-cells=2 with the first being CS# and 
the second being the offset (often 0).

> 
> >
> > I am wondering if we should just following the arm,pl172 example and
> > have ...
> >
> >         cs4 {
> >                 compatible = "simple-bus";
> >                 #address-cells = <1>;
> >                 #size-cells = <1>;
> >                 ranges;

Empty ranges is typically wrong and due to laziness...

This should have the CS# in it.

> >
> >                 nvidia,snor-cs = <4>;
> >                 nvidia,snor-mux-mode;
> >                 nvidia,snor-adv-inv;
> >
> >                 can@0 {
> >                         reg = <0 0x100>;

This can be 1 cell with just the offset.

> >                         ...
> >                 };
> >
> >                 ...
> >         };
> >
> 
> That means to go back to V1 really (almost :)). Which I do not mind.
> Will give it a test run.
> 
> But I am a little hesitant if will be any better/cleaner. In your example above:
> 
> can@0 {
>          reg = <0 0x100>;
>          ...
> };
> 
> Would this really translate correctly? In the pl172 example they have
> multiple ranges and address with "flash@0,0" which a range defined in
> parent node. "can@0" does not have valid match in parent node in our
> example. So I probably need add some more logic for it to properly
> translate.

pl172 has several things I don't like, so don't follow it. Mainly those 
are custom CS property and 3 levels of nodes. I'm fine with 3 levels if 
there is more than one device, but otherwise 2 levels with timing 
properties in the child device node.


> 
> I have an idea which is following:
> 
> gmi@70090000 {
>          status = "okay";
>          #address-cells = <2>;
>          #size-cells = <1>;
>          ranges = <4 0 0x48000000 0x00040000>;
> 
>          cs4 {

cs@4,0

>                  compatible = "simple-bus";
>                  #address-cells = <2>;

1 cell here.

>                  #size-cells = <1>;
>                  ranges;

Fill this in to drop the 2nd cell on child addresses and just have the 
offset.

> 
>                  nvidia,snor-cs = <4>;

NAK, no custom CS properties.

>                  nvidia,snor-mux-mode;
>                  nvidia,snor-adv-inv;
> 
>                  can@0 {
>                          compatible = "nxp,sja1000";
>                          reg = <4 0 0x100>;
>                          ...
>                  };
> 
> 
>                  can@40000 {
>                          compatible = "nxp,sja1000";
>                          reg = <4 0x40000 0x100>;
>                          ...
>                  };
>          };
> };
> 
> Do not know if above will work at all (not able to test at current
> location), anyway I will play around with it some more and get back to
> you.
> 
> Best Regards
> Mirza

WARNING: multiple messages have this Message-ID (diff)
From: robh@kernel.org (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/6] dt/bindings: Add bindings for Tegra GMI controller
Date: Tue, 30 Aug 2016 12:06:36 -0500	[thread overview]
Message-ID: <20160830170636.GA8741@rob-hp-laptop> (raw)
In-Reply-To: <CALw8SCVcPymDZ8NyUbeanRF0TCT1TZzL6iRDticYA42FWrEWqw@mail.gmail.com>

On Wed, Aug 24, 2016 at 09:54:47PM +0200, Mirza Krak wrote:
> 2016-08-24 17:56 GMT+02:00 Jon Hunter <jonathanh@nvidia.com>:
> +
> >> +Example with two SJA1000 CAN controllers connected to the GMI bus. We wrap the
> >> +controllers with a simple-bus node since they are all connected to the same
> >> +chip-select (CS4), in this example external address decoding is provided:
> >> +
> >> +gmi at 70090000 {
> >> +     compatible = "nvidia,tegra20-gmi";
> >> +     reg = <0x70009000 0x1000>;
> >> +     #address-cells = <1>;
> >> +     #size-cells = <1>;
> >> +     clocks = <&tegra_car TEGRA20_CLK_NOR>;
> >> +     clock-names = "gmi";
> >> +     resets = <&tegra_car 42>;
> >> +     reset-names = "gmi";
> >> +     ranges = <4 0x48000000 0x7ffffff>;
> >> +
> >> +     status = "disabled";
> >> +
> >> +     bus at 4 {
> >> +             compatible = "simple-bus";
> >> +             reg = <4>;
> >> +             #address-cells = <1>;
> >> +             #size-cells = <1>;
> >> +             ranges = <0 4 0x40100>;
> >
> > Does this work? I tried to add an example like this and I got ...
> >
> > Warning (reg_format): "reg" property in /gmi at 70009000/bus at 4 has invalid
> > length (4 bytes) (#address-cells == 1, #size-cells == 1)
> 
> Shoot, to get rid of the warning it should be
> 
> reg = <4 0 >;
> 
> But it works either way.

The CS node should have #address-cells=2 with the first being CS# and 
the second being the offset (often 0).

> 
> >
> > I am wondering if we should just following the arm,pl172 example and
> > have ...
> >
> >         cs4 {
> >                 compatible = "simple-bus";
> >                 #address-cells = <1>;
> >                 #size-cells = <1>;
> >                 ranges;

Empty ranges is typically wrong and due to laziness...

This should have the CS# in it.

> >
> >                 nvidia,snor-cs = <4>;
> >                 nvidia,snor-mux-mode;
> >                 nvidia,snor-adv-inv;
> >
> >                 can at 0 {
> >                         reg = <0 0x100>;

This can be 1 cell with just the offset.

> >                         ...
> >                 };
> >
> >                 ...
> >         };
> >
> 
> That means to go back to V1 really (almost :)). Which I do not mind.
> Will give it a test run.
> 
> But I am a little hesitant if will be any better/cleaner. In your example above:
> 
> can at 0 {
>          reg = <0 0x100>;
>          ...
> };
> 
> Would this really translate correctly? In the pl172 example they have
> multiple ranges and address with "flash at 0,0" which a range defined in
> parent node. "can at 0" does not have valid match in parent node in our
> example. So I probably need add some more logic for it to properly
> translate.

pl172 has several things I don't like, so don't follow it. Mainly those 
are custom CS property and 3 levels of nodes. I'm fine with 3 levels if 
there is more than one device, but otherwise 2 levels with timing 
properties in the child device node.


> 
> I have an idea which is following:
> 
> gmi at 70090000 {
>          status = "okay";
>          #address-cells = <2>;
>          #size-cells = <1>;
>          ranges = <4 0 0x48000000 0x00040000>;
> 
>          cs4 {

cs at 4,0

>                  compatible = "simple-bus";
>                  #address-cells = <2>;

1 cell here.

>                  #size-cells = <1>;
>                  ranges;

Fill this in to drop the 2nd cell on child addresses and just have the 
offset.

> 
>                  nvidia,snor-cs = <4>;

NAK, no custom CS properties.

>                  nvidia,snor-mux-mode;
>                  nvidia,snor-adv-inv;
> 
>                  can at 0 {
>                          compatible = "nxp,sja1000";
>                          reg = <4 0 0x100>;
>                          ...
>                  };
> 
> 
>                  can at 40000 {
>                          compatible = "nxp,sja1000";
>                          reg = <4 0x40000 0x100>;
>                          ...
>                  };
>          };
> };
> 
> Do not know if above will work at all (not able to test at current
> location), anyway I will play around with it some more and get back to
> you.
> 
> Best Regards
> Mirza

  parent reply	other threads:[~2016-08-30 17:06 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-24 13:37 [PATCH v2 0/6] Add support for Tegra GMI bus controller Mirza Krak
2016-08-24 13:37 ` Mirza Krak
2016-08-24 13:37 ` [PATCH v2 3/6] dt/bindings: Add bindings for Tegra GMI controller Mirza Krak
2016-08-24 13:37   ` Mirza Krak
2016-08-24 15:56   ` Jon Hunter
2016-08-24 15:56     ` Jon Hunter
2016-08-24 15:56     ` Jon Hunter
2016-08-24 19:54     ` Mirza Krak
2016-08-24 19:54       ` Mirza Krak
2016-08-24 19:54       ` Mirza Krak
     [not found]       ` <CALw8SCVcPymDZ8NyUbeanRF0TCT1TZzL6iRDticYA42FWrEWqw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-08-26  4:53         ` Mirza Krak
2016-08-26  4:53           ` Mirza Krak
2016-08-26  4:53           ` Mirza Krak
     [not found]           ` <CALw8SCWtTvWGmKru2MX7T7sFpoUpD-V400+w2nPkxaFB5WUKSA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-08-26  7:25             ` Jon Hunter
2016-08-26  7:25               ` Jon Hunter
2016-08-26  7:25               ` Jon Hunter
2016-08-29  7:38               ` Mirza Krak
2016-08-29  7:38                 ` Mirza Krak
2016-08-30 17:06         ` Rob Herring [this message]
2016-08-30 17:06           ` Rob Herring
2016-08-30 17:06           ` Rob Herring
2016-08-31 11:22           ` Mirza Krak
2016-08-31 11:22             ` Mirza Krak
2016-08-31 11:22             ` Mirza Krak
     [not found]             ` <CALw8SCUYQGWXn7=Jpn=uvFvvPRVFQGrtSNot+-tVgP73yAEEOQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-09-06 10:32               ` Jon Hunter
2016-09-06 10:32                 ` Jon Hunter
2016-09-06 10:32                 ` Jon Hunter
     [not found]                 ` <a3a2371b-5d98-db2d-b7e4-be6d08cb7271-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-09-19  7:21                   ` Mirza Krak
2016-09-19  7:21                     ` Mirza Krak
2016-09-19  7:21                     ` Mirza Krak
2016-09-30  8:02                     ` Jon Hunter
2016-09-30  8:02                       ` Jon Hunter
2016-09-30  8:02                       ` Jon Hunter
2016-09-06 10:35               ` Jon Hunter
2016-09-06 10:35                 ` Jon Hunter
2016-09-06 10:35                 ` Jon Hunter
2016-08-30 15:02   ` Marcel Ziswiler
2016-08-30 15:02     ` Marcel Ziswiler
2016-08-30 15:02     ` Marcel Ziswiler
2016-08-30 15:02     ` Marcel Ziswiler
2016-08-31  9:24     ` Mirza Krak
2016-08-31  9:24       ` Mirza Krak
2016-08-31  9:24       ` Mirza Krak
2016-08-31  9:24       ` Mirza Krak
     [not found] ` <1472045838-22628-1-git-send-email-mirza.krak-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-08-24 13:37   ` [PATCH v2 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table Mirza Krak
2016-08-24 13:37     ` Mirza Krak
2016-08-24 13:37     ` Mirza Krak
2016-08-24 13:37   ` [PATCH v2 2/6] clk: tegra: add TEGRA30_CLK_NOR " Mirza Krak
2016-08-24 13:37     ` Mirza Krak
2016-08-24 13:37     ` Mirza Krak
2016-08-24 13:37   ` [PATCH v2 4/6] ARM: tegra: Add Tegra30 GMI support Mirza Krak
2016-08-24 13:37     ` Mirza Krak
2016-08-24 13:37     ` Mirza Krak
2016-08-24 13:37   ` [PATCH v2 5/6] ARM: tegra: Add Tegra20 " Mirza Krak
2016-08-24 13:37     ` Mirza Krak
2016-08-24 13:37     ` Mirza Krak
2016-08-24 13:37   ` [PATCH v2 6/6] bus: Add support for Tegra Generic Memory Interface Mirza Krak
2016-08-24 13:37     ` Mirza Krak
2016-08-24 13:37     ` Mirza Krak
     [not found]     ` <1472045838-22628-7-git-send-email-mirza.krak-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-08-26  8:21       ` Jon Hunter
2016-08-26  8:21         ` Jon Hunter
2016-08-26  8:21         ` Jon Hunter
2016-08-30 15:01   ` [PATCH v2 0/6] Add support for Tegra GMI bus controller Marcel Ziswiler
2016-08-30 15:01     ` Marcel Ziswiler
2016-08-30 15:01     ` Marcel Ziswiler
2016-08-30 15:01     ` Marcel Ziswiler
2016-08-31  9:23     ` Mirza Krak
2016-08-31  9:23       ` Mirza Krak
2016-08-31  9:23       ` Mirza Krak
2016-08-31  9:23       ` Mirza Krak

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20160830170636.GA8741@rob-hp-laptop \
    --to=robh-dgejt+ai2ygdnm+yrofe0a@public.gmane.org \
    --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org \
    --cc=linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org \
    --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=mark.rutland-5wv7dgnIgG8@public.gmane.org \
    --cc=mirza.krak-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org \
    --cc=pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org \
    --cc=pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org \
    --cc=sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org \
    --cc=swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org \
    --cc=thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.