* [PATCH 0/4] r8a7796 HSCIF integration
@ 2016-09-14 16:47 Ulrich Hecht
2016-09-14 16:47 ` [PATCH 1/4] clk: shmobile: r8a7796: Add HSCIF clocks Ulrich Hecht
` (3 more replies)
0 siblings, 4 replies; 10+ messages in thread
From: Ulrich Hecht @ 2016-09-14 16:47 UTC (permalink / raw)
To: linux-renesas-soc, geert; +Cc: magnus.damm, horms, Ulrich Hecht
Hi!
This enables all HSCIFs on r8a7796.
Based on renesas-drivers-2016-09-13-v4.8-rc6. The last patch enables DMA and
depends on the "r8a7796 SYS-DMAC integration" series posted earlier.
CU
Uli
Ulrich Hecht (4):
clk: shmobile: r8a7796: Add HSCIF clocks
pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions
arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes
arm64: renesas: r8a7796: Enable HSCIF DMA
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 80 ++++++++++
drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 +
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 255 +++++++++++++++++++++++++++++++
3 files changed, 340 insertions(+)
--
2.9.3
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/4] clk: shmobile: r8a7796: Add HSCIF clocks
2016-09-14 16:47 [PATCH 0/4] r8a7796 HSCIF integration Ulrich Hecht
@ 2016-09-14 16:47 ` Ulrich Hecht
2016-09-15 18:40 ` Geert Uytterhoeven
2016-09-14 16:47 ` [PATCH 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions Ulrich Hecht
` (2 subsequent siblings)
3 siblings, 1 reply; 10+ messages in thread
From: Ulrich Hecht @ 2016-09-14 16:47 UTC (permalink / raw)
To: linux-renesas-soc, geert; +Cc: magnus.damm, horms, Ulrich Hecht
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 2c1f597..555aff4 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -128,6 +128,11 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
DEF_MOD("sdif0", 314, R8A7796_CLK_SD0),
DEF_MOD("rwdt0", 402, R8A7796_CLK_R),
DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif4", 516, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif3", 517, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif2", 518, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif1", 519, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif0", 520, R8A7796_CLK_S3D1),
DEF_MOD("thermal", 522, R8A7796_CLK_CP),
DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6),
DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4),
--
2.9.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions
2016-09-14 16:47 [PATCH 0/4] r8a7796 HSCIF integration Ulrich Hecht
2016-09-14 16:47 ` [PATCH 1/4] clk: shmobile: r8a7796: Add HSCIF clocks Ulrich Hecht
@ 2016-09-14 16:47 ` Ulrich Hecht
2016-09-15 18:55 ` Geert Uytterhoeven
2016-09-14 16:47 ` [PATCH 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes Ulrich Hecht
2016-09-14 16:47 ` [PATCH 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA Ulrich Hecht
3 siblings, 1 reply; 10+ messages in thread
From: Ulrich Hecht @ 2016-09-14 16:47 UTC (permalink / raw)
To: linux-renesas-soc, geert; +Cc: magnus.damm, horms, Ulrich Hecht
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 255 +++++++++++++++++++++++++++++++++++
1 file changed, 255 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index 42db745..607adf7 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -1490,6 +1490,191 @@ static const struct sh_pfc_pin pinmux_pins[] = {
PINMUX_GPIO_GP_ALL(),
};
+/* - HSCIF0 ----------------------------------------------------------------- */
+static const unsigned int hscif0_data_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14),
+};
+static const unsigned int hscif0_data_mux[] = {
+ HRX0_MARK, HTX0_MARK,
+};
+static const unsigned int hscif0_clk_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(5, 12),
+};
+static const unsigned int hscif0_clk_mux[] = {
+ HSCK0_MARK,
+};
+static const unsigned int hscif0_ctrl_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 15),
+};
+static const unsigned int hscif0_ctrl_mux[] = {
+ HRTS0_N_MARK, HCTS0_N_MARK,
+};
+/* - HSCIF1 ----------------------------------------------------------------- */
+static const unsigned int hscif1_data_a_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
+};
+static const unsigned int hscif1_data_a_mux[] = {
+ HRX1_A_MARK, HTX1_A_MARK,
+};
+static const unsigned int hscif1_clk_a_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(6, 21),
+};
+static const unsigned int hscif1_clk_a_mux[] = {
+ HSCK1_A_MARK,
+};
+static const unsigned int hscif1_ctrl_a_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
+};
+static const unsigned int hscif1_ctrl_a_mux[] = {
+ HRTS1_N_A_MARK, HCTS1_N_A_MARK,
+};
+
+static const unsigned int hscif1_data_b_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
+};
+static const unsigned int hscif1_data_b_mux[] = {
+ HRX1_B_MARK, HTX1_B_MARK,
+};
+static const unsigned int hscif1_clk_b_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(5, 0),
+};
+static const unsigned int hscif1_clk_b_mux[] = {
+ HSCK1_B_MARK,
+};
+static const unsigned int hscif1_ctrl_b_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
+};
+static const unsigned int hscif1_ctrl_b_mux[] = {
+ HRTS1_N_B_MARK, HCTS1_N_B_MARK,
+};
+/* - HSCIF2 ----------------------------------------------------------------- */
+static const unsigned int hscif2_data_a_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
+};
+static const unsigned int hscif2_data_a_mux[] = {
+ HRX2_A_MARK, HTX2_A_MARK,
+};
+static const unsigned int hscif2_clk_a_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(6, 10),
+};
+static const unsigned int hscif2_clk_a_mux[] = {
+ HSCK2_A_MARK,
+};
+static const unsigned int hscif2_ctrl_a_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6),
+};
+static const unsigned int hscif2_ctrl_a_mux[] = {
+ HRTS2_N_A_MARK, HCTS2_N_A_MARK,
+};
+
+static const unsigned int hscif2_data_b_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
+};
+static const unsigned int hscif2_data_b_mux[] = {
+ HRX2_B_MARK, HTX2_B_MARK,
+};
+static const unsigned int hscif2_clk_b_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(6, 21),
+};
+static const unsigned int hscif2_clk_b_mux[] = {
+ HSCK1_B_MARK,
+};
+static const unsigned int hscif2_ctrl_b_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 19),
+};
+static const unsigned int hscif2_ctrl_b_mux[] = {
+ HRTS2_N_B_MARK, HCTS2_N_B_MARK,
+};
+/* - HSCIF3 ----------------------------------------------------------------- */
+static const unsigned int hscif3_data_a_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
+};
+static const unsigned int hscif3_data_a_mux[] = {
+ HRX3_A_MARK, HTX3_A_MARK,
+};
+static const unsigned int hscif3_clk_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(1, 22),
+};
+static const unsigned int hscif3_clk_mux[] = {
+ HSCK3_MARK,
+};
+static const unsigned int hscif3_ctrl_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
+};
+static const unsigned int hscif3_ctrl_mux[] = {
+ HRTS3_N_MARK, HCTS3_N_MARK,
+};
+
+static const unsigned int hscif3_data_b_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
+};
+static const unsigned int hscif3_data_b_mux[] = {
+ HRX3_B_MARK, HTX3_B_MARK,
+};
+static const unsigned int hscif3_data_c_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+};
+static const unsigned int hscif3_data_c_mux[] = {
+ HRX3_C_MARK, HTX3_C_MARK,
+};
+static const unsigned int hscif3_data_d_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
+};
+static const unsigned int hscif3_data_d_mux[] = {
+ HRX3_D_MARK, HTX3_D_MARK,
+};
+/* - HSCIF4 ----------------------------------------------------------------- */
+static const unsigned int hscif4_data_a_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+};
+static const unsigned int hscif4_data_a_mux[] = {
+ HRX4_A_MARK, HTX4_A_MARK,
+};
+static const unsigned int hscif4_clk_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(1, 11),
+};
+static const unsigned int hscif4_clk_mux[] = {
+ HSCK4_MARK,
+};
+static const unsigned int hscif4_ctrl_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
+};
+static const unsigned int hscif4_ctrl_mux[] = {
+ HRTS4_N_MARK, HCTS3_N_MARK,
+};
+
+static const unsigned int hscif4_data_b_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
+};
+static const unsigned int hscif4_data_b_mux[] = {
+ HRX4_B_MARK, HTX4_B_MARK,
+};
+
/* - I2C -------------------------------------------------------------------- */
static const unsigned int i2c1_a_pins[] = {
/* SDA, SCL */
@@ -1963,6 +2148,31 @@ static const unsigned int sdhi3_ds_mux[] = {
};
static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(hscif0_data),
+ SH_PFC_PIN_GROUP(hscif0_clk),
+ SH_PFC_PIN_GROUP(hscif0_ctrl),
+ SH_PFC_PIN_GROUP(hscif1_data_a),
+ SH_PFC_PIN_GROUP(hscif1_clk_a),
+ SH_PFC_PIN_GROUP(hscif1_ctrl_a),
+ SH_PFC_PIN_GROUP(hscif1_data_b),
+ SH_PFC_PIN_GROUP(hscif1_clk_b),
+ SH_PFC_PIN_GROUP(hscif1_ctrl_b),
+ SH_PFC_PIN_GROUP(hscif2_data_a),
+ SH_PFC_PIN_GROUP(hscif2_clk_a),
+ SH_PFC_PIN_GROUP(hscif2_ctrl_a),
+ SH_PFC_PIN_GROUP(hscif2_data_b),
+ SH_PFC_PIN_GROUP(hscif2_clk_b),
+ SH_PFC_PIN_GROUP(hscif2_ctrl_b),
+ SH_PFC_PIN_GROUP(hscif3_data_a),
+ SH_PFC_PIN_GROUP(hscif3_clk),
+ SH_PFC_PIN_GROUP(hscif3_ctrl),
+ SH_PFC_PIN_GROUP(hscif3_data_b),
+ SH_PFC_PIN_GROUP(hscif3_data_c),
+ SH_PFC_PIN_GROUP(hscif3_data_d),
+ SH_PFC_PIN_GROUP(hscif4_data_a),
+ SH_PFC_PIN_GROUP(hscif4_clk),
+ SH_PFC_PIN_GROUP(hscif4_ctrl),
+ SH_PFC_PIN_GROUP(hscif4_data_b),
SH_PFC_PIN_GROUP(i2c1_a),
SH_PFC_PIN_GROUP(i2c1_b),
SH_PFC_PIN_GROUP(i2c2_a),
@@ -2027,6 +2237,46 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(sdhi3_ds),
};
+static const char * const hscif0_groups[] = {
+ "hscif0_data",
+ "hscif0_clk",
+ "hscif0_ctrl",
+};
+
+static const char * const hscif1_groups[] = {
+ "hscif1_data_a",
+ "hscif1_clk_a",
+ "hscif1_ctrl_a",
+ "hscif1_data_b",
+ "hscif1_clk_b",
+ "hscif1_ctrl_b",
+};
+
+static const char * const hscif2_groups[] = {
+ "hscif2_data_a",
+ "hscif2_clk_a",
+ "hscif2_ctrl_a",
+ "hscif2_data_b",
+ "hscif2_clk_b",
+ "hscif2_ctrl_b",
+};
+
+static const char * const hscif3_groups[] = {
+ "hscif3_data_a",
+ "hscif3_clk",
+ "hscif3_ctrl",
+ "hscif3_data_b",
+ "hscif3_data_c",
+ "hscif3_data_d",
+};
+
+static const char * const hscif4_groups[] = {
+ "hscif4_data_a",
+ "hscif4_clk",
+ "hscif4_ctrl",
+ "hscif4_data_b",
+};
+
static const char * const i2c1_groups[] = {
"i2c1_a",
"i2c1_b",
@@ -2132,6 +2382,11 @@ static const char * const sdhi3_groups[] = {
};
static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(hscif0),
+ SH_PFC_FUNCTION(hscif1),
+ SH_PFC_FUNCTION(hscif2),
+ SH_PFC_FUNCTION(hscif3),
+ SH_PFC_FUNCTION(hscif4),
SH_PFC_FUNCTION(i2c1),
SH_PFC_FUNCTION(i2c2),
SH_PFC_FUNCTION(i2c6),
--
2.9.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes
2016-09-14 16:47 [PATCH 0/4] r8a7796 HSCIF integration Ulrich Hecht
2016-09-14 16:47 ` [PATCH 1/4] clk: shmobile: r8a7796: Add HSCIF clocks Ulrich Hecht
2016-09-14 16:47 ` [PATCH 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions Ulrich Hecht
@ 2016-09-14 16:47 ` Ulrich Hecht
2016-09-15 18:58 ` Geert Uytterhoeven
2016-09-14 16:47 ` [PATCH 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA Ulrich Hecht
3 siblings, 1 reply; 10+ messages in thread
From: Ulrich Hecht @ 2016-09-14 16:47 UTC (permalink / raw)
To: linux-renesas-soc, geert; +Cc: magnus.damm, horms, Ulrich Hecht
Add the device nodes for all HSCIF serial ports, incl. clocks, and
clock domain.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70 ++++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index d2bbf92..df3b7df 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -347,6 +347,76 @@
status = "disabled";
};
+ hscif0: serial@e6540000 {
+ compatible = "renesas,hscif-r8a7796",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6540000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 520>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ hscif1: serial@e6550000 {
+ compatible = "renesas,hscif-r8a7796",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6550000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 519>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ hscif2: serial@e6560000 {
+ compatible = "renesas,hscif-r8a7796",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6560000 0 96>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 518>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ hscif3: serial@e66a0000 {
+ compatible = "renesas,hscif-r8a7796",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe66a0000 0 96>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 517>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ hscif4: serial@e66b0000 {
+ compatible = "renesas,hscif-r8a7796",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe66b0000 0 96>;
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 516>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a7796",
"renesas,rcar-gen3-scif", "renesas,scif";
--
2.9.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA
2016-09-14 16:47 [PATCH 0/4] r8a7796 HSCIF integration Ulrich Hecht
` (2 preceding siblings ...)
2016-09-14 16:47 ` [PATCH 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes Ulrich Hecht
@ 2016-09-14 16:47 ` Ulrich Hecht
2016-09-15 18:59 ` Geert Uytterhoeven
3 siblings, 1 reply; 10+ messages in thread
From: Ulrich Hecht @ 2016-09-14 16:47 UTC (permalink / raw)
To: linux-renesas-soc, geert; +Cc: magnus.damm, horms, Ulrich Hecht
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index df3b7df..085a6fa9b 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -357,6 +357,8 @@
<&cpg CPG_CORE R8A7796_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x31>, <&dmac1 0x30>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -371,6 +373,8 @@
<&cpg CPG_CORE R8A7796_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x33>, <&dmac1 0x32>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -385,6 +389,8 @@
<&cpg CPG_CORE R8A7796_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x35>, <&dmac1 0x34>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -399,6 +405,8 @@
<&cpg CPG_CORE R8A7796_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x37>, <&dmac0 0x36>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -413,6 +421,8 @@
<&cpg CPG_CORE R8A7796_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x38>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
status = "disabled";
};
--
2.9.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/4] clk: shmobile: r8a7796: Add HSCIF clocks
2016-09-14 16:47 ` [PATCH 1/4] clk: shmobile: r8a7796: Add HSCIF clocks Ulrich Hecht
@ 2016-09-15 18:40 ` Geert Uytterhoeven
0 siblings, 0 replies; 10+ messages in thread
From: Geert Uytterhoeven @ 2016-09-15 18:40 UTC (permalink / raw)
To: Ulrich Hecht; +Cc: Linux-Renesas, Magnus Damm, Simon Horman
On Wed, Sep 14, 2016 at 6:47 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions
2016-09-14 16:47 ` [PATCH 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions Ulrich Hecht
@ 2016-09-15 18:55 ` Geert Uytterhoeven
2016-11-07 12:27 ` Geert Uytterhoeven
0 siblings, 1 reply; 10+ messages in thread
From: Geert Uytterhoeven @ 2016-09-15 18:55 UTC (permalink / raw)
To: Ulrich Hecht; +Cc: Linux-Renesas, Magnus Damm, Simon Horman
Hi Ulrich,
On Wed, Sep 14, 2016 at 6:47 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
> ---
> drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 255 +++++++++++++++++++++++++++++++++++
> 1 file changed, 255 insertions(+)
>
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> index 42db745..607adf7 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> @@ -1490,6 +1490,191 @@ static const struct sh_pfc_pin pinmux_pins[] = {
> +/* - HSCIF2 ----------------------------------------------------------------- */
> +static const unsigned int hscif2_data_a_pins[] = {
> + /* RX, TX */
> + RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
> +};
> +static const unsigned int hscif2_data_a_mux[] = {
> + HRX2_A_MARK, HTX2_A_MARK,
> +};
> +static const unsigned int hscif2_clk_a_pins[] = {
> + /* SCK */
> + RCAR_GP_PIN(6, 10),
> +};
> +static const unsigned int hscif2_clk_a_mux[] = {
> + HSCK2_A_MARK,
> +};
> +static const unsigned int hscif2_ctrl_a_pins[] = {
> + /* RTS, CTS */
> + RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6),
> +};
> +static const unsigned int hscif2_ctrl_a_mux[] = {
> + HRTS2_N_A_MARK, HCTS2_N_A_MARK,
> +};
> +
> +static const unsigned int hscif2_data_b_pins[] = {
> + /* RX, TX */
> + RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
> +};
> +static const unsigned int hscif2_data_b_mux[] = {
> + HRX2_B_MARK, HTX2_B_MARK,
> +};
> +static const unsigned int hscif2_clk_b_pins[] = {
> + /* SCK */
> + RCAR_GP_PIN(6, 21),
> +};
> +static const unsigned int hscif2_clk_b_mux[] = {
> + HSCK1_B_MARK,
> +};
> +static const unsigned int hscif2_ctrl_b_pins[] = {
> + /* RTS, CTS */
> + RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 19),
> +};
> +static const unsigned int hscif2_ctrl_b_mux[] = {
> + HRTS2_N_B_MARK, HCTS2_N_B_MARK,
> +};
You forgot to add group C for HSCIF2, which does not exist on H3.
The rest looks OK to me.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes
2016-09-14 16:47 ` [PATCH 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes Ulrich Hecht
@ 2016-09-15 18:58 ` Geert Uytterhoeven
0 siblings, 0 replies; 10+ messages in thread
From: Geert Uytterhoeven @ 2016-09-15 18:58 UTC (permalink / raw)
To: Ulrich Hecht; +Cc: Linux-Renesas, Magnus Damm, Simon Horman
On Wed, Sep 14, 2016 at 6:47 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> Add the device nodes for all HSCIF serial ports, incl. clocks, and
> clock domain.
>
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA
2016-09-14 16:47 ` [PATCH 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA Ulrich Hecht
@ 2016-09-15 18:59 ` Geert Uytterhoeven
0 siblings, 0 replies; 10+ messages in thread
From: Geert Uytterhoeven @ 2016-09-15 18:59 UTC (permalink / raw)
To: Ulrich Hecht; +Cc: Linux-Renesas, Magnus Damm, Simon Horman
On Wed, Sep 14, 2016 at 6:47 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> arch/arm64/boot/dts/renesas/r8a7796.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> index df3b7df..085a6fa9b 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> @@ -357,6 +357,8 @@
> <&cpg CPG_CORE R8A7796_CLK_S3D1>,
> <&scif_clk>;
> clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac1 0x31>, <&dmac1 0x30>;
Same comment as for I2C and HSCIF: dmac2, if it works.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions
2016-09-15 18:55 ` Geert Uytterhoeven
@ 2016-11-07 12:27 ` Geert Uytterhoeven
0 siblings, 0 replies; 10+ messages in thread
From: Geert Uytterhoeven @ 2016-11-07 12:27 UTC (permalink / raw)
To: Ulrich Hecht; +Cc: Linux-Renesas, Magnus Damm, Simon Horman
Hi Uli,
On Thu, Sep 15, 2016 at 8:55 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Wed, Sep 14, 2016 at 6:47 PM, Ulrich Hecht
> <ulrich.hecht+renesas@gmail.com> wrote:
>> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
>> ---
>> drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 255 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 255 insertions(+)
>>
>> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
>> index 42db745..607adf7 100644
>> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
>> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
>> @@ -1490,6 +1490,191 @@ static const struct sh_pfc_pin pinmux_pins[] = {
>
>> +/* - HSCIF2 ----------------------------------------------------------------- */
> You forgot to add group C for HSCIF2, which does not exist on H3.
Any plans for an update, fixing that?
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2016-11-07 12:27 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-09-14 16:47 [PATCH 0/4] r8a7796 HSCIF integration Ulrich Hecht
2016-09-14 16:47 ` [PATCH 1/4] clk: shmobile: r8a7796: Add HSCIF clocks Ulrich Hecht
2016-09-15 18:40 ` Geert Uytterhoeven
2016-09-14 16:47 ` [PATCH 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions Ulrich Hecht
2016-09-15 18:55 ` Geert Uytterhoeven
2016-11-07 12:27 ` Geert Uytterhoeven
2016-09-14 16:47 ` [PATCH 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes Ulrich Hecht
2016-09-15 18:58 ` Geert Uytterhoeven
2016-09-14 16:47 ` [PATCH 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA Ulrich Hecht
2016-09-15 18:59 ` Geert Uytterhoeven
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