[PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0

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* [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0
@ 2016-09-01 20:33 Srinivas Pandruvada
  2016-09-01 20:33 ` [PATCH v2 1/8] sched, x86: Add SD_ASYM_PACKING flags to x86 cpu topology for ITMT Srinivas Pandruvada
                   ` (9 more replies)
  0 siblings, 10 replies; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-01 20:33 UTC (permalink / raw)
  To: rjw, tglx, mingo, bp, peterz
  Cc: x86, linux-pm, linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

v2
- The patchset is split into two parts so that CPPC changes can be merged first
 1. Only ACPI CPPC changes (It is posted separately)
 2. ITMT changes (scheduler and Intel P-State)

- Changes in patch: sched,x86: Enable Turbo Boost Max Technology
 1. Use arch_update_cpu_topology to indicate need to completely
    rebuild sched domain when ITMT related sched domain flags change
 2. Enable client (single node) platform capable of ITMT with ITMT
    scheduling by default
 3. Implement arch_asym_cpu_priority to provide the cpu priority
    value to scheduler for asym packing.
 4. Fix a compile bug for i386 architecture.

- Changes in patch: sched: Extend scheduler's asym packing
 1. Use arch_asym_cpu_priority() to provide cpu priority
    value used for asym packing to the scheduler.

- Changes in acpi: bus: Enable HWP CPPC objects and
  acpi: bus: Set _OSC for diverse core support
  Minor code cleanup by removing #ifdef
- Changes in Kconfig for Intel P-State
  Avoid building CPPC lib for i386 for issue reported by 0-day

- Feature is enabled by default for single socket systems

With Intel® Turbo Boost Max Technology 3.0 (ITMT), single-threaded performance is
optimized by identifying processor's fastest core and running critical workloads
on it.
Refere to:
http://www.intel.com/content/www/us/en/architecture-and-technology/turbo-boost/turbo-boost-max-technology.html

This patchset consist of all changes required to support ITMT feature:
- Use CPPC information in Intel P-State driver to get performance information
- Scheduler enhancements
- cppc lib patches (split in to a seprate series)

This featured can be enabled by writing at runtime
# echo 1 > /proc/sys/kernel/sched_itmt_enabled
This featured can be disabled by writing at runtime
# echo 0 > /proc/sys/kernel/sched_itmt_enabled

Srinivas Pandruvada (3):
  acpi: bus: Enable HWP CPPC objects
  acpi: bus: Set _OSC for diverse core support
  cpufreq: intel_pstate: Use CPPC to get max performance

Tim Chen (5):
  sched, x86: Add SD_ASYM_PACKING flags to x86 cpu topology for ITMT
  sched: Extend scheduler's asym packing
  x86, cpu: provide a function topology_num_packages to enumerate
    #packages
  sched, x86: use arch_update_cpu_topology to indicate x86 need sched
    domain rebuild
  sched,x86: Enable Turbo Boost Max Technology

 arch/x86/Kconfig                |   9 +++
 arch/x86/include/asm/topology.h |  25 +++++++
 arch/x86/kernel/Makefile        |   1 +
 arch/x86/kernel/itmt.c          | 161 ++++++++++++++++++++++++++++++++++++++++
 arch/x86/kernel/smpboot.c       |  92 ++++++++++++++++++-----
 drivers/acpi/bus.c              |   8 ++
 drivers/cpufreq/Kconfig.x86     |   1 +
 drivers/cpufreq/intel_pstate.c  |  75 ++++++++++++++++++-
 include/linux/acpi.h            |   1 +
 include/linux/sched.h           |   2 +
 kernel/sched/core.c             |  21 ++++++
 kernel/sched/fair.c             |  35 ++++++---
 kernel/sched/sched.h            |  12 +++
 13 files changed, 411 insertions(+), 32 deletions(-)
 create mode 100644 arch/x86/kernel/itmt.c

-- 
2.7.4


^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v2 1/8] sched, x86: Add SD_ASYM_PACKING flags to x86 cpu topology for ITMT
  2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
@ 2016-09-01 20:33 ` Srinivas Pandruvada
  2016-09-01 20:33 ` [PATCH v2 2/8] sched: Extend scheduler's asym packing Srinivas Pandruvada
                   ` (8 subsequent siblings)
  9 siblings, 0 replies; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-01 20:33 UTC (permalink / raw)
  To: rjw, tglx, mingo, bp, peterz
  Cc: x86, linux-pm, linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

From: Tim Chen <tim.c.chen@linux.intel.com>

We uses ASYM_PACKING feature in the scheduler to move tasks to more
capable cpus that can be boosted to higher frequency. This is enabled by
Intel Turbo Boost Max Technology 3.0 (ITMT).  We mark the sched domain
topology level with SD_ASYM_PACKING flag for such systems to indicate
scheduler can use the ASYM_PACKING feature to move load to the
more capable cpus.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 arch/x86/include/asm/topology.h |  4 +++
 arch/x86/kernel/smpboot.c       | 77 +++++++++++++++++++++++++++++++----------
 kernel/sched/core.c             |  3 ++
 3 files changed, 66 insertions(+), 18 deletions(-)

diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index cf75871..98b669d 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -146,4 +146,8 @@ struct pci_bus;
 int x86_pci_root_bus_node(int bus);
 void x86_pci_root_bus_resources(int bus, struct list_head *resources);
 
+#ifdef CONFIG_SCHED_ITMT
+extern unsigned int __read_mostly sysctl_sched_itmt_enabled;
+#endif /* CONFIG_SCHED_ITMT */
+
 #endif /* _ASM_X86_TOPOLOGY_H */
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 4296beb..3782bd4 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -109,6 +109,8 @@ static bool logical_packages_frozen __read_mostly;
 /* Maximum number of SMT threads on any online core */
 int __max_smt_threads __read_mostly;
 
+unsigned int __read_mostly sysctl_sched_itmt_enabled;
+
 static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
 {
 	unsigned long flags;
@@ -471,31 +473,57 @@ static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
 	return false;
 }
 
-static struct sched_domain_topology_level numa_inside_package_topology[] = {
+#ifdef CONFIG_SCHED_ITMT
+static int x86_core_flags(void)
+{
+	int flags = cpu_core_flags();
+
+	if (sysctl_sched_itmt_enabled)
+		flags |= SD_ASYM_PACKING;
+
+	return flags;
+}
+
+static int x86_smt_flags(void)
+{
+	int flags = cpu_smt_flags();
+
+	if (sysctl_sched_itmt_enabled)
+		flags |= SD_ASYM_PACKING;
+
+	return flags;
+}
+#else
+#define x86_core_flags cpu_core_flags
+#define x86_smt_flags cpu_smt_flags
+#endif
+
+static struct sched_domain_topology_level x86_topology[] = {
+#ifdef CONFIG_SCHED_SMT
+	{ cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) },
+#endif
+#ifdef CONFIG_SCHED_MC
+	{ cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) },
+#endif
+	{ cpu_cpu_mask, SD_INIT_NAME(DIE) },
+	{ NULL, },
+};
+
+static struct sched_domain_topology_level x86_numa_in_package_topology[] = {
 #ifdef CONFIG_SCHED_SMT
-	{ cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
+	{ cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) },
 #endif
 #ifdef CONFIG_SCHED_MC
-	{ cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
+	{ cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) },
 #endif
 	{ NULL, },
 };
+
 /*
- * set_sched_topology() sets the topology internal to a CPU.  The
- * NUMA topologies are layered on top of it to build the full
- * system topology.
- *
- * If NUMA nodes are observed to occur within a CPU package, this
- * function should be called.  It forces the sched domain code to
- * only use the SMT level for the CPU portion of the topology.
- * This essentially falls back to relying on NUMA information
- * from the SRAT table to describe the entire system topology
- * (except for hyperthreads).
+ * Set if a package/die has multiple NUMA nodes inside.
+ * AMD Magny-Cours and Intel Cluster-on-Die have this.
  */
-static void primarily_use_numa_for_topology(void)
-{
-	set_sched_topology(numa_inside_package_topology);
-}
+static bool x86_has_numa_in_package;
 
 void set_cpu_sibling_map(int cpu)
 {
@@ -558,7 +586,7 @@ void set_cpu_sibling_map(int cpu)
 				c->booted_cores = cpu_data(i).booted_cores;
 		}
 		if (match_die(c, o) && !topology_same_node(c, o))
-			primarily_use_numa_for_topology();
+			x86_has_numa_in_package = true;
 	}
 
 	threads = cpumask_weight(topology_sibling_cpumask(cpu));
@@ -1304,6 +1332,16 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 		zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
 		zalloc_cpumask_var(&per_cpu(cpu_llc_shared_map, i), GFP_KERNEL);
 	}
+
+	/*
+	 * Set 'default' x86 topology, this matches default_topology() in that
+	 * it has NUMA nodes as a topology level. See also
+	 * native_smp_cpus_done().
+	 *
+	 * Must be done before set_cpus_sibling_map() is ran.
+	 */
+	set_sched_topology(x86_topology);
+
 	set_cpu_sibling_map(0);
 
 	switch (smp_sanity_check(max_cpus)) {
@@ -1370,6 +1408,9 @@ void __init native_smp_cpus_done(unsigned int max_cpus)
 {
 	pr_debug("Boot done\n");
 
+	if (x86_has_numa_in_package)
+		set_sched_topology(x86_numa_in_package_topology);
+
 	nmi_selftest();
 	impress_friends();
 	setup_ioapic_dest();
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 2a906f2..e86c4a5 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -6487,6 +6487,9 @@ static struct sched_domain_topology_level *sched_domain_topology =
 
 void set_sched_topology(struct sched_domain_topology_level *tl)
 {
+	if (WARN_ON_ONCE(sched_smp_initialized))
+		return;
+
 	sched_domain_topology = tl;
 }
 
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 2/8] sched: Extend scheduler's asym packing
  2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
  2016-09-01 20:33 ` [PATCH v2 1/8] sched, x86: Add SD_ASYM_PACKING flags to x86 cpu topology for ITMT Srinivas Pandruvada
@ 2016-09-01 20:33 ` Srinivas Pandruvada
  2016-09-08  8:01   ` Peter Zijlstra
  2016-09-01 20:33 ` [PATCH v2 3/8] x86, cpu: provide a function topology_num_packages to enumerate #packages Srinivas Pandruvada
                   ` (7 subsequent siblings)
  9 siblings, 1 reply; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-01 20:33 UTC (permalink / raw)
  To: rjw, tglx, mingo, bp, peterz
  Cc: x86, linux-pm, linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

From: Tim Chen <tim.c.chen@linux.intel.com>

We generalize the scheduler's asym packing to provide an ordering
of the cpu beyond just the cpu number.  This allows the use of the
ASYM_PACKING scheduler machinery to move loads to preferred CPU in a
sched domain. The preference is defined with the cpu priority
given by arch_asym_cpu_priority(cpu).

We also record the most preferred cpu in a sched group when
we build the cpu's capacity for fast lookup of preferred cpu
during load balancing.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 include/linux/sched.h |  2 ++
 kernel/sched/core.c   | 18 ++++++++++++++++++
 kernel/sched/fair.c   | 35 ++++++++++++++++++++++++-----------
 kernel/sched/sched.h  | 12 ++++++++++++
 4 files changed, 56 insertions(+), 11 deletions(-)

diff --git a/include/linux/sched.h b/include/linux/sched.h
index b0fa726..15d3f29 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1052,6 +1052,8 @@ static inline int cpu_numa_flags(void)
 }
 #endif
 
+int arch_asym_cpu_priority(int cpu);
+
 struct sched_domain_attr {
 	int relax_domain_level;
 };
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index e86c4a5..08135ca 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -6237,7 +6237,25 @@ static void init_sched_groups_capacity(int cpu, struct sched_domain *sd)
 	WARN_ON(!sg);
 
 	do {
+		int cpu, max_cpu = -1, prev_cpu = -1;
+
 		sg->group_weight = cpumask_weight(sched_group_cpus(sg));
+
+		if (!(sd->flags & SD_ASYM_PACKING))
+			goto next;
+
+		for_each_cpu(cpu, sched_group_cpus(sg)) {
+			if (prev_cpu < 0) {
+				prev_cpu = cpu;
+				max_cpu = cpu;
+			} else {
+				if (sched_asym_prefer(cpu, max_cpu))
+					max_cpu = cpu;
+			}
+		}
+		sg->asym_prefer_cpu = max_cpu;
+
+next:
 		sg = sg->next;
 	} while (sg != sd->groups);
 
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 5d558cc..d8f51d9 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -100,6 +100,16 @@ const_debug unsigned int sysctl_sched_migration_cost = 500000UL;
  */
 unsigned int __read_mostly sysctl_sched_shares_window = 10000000UL;
 
+#ifdef CONFIG_SMP
+/*
+ * For asym packing, by default the lower numbered cpu has higher priority.
+ */
+int __weak arch_asym_cpu_priority(int cpu)
+{
+	return -cpu;
+}
+#endif
+
 #ifdef CONFIG_CFS_BANDWIDTH
 /*
  * Amount of runtime to allocate from global (tg) to local (per-cfs_rq) pool
@@ -6853,16 +6863,18 @@ static bool update_sd_pick_busiest(struct lb_env *env,
 	if (env->idle == CPU_NOT_IDLE)
 		return true;
 	/*
-	 * ASYM_PACKING needs to move all the work to the lowest
-	 * numbered CPUs in the group, therefore mark all groups
-	 * higher than ourself as busy.
+	 * ASYM_PACKING needs to move all the work to the highest
+	 * prority CPUs in the group, therefore mark all groups
+	 * of lower priority than ourself as busy.
 	 */
-	if (sgs->sum_nr_running && env->dst_cpu < group_first_cpu(sg)) {
+	if (sgs->sum_nr_running &&
+	    sched_asym_prefer(env->dst_cpu, group_priority_cpu(sg))) {
 		if (!sds->busiest)
 			return true;
 
-		/* Prefer to move from highest possible cpu's work */
-		if (group_first_cpu(sds->busiest) < group_first_cpu(sg))
+		/* Prefer to move from lowest priority cpu's work */
+		if (sched_asym_prefer(group_priority_cpu(sds->busiest),
+				      group_priority_cpu(sg)))
 			return true;
 	}
 
@@ -7014,8 +7026,8 @@ static int check_asym_packing(struct lb_env *env, struct sd_lb_stats *sds)
 	if (!sds->busiest)
 		return 0;
 
-	busiest_cpu = group_first_cpu(sds->busiest);
-	if (env->dst_cpu > busiest_cpu)
+	busiest_cpu = group_priority_cpu(sds->busiest);
+	if (sched_asym_prefer(busiest_cpu, env->dst_cpu))
 		return 0;
 
 	env->imbalance = DIV_ROUND_CLOSEST(
@@ -7356,10 +7368,11 @@ static int need_active_balance(struct lb_env *env)
 
 		/*
 		 * ASYM_PACKING needs to force migrate tasks from busy but
-		 * higher numbered CPUs in order to pack all tasks in the
-		 * lowest numbered CPUs.
+		 * lower priority CPUs in order to pack all tasks in the
+		 * highest priority CPUs.
 		 */
-		if ((sd->flags & SD_ASYM_PACKING) && env->src_cpu > env->dst_cpu)
+		if ((sd->flags & SD_ASYM_PACKING) &&
+		    sched_asym_prefer(env->dst_cpu, env->src_cpu))
 			return 1;
 	}
 
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index b7fc1ce..f338934 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -532,6 +532,17 @@ struct dl_rq {
 
 #ifdef CONFIG_SMP
 
+static inline bool sched_asym_prefer(int a, int b)
+{
+	return arch_asym_cpu_priority(a) > arch_asym_cpu_priority(b);
+}
+
+/*
+ * Return lowest numbered cpu in the group as the most preferred cpu
+ * for ASYM_PACKING for default case.
+ */
+#define group_priority_cpu(group) group->asym_prefer_cpu
+
 /*
  * We add the notion of a root-domain which will be used to define per-domain
  * variables. Each exclusive cpuset essentially defines an island domain by
@@ -884,6 +895,7 @@ struct sched_group {
 
 	unsigned int group_weight;
 	struct sched_group_capacity *sgc;
+	int asym_prefer_cpu;		/* cpu of highest priority in group */
 
 	/*
 	 * The CPUs this group covers.
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 3/8] x86, cpu: provide a function topology_num_packages to enumerate #packages
  2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
  2016-09-01 20:33 ` [PATCH v2 1/8] sched, x86: Add SD_ASYM_PACKING flags to x86 cpu topology for ITMT Srinivas Pandruvada
  2016-09-01 20:33 ` [PATCH v2 2/8] sched: Extend scheduler's asym packing Srinivas Pandruvada
@ 2016-09-01 20:33 ` Srinivas Pandruvada
  2016-09-01 20:33 ` [PATCH v2 4/8] sched, x86: use arch_update_cpu_topology to indicate x86 need sched domain rebuild Srinivas Pandruvada
                   ` (6 subsequent siblings)
  9 siblings, 0 replies; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-01 20:33 UTC (permalink / raw)
  To: rjw, tglx, mingo, bp, peterz
  Cc: x86, linux-pm, linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

From: Tim Chen <tim.c.chen@linux.intel.com>

We compute the the number of active packages during boot and
topology update.  Provide a function to export this info for
functions that need this topology info.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 arch/x86/include/asm/topology.h | 1 +
 arch/x86/kernel/smpboot.c       | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 98b669d..0bcf3b7 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -129,6 +129,7 @@ static inline int topology_max_smt_threads(void)
 }
 
 int topology_update_package_map(unsigned int apicid, unsigned int cpu);
+extern int topology_num_packages(void);
 extern int topology_phys_to_logical_pkg(unsigned int pkg);
 #else
 #define topology_max_packages()			(1)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 3782bd4..292df31 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -297,6 +297,11 @@ found:
 	return 0;
 }
 
+int topology_num_packages(void)
+{
+	return logical_packages;
+}
+
 /**
  * topology_phys_to_logical_pkg - Map a physical package id to a logical
  *
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 4/8] sched, x86: use arch_update_cpu_topology to indicate x86 need sched domain rebuild
  2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
                   ` (2 preceding siblings ...)
  2016-09-01 20:33 ` [PATCH v2 3/8] x86, cpu: provide a function topology_num_packages to enumerate #packages Srinivas Pandruvada
@ 2016-09-01 20:33 ` Srinivas Pandruvada
  2016-09-01 20:33 ` [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology Srinivas Pandruvada
                   ` (5 subsequent siblings)
  9 siblings, 0 replies; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-01 20:33 UTC (permalink / raw)
  To: rjw, tglx, mingo, bp, peterz
  Cc: x86, linux-pm, linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

From: Tim Chen <tim.c.chen@linux.intel.com>

Provides x86 with arch_update_cpu_topology function. This function
allows us to indicate that a condition is detected that the sched
domain of x86 needs a complete rebuild.  This is done by setting the
x86_topology_update flag.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 arch/x86/include/asm/topology.h |  2 ++
 arch/x86/kernel/smpboot.c       | 11 +++++++++++
 2 files changed, 13 insertions(+)

diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 0bcf3b7..8d6df77 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -147,6 +147,8 @@ struct pci_bus;
 int x86_pci_root_bus_node(int bus);
 void x86_pci_root_bus_resources(int bus, struct list_head *resources);
 
+extern bool x86_topology_update;
+
 #ifdef CONFIG_SCHED_ITMT
 extern unsigned int __read_mostly sysctl_sched_itmt_enabled;
 #endif /* CONFIG_SCHED_ITMT */
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 292df31..737b9edf 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -110,6 +110,17 @@ static bool logical_packages_frozen __read_mostly;
 int __max_smt_threads __read_mostly;
 
 unsigned int __read_mostly sysctl_sched_itmt_enabled;
+/* Flag to indicate if a complete sched domain rebuild is required */
+bool x86_topology_update;
+
+int arch_update_cpu_topology(void)
+{
+	if (x86_topology_update) {
+		x86_topology_update = false;
+		return 1;
+	} else
+		return 0;
+}
 
 static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
 {
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology
  2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
                   ` (3 preceding siblings ...)
  2016-09-01 20:33 ` [PATCH v2 4/8] sched, x86: use arch_update_cpu_topology to indicate x86 need sched domain rebuild Srinivas Pandruvada
@ 2016-09-01 20:33 ` Srinivas Pandruvada
  2016-09-08  7:59   ` Peter Zijlstra
  2016-09-01 20:33 ` [PATCH v2 6/8] acpi: bus: Enable HWP CPPC objects Srinivas Pandruvada
                   ` (4 subsequent siblings)
  9 siblings, 1 reply; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-01 20:33 UTC (permalink / raw)
  To: rjw, tglx, mingo, bp, peterz
  Cc: x86, linux-pm, linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

From: Tim Chen <tim.c.chen@linux.intel.com>

On some Intel cores, they can boosted to a higher turbo frequency than
the other cores on the same die.  So we prefer processes to be run on
them vs other lower frequency ones for extra performance.

We extend the asym packing feature in the scheduler to support packing
task to the higher frequency core at the core sched domain level.

We set up a core priority metric to abstract the core preferences based
on the maximum boost frequency.  The priority is instantiated such that
the core with a higher priority is favored over the core with lower
priority when making scheduling decision using ASYM_PACKING.  The smt
threads that are of higher number are discounted in their priority so
we will not try to pack tasks onto all the threads of a favored core
before using other cpu cores.  The cpu that's of the highest priority
in a sched_group is recorded in sched_group->asym_prefer_cpu during
initialization to save lookup during load balancing.

A sysctl variable /proc/sys/kernel/sched_itmt_enabled is provided so
the scheduling based on favored core can be turned on or off at run time.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 arch/x86/Kconfig                |   9 +++
 arch/x86/include/asm/topology.h |  18 +++++
 arch/x86/kernel/Makefile        |   1 +
 arch/x86/kernel/itmt.c          | 161 ++++++++++++++++++++++++++++++++++++++++
 arch/x86/kernel/smpboot.c       |   1 -
 5 files changed, 189 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/kernel/itmt.c

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 2a1f0ce..6dfb97d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -927,6 +927,15 @@ config SCHED_MC
 	  making when dealing with multi-core CPU chips at a cost of slightly
 	  increased overhead in some places. If unsure say N here.
 
+config SCHED_ITMT
+	bool "Intel Turbo Boost Max Technology (ITMT) scheduler support"
+	depends on SCHED_MC && CPU_SUP_INTEL && X86_INTEL_PSTATE
+	---help---
+	  ITMT enabled scheduler support improves the CPU scheduler's decision
+	  to move tasks to cpu core that can be boosted to a higher frequency
+	  than others. It will have better performance at a cost of slightly
+	  increased overhead in task migrations. If unsure say N here.
+
 source "kernel/Kconfig.preempt"
 
 config UP_LATE_INIT
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 8d6df77..ac86a0b 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -150,7 +150,25 @@ void x86_pci_root_bus_resources(int bus, struct list_head *resources);
 extern bool x86_topology_update;
 
 #ifdef CONFIG_SCHED_ITMT
+#include <asm/percpu.h>
+
+DECLARE_PER_CPU_READ_MOSTLY(int, sched_core_priority);
 extern unsigned int __read_mostly sysctl_sched_itmt_enabled;
+
+/* Interface to set priority of a cpu */
+void sched_set_itmt_core_prio(int prio, int core_cpu);
+
+/* Interface to notify scheduler that system supports ITMT */
+void set_sched_itmt(bool support_itmt);
+
+#else /* CONFIG_SCHED_ITMT */
+
+static inline void set_sched_itmt(bool support_itmt)
+{
+}
+static inline void sched_set_itmt_core_prio(int prio, int core_cpu)
+{
+}
 #endif /* CONFIG_SCHED_ITMT */
 
 #endif /* _ASM_X86_TOPOLOGY_H */
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 0503f5b..2008335 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -124,6 +124,7 @@ obj-$(CONFIG_EFI)			+= sysfb_efi.o
 
 obj-$(CONFIG_PERF_EVENTS)		+= perf_regs.o
 obj-$(CONFIG_TRACING)			+= tracepoint.o
+obj-$(CONFIG_SCHED_ITMT)		+= itmt.o
 
 ###
 # 64 bit specific files
diff --git a/arch/x86/kernel/itmt.c b/arch/x86/kernel/itmt.c
new file mode 100644
index 0000000..5e991bd
--- /dev/null
+++ b/arch/x86/kernel/itmt.c
@@ -0,0 +1,161 @@
+/*
+ * itmt.c: Functions and data structures for enabling
+ *	   scheduler to favor scheduling on cores that
+ *	   can be boosted to a higher frequency using
+ *	   Intel Turbo Boost Max Technology 3.0
+ *
+ * (C) Copyright 2016 Intel Corporation
+ * Author: Tim Chen <tim.c.chen@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+
+#include <linux/sched.h>
+#include <linux/cpumask.h>
+#include <linux/cpuset.h>
+#include <asm/mutex.h>
+#include <linux/sched.h>
+#include <linux/sysctl.h>
+#include <linux/nodemask.h>
+
+DEFINE_PER_CPU_READ_MOSTLY(int, sched_core_priority);
+static DEFINE_MUTEX(itmt_update_mutex);
+
+static unsigned int zero;
+static unsigned int one = 1;
+
+/*
+ * Boolean to control whether we want to move processes to cpu capable
+ * of higher turbo frequency for cpus supporting Intel Turbo Boost Max
+ * Technology 3.0.
+ *
+ * It can be set via /proc/sys/kernel/sched_itmt_enabled
+ */
+unsigned int __read_mostly sysctl_sched_itmt_enabled;
+
+/*
+ * The pstate_driver calls set_sched_itmt to indicate if the system
+ * is ITMT capable.
+ */
+static bool __read_mostly sched_itmt_capable;
+
+int arch_asym_cpu_priority(int cpu)
+{
+	return per_cpu(sched_core_priority, cpu);
+}
+
+static void enable_sched_itmt(bool enable_itmt)
+{
+	mutex_lock(&itmt_update_mutex);
+
+	sysctl_sched_itmt_enabled = enable_itmt;
+	x86_topology_update = true;
+	rebuild_sched_domains();
+
+	mutex_unlock(&itmt_update_mutex);
+}
+
+static int sched_itmt_update_handler(struct ctl_table *table, int write,
+			      void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+	int ret;
+
+	ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
+
+	if (ret || !write)
+		return ret;
+
+	enable_sched_itmt(sysctl_sched_itmt_enabled);
+
+	return ret;
+}
+
+static struct ctl_table itmt_kern_table[] = {
+	{
+		.procname	= "sched_itmt_enabled",
+		.data		= &sysctl_sched_itmt_enabled,
+		.maxlen		= sizeof(unsigned int),
+		.mode		= 0644,
+		.proc_handler	= sched_itmt_update_handler,
+		.extra1		= &zero,
+		.extra2		= &one,
+	},
+	{}
+};
+
+static struct ctl_table itmt_root_table[] = {
+	{
+		.procname	= "kernel",
+		.mode		= 0555,
+		.child		= itmt_kern_table,
+	},
+	{}
+};
+
+static struct ctl_table_header *itmt_sysctl_header;
+
+/*
+ * The boot code will find out the max boost frequency
+ * and call this function to set a priority proportional
+ * to the max boost frequency. CPU with higher boost
+ * frequency will receive higher priority.
+ */
+void sched_set_itmt_core_prio(int prio, int core_cpu)
+{
+	int cpu, i = 1;
+
+	for_each_cpu(cpu, topology_sibling_cpumask(core_cpu)) {
+		int smt_prio;
+
+		/*
+		 * Discount the priority of sibling so that we don't
+		 * pack all loads to the same core before using other cores.
+		 */
+		smt_prio = prio * smp_num_siblings / i;
+		i++;
+		per_cpu(sched_core_priority, cpu) = smt_prio;
+	}
+}
+
+/*
+ * During boot up, boot code will detect if the system
+ * is ITMT capable and call set_sched_itmt.
+ *
+ * This should be call after sched_set_itmt_core_prio
+ * has been called to set the cpus' priorities.
+ *
+ * This function should be called without cpu hot plug lock
+ * as we need to acquire the lock to rebuild sched domains
+ * later.
+ */
+void set_sched_itmt(bool itmt_capable)
+{
+	mutex_lock(&itmt_update_mutex);
+
+	if (itmt_capable != sched_itmt_capable) {
+
+		if (itmt_capable) {
+			itmt_sysctl_header =
+				register_sysctl_table(itmt_root_table);
+			/*
+			 * ITMT capability automatically enables ITMT
+			 * scheduling for client systems (single node).
+			 */
+			if (topology_num_packages() == 1)
+				sysctl_sched_itmt_enabled = 1;
+		} else {
+			if (itmt_sysctl_header)
+				unregister_sysctl_table(itmt_sysctl_header);
+			sysctl_sched_itmt_enabled = 0;
+		}
+
+		sched_itmt_capable = itmt_capable;
+		x86_topology_update = true;
+		rebuild_sched_domains();
+	}
+
+	mutex_unlock(&itmt_update_mutex);
+}
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 737b9edf..17f3ac7 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -109,7 +109,6 @@ static bool logical_packages_frozen __read_mostly;
 /* Maximum number of SMT threads on any online core */
 int __max_smt_threads __read_mostly;
 
-unsigned int __read_mostly sysctl_sched_itmt_enabled;
 /* Flag to indicate if a complete sched domain rebuild is required */
 bool x86_topology_update;
 
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 6/8] acpi: bus: Enable HWP CPPC objects
  2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
                   ` (4 preceding siblings ...)
  2016-09-01 20:33 ` [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology Srinivas Pandruvada
@ 2016-09-01 20:33 ` Srinivas Pandruvada
  2016-09-01 23:15     ` kbuild test robot
  2016-09-01 20:33 ` [PATCH v2 7/8] acpi: bus: Set _OSC for diverse core support Srinivas Pandruvada
                   ` (3 subsequent siblings)
  9 siblings, 1 reply; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-01 20:33 UTC (permalink / raw)
  To: rjw, tglx, mingo, bp, peterz
  Cc: x86, linux-pm, linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

Need to set platform wide _OSC bits to enable CPPC and CPPC version 2.
If platform supports CPPC, then BIOS exposess CPPC tables.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 drivers/acpi/bus.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 85b7d07..1001b92 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -330,6 +330,11 @@ static void acpi_bus_osc_support(void)
 	capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_HOTPLUG_OST_SUPPORT;
 	capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PCLPI_SUPPORT;
 
+	if (IS_ENABLED(CONFIG_X86) && boot_cpu_has(X86_FEATURE_HWP)) {
+		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPC_SUPPORT;
+		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPCV2_SUPPORT;
+	}
+
 	if (!ghes_disable)
 		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_APEI_SUPPORT;
 	if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)))
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 7/8] acpi: bus: Set _OSC for diverse core support
  2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
                   ` (5 preceding siblings ...)
  2016-09-01 20:33 ` [PATCH v2 6/8] acpi: bus: Enable HWP CPPC objects Srinivas Pandruvada
@ 2016-09-01 20:33 ` Srinivas Pandruvada
  2016-09-01 20:33 ` [PATCH v2 8/8] cpufreq: intel_pstate: Use CPPC to get max performance Srinivas Pandruvada
                   ` (2 subsequent siblings)
  9 siblings, 0 replies; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-01 20:33 UTC (permalink / raw)
  To: rjw, tglx, mingo, bp, peterz
  Cc: x86, linux-pm, linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

Set the OSC_SB_CPC_DIVERSE_HIGH_SUPPORT (bit 12) to enable diverse
core support.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 drivers/acpi/bus.c   | 3 +++
 include/linux/acpi.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 1001b92..eacd4be 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -335,6 +335,9 @@ static void acpi_bus_osc_support(void)
 		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPCV2_SUPPORT;
 	}
 
+	if (IS_ENABLED(CONFIG_SCHED_ITMT))
+		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPC_DIVERSE_HIGH_SUPPORT;
+
 	if (!ghes_disable)
 		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_APEI_SUPPORT;
 	if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)))
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index e746552..53841a2 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -462,6 +462,7 @@ acpi_status acpi_run_osc(acpi_handle handle, struct acpi_osc_context *context);
 #define OSC_SB_CPCV2_SUPPORT			0x00000040
 #define OSC_SB_PCLPI_SUPPORT			0x00000080
 #define OSC_SB_OSLPI_SUPPORT			0x00000100
+#define OSC_SB_CPC_DIVERSE_HIGH_SUPPORT		0x00001000
 
 extern bool osc_sb_apei_support_acked;
 extern bool osc_pc_lpi_support_confirmed;
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 8/8] cpufreq: intel_pstate: Use CPPC to get max performance
  2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
                   ` (6 preceding siblings ...)
  2016-09-01 20:33 ` [PATCH v2 7/8] acpi: bus: Set _OSC for diverse core support Srinivas Pandruvada
@ 2016-09-01 20:33 ` Srinivas Pandruvada
  2016-09-01 22:31     ` kbuild test robot
  2016-09-08  8:02 ` [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Peter Zijlstra
  2016-09-15 12:14 ` Pavel Machek
  9 siblings, 1 reply; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-01 20:33 UTC (permalink / raw)
  To: rjw, tglx, mingo, bp, peterz
  Cc: x86, linux-pm, linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

This change uses acpi cppc_lib interface to get CPPC performance limits.
Once CPPC limits of all online cores are read, first check if there is
difference in max performance. If there is a difference, then the
scheduler interface is called to update per cpu priority. After updating
priority of all current cpus, the itmt feature is enabled.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 drivers/cpufreq/Kconfig.x86    |  1 +
 drivers/cpufreq/intel_pstate.c | 75 ++++++++++++++++++++++++++++++++++++++++--
 2 files changed, 73 insertions(+), 3 deletions(-)

diff --git a/drivers/cpufreq/Kconfig.x86 b/drivers/cpufreq/Kconfig.x86
index adbd1de..3328c6b 100644
--- a/drivers/cpufreq/Kconfig.x86
+++ b/drivers/cpufreq/Kconfig.x86
@@ -6,6 +6,7 @@ config X86_INTEL_PSTATE
        bool "Intel P state control"
        depends on X86
        select ACPI_PROCESSOR if ACPI
+       select ACPI_CPPC_LIB if X86_64 && ACPI
        help
           This driver provides a P state for Intel core processors.
 	  The driver implements an internal governor and will become
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index bdbe936..a0bf244 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -44,6 +44,7 @@
 
 #ifdef CONFIG_ACPI
 #include <acpi/processor.h>
+#include <acpi/cppc_acpi.h>
 #endif
 
 #define FRAC_BITS 8
@@ -193,6 +194,8 @@ struct _pid {
  * @sample:		Storage for storing last Sample data
  * @acpi_perf_data:	Stores ACPI perf information read from _PSS
  * @valid_pss_table:	Set to true for valid ACPI _PSS entries found
+ * @cppc_data:		Stores CPPC information for HWP capable CPUs
+ * @valid_cppc_table:	Set to true for valid CPPC entries are found
  *
  * This structure stores per CPU instance data for all CPUs.
  */
@@ -215,6 +218,8 @@ struct cpudata {
 #ifdef CONFIG_ACPI
 	struct acpi_processor_performance acpi_perf_data;
 	bool valid_pss_table;
+	struct cppc_cpudata *cppc_data;
+	bool valid_cppc_table;
 #endif
 };
 
@@ -361,6 +366,15 @@ static struct perf_limits *limits = &powersave_limits;
 #endif
 
 #ifdef CONFIG_ACPI
+static cpumask_t cppc_rd_cpu_mask;
+
+/* Call set_sched_itmt from a work function to be able to use hotplug locks */
+static void intel_pstste_sched_itmt_work_fn(struct work_struct *work)
+{
+	set_sched_itmt(true);
+}
+
+static DECLARE_WORK(sched_itmt_work, intel_pstste_sched_itmt_work_fn);
 
 static bool intel_pstate_get_ppc_enable_status(void)
 {
@@ -377,14 +391,63 @@ static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy *policy)
 	int ret;
 	int i;
 
-	if (hwp_active)
+	cpu = all_cpu_data[policy->cpu];
+
+	if (hwp_active) {
+		struct cppc_perf_caps *perf_caps;
+
+		cpu->cppc_data = kzalloc(sizeof(struct cppc_cpudata),
+					 GFP_KERNEL);
+		if (!cpu->cppc_data)
+			return;
+
+		perf_caps = &cpu->cppc_data->perf_caps;
+		ret = cppc_get_perf_caps(policy->cpu, perf_caps);
+		if (ret) {
+			kfree(cpu->cppc_data);
+			return;
+		}
+
+		cpu->valid_cppc_table = true;
+		pr_debug("cpu:%d H:0x%x N:0x%x L:0x%x\n", policy->cpu,
+			 perf_caps->highest_perf, perf_caps->nominal_perf,
+			 perf_caps->lowest_perf);
+
+		cpumask_set_cpu(policy->cpu, &cppc_rd_cpu_mask);
+		if (cpumask_subset(topology_core_cpumask(policy->cpu),
+				   &cppc_rd_cpu_mask)) {
+			int cpu_index;
+			int max_prio;
+			bool itmt_support = false;
+
+			cpu = all_cpu_data[0];
+			max_prio = cpu->cppc_data->perf_caps.highest_perf;
+			for_each_cpu(cpu_index, &cppc_rd_cpu_mask) {
+				cpu = all_cpu_data[cpu_index];
+				perf_caps = &cpu->cppc_data->perf_caps;
+				if (max_prio != perf_caps->highest_perf) {
+					itmt_support = true;
+					break;
+				}
+			}
+
+			if (!itmt_support)
+				return;
+
+			for_each_cpu(cpu_index, &cppc_rd_cpu_mask) {
+				cpu = all_cpu_data[cpu_index];
+				perf_caps = &cpu->cppc_data->perf_caps;
+				sched_set_itmt_core_prio(
+					perf_caps->highest_perf, cpu_index);
+			}
+			schedule_work(&sched_itmt_work);
+		}
 		return;
+	}
 
 	if (!intel_pstate_get_ppc_enable_status())
 		return;
 
-	cpu = all_cpu_data[policy->cpu];
-
 	ret = acpi_processor_register_performance(&cpu->acpi_perf_data,
 						  policy->cpu);
 	if (ret)
@@ -444,6 +507,12 @@ static void intel_pstate_exit_perf_limits(struct cpufreq_policy *policy)
 	struct cpudata *cpu;
 
 	cpu = all_cpu_data[policy->cpu];
+
+	if (cpu->valid_cppc_table) {
+		cpumask_clear_cpu(policy->cpu, &cppc_rd_cpu_mask);
+		kfree(cpu->cppc_data);
+	}
+
 	if (!cpu->valid_pss_table)
 		return;
 
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 8/8] cpufreq: intel_pstate: Use CPPC to get max performance
  2016-09-01 20:33 ` [PATCH v2 8/8] cpufreq: intel_pstate: Use CPPC to get max performance Srinivas Pandruvada
@ 2016-09-01 22:31     ` kbuild test robot
  0 siblings, 0 replies; 28+ messages in thread
From: kbuild test robot @ 2016-09-01 22:31 UTC (permalink / raw)
  Cc: kbuild-all, rjw, tglx, mingo, bp, peterz, x86, linux-pm,
	linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

[-- Attachment #1: Type: text/plain, Size: 31149 bytes --]

Hi Srinivas,

[auto build test ERROR on tip/sched/core]
[also build test ERROR on v4.8-rc4 next-20160825]
[cannot apply to tip/x86/core]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
[Suggest to use git(>=2.9.0) format-patch --base=<commit> (or --base=auto for convenience) to record what (public, well-known) commit your patch series was built on]
[Check https://git-scm.com/docs/git-format-patch for more information]

url:    https://github.com/0day-ci/linux/commits/Srinivas-Pandruvada/Support-Intel-Turbo-Boost-Max-Technology-3-0/20160902-053224
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-6 (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All error/warnings (new ones prefixed by >>):

warning: (X86_INTEL_PSTATE && ACPI_CPPC_CPUFREQ) selects ACPI_CPPC_LIB which has unmet direct dependencies (ACPI && ACPI_PROCESSOR && !ACPI_CPU_FREQ_PSS)
>> drivers/cpufreq/intel_pstate.c:202:8: error: redefinition of 'struct cpudata'
    struct cpudata {
           ^~~~~~~
   In file included from drivers/cpufreq/intel_pstate.c:47:0:
   include/acpi/cppc_acpi.h:117:8: note: originally defined here
    struct cpudata {
           ^~~~~~~
   drivers/cpufreq/intel_pstate.c: In function 'intel_pstate_init_acpi_perf_limits':
>> drivers/cpufreq/intel_pstate.c:399:35: error: invalid application of 'sizeof' to incomplete type 'struct cppc_cpudata'
      cpu->cppc_data = kzalloc(sizeof(struct cppc_cpudata),
                                      ^~~~~~
>> drivers/cpufreq/intel_pstate.c:404:30: error: dereferencing pointer to incomplete type 'struct cppc_cpudata'
      perf_caps = &cpu->cppc_data->perf_caps;
                                 ^~

vim +202 drivers/cpufreq/intel_pstate.c

938d21a2a Philippe Longepe        2015-11-09   41  #define ATOM_VIDS		0x66b
938d21a2a Philippe Longepe        2015-11-09   42  #define ATOM_TURBO_RATIOS	0x66c
938d21a2a Philippe Longepe        2015-11-09   43  #define ATOM_TURBO_VIDS		0x66d
61d8d2abc Dirk Brandewie          2014-02-12   44  
9522a2ff9 Srinivas Pandruvada     2016-04-27   45  #ifdef CONFIG_ACPI
9522a2ff9 Srinivas Pandruvada     2016-04-27   46  #include <acpi/processor.h>
cc2eccd40 Srinivas Pandruvada     2016-09-01  @47  #include <acpi/cppc_acpi.h>
9522a2ff9 Srinivas Pandruvada     2016-04-27   48  #endif
9522a2ff9 Srinivas Pandruvada     2016-04-27   49  
f0fe3cd7e Dirk Brandewie          2014-05-29   50  #define FRAC_BITS 8
93f0822df Dirk Brandewie          2013-02-06   51  #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
93f0822df Dirk Brandewie          2013-02-06   52  #define fp_toint(X) ((X) >> FRAC_BITS)
f0fe3cd7e Dirk Brandewie          2014-05-29   53  
a1c9787dc Rafael J. Wysocki       2016-05-11   54  #define EXT_BITS 6
a1c9787dc Rafael J. Wysocki       2016-05-11   55  #define EXT_FRAC_BITS (EXT_BITS + FRAC_BITS)
a1c9787dc Rafael J. Wysocki       2016-05-11   56  
93f0822df Dirk Brandewie          2013-02-06   57  static inline int32_t mul_fp(int32_t x, int32_t y)
93f0822df Dirk Brandewie          2013-02-06   58  {
93f0822df Dirk Brandewie          2013-02-06   59  	return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
93f0822df Dirk Brandewie          2013-02-06   60  }
93f0822df Dirk Brandewie          2013-02-06   61  
7180dddf7 Prarit Bhargava         2015-06-15   62  static inline int32_t div_fp(s64 x, s64 y)
93f0822df Dirk Brandewie          2013-02-06   63  {
7180dddf7 Prarit Bhargava         2015-06-15   64  	return div64_s64((int64_t)x << FRAC_BITS, y);
93f0822df Dirk Brandewie          2013-02-06   65  }
93f0822df Dirk Brandewie          2013-02-06   66  
d022a65ed Dirk Brandewie          2014-10-13   67  static inline int ceiling_fp(int32_t x)
d022a65ed Dirk Brandewie          2014-10-13   68  {
d022a65ed Dirk Brandewie          2014-10-13   69  	int mask, ret;
d022a65ed Dirk Brandewie          2014-10-13   70  
d022a65ed Dirk Brandewie          2014-10-13   71  	ret = fp_toint(x);
d022a65ed Dirk Brandewie          2014-10-13   72  	mask = (1 << FRAC_BITS) - 1;
d022a65ed Dirk Brandewie          2014-10-13   73  	if (x & mask)
d022a65ed Dirk Brandewie          2014-10-13   74  		ret += 1;
d022a65ed Dirk Brandewie          2014-10-13   75  	return ret;
d022a65ed Dirk Brandewie          2014-10-13   76  }
d022a65ed Dirk Brandewie          2014-10-13   77  
a1c9787dc Rafael J. Wysocki       2016-05-11   78  static inline u64 mul_ext_fp(u64 x, u64 y)
a1c9787dc Rafael J. Wysocki       2016-05-11   79  {
a1c9787dc Rafael J. Wysocki       2016-05-11   80  	return (x * y) >> EXT_FRAC_BITS;
a1c9787dc Rafael J. Wysocki       2016-05-11   81  }
a1c9787dc Rafael J. Wysocki       2016-05-11   82  
a1c9787dc Rafael J. Wysocki       2016-05-11   83  static inline u64 div_ext_fp(u64 x, u64 y)
a1c9787dc Rafael J. Wysocki       2016-05-11   84  {
a1c9787dc Rafael J. Wysocki       2016-05-11   85  	return div64_u64(x << EXT_FRAC_BITS, y);
a1c9787dc Rafael J. Wysocki       2016-05-11   86  }
a1c9787dc Rafael J. Wysocki       2016-05-11   87  
13ad7701f Srinivas Pandruvada     2016-04-03   88  /**
13ad7701f Srinivas Pandruvada     2016-04-03   89   * struct sample -	Store performance sample
a1c9787dc Rafael J. Wysocki       2016-05-11   90   * @core_avg_perf:	Ratio of APERF/MPERF which is the actual average
13ad7701f Srinivas Pandruvada     2016-04-03   91   *			performance during last sample period
13ad7701f Srinivas Pandruvada     2016-04-03   92   * @busy_scaled:	Scaled busy value which is used to calculate next
a1c9787dc Rafael J. Wysocki       2016-05-11   93   *			P state. This can be different than core_avg_perf
13ad7701f Srinivas Pandruvada     2016-04-03   94   *			to account for cpu idle period
13ad7701f Srinivas Pandruvada     2016-04-03   95   * @aperf:		Difference of actual performance frequency clock count
13ad7701f Srinivas Pandruvada     2016-04-03   96   *			read from APERF MSR between last and current sample
13ad7701f Srinivas Pandruvada     2016-04-03   97   * @mperf:		Difference of maximum performance frequency clock count
13ad7701f Srinivas Pandruvada     2016-04-03   98   *			read from MPERF MSR between last and current sample
13ad7701f Srinivas Pandruvada     2016-04-03   99   * @tsc:		Difference of time stamp counter between last and
13ad7701f Srinivas Pandruvada     2016-04-03  100   *			current sample
13ad7701f Srinivas Pandruvada     2016-04-03  101   * @time:		Current time from scheduler
13ad7701f Srinivas Pandruvada     2016-04-03  102   *
13ad7701f Srinivas Pandruvada     2016-04-03  103   * This structure is used in the cpudata structure to store performance sample
13ad7701f Srinivas Pandruvada     2016-04-03  104   * data for choosing next P State.
13ad7701f Srinivas Pandruvada     2016-04-03  105   */
93f0822df Dirk Brandewie          2013-02-06  106  struct sample {
a1c9787dc Rafael J. Wysocki       2016-05-11  107  	int32_t core_avg_perf;
157386b6f Philippe Longepe        2015-12-04  108  	int32_t busy_scaled;
93f0822df Dirk Brandewie          2013-02-06  109  	u64 aperf;
93f0822df Dirk Brandewie          2013-02-06  110  	u64 mperf;
4055fad34 Doug Smythies           2015-04-11  111  	u64 tsc;
a4675fbc4 Rafael J. Wysocki       2016-02-05  112  	u64 time;
93f0822df Dirk Brandewie          2013-02-06  113  };
93f0822df Dirk Brandewie          2013-02-06  114  
13ad7701f Srinivas Pandruvada     2016-04-03  115  /**
13ad7701f Srinivas Pandruvada     2016-04-03  116   * struct pstate_data - Store P state data
13ad7701f Srinivas Pandruvada     2016-04-03  117   * @current_pstate:	Current requested P state
13ad7701f Srinivas Pandruvada     2016-04-03  118   * @min_pstate:		Min P state possible for this platform
13ad7701f Srinivas Pandruvada     2016-04-03  119   * @max_pstate:		Max P state possible for this platform
13ad7701f Srinivas Pandruvada     2016-04-03  120   * @max_pstate_physical:This is physical Max P state for a processor
13ad7701f Srinivas Pandruvada     2016-04-03  121   *			This can be higher than the max_pstate which can
13ad7701f Srinivas Pandruvada     2016-04-03  122   *			be limited by platform thermal design power limits
13ad7701f Srinivas Pandruvada     2016-04-03  123   * @scaling:		Scaling factor to  convert frequency to cpufreq
13ad7701f Srinivas Pandruvada     2016-04-03  124   *			frequency units
13ad7701f Srinivas Pandruvada     2016-04-03  125   * @turbo_pstate:	Max Turbo P state possible for this platform
13ad7701f Srinivas Pandruvada     2016-04-03  126   *
13ad7701f Srinivas Pandruvada     2016-04-03  127   * Stores the per cpu model P state limits and current P state.
13ad7701f Srinivas Pandruvada     2016-04-03  128   */
93f0822df Dirk Brandewie          2013-02-06  129  struct pstate_data {
93f0822df Dirk Brandewie          2013-02-06  130  	int	current_pstate;
93f0822df Dirk Brandewie          2013-02-06  131  	int	min_pstate;
93f0822df Dirk Brandewie          2013-02-06  132  	int	max_pstate;
3bcc6fa97 Srinivas Pandruvada     2015-10-14  133  	int	max_pstate_physical;
b27580b05 Dirk Brandewie          2014-10-13  134  	int	scaling;
93f0822df Dirk Brandewie          2013-02-06  135  	int	turbo_pstate;
93f0822df Dirk Brandewie          2013-02-06  136  };
93f0822df Dirk Brandewie          2013-02-06  137  
13ad7701f Srinivas Pandruvada     2016-04-03  138  /**
13ad7701f Srinivas Pandruvada     2016-04-03  139   * struct vid_data -	Stores voltage information data
13ad7701f Srinivas Pandruvada     2016-04-03  140   * @min:		VID data for this platform corresponding to
13ad7701f Srinivas Pandruvada     2016-04-03  141   *			the lowest P state
13ad7701f Srinivas Pandruvada     2016-04-03  142   * @max:		VID data corresponding to the highest P State.
13ad7701f Srinivas Pandruvada     2016-04-03  143   * @turbo:		VID data for turbo P state
13ad7701f Srinivas Pandruvada     2016-04-03  144   * @ratio:		Ratio of (vid max - vid min) /
13ad7701f Srinivas Pandruvada     2016-04-03  145   *			(max P state - Min P State)
13ad7701f Srinivas Pandruvada     2016-04-03  146   *
13ad7701f Srinivas Pandruvada     2016-04-03  147   * Stores the voltage data for DVFS (Dynamic Voltage and Frequency Scaling)
13ad7701f Srinivas Pandruvada     2016-04-03  148   * This data is used in Atom platforms, where in addition to target P state,
13ad7701f Srinivas Pandruvada     2016-04-03  149   * the voltage data needs to be specified to select next P State.
13ad7701f Srinivas Pandruvada     2016-04-03  150   */
007bea098 Dirk Brandewie          2013-12-18  151  struct vid_data {
21855ff5b Dirk Brandewie          2014-05-08  152  	int min;
21855ff5b Dirk Brandewie          2014-05-08  153  	int max;
21855ff5b Dirk Brandewie          2014-05-08  154  	int turbo;
007bea098 Dirk Brandewie          2013-12-18  155  	int32_t ratio;
007bea098 Dirk Brandewie          2013-12-18  156  };
007bea098 Dirk Brandewie          2013-12-18  157  
13ad7701f Srinivas Pandruvada     2016-04-03  158  /**
13ad7701f Srinivas Pandruvada     2016-04-03  159   * struct _pid -	Stores PID data
13ad7701f Srinivas Pandruvada     2016-04-03  160   * @setpoint:		Target set point for busyness or performance
13ad7701f Srinivas Pandruvada     2016-04-03  161   * @integral:		Storage for accumulated error values
13ad7701f Srinivas Pandruvada     2016-04-03  162   * @p_gain:		PID proportional gain
13ad7701f Srinivas Pandruvada     2016-04-03  163   * @i_gain:		PID integral gain
13ad7701f Srinivas Pandruvada     2016-04-03  164   * @d_gain:		PID derivative gain
13ad7701f Srinivas Pandruvada     2016-04-03  165   * @deadband:		PID deadband
13ad7701f Srinivas Pandruvada     2016-04-03  166   * @last_err:		Last error storage for integral part of PID calculation
13ad7701f Srinivas Pandruvada     2016-04-03  167   *
13ad7701f Srinivas Pandruvada     2016-04-03  168   * Stores PID coefficients and last error for PID controller.
13ad7701f Srinivas Pandruvada     2016-04-03  169   */
93f0822df Dirk Brandewie          2013-02-06  170  struct _pid {
93f0822df Dirk Brandewie          2013-02-06  171  	int setpoint;
93f0822df Dirk Brandewie          2013-02-06  172  	int32_t integral;
93f0822df Dirk Brandewie          2013-02-06  173  	int32_t p_gain;
93f0822df Dirk Brandewie          2013-02-06  174  	int32_t i_gain;
93f0822df Dirk Brandewie          2013-02-06  175  	int32_t d_gain;
93f0822df Dirk Brandewie          2013-02-06  176  	int deadband;
d253d2a52 Brennan Shacklett       2013-10-21  177  	int32_t last_err;
93f0822df Dirk Brandewie          2013-02-06  178  };
93f0822df Dirk Brandewie          2013-02-06  179  
13ad7701f Srinivas Pandruvada     2016-04-03  180  /**
13ad7701f Srinivas Pandruvada     2016-04-03  181   * struct cpudata -	Per CPU instance data storage
13ad7701f Srinivas Pandruvada     2016-04-03  182   * @cpu:		CPU number for this instance data
13ad7701f Srinivas Pandruvada     2016-04-03  183   * @update_util:	CPUFreq utility callback information
4578ee7e1 Chen Yu                 2016-05-11  184   * @update_util_set:	CPUFreq utility callback is set
13ad7701f Srinivas Pandruvada     2016-04-03  185   * @pstate:		Stores P state limits for this CPU
13ad7701f Srinivas Pandruvada     2016-04-03  186   * @vid:		Stores VID limits for this CPU
13ad7701f Srinivas Pandruvada     2016-04-03  187   * @pid:		Stores PID parameters for this CPU
13ad7701f Srinivas Pandruvada     2016-04-03  188   * @last_sample_time:	Last Sample time
13ad7701f Srinivas Pandruvada     2016-04-03  189   * @prev_aperf:		Last APERF value read from APERF MSR
13ad7701f Srinivas Pandruvada     2016-04-03  190   * @prev_mperf:		Last MPERF value read from MPERF MSR
13ad7701f Srinivas Pandruvada     2016-04-03  191   * @prev_tsc:		Last timestamp counter (TSC) value
13ad7701f Srinivas Pandruvada     2016-04-03  192   * @prev_cummulative_iowait: IO Wait time difference from last and
13ad7701f Srinivas Pandruvada     2016-04-03  193   *			current sample
13ad7701f Srinivas Pandruvada     2016-04-03  194   * @sample:		Storage for storing last Sample data
9522a2ff9 Srinivas Pandruvada     2016-04-27  195   * @acpi_perf_data:	Stores ACPI perf information read from _PSS
9522a2ff9 Srinivas Pandruvada     2016-04-27  196   * @valid_pss_table:	Set to true for valid ACPI _PSS entries found
cc2eccd40 Srinivas Pandruvada     2016-09-01  197   * @cppc_data:		Stores CPPC information for HWP capable CPUs
cc2eccd40 Srinivas Pandruvada     2016-09-01  198   * @valid_cppc_table:	Set to true for valid CPPC entries are found
13ad7701f Srinivas Pandruvada     2016-04-03  199   *
13ad7701f Srinivas Pandruvada     2016-04-03  200   * This structure stores per CPU instance data for all CPUs.
13ad7701f Srinivas Pandruvada     2016-04-03  201   */
93f0822df Dirk Brandewie          2013-02-06 @202  struct cpudata {
93f0822df Dirk Brandewie          2013-02-06  203  	int cpu;
93f0822df Dirk Brandewie          2013-02-06  204  
a4675fbc4 Rafael J. Wysocki       2016-02-05  205  	struct update_util_data update_util;
4578ee7e1 Chen Yu                 2016-05-11  206  	bool   update_util_set;
93f0822df Dirk Brandewie          2013-02-06  207  
93f0822df Dirk Brandewie          2013-02-06  208  	struct pstate_data pstate;
007bea098 Dirk Brandewie          2013-12-18  209  	struct vid_data vid;
93f0822df Dirk Brandewie          2013-02-06  210  	struct _pid pid;
93f0822df Dirk Brandewie          2013-02-06  211  
a4675fbc4 Rafael J. Wysocki       2016-02-05  212  	u64	last_sample_time;
93f0822df Dirk Brandewie          2013-02-06  213  	u64	prev_aperf;
93f0822df Dirk Brandewie          2013-02-06  214  	u64	prev_mperf;
4055fad34 Doug Smythies           2015-04-11  215  	u64	prev_tsc;
63d1d656a Philippe Longepe        2015-12-04  216  	u64	prev_cummulative_iowait;
d37e2b764 Dirk Brandewie          2014-02-12  217  	struct sample sample;
9522a2ff9 Srinivas Pandruvada     2016-04-27  218  #ifdef CONFIG_ACPI
9522a2ff9 Srinivas Pandruvada     2016-04-27  219  	struct acpi_processor_performance acpi_perf_data;
9522a2ff9 Srinivas Pandruvada     2016-04-27  220  	bool valid_pss_table;
cc2eccd40 Srinivas Pandruvada     2016-09-01  221  	struct cppc_cpudata *cppc_data;
cc2eccd40 Srinivas Pandruvada     2016-09-01  222  	bool valid_cppc_table;
9522a2ff9 Srinivas Pandruvada     2016-04-27  223  #endif
93f0822df Dirk Brandewie          2013-02-06  224  };
93f0822df Dirk Brandewie          2013-02-06  225  
93f0822df Dirk Brandewie          2013-02-06  226  static struct cpudata **all_cpu_data;
13ad7701f Srinivas Pandruvada     2016-04-03  227  
13ad7701f Srinivas Pandruvada     2016-04-03  228  /**
13ad7701f Srinivas Pandruvada     2016-04-03  229   * struct pid_adjust_policy - Stores static PID configuration data
13ad7701f Srinivas Pandruvada     2016-04-03  230   * @sample_rate_ms:	PID calculation sample rate in ms
13ad7701f Srinivas Pandruvada     2016-04-03  231   * @sample_rate_ns:	Sample rate calculation in ns
13ad7701f Srinivas Pandruvada     2016-04-03  232   * @deadband:		PID deadband
13ad7701f Srinivas Pandruvada     2016-04-03  233   * @setpoint:		PID Setpoint
13ad7701f Srinivas Pandruvada     2016-04-03  234   * @p_gain_pct:		PID proportional gain
13ad7701f Srinivas Pandruvada     2016-04-03  235   * @i_gain_pct:		PID integral gain
13ad7701f Srinivas Pandruvada     2016-04-03  236   * @d_gain_pct:		PID derivative gain
13ad7701f Srinivas Pandruvada     2016-04-03  237   *
13ad7701f Srinivas Pandruvada     2016-04-03  238   * Stores per CPU model static PID configuration data.
13ad7701f Srinivas Pandruvada     2016-04-03  239   */
93f0822df Dirk Brandewie          2013-02-06  240  struct pstate_adjust_policy {
93f0822df Dirk Brandewie          2013-02-06  241  	int sample_rate_ms;
a4675fbc4 Rafael J. Wysocki       2016-02-05  242  	s64 sample_rate_ns;
93f0822df Dirk Brandewie          2013-02-06  243  	int deadband;
93f0822df Dirk Brandewie          2013-02-06  244  	int setpoint;
93f0822df Dirk Brandewie          2013-02-06  245  	int p_gain_pct;
93f0822df Dirk Brandewie          2013-02-06  246  	int d_gain_pct;
93f0822df Dirk Brandewie          2013-02-06  247  	int i_gain_pct;
93f0822df Dirk Brandewie          2013-02-06  248  };
93f0822df Dirk Brandewie          2013-02-06  249  
13ad7701f Srinivas Pandruvada     2016-04-03  250  /**
13ad7701f Srinivas Pandruvada     2016-04-03  251   * struct pstate_funcs - Per CPU model specific callbacks
13ad7701f Srinivas Pandruvada     2016-04-03  252   * @get_max:		Callback to get maximum non turbo effective P state
13ad7701f Srinivas Pandruvada     2016-04-03  253   * @get_max_physical:	Callback to get maximum non turbo physical P state
13ad7701f Srinivas Pandruvada     2016-04-03  254   * @get_min:		Callback to get minimum P state
13ad7701f Srinivas Pandruvada     2016-04-03  255   * @get_turbo:		Callback to get turbo P state
13ad7701f Srinivas Pandruvada     2016-04-03  256   * @get_scaling:	Callback to get frequency scaling factor
13ad7701f Srinivas Pandruvada     2016-04-03  257   * @get_val:		Callback to convert P state to actual MSR write value
13ad7701f Srinivas Pandruvada     2016-04-03  258   * @get_vid:		Callback to get VID data for Atom platforms
13ad7701f Srinivas Pandruvada     2016-04-03  259   * @get_target_pstate:	Callback to a function to calculate next P state to use
13ad7701f Srinivas Pandruvada     2016-04-03  260   *
13ad7701f Srinivas Pandruvada     2016-04-03  261   * Core and Atom CPU models have different way to get P State limits. This
13ad7701f Srinivas Pandruvada     2016-04-03  262   * structure is used to store those callbacks.
13ad7701f Srinivas Pandruvada     2016-04-03  263   */
016c81508 Dirk Brandewie          2013-10-21  264  struct pstate_funcs {
016c81508 Dirk Brandewie          2013-10-21  265  	int (*get_max)(void);
3bcc6fa97 Srinivas Pandruvada     2015-10-14  266  	int (*get_max_physical)(void);
016c81508 Dirk Brandewie          2013-10-21  267  	int (*get_min)(void);
016c81508 Dirk Brandewie          2013-10-21  268  	int (*get_turbo)(void);
b27580b05 Dirk Brandewie          2014-10-13  269  	int (*get_scaling)(void);
fdfdb2b13 Rafael J. Wysocki       2016-03-18  270  	u64 (*get_val)(struct cpudata*, int pstate);
007bea098 Dirk Brandewie          2013-12-18  271  	void (*get_vid)(struct cpudata *);
157386b6f Philippe Longepe        2015-12-04  272  	int32_t (*get_target_pstate)(struct cpudata *);
93f0822df Dirk Brandewie          2013-02-06  273  };
93f0822df Dirk Brandewie          2013-02-06  274  
13ad7701f Srinivas Pandruvada     2016-04-03  275  /**
13ad7701f Srinivas Pandruvada     2016-04-03  276   * struct cpu_defaults- Per CPU model default config data
13ad7701f Srinivas Pandruvada     2016-04-03  277   * @pid_policy:	PID config data
13ad7701f Srinivas Pandruvada     2016-04-03  278   * @funcs:		Callback function data
13ad7701f Srinivas Pandruvada     2016-04-03  279   */
016c81508 Dirk Brandewie          2013-10-21  280  struct cpu_defaults {
016c81508 Dirk Brandewie          2013-10-21  281  	struct pstate_adjust_policy pid_policy;
016c81508 Dirk Brandewie          2013-10-21  282  	struct pstate_funcs funcs;
016c81508 Dirk Brandewie          2013-10-21  283  };
016c81508 Dirk Brandewie          2013-10-21  284  
157386b6f Philippe Longepe        2015-12-04  285  static inline int32_t get_target_pstate_use_performance(struct cpudata *cpu);
e70eed2b6 Philippe Longepe        2015-12-04  286  static inline int32_t get_target_pstate_use_cpu_load(struct cpudata *cpu);
157386b6f Philippe Longepe        2015-12-04  287  
4a7cb7a96 Jisheng Zhang           2016-06-27  288  static struct pstate_adjust_policy pid_params __read_mostly;
4a7cb7a96 Jisheng Zhang           2016-06-27  289  static struct pstate_funcs pstate_funcs __read_mostly;
4a7cb7a96 Jisheng Zhang           2016-06-27  290  static int hwp_active __read_mostly;
016c81508 Dirk Brandewie          2013-10-21  291  
9522a2ff9 Srinivas Pandruvada     2016-04-27  292  #ifdef CONFIG_ACPI
9522a2ff9 Srinivas Pandruvada     2016-04-27  293  static bool acpi_ppc;
9522a2ff9 Srinivas Pandruvada     2016-04-27  294  #endif
13ad7701f Srinivas Pandruvada     2016-04-03  295  
13ad7701f Srinivas Pandruvada     2016-04-03  296  /**
13ad7701f Srinivas Pandruvada     2016-04-03  297   * struct perf_limits - Store user and policy limits
13ad7701f Srinivas Pandruvada     2016-04-03  298   * @no_turbo:		User requested turbo state from intel_pstate sysfs
13ad7701f Srinivas Pandruvada     2016-04-03  299   * @turbo_disabled:	Platform turbo status either from msr
13ad7701f Srinivas Pandruvada     2016-04-03  300   *			MSR_IA32_MISC_ENABLE or when maximum available pstate
13ad7701f Srinivas Pandruvada     2016-04-03  301   *			matches the maximum turbo pstate
13ad7701f Srinivas Pandruvada     2016-04-03  302   * @max_perf_pct:	Effective maximum performance limit in percentage, this
13ad7701f Srinivas Pandruvada     2016-04-03  303   *			is minimum of either limits enforced by cpufreq policy
13ad7701f Srinivas Pandruvada     2016-04-03  304   *			or limits from user set limits via intel_pstate sysfs
13ad7701f Srinivas Pandruvada     2016-04-03  305   * @min_perf_pct:	Effective minimum performance limit in percentage, this
13ad7701f Srinivas Pandruvada     2016-04-03  306   *			is maximum of either limits enforced by cpufreq policy
13ad7701f Srinivas Pandruvada     2016-04-03  307   *			or limits from user set limits via intel_pstate sysfs
13ad7701f Srinivas Pandruvada     2016-04-03  308   * @max_perf:		This is a scaled value between 0 to 255 for max_perf_pct
13ad7701f Srinivas Pandruvada     2016-04-03  309   *			This value is used to limit max pstate
13ad7701f Srinivas Pandruvada     2016-04-03  310   * @min_perf:		This is a scaled value between 0 to 255 for min_perf_pct
13ad7701f Srinivas Pandruvada     2016-04-03  311   *			This value is used to limit min pstate
13ad7701f Srinivas Pandruvada     2016-04-03  312   * @max_policy_pct:	The maximum performance in percentage enforced by
13ad7701f Srinivas Pandruvada     2016-04-03  313   *			cpufreq setpolicy interface
13ad7701f Srinivas Pandruvada     2016-04-03  314   * @max_sysfs_pct:	The maximum performance in percentage enforced by
13ad7701f Srinivas Pandruvada     2016-04-03  315   *			intel pstate sysfs interface
13ad7701f Srinivas Pandruvada     2016-04-03  316   * @min_policy_pct:	The minimum performance in percentage enforced by
13ad7701f Srinivas Pandruvada     2016-04-03  317   *			cpufreq setpolicy interface
13ad7701f Srinivas Pandruvada     2016-04-03  318   * @min_sysfs_pct:	The minimum performance in percentage enforced by
13ad7701f Srinivas Pandruvada     2016-04-03  319   *			intel pstate sysfs interface
13ad7701f Srinivas Pandruvada     2016-04-03  320   *
13ad7701f Srinivas Pandruvada     2016-04-03  321   * Storage for user and policy defined limits.
13ad7701f Srinivas Pandruvada     2016-04-03  322   */
93f0822df Dirk Brandewie          2013-02-06  323  struct perf_limits {
93f0822df Dirk Brandewie          2013-02-06  324  	int no_turbo;
dd5fbf70f Dirk Brandewie          2014-06-20  325  	int turbo_disabled;
93f0822df Dirk Brandewie          2013-02-06  326  	int max_perf_pct;
93f0822df Dirk Brandewie          2013-02-06  327  	int min_perf_pct;
93f0822df Dirk Brandewie          2013-02-06  328  	int32_t max_perf;
93f0822df Dirk Brandewie          2013-02-06  329  	int32_t min_perf;
d8f469e9c Dirk Brandewie          2013-05-07  330  	int max_policy_pct;
d8f469e9c Dirk Brandewie          2013-05-07  331  	int max_sysfs_pct;
a04759924 Kristen Carlson Accardi 2015-01-29  332  	int min_policy_pct;
a04759924 Kristen Carlson Accardi 2015-01-29  333  	int min_sysfs_pct;
93f0822df Dirk Brandewie          2013-02-06  334  };
93f0822df Dirk Brandewie          2013-02-06  335  
51443fbf3 Prarit Bhargava         2015-10-15  336  static struct perf_limits performance_limits = {
51443fbf3 Prarit Bhargava         2015-10-15  337  	.no_turbo = 0,
51443fbf3 Prarit Bhargava         2015-10-15  338  	.turbo_disabled = 0,
51443fbf3 Prarit Bhargava         2015-10-15  339  	.max_perf_pct = 100,
51443fbf3 Prarit Bhargava         2015-10-15  340  	.max_perf = int_tofp(1),
51443fbf3 Prarit Bhargava         2015-10-15  341  	.min_perf_pct = 100,
51443fbf3 Prarit Bhargava         2015-10-15  342  	.min_perf = int_tofp(1),
51443fbf3 Prarit Bhargava         2015-10-15  343  	.max_policy_pct = 100,
51443fbf3 Prarit Bhargava         2015-10-15  344  	.max_sysfs_pct = 100,
51443fbf3 Prarit Bhargava         2015-10-15  345  	.min_policy_pct = 0,
51443fbf3 Prarit Bhargava         2015-10-15  346  	.min_sysfs_pct = 0,
51443fbf3 Prarit Bhargava         2015-10-15  347  };
51443fbf3 Prarit Bhargava         2015-10-15  348  
51443fbf3 Prarit Bhargava         2015-10-15  349  static struct perf_limits powersave_limits = {
93f0822df Dirk Brandewie          2013-02-06  350  	.no_turbo = 0,
4521e1a0c Gabriele Mazzotta       2014-10-13  351  	.turbo_disabled = 0,
93f0822df Dirk Brandewie          2013-02-06  352  	.max_perf_pct = 100,
93f0822df Dirk Brandewie          2013-02-06  353  	.max_perf = int_tofp(1),
93f0822df Dirk Brandewie          2013-02-06  354  	.min_perf_pct = 0,
93f0822df Dirk Brandewie          2013-02-06  355  	.min_perf = 0,
d8f469e9c Dirk Brandewie          2013-05-07  356  	.max_policy_pct = 100,
d8f469e9c Dirk Brandewie          2013-05-07  357  	.max_sysfs_pct = 100,
a04759924 Kristen Carlson Accardi 2015-01-29  358  	.min_policy_pct = 0,
a04759924 Kristen Carlson Accardi 2015-01-29  359  	.min_sysfs_pct = 0,
93f0822df Dirk Brandewie          2013-02-06  360  };
93f0822df Dirk Brandewie          2013-02-06  361  
51443fbf3 Prarit Bhargava         2015-10-15  362  #ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
51443fbf3 Prarit Bhargava         2015-10-15  363  static struct perf_limits *limits = &performance_limits;
51443fbf3 Prarit Bhargava         2015-10-15  364  #else
51443fbf3 Prarit Bhargava         2015-10-15  365  static struct perf_limits *limits = &powersave_limits;
51443fbf3 Prarit Bhargava         2015-10-15  366  #endif
51443fbf3 Prarit Bhargava         2015-10-15  367  
9522a2ff9 Srinivas Pandruvada     2016-04-27  368  #ifdef CONFIG_ACPI
cc2eccd40 Srinivas Pandruvada     2016-09-01  369  static cpumask_t cppc_rd_cpu_mask;
cc2eccd40 Srinivas Pandruvada     2016-09-01  370  
cc2eccd40 Srinivas Pandruvada     2016-09-01  371  /* Call set_sched_itmt from a work function to be able to use hotplug locks */
cc2eccd40 Srinivas Pandruvada     2016-09-01  372  static void intel_pstste_sched_itmt_work_fn(struct work_struct *work)
cc2eccd40 Srinivas Pandruvada     2016-09-01  373  {
cc2eccd40 Srinivas Pandruvada     2016-09-01  374  	set_sched_itmt(true);
cc2eccd40 Srinivas Pandruvada     2016-09-01  375  }
cc2eccd40 Srinivas Pandruvada     2016-09-01  376  
cc2eccd40 Srinivas Pandruvada     2016-09-01  377  static DECLARE_WORK(sched_itmt_work, intel_pstste_sched_itmt_work_fn);
2b3ec7650 Srinivas Pandruvada     2016-04-27  378  
2b3ec7650 Srinivas Pandruvada     2016-04-27  379  static bool intel_pstate_get_ppc_enable_status(void)
2b3ec7650 Srinivas Pandruvada     2016-04-27  380  {
2b3ec7650 Srinivas Pandruvada     2016-04-27  381  	if (acpi_gbl_FADT.preferred_profile == PM_ENTERPRISE_SERVER ||
2b3ec7650 Srinivas Pandruvada     2016-04-27  382  	    acpi_gbl_FADT.preferred_profile == PM_PERFORMANCE_SERVER)
2b3ec7650 Srinivas Pandruvada     2016-04-27  383  		return true;
2b3ec7650 Srinivas Pandruvada     2016-04-27  384  
2b3ec7650 Srinivas Pandruvada     2016-04-27  385  	return acpi_ppc;
2b3ec7650 Srinivas Pandruvada     2016-04-27  386  }
2b3ec7650 Srinivas Pandruvada     2016-04-27  387  
9522a2ff9 Srinivas Pandruvada     2016-04-27  388  static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy *policy)
9522a2ff9 Srinivas Pandruvada     2016-04-27  389  {
9522a2ff9 Srinivas Pandruvada     2016-04-27  390  	struct cpudata *cpu;
9522a2ff9 Srinivas Pandruvada     2016-04-27  391  	int ret;
9522a2ff9 Srinivas Pandruvada     2016-04-27  392  	int i;
9522a2ff9 Srinivas Pandruvada     2016-04-27  393  
cc2eccd40 Srinivas Pandruvada     2016-09-01  394  	cpu = all_cpu_data[policy->cpu];
cc2eccd40 Srinivas Pandruvada     2016-09-01  395  
cc2eccd40 Srinivas Pandruvada     2016-09-01  396  	if (hwp_active) {
cc2eccd40 Srinivas Pandruvada     2016-09-01  397  		struct cppc_perf_caps *perf_caps;
cc2eccd40 Srinivas Pandruvada     2016-09-01  398  
cc2eccd40 Srinivas Pandruvada     2016-09-01 @399  		cpu->cppc_data = kzalloc(sizeof(struct cppc_cpudata),
cc2eccd40 Srinivas Pandruvada     2016-09-01  400  					 GFP_KERNEL);
cc2eccd40 Srinivas Pandruvada     2016-09-01  401  		if (!cpu->cppc_data)
e59a8f7ff Srinivas Pandruvada     2016-05-04  402  			return;

:::::: The code at line 202 was first introduced by commit
:::::: 93f0822dff5dae2f0a2645f16300c14af41ca777 cpufreq/x86: Add P-state driver for sandy bridge.

:::::: TO: Dirk Brandewie <dirk.brandewie@gmail.com>
:::::: CC: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 8/8] cpufreq: intel_pstate: Use CPPC to get max performance
@ 2016-09-01 22:31     ` kbuild test robot
  0 siblings, 0 replies; 28+ messages in thread
From: kbuild test robot @ 2016-09-01 22:31 UTC (permalink / raw)
  To: Srinivas Pandruvada
  Cc: kbuild-all, rjw, tglx, mingo, bp, peterz, x86, linux-pm,
	linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

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Hi Srinivas,

[auto build test ERROR on tip/sched/core]
[also build test ERROR on v4.8-rc4 next-20160825]
[cannot apply to tip/x86/core]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
[Suggest to use git(>=2.9.0) format-patch --base=<commit> (or --base=auto for convenience) to record what (public, well-known) commit your patch series was built on]
[Check https://git-scm.com/docs/git-format-patch for more information]

url:    https://github.com/0day-ci/linux/commits/Srinivas-Pandruvada/Support-Intel-Turbo-Boost-Max-Technology-3-0/20160902-053224
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-6 (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All error/warnings (new ones prefixed by >>):

warning: (X86_INTEL_PSTATE && ACPI_CPPC_CPUFREQ) selects ACPI_CPPC_LIB which has unmet direct dependencies (ACPI && ACPI_PROCESSOR && !ACPI_CPU_FREQ_PSS)
>> drivers/cpufreq/intel_pstate.c:202:8: error: redefinition of 'struct cpudata'
    struct cpudata {
           ^~~~~~~
   In file included from drivers/cpufreq/intel_pstate.c:47:0:
   include/acpi/cppc_acpi.h:117:8: note: originally defined here
    struct cpudata {
           ^~~~~~~
   drivers/cpufreq/intel_pstate.c: In function 'intel_pstate_init_acpi_perf_limits':
>> drivers/cpufreq/intel_pstate.c:399:35: error: invalid application of 'sizeof' to incomplete type 'struct cppc_cpudata'
      cpu->cppc_data = kzalloc(sizeof(struct cppc_cpudata),
                                      ^~~~~~
>> drivers/cpufreq/intel_pstate.c:404:30: error: dereferencing pointer to incomplete type 'struct cppc_cpudata'
      perf_caps = &cpu->cppc_data->perf_caps;
                                 ^~

vim +202 drivers/cpufreq/intel_pstate.c

938d21a2a Philippe Longepe        2015-11-09   41  #define ATOM_VIDS		0x66b
938d21a2a Philippe Longepe        2015-11-09   42  #define ATOM_TURBO_RATIOS	0x66c
938d21a2a Philippe Longepe        2015-11-09   43  #define ATOM_TURBO_VIDS		0x66d
61d8d2abc Dirk Brandewie          2014-02-12   44  
9522a2ff9 Srinivas Pandruvada     2016-04-27   45  #ifdef CONFIG_ACPI
9522a2ff9 Srinivas Pandruvada     2016-04-27   46  #include <acpi/processor.h>
cc2eccd40 Srinivas Pandruvada     2016-09-01  @47  #include <acpi/cppc_acpi.h>
9522a2ff9 Srinivas Pandruvada     2016-04-27   48  #endif
9522a2ff9 Srinivas Pandruvada     2016-04-27   49  
f0fe3cd7e Dirk Brandewie          2014-05-29   50  #define FRAC_BITS 8
93f0822df Dirk Brandewie          2013-02-06   51  #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
93f0822df Dirk Brandewie          2013-02-06   52  #define fp_toint(X) ((X) >> FRAC_BITS)
f0fe3cd7e Dirk Brandewie          2014-05-29   53  
a1c9787dc Rafael J. Wysocki       2016-05-11   54  #define EXT_BITS 6
a1c9787dc Rafael J. Wysocki       2016-05-11   55  #define EXT_FRAC_BITS (EXT_BITS + FRAC_BITS)
a1c9787dc Rafael J. Wysocki       2016-05-11   56  
93f0822df Dirk Brandewie          2013-02-06   57  static inline int32_t mul_fp(int32_t x, int32_t y)
93f0822df Dirk Brandewie          2013-02-06   58  {
93f0822df Dirk Brandewie          2013-02-06   59  	return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
93f0822df Dirk Brandewie          2013-02-06   60  }
93f0822df Dirk Brandewie          2013-02-06   61  
7180dddf7 Prarit Bhargava         2015-06-15   62  static inline int32_t div_fp(s64 x, s64 y)
93f0822df Dirk Brandewie          2013-02-06   63  {
7180dddf7 Prarit Bhargava         2015-06-15   64  	return div64_s64((int64_t)x << FRAC_BITS, y);
93f0822df Dirk Brandewie          2013-02-06   65  }
93f0822df Dirk Brandewie          2013-02-06   66  
d022a65ed Dirk Brandewie          2014-10-13   67  static inline int ceiling_fp(int32_t x)
d022a65ed Dirk Brandewie          2014-10-13   68  {
d022a65ed Dirk Brandewie          2014-10-13   69  	int mask, ret;
d022a65ed Dirk Brandewie          2014-10-13   70  
d022a65ed Dirk Brandewie          2014-10-13   71  	ret = fp_toint(x);
d022a65ed Dirk Brandewie          2014-10-13   72  	mask = (1 << FRAC_BITS) - 1;
d022a65ed Dirk Brandewie          2014-10-13   73  	if (x & mask)
d022a65ed Dirk Brandewie          2014-10-13   74  		ret += 1;
d022a65ed Dirk Brandewie          2014-10-13   75  	return ret;
d022a65ed Dirk Brandewie          2014-10-13   76  }
d022a65ed Dirk Brandewie          2014-10-13   77  
a1c9787dc Rafael J. Wysocki       2016-05-11   78  static inline u64 mul_ext_fp(u64 x, u64 y)
a1c9787dc Rafael J. Wysocki       2016-05-11   79  {
a1c9787dc Rafael J. Wysocki       2016-05-11   80  	return (x * y) >> EXT_FRAC_BITS;
a1c9787dc Rafael J. Wysocki       2016-05-11   81  }
a1c9787dc Rafael J. Wysocki       2016-05-11   82  
a1c9787dc Rafael J. Wysocki       2016-05-11   83  static inline u64 div_ext_fp(u64 x, u64 y)
a1c9787dc Rafael J. Wysocki       2016-05-11   84  {
a1c9787dc Rafael J. Wysocki       2016-05-11   85  	return div64_u64(x << EXT_FRAC_BITS, y);
a1c9787dc Rafael J. Wysocki       2016-05-11   86  }
a1c9787dc Rafael J. Wysocki       2016-05-11   87  
13ad7701f Srinivas Pandruvada     2016-04-03   88  /**
13ad7701f Srinivas Pandruvada     2016-04-03   89   * struct sample -	Store performance sample
a1c9787dc Rafael J. Wysocki       2016-05-11   90   * @core_avg_perf:	Ratio of APERF/MPERF which is the actual average
13ad7701f Srinivas Pandruvada     2016-04-03   91   *			performance during last sample period
13ad7701f Srinivas Pandruvada     2016-04-03   92   * @busy_scaled:	Scaled busy value which is used to calculate next
a1c9787dc Rafael J. Wysocki       2016-05-11   93   *			P state. This can be different than core_avg_perf
13ad7701f Srinivas Pandruvada     2016-04-03   94   *			to account for cpu idle period
13ad7701f Srinivas Pandruvada     2016-04-03   95   * @aperf:		Difference of actual performance frequency clock count
13ad7701f Srinivas Pandruvada     2016-04-03   96   *			read from APERF MSR between last and current sample
13ad7701f Srinivas Pandruvada     2016-04-03   97   * @mperf:		Difference of maximum performance frequency clock count
13ad7701f Srinivas Pandruvada     2016-04-03   98   *			read from MPERF MSR between last and current sample
13ad7701f Srinivas Pandruvada     2016-04-03   99   * @tsc:		Difference of time stamp counter between last and
13ad7701f Srinivas Pandruvada     2016-04-03  100   *			current sample
13ad7701f Srinivas Pandruvada     2016-04-03  101   * @time:		Current time from scheduler
13ad7701f Srinivas Pandruvada     2016-04-03  102   *
13ad7701f Srinivas Pandruvada     2016-04-03  103   * This structure is used in the cpudata structure to store performance sample
13ad7701f Srinivas Pandruvada     2016-04-03  104   * data for choosing next P State.
13ad7701f Srinivas Pandruvada     2016-04-03  105   */
93f0822df Dirk Brandewie          2013-02-06  106  struct sample {
a1c9787dc Rafael J. Wysocki       2016-05-11  107  	int32_t core_avg_perf;
157386b6f Philippe Longepe        2015-12-04  108  	int32_t busy_scaled;
93f0822df Dirk Brandewie          2013-02-06  109  	u64 aperf;
93f0822df Dirk Brandewie          2013-02-06  110  	u64 mperf;
4055fad34 Doug Smythies           2015-04-11  111  	u64 tsc;
a4675fbc4 Rafael J. Wysocki       2016-02-05  112  	u64 time;
93f0822df Dirk Brandewie          2013-02-06  113  };
93f0822df Dirk Brandewie          2013-02-06  114  
13ad7701f Srinivas Pandruvada     2016-04-03  115  /**
13ad7701f Srinivas Pandruvada     2016-04-03  116   * struct pstate_data - Store P state data
13ad7701f Srinivas Pandruvada     2016-04-03  117   * @current_pstate:	Current requested P state
13ad7701f Srinivas Pandruvada     2016-04-03  118   * @min_pstate:		Min P state possible for this platform
13ad7701f Srinivas Pandruvada     2016-04-03  119   * @max_pstate:		Max P state possible for this platform
13ad7701f Srinivas Pandruvada     2016-04-03  120   * @max_pstate_physical:This is physical Max P state for a processor
13ad7701f Srinivas Pandruvada     2016-04-03  121   *			This can be higher than the max_pstate which can
13ad7701f Srinivas Pandruvada     2016-04-03  122   *			be limited by platform thermal design power limits
13ad7701f Srinivas Pandruvada     2016-04-03  123   * @scaling:		Scaling factor to  convert frequency to cpufreq
13ad7701f Srinivas Pandruvada     2016-04-03  124   *			frequency units
13ad7701f Srinivas Pandruvada     2016-04-03  125   * @turbo_pstate:	Max Turbo P state possible for this platform
13ad7701f Srinivas Pandruvada     2016-04-03  126   *
13ad7701f Srinivas Pandruvada     2016-04-03  127   * Stores the per cpu model P state limits and current P state.
13ad7701f Srinivas Pandruvada     2016-04-03  128   */
93f0822df Dirk Brandewie          2013-02-06  129  struct pstate_data {
93f0822df Dirk Brandewie          2013-02-06  130  	int	current_pstate;
93f0822df Dirk Brandewie          2013-02-06  131  	int	min_pstate;
93f0822df Dirk Brandewie          2013-02-06  132  	int	max_pstate;
3bcc6fa97 Srinivas Pandruvada     2015-10-14  133  	int	max_pstate_physical;
b27580b05 Dirk Brandewie          2014-10-13  134  	int	scaling;
93f0822df Dirk Brandewie          2013-02-06  135  	int	turbo_pstate;
93f0822df Dirk Brandewie          2013-02-06  136  };
93f0822df Dirk Brandewie          2013-02-06  137  
13ad7701f Srinivas Pandruvada     2016-04-03  138  /**
13ad7701f Srinivas Pandruvada     2016-04-03  139   * struct vid_data -	Stores voltage information data
13ad7701f Srinivas Pandruvada     2016-04-03  140   * @min:		VID data for this platform corresponding to
13ad7701f Srinivas Pandruvada     2016-04-03  141   *			the lowest P state
13ad7701f Srinivas Pandruvada     2016-04-03  142   * @max:		VID data corresponding to the highest P State.
13ad7701f Srinivas Pandruvada     2016-04-03  143   * @turbo:		VID data for turbo P state
13ad7701f Srinivas Pandruvada     2016-04-03  144   * @ratio:		Ratio of (vid max - vid min) /
13ad7701f Srinivas Pandruvada     2016-04-03  145   *			(max P state - Min P State)
13ad7701f Srinivas Pandruvada     2016-04-03  146   *
13ad7701f Srinivas Pandruvada     2016-04-03  147   * Stores the voltage data for DVFS (Dynamic Voltage and Frequency Scaling)
13ad7701f Srinivas Pandruvada     2016-04-03  148   * This data is used in Atom platforms, where in addition to target P state,
13ad7701f Srinivas Pandruvada     2016-04-03  149   * the voltage data needs to be specified to select next P State.
13ad7701f Srinivas Pandruvada     2016-04-03  150   */
007bea098 Dirk Brandewie          2013-12-18  151  struct vid_data {
21855ff5b Dirk Brandewie          2014-05-08  152  	int min;
21855ff5b Dirk Brandewie          2014-05-08  153  	int max;
21855ff5b Dirk Brandewie          2014-05-08  154  	int turbo;
007bea098 Dirk Brandewie          2013-12-18  155  	int32_t ratio;
007bea098 Dirk Brandewie          2013-12-18  156  };
007bea098 Dirk Brandewie          2013-12-18  157  
13ad7701f Srinivas Pandruvada     2016-04-03  158  /**
13ad7701f Srinivas Pandruvada     2016-04-03  159   * struct _pid -	Stores PID data
13ad7701f Srinivas Pandruvada     2016-04-03  160   * @setpoint:		Target set point for busyness or performance
13ad7701f Srinivas Pandruvada     2016-04-03  161   * @integral:		Storage for accumulated error values
13ad7701f Srinivas Pandruvada     2016-04-03  162   * @p_gain:		PID proportional gain
13ad7701f Srinivas Pandruvada     2016-04-03  163   * @i_gain:		PID integral gain
13ad7701f Srinivas Pandruvada     2016-04-03  164   * @d_gain:		PID derivative gain
13ad7701f Srinivas Pandruvada     2016-04-03  165   * @deadband:		PID deadband
13ad7701f Srinivas Pandruvada     2016-04-03  166   * @last_err:		Last error storage for integral part of PID calculation
13ad7701f Srinivas Pandruvada     2016-04-03  167   *
13ad7701f Srinivas Pandruvada     2016-04-03  168   * Stores PID coefficients and last error for PID controller.
13ad7701f Srinivas Pandruvada     2016-04-03  169   */
93f0822df Dirk Brandewie          2013-02-06  170  struct _pid {
93f0822df Dirk Brandewie          2013-02-06  171  	int setpoint;
93f0822df Dirk Brandewie          2013-02-06  172  	int32_t integral;
93f0822df Dirk Brandewie          2013-02-06  173  	int32_t p_gain;
93f0822df Dirk Brandewie          2013-02-06  174  	int32_t i_gain;
93f0822df Dirk Brandewie          2013-02-06  175  	int32_t d_gain;
93f0822df Dirk Brandewie          2013-02-06  176  	int deadband;
d253d2a52 Brennan Shacklett       2013-10-21  177  	int32_t last_err;
93f0822df Dirk Brandewie          2013-02-06  178  };
93f0822df Dirk Brandewie          2013-02-06  179  
13ad7701f Srinivas Pandruvada     2016-04-03  180  /**
13ad7701f Srinivas Pandruvada     2016-04-03  181   * struct cpudata -	Per CPU instance data storage
13ad7701f Srinivas Pandruvada     2016-04-03  182   * @cpu:		CPU number for this instance data
13ad7701f Srinivas Pandruvada     2016-04-03  183   * @update_util:	CPUFreq utility callback information
4578ee7e1 Chen Yu                 2016-05-11  184   * @update_util_set:	CPUFreq utility callback is set
13ad7701f Srinivas Pandruvada     2016-04-03  185   * @pstate:		Stores P state limits for this CPU
13ad7701f Srinivas Pandruvada     2016-04-03  186   * @vid:		Stores VID limits for this CPU
13ad7701f Srinivas Pandruvada     2016-04-03  187   * @pid:		Stores PID parameters for this CPU
13ad7701f Srinivas Pandruvada     2016-04-03  188   * @last_sample_time:	Last Sample time
13ad7701f Srinivas Pandruvada     2016-04-03  189   * @prev_aperf:		Last APERF value read from APERF MSR
13ad7701f Srinivas Pandruvada     2016-04-03  190   * @prev_mperf:		Last MPERF value read from MPERF MSR
13ad7701f Srinivas Pandruvada     2016-04-03  191   * @prev_tsc:		Last timestamp counter (TSC) value
13ad7701f Srinivas Pandruvada     2016-04-03  192   * @prev_cummulative_iowait: IO Wait time difference from last and
13ad7701f Srinivas Pandruvada     2016-04-03  193   *			current sample
13ad7701f Srinivas Pandruvada     2016-04-03  194   * @sample:		Storage for storing last Sample data
9522a2ff9 Srinivas Pandruvada     2016-04-27  195   * @acpi_perf_data:	Stores ACPI perf information read from _PSS
9522a2ff9 Srinivas Pandruvada     2016-04-27  196   * @valid_pss_table:	Set to true for valid ACPI _PSS entries found
cc2eccd40 Srinivas Pandruvada     2016-09-01  197   * @cppc_data:		Stores CPPC information for HWP capable CPUs
cc2eccd40 Srinivas Pandruvada     2016-09-01  198   * @valid_cppc_table:	Set to true for valid CPPC entries are found
13ad7701f Srinivas Pandruvada     2016-04-03  199   *
13ad7701f Srinivas Pandruvada     2016-04-03  200   * This structure stores per CPU instance data for all CPUs.
13ad7701f Srinivas Pandruvada     2016-04-03  201   */
93f0822df Dirk Brandewie          2013-02-06 @202  struct cpudata {
93f0822df Dirk Brandewie          2013-02-06  203  	int cpu;
93f0822df Dirk Brandewie          2013-02-06  204  
a4675fbc4 Rafael J. Wysocki       2016-02-05  205  	struct update_util_data update_util;
4578ee7e1 Chen Yu                 2016-05-11  206  	bool   update_util_set;
93f0822df Dirk Brandewie          2013-02-06  207  
93f0822df Dirk Brandewie          2013-02-06  208  	struct pstate_data pstate;
007bea098 Dirk Brandewie          2013-12-18  209  	struct vid_data vid;
93f0822df Dirk Brandewie          2013-02-06  210  	struct _pid pid;
93f0822df Dirk Brandewie          2013-02-06  211  
a4675fbc4 Rafael J. Wysocki       2016-02-05  212  	u64	last_sample_time;
93f0822df Dirk Brandewie          2013-02-06  213  	u64	prev_aperf;
93f0822df Dirk Brandewie          2013-02-06  214  	u64	prev_mperf;
4055fad34 Doug Smythies           2015-04-11  215  	u64	prev_tsc;
63d1d656a Philippe Longepe        2015-12-04  216  	u64	prev_cummulative_iowait;
d37e2b764 Dirk Brandewie          2014-02-12  217  	struct sample sample;
9522a2ff9 Srinivas Pandruvada     2016-04-27  218  #ifdef CONFIG_ACPI
9522a2ff9 Srinivas Pandruvada     2016-04-27  219  	struct acpi_processor_performance acpi_perf_data;
9522a2ff9 Srinivas Pandruvada     2016-04-27  220  	bool valid_pss_table;
cc2eccd40 Srinivas Pandruvada     2016-09-01  221  	struct cppc_cpudata *cppc_data;
cc2eccd40 Srinivas Pandruvada     2016-09-01  222  	bool valid_cppc_table;
9522a2ff9 Srinivas Pandruvada     2016-04-27  223  #endif
93f0822df Dirk Brandewie          2013-02-06  224  };
93f0822df Dirk Brandewie          2013-02-06  225  
93f0822df Dirk Brandewie          2013-02-06  226  static struct cpudata **all_cpu_data;
13ad7701f Srinivas Pandruvada     2016-04-03  227  
13ad7701f Srinivas Pandruvada     2016-04-03  228  /**
13ad7701f Srinivas Pandruvada     2016-04-03  229   * struct pid_adjust_policy - Stores static PID configuration data
13ad7701f Srinivas Pandruvada     2016-04-03  230   * @sample_rate_ms:	PID calculation sample rate in ms
13ad7701f Srinivas Pandruvada     2016-04-03  231   * @sample_rate_ns:	Sample rate calculation in ns
13ad7701f Srinivas Pandruvada     2016-04-03  232   * @deadband:		PID deadband
13ad7701f Srinivas Pandruvada     2016-04-03  233   * @setpoint:		PID Setpoint
13ad7701f Srinivas Pandruvada     2016-04-03  234   * @p_gain_pct:		PID proportional gain
13ad7701f Srinivas Pandruvada     2016-04-03  235   * @i_gain_pct:		PID integral gain
13ad7701f Srinivas Pandruvada     2016-04-03  236   * @d_gain_pct:		PID derivative gain
13ad7701f Srinivas Pandruvada     2016-04-03  237   *
13ad7701f Srinivas Pandruvada     2016-04-03  238   * Stores per CPU model static PID configuration data.
13ad7701f Srinivas Pandruvada     2016-04-03  239   */
93f0822df Dirk Brandewie          2013-02-06  240  struct pstate_adjust_policy {
93f0822df Dirk Brandewie          2013-02-06  241  	int sample_rate_ms;
a4675fbc4 Rafael J. Wysocki       2016-02-05  242  	s64 sample_rate_ns;
93f0822df Dirk Brandewie          2013-02-06  243  	int deadband;
93f0822df Dirk Brandewie          2013-02-06  244  	int setpoint;
93f0822df Dirk Brandewie          2013-02-06  245  	int p_gain_pct;
93f0822df Dirk Brandewie          2013-02-06  246  	int d_gain_pct;
93f0822df Dirk Brandewie          2013-02-06  247  	int i_gain_pct;
93f0822df Dirk Brandewie          2013-02-06  248  };
93f0822df Dirk Brandewie          2013-02-06  249  
13ad7701f Srinivas Pandruvada     2016-04-03  250  /**
13ad7701f Srinivas Pandruvada     2016-04-03  251   * struct pstate_funcs - Per CPU model specific callbacks
13ad7701f Srinivas Pandruvada     2016-04-03  252   * @get_max:		Callback to get maximum non turbo effective P state
13ad7701f Srinivas Pandruvada     2016-04-03  253   * @get_max_physical:	Callback to get maximum non turbo physical P state
13ad7701f Srinivas Pandruvada     2016-04-03  254   * @get_min:		Callback to get minimum P state
13ad7701f Srinivas Pandruvada     2016-04-03  255   * @get_turbo:		Callback to get turbo P state
13ad7701f Srinivas Pandruvada     2016-04-03  256   * @get_scaling:	Callback to get frequency scaling factor
13ad7701f Srinivas Pandruvada     2016-04-03  257   * @get_val:		Callback to convert P state to actual MSR write value
13ad7701f Srinivas Pandruvada     2016-04-03  258   * @get_vid:		Callback to get VID data for Atom platforms
13ad7701f Srinivas Pandruvada     2016-04-03  259   * @get_target_pstate:	Callback to a function to calculate next P state to use
13ad7701f Srinivas Pandruvada     2016-04-03  260   *
13ad7701f Srinivas Pandruvada     2016-04-03  261   * Core and Atom CPU models have different way to get P State limits. This
13ad7701f Srinivas Pandruvada     2016-04-03  262   * structure is used to store those callbacks.
13ad7701f Srinivas Pandruvada     2016-04-03  263   */
016c81508 Dirk Brandewie          2013-10-21  264  struct pstate_funcs {
016c81508 Dirk Brandewie          2013-10-21  265  	int (*get_max)(void);
3bcc6fa97 Srinivas Pandruvada     2015-10-14  266  	int (*get_max_physical)(void);
016c81508 Dirk Brandewie          2013-10-21  267  	int (*get_min)(void);
016c81508 Dirk Brandewie          2013-10-21  268  	int (*get_turbo)(void);
b27580b05 Dirk Brandewie          2014-10-13  269  	int (*get_scaling)(void);
fdfdb2b13 Rafael J. Wysocki       2016-03-18  270  	u64 (*get_val)(struct cpudata*, int pstate);
007bea098 Dirk Brandewie          2013-12-18  271  	void (*get_vid)(struct cpudata *);
157386b6f Philippe Longepe        2015-12-04  272  	int32_t (*get_target_pstate)(struct cpudata *);
93f0822df Dirk Brandewie          2013-02-06  273  };
93f0822df Dirk Brandewie          2013-02-06  274  
13ad7701f Srinivas Pandruvada     2016-04-03  275  /**
13ad7701f Srinivas Pandruvada     2016-04-03  276   * struct cpu_defaults- Per CPU model default config data
13ad7701f Srinivas Pandruvada     2016-04-03  277   * @pid_policy:	PID config data
13ad7701f Srinivas Pandruvada     2016-04-03  278   * @funcs:		Callback function data
13ad7701f Srinivas Pandruvada     2016-04-03  279   */
016c81508 Dirk Brandewie          2013-10-21  280  struct cpu_defaults {
016c81508 Dirk Brandewie          2013-10-21  281  	struct pstate_adjust_policy pid_policy;
016c81508 Dirk Brandewie          2013-10-21  282  	struct pstate_funcs funcs;
016c81508 Dirk Brandewie          2013-10-21  283  };
016c81508 Dirk Brandewie          2013-10-21  284  
157386b6f Philippe Longepe        2015-12-04  285  static inline int32_t get_target_pstate_use_performance(struct cpudata *cpu);
e70eed2b6 Philippe Longepe        2015-12-04  286  static inline int32_t get_target_pstate_use_cpu_load(struct cpudata *cpu);
157386b6f Philippe Longepe        2015-12-04  287  
4a7cb7a96 Jisheng Zhang           2016-06-27  288  static struct pstate_adjust_policy pid_params __read_mostly;
4a7cb7a96 Jisheng Zhang           2016-06-27  289  static struct pstate_funcs pstate_funcs __read_mostly;
4a7cb7a96 Jisheng Zhang           2016-06-27  290  static int hwp_active __read_mostly;
016c81508 Dirk Brandewie          2013-10-21  291  
9522a2ff9 Srinivas Pandruvada     2016-04-27  292  #ifdef CONFIG_ACPI
9522a2ff9 Srinivas Pandruvada     2016-04-27  293  static bool acpi_ppc;
9522a2ff9 Srinivas Pandruvada     2016-04-27  294  #endif
13ad7701f Srinivas Pandruvada     2016-04-03  295  
13ad7701f Srinivas Pandruvada     2016-04-03  296  /**
13ad7701f Srinivas Pandruvada     2016-04-03  297   * struct perf_limits - Store user and policy limits
13ad7701f Srinivas Pandruvada     2016-04-03  298   * @no_turbo:		User requested turbo state from intel_pstate sysfs
13ad7701f Srinivas Pandruvada     2016-04-03  299   * @turbo_disabled:	Platform turbo status either from msr
13ad7701f Srinivas Pandruvada     2016-04-03  300   *			MSR_IA32_MISC_ENABLE or when maximum available pstate
13ad7701f Srinivas Pandruvada     2016-04-03  301   *			matches the maximum turbo pstate
13ad7701f Srinivas Pandruvada     2016-04-03  302   * @max_perf_pct:	Effective maximum performance limit in percentage, this
13ad7701f Srinivas Pandruvada     2016-04-03  303   *			is minimum of either limits enforced by cpufreq policy
13ad7701f Srinivas Pandruvada     2016-04-03  304   *			or limits from user set limits via intel_pstate sysfs
13ad7701f Srinivas Pandruvada     2016-04-03  305   * @min_perf_pct:	Effective minimum performance limit in percentage, this
13ad7701f Srinivas Pandruvada     2016-04-03  306   *			is maximum of either limits enforced by cpufreq policy
13ad7701f Srinivas Pandruvada     2016-04-03  307   *			or limits from user set limits via intel_pstate sysfs
13ad7701f Srinivas Pandruvada     2016-04-03  308   * @max_perf:		This is a scaled value between 0 to 255 for max_perf_pct
13ad7701f Srinivas Pandruvada     2016-04-03  309   *			This value is used to limit max pstate
13ad7701f Srinivas Pandruvada     2016-04-03  310   * @min_perf:		This is a scaled value between 0 to 255 for min_perf_pct
13ad7701f Srinivas Pandruvada     2016-04-03  311   *			This value is used to limit min pstate
13ad7701f Srinivas Pandruvada     2016-04-03  312   * @max_policy_pct:	The maximum performance in percentage enforced by
13ad7701f Srinivas Pandruvada     2016-04-03  313   *			cpufreq setpolicy interface
13ad7701f Srinivas Pandruvada     2016-04-03  314   * @max_sysfs_pct:	The maximum performance in percentage enforced by
13ad7701f Srinivas Pandruvada     2016-04-03  315   *			intel pstate sysfs interface
13ad7701f Srinivas Pandruvada     2016-04-03  316   * @min_policy_pct:	The minimum performance in percentage enforced by
13ad7701f Srinivas Pandruvada     2016-04-03  317   *			cpufreq setpolicy interface
13ad7701f Srinivas Pandruvada     2016-04-03  318   * @min_sysfs_pct:	The minimum performance in percentage enforced by
13ad7701f Srinivas Pandruvada     2016-04-03  319   *			intel pstate sysfs interface
13ad7701f Srinivas Pandruvada     2016-04-03  320   *
13ad7701f Srinivas Pandruvada     2016-04-03  321   * Storage for user and policy defined limits.
13ad7701f Srinivas Pandruvada     2016-04-03  322   */
93f0822df Dirk Brandewie          2013-02-06  323  struct perf_limits {
93f0822df Dirk Brandewie          2013-02-06  324  	int no_turbo;
dd5fbf70f Dirk Brandewie          2014-06-20  325  	int turbo_disabled;
93f0822df Dirk Brandewie          2013-02-06  326  	int max_perf_pct;
93f0822df Dirk Brandewie          2013-02-06  327  	int min_perf_pct;
93f0822df Dirk Brandewie          2013-02-06  328  	int32_t max_perf;
93f0822df Dirk Brandewie          2013-02-06  329  	int32_t min_perf;
d8f469e9c Dirk Brandewie          2013-05-07  330  	int max_policy_pct;
d8f469e9c Dirk Brandewie          2013-05-07  331  	int max_sysfs_pct;
a04759924 Kristen Carlson Accardi 2015-01-29  332  	int min_policy_pct;
a04759924 Kristen Carlson Accardi 2015-01-29  333  	int min_sysfs_pct;
93f0822df Dirk Brandewie          2013-02-06  334  };
93f0822df Dirk Brandewie          2013-02-06  335  
51443fbf3 Prarit Bhargava         2015-10-15  336  static struct perf_limits performance_limits = {
51443fbf3 Prarit Bhargava         2015-10-15  337  	.no_turbo = 0,
51443fbf3 Prarit Bhargava         2015-10-15  338  	.turbo_disabled = 0,
51443fbf3 Prarit Bhargava         2015-10-15  339  	.max_perf_pct = 100,
51443fbf3 Prarit Bhargava         2015-10-15  340  	.max_perf = int_tofp(1),
51443fbf3 Prarit Bhargava         2015-10-15  341  	.min_perf_pct = 100,
51443fbf3 Prarit Bhargava         2015-10-15  342  	.min_perf = int_tofp(1),
51443fbf3 Prarit Bhargava         2015-10-15  343  	.max_policy_pct = 100,
51443fbf3 Prarit Bhargava         2015-10-15  344  	.max_sysfs_pct = 100,
51443fbf3 Prarit Bhargava         2015-10-15  345  	.min_policy_pct = 0,
51443fbf3 Prarit Bhargava         2015-10-15  346  	.min_sysfs_pct = 0,
51443fbf3 Prarit Bhargava         2015-10-15  347  };
51443fbf3 Prarit Bhargava         2015-10-15  348  
51443fbf3 Prarit Bhargava         2015-10-15  349  static struct perf_limits powersave_limits = {
93f0822df Dirk Brandewie          2013-02-06  350  	.no_turbo = 0,
4521e1a0c Gabriele Mazzotta       2014-10-13  351  	.turbo_disabled = 0,
93f0822df Dirk Brandewie          2013-02-06  352  	.max_perf_pct = 100,
93f0822df Dirk Brandewie          2013-02-06  353  	.max_perf = int_tofp(1),
93f0822df Dirk Brandewie          2013-02-06  354  	.min_perf_pct = 0,
93f0822df Dirk Brandewie          2013-02-06  355  	.min_perf = 0,
d8f469e9c Dirk Brandewie          2013-05-07  356  	.max_policy_pct = 100,
d8f469e9c Dirk Brandewie          2013-05-07  357  	.max_sysfs_pct = 100,
a04759924 Kristen Carlson Accardi 2015-01-29  358  	.min_policy_pct = 0,
a04759924 Kristen Carlson Accardi 2015-01-29  359  	.min_sysfs_pct = 0,
93f0822df Dirk Brandewie          2013-02-06  360  };
93f0822df Dirk Brandewie          2013-02-06  361  
51443fbf3 Prarit Bhargava         2015-10-15  362  #ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
51443fbf3 Prarit Bhargava         2015-10-15  363  static struct perf_limits *limits = &performance_limits;
51443fbf3 Prarit Bhargava         2015-10-15  364  #else
51443fbf3 Prarit Bhargava         2015-10-15  365  static struct perf_limits *limits = &powersave_limits;
51443fbf3 Prarit Bhargava         2015-10-15  366  #endif
51443fbf3 Prarit Bhargava         2015-10-15  367  
9522a2ff9 Srinivas Pandruvada     2016-04-27  368  #ifdef CONFIG_ACPI
cc2eccd40 Srinivas Pandruvada     2016-09-01  369  static cpumask_t cppc_rd_cpu_mask;
cc2eccd40 Srinivas Pandruvada     2016-09-01  370  
cc2eccd40 Srinivas Pandruvada     2016-09-01  371  /* Call set_sched_itmt from a work function to be able to use hotplug locks */
cc2eccd40 Srinivas Pandruvada     2016-09-01  372  static void intel_pstste_sched_itmt_work_fn(struct work_struct *work)
cc2eccd40 Srinivas Pandruvada     2016-09-01  373  {
cc2eccd40 Srinivas Pandruvada     2016-09-01  374  	set_sched_itmt(true);
cc2eccd40 Srinivas Pandruvada     2016-09-01  375  }
cc2eccd40 Srinivas Pandruvada     2016-09-01  376  
cc2eccd40 Srinivas Pandruvada     2016-09-01  377  static DECLARE_WORK(sched_itmt_work, intel_pstste_sched_itmt_work_fn);
2b3ec7650 Srinivas Pandruvada     2016-04-27  378  
2b3ec7650 Srinivas Pandruvada     2016-04-27  379  static bool intel_pstate_get_ppc_enable_status(void)
2b3ec7650 Srinivas Pandruvada     2016-04-27  380  {
2b3ec7650 Srinivas Pandruvada     2016-04-27  381  	if (acpi_gbl_FADT.preferred_profile == PM_ENTERPRISE_SERVER ||
2b3ec7650 Srinivas Pandruvada     2016-04-27  382  	    acpi_gbl_FADT.preferred_profile == PM_PERFORMANCE_SERVER)
2b3ec7650 Srinivas Pandruvada     2016-04-27  383  		return true;
2b3ec7650 Srinivas Pandruvada     2016-04-27  384  
2b3ec7650 Srinivas Pandruvada     2016-04-27  385  	return acpi_ppc;
2b3ec7650 Srinivas Pandruvada     2016-04-27  386  }
2b3ec7650 Srinivas Pandruvada     2016-04-27  387  
9522a2ff9 Srinivas Pandruvada     2016-04-27  388  static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy *policy)
9522a2ff9 Srinivas Pandruvada     2016-04-27  389  {
9522a2ff9 Srinivas Pandruvada     2016-04-27  390  	struct cpudata *cpu;
9522a2ff9 Srinivas Pandruvada     2016-04-27  391  	int ret;
9522a2ff9 Srinivas Pandruvada     2016-04-27  392  	int i;
9522a2ff9 Srinivas Pandruvada     2016-04-27  393  
cc2eccd40 Srinivas Pandruvada     2016-09-01  394  	cpu = all_cpu_data[policy->cpu];
cc2eccd40 Srinivas Pandruvada     2016-09-01  395  
cc2eccd40 Srinivas Pandruvada     2016-09-01  396  	if (hwp_active) {
cc2eccd40 Srinivas Pandruvada     2016-09-01  397  		struct cppc_perf_caps *perf_caps;
cc2eccd40 Srinivas Pandruvada     2016-09-01  398  
cc2eccd40 Srinivas Pandruvada     2016-09-01 @399  		cpu->cppc_data = kzalloc(sizeof(struct cppc_cpudata),
cc2eccd40 Srinivas Pandruvada     2016-09-01  400  					 GFP_KERNEL);
cc2eccd40 Srinivas Pandruvada     2016-09-01  401  		if (!cpu->cppc_data)
e59a8f7ff Srinivas Pandruvada     2016-05-04  402  			return;

:::::: The code at line 202 was first introduced by commit
:::::: 93f0822dff5dae2f0a2645f16300c14af41ca777 cpufreq/x86: Add P-state driver for sandy bridge.

:::::: TO: Dirk Brandewie <dirk.brandewie@gmail.com>
:::::: CC: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/octet-stream, Size: 54768 bytes --]

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 6/8] acpi: bus: Enable HWP CPPC objects
  2016-09-01 20:33 ` [PATCH v2 6/8] acpi: bus: Enable HWP CPPC objects Srinivas Pandruvada
@ 2016-09-01 23:15     ` kbuild test robot
  0 siblings, 0 replies; 28+ messages in thread
From: kbuild test robot @ 2016-09-01 23:15 UTC (permalink / raw)
  Cc: kbuild-all, rjw, tglx, mingo, bp, peterz, x86, linux-pm,
	linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

[-- Attachment #1: Type: text/plain, Size: 2326 bytes --]

Hi Srinivas,

[auto build test ERROR on tip/sched/core]
[also build test ERROR on v4.8-rc4 next-20160825]
[cannot apply to tip/x86/core]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
[Suggest to use git(>=2.9.0) format-patch --base=<commit> (or --base=auto for convenience) to record what (public, well-known) commit your patch series was built on]
[Check https://git-scm.com/docs/git-format-patch for more information]

url:    https://github.com/0day-ci/linux/commits/Srinivas-Pandruvada/Support-Intel-Turbo-Boost-Max-Technology-3-0/20160902-053224
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 5.4.0-6) 5.4.0 20160609
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=arm64 

All errors (new ones prefixed by >>):

   drivers/acpi/bus.c: In function 'acpi_bus_osc_support':
>> drivers/acpi/bus.c:333:32: error: implicit declaration of function 'boot_cpu_has' [-Werror=implicit-function-declaration]
     if (IS_ENABLED(CONFIG_X86) && boot_cpu_has(X86_FEATURE_HWP)) {
                                   ^
>> drivers/acpi/bus.c:333:45: error: 'X86_FEATURE_HWP' undeclared (first use in this function)
     if (IS_ENABLED(CONFIG_X86) && boot_cpu_has(X86_FEATURE_HWP)) {
                                                ^
   drivers/acpi/bus.c:333:45: note: each undeclared identifier is reported only once for each function it appears in
   cc1: some warnings being treated as errors

vim +/boot_cpu_has +333 drivers/acpi/bus.c

   327		if (IS_ENABLED(CONFIG_ACPI_PROCESSOR))
   328			capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PPC_OST_SUPPORT;
   329	
   330		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_HOTPLUG_OST_SUPPORT;
   331		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PCLPI_SUPPORT;
   332	
 > 333		if (IS_ENABLED(CONFIG_X86) && boot_cpu_has(X86_FEATURE_HWP)) {
   334			capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPC_SUPPORT;
   335			capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPCV2_SUPPORT;
   336		}

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/octet-stream, Size: 51350 bytes --]

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 6/8] acpi: bus: Enable HWP CPPC objects
@ 2016-09-01 23:15     ` kbuild test robot
  0 siblings, 0 replies; 28+ messages in thread
From: kbuild test robot @ 2016-09-01 23:15 UTC (permalink / raw)
  To: Srinivas Pandruvada
  Cc: kbuild-all, rjw, tglx, mingo, bp, peterz, x86, linux-pm,
	linux-kernel, linux-acpi, tim.c.chen, Srinivas Pandruvada

[-- Attachment #1: Type: text/plain, Size: 2326 bytes --]

Hi Srinivas,

[auto build test ERROR on tip/sched/core]
[also build test ERROR on v4.8-rc4 next-20160825]
[cannot apply to tip/x86/core]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
[Suggest to use git(>=2.9.0) format-patch --base=<commit> (or --base=auto for convenience) to record what (public, well-known) commit your patch series was built on]
[Check https://git-scm.com/docs/git-format-patch for more information]

url:    https://github.com/0day-ci/linux/commits/Srinivas-Pandruvada/Support-Intel-Turbo-Boost-Max-Technology-3-0/20160902-053224
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 5.4.0-6) 5.4.0 20160609
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=arm64 

All errors (new ones prefixed by >>):

   drivers/acpi/bus.c: In function 'acpi_bus_osc_support':
>> drivers/acpi/bus.c:333:32: error: implicit declaration of function 'boot_cpu_has' [-Werror=implicit-function-declaration]
     if (IS_ENABLED(CONFIG_X86) && boot_cpu_has(X86_FEATURE_HWP)) {
                                   ^
>> drivers/acpi/bus.c:333:45: error: 'X86_FEATURE_HWP' undeclared (first use in this function)
     if (IS_ENABLED(CONFIG_X86) && boot_cpu_has(X86_FEATURE_HWP)) {
                                                ^
   drivers/acpi/bus.c:333:45: note: each undeclared identifier is reported only once for each function it appears in
   cc1: some warnings being treated as errors

vim +/boot_cpu_has +333 drivers/acpi/bus.c

   327		if (IS_ENABLED(CONFIG_ACPI_PROCESSOR))
   328			capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PPC_OST_SUPPORT;
   329	
   330		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_HOTPLUG_OST_SUPPORT;
   331		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PCLPI_SUPPORT;
   332	
 > 333		if (IS_ENABLED(CONFIG_X86) && boot_cpu_has(X86_FEATURE_HWP)) {
   334			capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPC_SUPPORT;
   335			capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPCV2_SUPPORT;
   336		}

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/octet-stream, Size: 51350 bytes --]

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 6/8] acpi: bus: Enable HWP CPPC objects
  2016-09-01 23:15     ` kbuild test robot
  (?)
@ 2016-09-01 23:46     ` Srinivas Pandruvada
  -1 siblings, 0 replies; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-01 23:46 UTC (permalink / raw)
  To: kbuild test robot
  Cc: kbuild-all, rjw, tglx, mingo, bp, peterz, x86, linux-pm,
	linux-kernel, linux-acpi, tim.c.chen

On Fri, 2016-09-02 at 07:15 +0800, kbuild test robot wrote:
> Hi Srinivas,
> 
> [auto build test ERROR on tip/sched/core]
> [also build test ERROR on v4.8-rc4 next-20160825]
> [cannot apply to tip/x86/core]
> [if your patch is applied to the wrong git tree, please drop us a
> note to help improve the system]
> [Suggest to use git(>=2.9.0) format-patch --base=<commit> (or --
> base=auto for convenience) to record what (public, well-known) commit
> your patch series was built on]
> [Check https://git-scm.com/docs/git-format-patch for more
> information]
> 
> url:    https://github.com/0day-ci/linux/commits/Srinivas-Pandruvada/
> Support-Intel-Turbo-Boost-Max-Technology-3-0/20160902-053224
> config: arm64-allmodconfig (attached as .config)
> compiler: aarch64-linux-gnu-gcc (Debian 5.4.0-6) 5.4.0 20160609
> reproduce:
>         wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tes
> ts.git/plain/sbin/make.cross -O ~/bin/make.cross
>         chmod +x ~/bin/make.cross
>         # save the attached .config to linux build tree
>         make.cross ARCH=arm64 
> 
> All errors (new ones prefixed by >>):
> 
>    drivers/acpi/bus.c: In function 'acpi_bus_osc_support':
> > 
> > > 
> > > drivers/acpi/bus.c:333:32: error: implicit declaration of
> > > function 'boot_cpu_has' [-Werror=implicit-function-declaration]
>      if (IS_ENABLED(CONFIG_X86) && boot_cpu_has(X86_FEATURE_HWP)) {
>                                    ^
I have to change back to 
#ifdef CONFIG_X86
 if (boot_cpu_has(X86_FEATURE_HWP)) {

I will submit an update.

> > 
> > > 
> > > drivers/acpi/bus.c:333:45: error: 'X86_FEATURE_HWP' undeclared
> > > (first use in this function)
>      if (IS_ENABLED(CONFIG_X86) && boot_cpu_has(X86_FEATURE_HWP)) {
>                                                 ^
>    drivers/acpi/bus.c:333:45: note: each undeclared identifier is
> reported only once for each function it appears in
>    cc1: some warnings being treated as errors
> 
> vim +/boot_cpu_has +333 drivers/acpi/bus.c
> 
>    327		if (IS_ENABLED(CONFIG_ACPI_PROCESSOR))
>    328			capbuf[OSC_SUPPORT_DWORD] |=
> OSC_SB_PPC_OST_SUPPORT;
>    329	
>    330		capbuf[OSC_SUPPORT_DWORD] |=
> OSC_SB_HOTPLUG_OST_SUPPORT;
>    331		capbuf[OSC_SUPPORT_DWORD] |=
> OSC_SB_PCLPI_SUPPORT;
>    332	
>  > 333		if (IS_ENABLED(CONFIG_X86) &&
> boot_cpu_has(X86_FEATURE_HWP)) {
>    334			capbuf[OSC_SUPPORT_DWORD] |=
> OSC_SB_CPC_SUPPORT;
>    335			capbuf[OSC_SUPPORT_DWORD] |=
> OSC_SB_CPCV2_SUPPORT;
>    336		}
> 
> ---
> 0-DAY kernel test infrastructure                Open Source
> Technology Center
> https://lists.01.org/pipermail/kbuild-all                   Intel
> Corporation

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology
  2016-09-01 20:33 ` [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology Srinivas Pandruvada
@ 2016-09-08  7:59   ` Peter Zijlstra
  2016-09-08 18:09     ` Tim Chen
  0 siblings, 1 reply; 28+ messages in thread
From: Peter Zijlstra @ 2016-09-08  7:59 UTC (permalink / raw)
  To: Srinivas Pandruvada
  Cc: rjw, tglx, mingo, bp, x86, linux-pm, linux-kernel, linux-acpi,
	tim.c.chen

On Thu, Sep 01, 2016 at 01:33:41PM -0700, Srinivas Pandruvada wrote:
> +static void enable_sched_itmt(bool enable_itmt)
> +{
> +	mutex_lock(&itmt_update_mutex);
> +
> +	sysctl_sched_itmt_enabled = enable_itmt;
> +	x86_topology_update = true;
> +	rebuild_sched_domains();
> +
> +	mutex_unlock(&itmt_update_mutex);
> +}
> +
> +static int sched_itmt_update_handler(struct ctl_table *table, int write,
> +			      void __user *buffer, size_t *lenp, loff_t *ppos)
> +{
> +	int ret;
> +
> +	ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
> +
> +	if (ret || !write)
> +		return ret;
> +
> +	enable_sched_itmt(sysctl_sched_itmt_enabled);
> +
> +	return ret;
> +}

I think there's a race here, if two tasks were to write to the sysctl
they'd both change the value before getting stuck on the mutex in
enable_sched_itmt().

One way around that is doing something like:


	struct ctl_table t;
	int val = sysctl_sched_itmt_enabled;

	t = *table;
	t.data = &val;

	proc_dointvec_minmax(&t, ...);

	/* and update the sysctl_sched_itmt_enabled value inside the mutex */
	enable_sched_itmi(val);

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 2/8] sched: Extend scheduler's asym packing
  2016-09-01 20:33 ` [PATCH v2 2/8] sched: Extend scheduler's asym packing Srinivas Pandruvada
@ 2016-09-08  8:01   ` Peter Zijlstra
  2016-09-08 18:03     ` Tim Chen
  0 siblings, 1 reply; 28+ messages in thread
From: Peter Zijlstra @ 2016-09-08  8:01 UTC (permalink / raw)
  To: Srinivas Pandruvada
  Cc: rjw, tglx, mingo, bp, x86, linux-pm, linux-kernel, linux-acpi,
	tim.c.chen

On Thu, Sep 01, 2016 at 01:33:38PM -0700, Srinivas Pandruvada wrote:
> +++ b/kernel/sched/sched.h
> @@ -532,6 +532,17 @@ struct dl_rq {
>  
>  #ifdef CONFIG_SMP
>  
> +static inline bool sched_asym_prefer(int a, int b)
> +{
> +	return arch_asym_cpu_priority(a) > arch_asym_cpu_priority(b);
> +}
> +
> +/*
> + * Return lowest numbered cpu in the group as the most preferred cpu
> + * for ASYM_PACKING for default case.
> + */
> +#define group_priority_cpu(group) group->asym_prefer_cpu
> +

Both these are no longer used outside of sched/fair.c, and should
probably be moved there. Also the later has no reason for being a macro.

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0
  2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
                   ` (7 preceding siblings ...)
  2016-09-01 20:33 ` [PATCH v2 8/8] cpufreq: intel_pstate: Use CPPC to get max performance Srinivas Pandruvada
@ 2016-09-08  8:02 ` Peter Zijlstra
  2016-09-15 12:14 ` Pavel Machek
  9 siblings, 0 replies; 28+ messages in thread
From: Peter Zijlstra @ 2016-09-08  8:02 UTC (permalink / raw)
  To: Srinivas Pandruvada
  Cc: rjw, tglx, mingo, bp, x86, linux-pm, linux-kernel, linux-acpi,
	tim.c.chen



Ingo, aside from the fact that Srinivas still has to update patch 6 and
I just spotted a few niggles, how do you want to merge this?

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 2/8] sched: Extend scheduler's asym packing
  2016-09-08  8:01   ` Peter Zijlstra
@ 2016-09-08 18:03     ` Tim Chen
  2016-09-08 18:21       ` Peter Zijlstra
  0 siblings, 1 reply; 28+ messages in thread
From: Tim Chen @ 2016-09-08 18:03 UTC (permalink / raw)
  To: Peter Zijlstra
  Cc: Srinivas Pandruvada, rjw, tglx, mingo, bp, x86, linux-pm,
	linux-kernel, linux-acpi

On Thu, Sep 08, 2016 at 10:01:11AM +0200, Peter Zijlstra wrote:
> On Thu, Sep 01, 2016 at 01:33:38PM -0700, Srinivas Pandruvada wrote:
> > +++ b/kernel/sched/sched.h
> > @@ -532,6 +532,17 @@ struct dl_rq {
> >  
> >  #ifdef CONFIG_SMP
> >  
> > +static inline bool sched_asym_prefer(int a, int b)
> > +{
> > +	return arch_asym_cpu_priority(a) > arch_asym_cpu_priority(b);
> > +}
> > +
> > +/*
> > + * Return lowest numbered cpu in the group as the most preferred cpu
> > + * for ASYM_PACKING for default case.
> > + */
> > +#define group_priority_cpu(group) group->asym_prefer_cpu
> > +
> 
> Both these are no longer used outside of sched/fair.c, and should
> probably be moved there. Also the later has no reason for being a macro.

Peter,

The sched_asym_prefer is used in sched/core.c to set asym_prefer_cpu
in a group. So we will still need the definition in sched.h.  I've removed
the group_priority_cpu macro.

Updated patch below.

Thanks.

Tim

--->8---

From: Tim Chen <tim.c.chen@linux.intel.com>
Subject: [PATCH 2/8] sched: Extend scheduler's asym packing

We generalize the scheduler's asym packing to provide an ordering
of the cpu beyond just the cpu number.  This allows the use of the
ASYM_PACKING scheduler machinery to move loads to preferred CPU in a
sched domain. The preference is defined with the cpu priority
given by arch_asym_cpu_priority(cpu).

We also record the most preferred cpu in a sched group when
we build the cpu's capacity for fast lookup of preferred cpu
during load balancing.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 include/linux/sched.h |  2 ++
 kernel/sched/core.c   | 18 ++++++++++++++++++
 kernel/sched/fair.c   | 35 ++++++++++++++++++++++++-----------
 kernel/sched/sched.h  |  6 ++++++
 4 files changed, 50 insertions(+), 11 deletions(-)

diff --git a/include/linux/sched.h b/include/linux/sched.h
index 62c68e5..aeea288 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1052,6 +1052,8 @@ static inline int cpu_numa_flags(void)
 }
 #endif
 
+int arch_asym_cpu_priority(int cpu);
+
 struct sched_domain_attr {
 	int relax_domain_level;
 };
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index e86c4a5..08135ca 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -6237,7 +6237,25 @@ static void init_sched_groups_capacity(int cpu, struct sched_domain *sd)
 	WARN_ON(!sg);
 
 	do {
+		int cpu, max_cpu = -1, prev_cpu = -1;
+
 		sg->group_weight = cpumask_weight(sched_group_cpus(sg));
+
+		if (!(sd->flags & SD_ASYM_PACKING))
+			goto next;
+
+		for_each_cpu(cpu, sched_group_cpus(sg)) {
+			if (prev_cpu < 0) {
+				prev_cpu = cpu;
+				max_cpu = cpu;
+			} else {
+				if (sched_asym_prefer(cpu, max_cpu))
+					max_cpu = cpu;
+			}
+		}
+		sg->asym_prefer_cpu = max_cpu;
+
+next:
 		sg = sg->next;
 	} while (sg != sd->groups);
 
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 039de34..8e2a078 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -100,6 +100,16 @@ const_debug unsigned int sysctl_sched_migration_cost = 500000UL;
  */
 unsigned int __read_mostly sysctl_sched_shares_window = 10000000UL;
 
+#ifdef CONFIG_SMP
+/*
+ * For asym packing, by default the lower numbered cpu has higher priority.
+ */
+int __weak arch_asym_cpu_priority(int cpu)
+{
+	return -cpu;
+}
+#endif
+
 #ifdef CONFIG_CFS_BANDWIDTH
 /*
  * Amount of runtime to allocate from global (tg) to local (per-cfs_rq) pool
@@ -6862,16 +6872,18 @@ static bool update_sd_pick_busiest(struct lb_env *env,
 	if (env->idle == CPU_NOT_IDLE)
 		return true;
 	/*
-	 * ASYM_PACKING needs to move all the work to the lowest
-	 * numbered CPUs in the group, therefore mark all groups
-	 * higher than ourself as busy.
+	 * ASYM_PACKING needs to move all the work to the highest
+	 * prority CPUs in the group, therefore mark all groups
+	 * of lower priority than ourself as busy.
 	 */
-	if (sgs->sum_nr_running && env->dst_cpu < group_first_cpu(sg)) {
+	if (sgs->sum_nr_running &&
+	    sched_asym_prefer(env->dst_cpu, sg->asym_prefer_cpu)) {
 		if (!sds->busiest)
 			return true;
 
-		/* Prefer to move from highest possible cpu's work */
-		if (group_first_cpu(sds->busiest) < group_first_cpu(sg))
+		/* Prefer to move from lowest priority cpu's work */
+		if (sched_asym_prefer(sds->busiest->asym_prefer_cpu,
+				      sg->asym_prefer_cpu))
 			return true;
 	}
 
@@ -7023,8 +7035,8 @@ static int check_asym_packing(struct lb_env *env, struct sd_lb_stats *sds)
 	if (!sds->busiest)
 		return 0;
 
-	busiest_cpu = group_first_cpu(sds->busiest);
-	if (env->dst_cpu > busiest_cpu)
+	busiest_cpu = sds->busiest->asym_prefer_cpu;
+	if (sched_asym_prefer(busiest_cpu, env->dst_cpu))
 		return 0;
 
 	env->imbalance = DIV_ROUND_CLOSEST(
@@ -7365,10 +7377,11 @@ static int need_active_balance(struct lb_env *env)
 
 		/*
 		 * ASYM_PACKING needs to force migrate tasks from busy but
-		 * higher numbered CPUs in order to pack all tasks in the
-		 * lowest numbered CPUs.
+		 * lower priority CPUs in order to pack all tasks in the
+		 * highest priority CPUs.
 		 */
-		if ((sd->flags & SD_ASYM_PACKING) && env->src_cpu > env->dst_cpu)
+		if ((sd->flags & SD_ASYM_PACKING) &&
+		    sched_asym_prefer(env->dst_cpu, env->src_cpu))
 			return 1;
 	}
 
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index c64fc51..b6f449d 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -532,6 +532,11 @@ struct dl_rq {
 
 #ifdef CONFIG_SMP
 
+static inline bool sched_asym_prefer(int a, int b)
+{
+	return arch_asym_cpu_priority(a) > arch_asym_cpu_priority(b);
+}
+
 /*
  * We add the notion of a root-domain which will be used to define per-domain
  * variables. Each exclusive cpuset essentially defines an island domain by
@@ -884,6 +889,7 @@ struct sched_group {
 
 	unsigned int group_weight;
 	struct sched_group_capacity *sgc;
+	int asym_prefer_cpu;		/* cpu of highest priority in group */
 
 	/*
 	 * The CPUs this group covers.
-- 
2.5.5


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology
  2016-09-08  7:59   ` Peter Zijlstra
@ 2016-09-08 18:09     ` Tim Chen
  2016-09-08 18:22       ` Peter Zijlstra
  0 siblings, 1 reply; 28+ messages in thread
From: Tim Chen @ 2016-09-08 18:09 UTC (permalink / raw)
  To: Peter Zijlstra
  Cc: Srinivas Pandruvada, rjw, tglx, mingo, bp, x86, linux-pm,
	linux-kernel, linux-acpi

On Thu, Sep 08, 2016 at 09:59:55AM +0200, Peter Zijlstra wrote:
> I think there's a race here, if two tasks were to write to the sysctl
> they'd both change the value before getting stuck on the mutex in
> enable_sched_itmt().
> 
> One way around that is doing something like:
> 
> 
> 	struct ctl_table t;
> 	int val = sysctl_sched_itmt_enabled;
> 
> 	t = *table;
> 	t.data = &val;
> 
> 	proc_dointvec_minmax(&t, ...);
> 
> 	/* and update the sysctl_sched_itmt_enabled value inside the mutex */
> 	enable_sched_itmi(val);

Peter,

Since enable_sched_itmt is only used by sched_itmt_update_handler,
I've moved the mutex locking to sched_itmt_update_handler to eliminate
the race condition in the code path you mentioned.

Updated patch below.

Thanks.

Tim

--->8---
From: Tim Chen <tim.c.chen@linux.intel.com>
Subject: [PATCH 5/8] sched,x86: Enable Turbo Boost Max Technology

On some Intel cores, they can boosted to a higher turbo frequency than
the other cores on the same die.  So we prefer processes to be run on
them vs other lower frequency ones for extra performance.

We extend the asym packing feature in the scheduler to support packing
task to the higher frequency core at the core sched domain level.

We set up a core priority metric to abstract the core preferences based
on the maximum boost frequency.  The priority is instantiated such that
the core with a higher priority is favored over the core with lower
priority when making scheduling decision using ASYM_PACKING.  The smt
threads that are of higher number are discounted in their priority so
we will not try to pack tasks onto all the threads of a favored core
before using other cpu cores.  The cpu that's of the highest priority
in a sched_group is recorded in sched_group->asym_prefer_cpu during
initialization to save lookup during load balancing.

A sysctl variable /proc/sys/kernel/sched_itmt_enabled is provided so
the scheduling based on favored core can be turned on or off at run time.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 arch/x86/Kconfig                |   9 +++
 arch/x86/include/asm/topology.h |  18 +++++
 arch/x86/kernel/Makefile        |   1 +
 arch/x86/kernel/itmt.c          | 164 ++++++++++++++++++++++++++++++++++++++++
 arch/x86/kernel/smpboot.c       |   1 -
 5 files changed, 192 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/kernel/itmt.c

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index c580d8c..c1d36db 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -928,6 +928,15 @@ config SCHED_MC
 	  making when dealing with multi-core CPU chips at a cost of slightly
 	  increased overhead in some places. If unsure say N here.
 
+config SCHED_ITMT
+	bool "Intel Turbo Boost Max Technology (ITMT) scheduler support"
+	depends on SCHED_MC && CPU_SUP_INTEL && X86_INTEL_PSTATE
+	---help---
+	  ITMT enabled scheduler support improves the CPU scheduler's decision
+	  to move tasks to cpu core that can be boosted to a higher frequency
+	  than others. It will have better performance at a cost of slightly
+	  increased overhead in task migrations. If unsure say N here.
+
 source "kernel/Kconfig.preempt"
 
 config UP_LATE_INIT
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 8d6df77..ac86a0b 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -150,7 +150,25 @@ void x86_pci_root_bus_resources(int bus, struct list_head *resources);
 extern bool x86_topology_update;
 
 #ifdef CONFIG_SCHED_ITMT
+#include <asm/percpu.h>
+
+DECLARE_PER_CPU_READ_MOSTLY(int, sched_core_priority);
 extern unsigned int __read_mostly sysctl_sched_itmt_enabled;
+
+/* Interface to set priority of a cpu */
+void sched_set_itmt_core_prio(int prio, int core_cpu);
+
+/* Interface to notify scheduler that system supports ITMT */
+void set_sched_itmt(bool support_itmt);
+
+#else /* CONFIG_SCHED_ITMT */
+
+static inline void set_sched_itmt(bool support_itmt)
+{
+}
+static inline void sched_set_itmt_core_prio(int prio, int core_cpu)
+{
+}
 #endif /* CONFIG_SCHED_ITMT */
 
 #endif /* _ASM_X86_TOPOLOGY_H */
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 0503f5b..2008335 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -124,6 +124,7 @@ obj-$(CONFIG_EFI)			+= sysfb_efi.o
 
 obj-$(CONFIG_PERF_EVENTS)		+= perf_regs.o
 obj-$(CONFIG_TRACING)			+= tracepoint.o
+obj-$(CONFIG_SCHED_ITMT)		+= itmt.o
 
 ###
 # 64 bit specific files
diff --git a/arch/x86/kernel/itmt.c b/arch/x86/kernel/itmt.c
new file mode 100644
index 0000000..bf4a5f8
--- /dev/null
+++ b/arch/x86/kernel/itmt.c
@@ -0,0 +1,164 @@
+/*
+ * itmt.c: Functions and data structures for enabling
+ *	   scheduler to favor scheduling on cores that
+ *	   can be boosted to a higher frequency using
+ *	   Intel Turbo Boost Max Technology 3.0
+ *
+ * (C) Copyright 2016 Intel Corporation
+ * Author: Tim Chen <tim.c.chen@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+
+#include <linux/sched.h>
+#include <linux/cpumask.h>
+#include <linux/cpuset.h>
+#include <asm/mutex.h>
+#include <linux/sched.h>
+#include <linux/sysctl.h>
+#include <linux/nodemask.h>
+
+DEFINE_PER_CPU_READ_MOSTLY(int, sched_core_priority);
+static DEFINE_MUTEX(itmt_update_mutex);
+
+static unsigned int zero;
+static unsigned int one = 1;
+
+/*
+ * Boolean to control whether we want to move processes to cpu capable
+ * of higher turbo frequency for cpus supporting Intel Turbo Boost Max
+ * Technology 3.0.
+ *
+ * It can be set via /proc/sys/kernel/sched_itmt_enabled
+ */
+unsigned int __read_mostly sysctl_sched_itmt_enabled;
+
+/*
+ * The pstate_driver calls set_sched_itmt to indicate if the system
+ * is ITMT capable.
+ */
+static bool __read_mostly sched_itmt_capable;
+
+int arch_asym_cpu_priority(int cpu)
+{
+	return per_cpu(sched_core_priority, cpu);
+}
+
+/* Called with itmt_update_mutex lock held */
+static void enable_sched_itmt(bool enable_itmt)
+{
+	sysctl_sched_itmt_enabled = enable_itmt;
+	x86_topology_update = true;
+	rebuild_sched_domains();
+}
+
+static int sched_itmt_update_handler(struct ctl_table *table, int write,
+			      void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+	int ret;
+
+	mutex_lock(&itmt_update_mutex);
+
+	ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
+
+	if (ret || !write) {
+		mutex_unlock(&itmt_update_mutex);
+		return ret;
+	}
+
+	enable_sched_itmt(sysctl_sched_itmt_enabled);
+
+	mutex_unlock(&itmt_update_mutex);
+
+	return ret;
+}
+
+static struct ctl_table itmt_kern_table[] = {
+	{
+		.procname	= "sched_itmt_enabled",
+		.data		= &sysctl_sched_itmt_enabled,
+		.maxlen		= sizeof(unsigned int),
+		.mode		= 0644,
+		.proc_handler	= sched_itmt_update_handler,
+		.extra1		= &zero,
+		.extra2		= &one,
+	},
+	{}
+};
+
+static struct ctl_table itmt_root_table[] = {
+	{
+		.procname	= "kernel",
+		.mode		= 0555,
+		.child		= itmt_kern_table,
+	},
+	{}
+};
+
+static struct ctl_table_header *itmt_sysctl_header;
+
+/*
+ * The boot code will find out the max boost frequency
+ * and call this function to set a priority proportional
+ * to the max boost frequency. CPU with higher boost
+ * frequency will receive higher priority.
+ */
+void sched_set_itmt_core_prio(int prio, int core_cpu)
+{
+	int cpu, i = 1;
+
+	for_each_cpu(cpu, topology_sibling_cpumask(core_cpu)) {
+		int smt_prio;
+
+		/*
+		 * Discount the priority of sibling so that we don't
+		 * pack all loads to the same core before using other cores.
+		 */
+		smt_prio = prio * smp_num_siblings / i;
+		i++;
+		per_cpu(sched_core_priority, cpu) = smt_prio;
+	}
+}
+
+/*
+ * During boot up, boot code will detect if the system
+ * is ITMT capable and call set_sched_itmt.
+ *
+ * This should be call after sched_set_itmt_core_prio
+ * has been called to set the cpus' priorities.
+ *
+ * This function should be called without cpu hot plug lock
+ * as we need to acquire the lock to rebuild sched domains
+ * later.
+ */
+void set_sched_itmt(bool itmt_capable)
+{
+	mutex_lock(&itmt_update_mutex);
+
+	if (itmt_capable != sched_itmt_capable) {
+
+		if (itmt_capable) {
+			itmt_sysctl_header =
+				register_sysctl_table(itmt_root_table);
+			/*
+			 * ITMT capability automatically enables ITMT
+			 * scheduling for client systems (single node).
+			 */
+			if (topology_num_packages() == 1)
+				sysctl_sched_itmt_enabled = 1;
+		} else {
+			if (itmt_sysctl_header)
+				unregister_sysctl_table(itmt_sysctl_header);
+			sysctl_sched_itmt_enabled = 0;
+		}
+
+		sched_itmt_capable = itmt_capable;
+		x86_topology_update = true;
+		rebuild_sched_domains();
+	}
+
+	mutex_unlock(&itmt_update_mutex);
+}
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 737b9edf..17f3ac7 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -109,7 +109,6 @@ static bool logical_packages_frozen __read_mostly;
 /* Maximum number of SMT threads on any online core */
 int __max_smt_threads __read_mostly;
 
-unsigned int __read_mostly sysctl_sched_itmt_enabled;
 /* Flag to indicate if a complete sched domain rebuild is required */
 bool x86_topology_update;
 
-- 
2.5.5


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 2/8] sched: Extend scheduler's asym packing
  2016-09-08 18:03     ` Tim Chen
@ 2016-09-08 18:21       ` Peter Zijlstra
  0 siblings, 0 replies; 28+ messages in thread
From: Peter Zijlstra @ 2016-09-08 18:21 UTC (permalink / raw)
  To: Tim Chen
  Cc: Srinivas Pandruvada, rjw, tglx, mingo, bp, x86, linux-pm,
	linux-kernel, linux-acpi

On Thu, Sep 08, 2016 at 11:03:26AM -0700, Tim Chen wrote:
> On Thu, Sep 08, 2016 at 10:01:11AM +0200, Peter Zijlstra wrote:
> > On Thu, Sep 01, 2016 at 01:33:38PM -0700, Srinivas Pandruvada wrote:
> > > +++ b/kernel/sched/sched.h
> > > @@ -532,6 +532,17 @@ struct dl_rq {
> > >  
> > >  #ifdef CONFIG_SMP
> > >  
> > > +static inline bool sched_asym_prefer(int a, int b)
> > > +{
> > > +	return arch_asym_cpu_priority(a) > arch_asym_cpu_priority(b);
> > > +}
> > > +
> > > +/*
> > > + * Return lowest numbered cpu in the group as the most preferred cpu
> > > + * for ASYM_PACKING for default case.
> > > + */
> > > +#define group_priority_cpu(group) group->asym_prefer_cpu
> > > +
> > 
> > Both these are no longer used outside of sched/fair.c, and should
> > probably be moved there. Also the later has no reason for being a macro.
> 
> Peter,
> 
> The sched_asym_prefer is used in sched/core.c to set asym_prefer_cpu
> in a group. So we will still need the definition in sched.h.  I've removed
> the group_priority_cpu macro.

Ah indeed. Thanks!

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology
  2016-09-08 18:09     ` Tim Chen
@ 2016-09-08 18:22       ` Peter Zijlstra
  2016-09-08 18:28         ` Srinivas Pandruvada
  0 siblings, 1 reply; 28+ messages in thread
From: Peter Zijlstra @ 2016-09-08 18:22 UTC (permalink / raw)
  To: Tim Chen
  Cc: Srinivas Pandruvada, rjw, tglx, mingo, bp, x86, linux-pm,
	linux-kernel, linux-acpi

On Thu, Sep 08, 2016 at 11:09:28AM -0700, Tim Chen wrote:
> On Thu, Sep 08, 2016 at 09:59:55AM +0200, Peter Zijlstra wrote:
> > I think there's a race here, if two tasks were to write to the sysctl
> > they'd both change the value before getting stuck on the mutex in
> > enable_sched_itmt().
> > 
> > One way around that is doing something like:
> > 
> > 
> > 	struct ctl_table t;
> > 	int val = sysctl_sched_itmt_enabled;
> > 
> > 	t = *table;
> > 	t.data = &val;
> > 
> > 	proc_dointvec_minmax(&t, ...);
> > 
> > 	/* and update the sysctl_sched_itmt_enabled value inside the mutex */
> > 	enable_sched_itmi(val);
> 
> Peter,
> 
> Since enable_sched_itmt is only used by sched_itmt_update_handler,
> I've moved the mutex locking to sched_itmt_update_handler to eliminate
> the race condition in the code path you mentioned.

That is indeed simpler. Thanks!

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology
  2016-09-08 18:22       ` Peter Zijlstra
@ 2016-09-08 18:28         ` Srinivas Pandruvada
  2016-09-08 18:33           ` Peter Zijlstra
  2016-09-08 21:22           ` Rafael J. Wysocki
  0 siblings, 2 replies; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-08 18:28 UTC (permalink / raw)
  To: Peter Zijlstra, Tim Chen
  Cc: rjw, tglx, mingo, bp, x86, linux-pm, linux-kernel, linux-acpi

On Thu, 2016-09-08 at 20:22 +0200, Peter Zijlstra wrote:
> On Thu, Sep 08, 2016 at 11:09:28AM -0700, Tim Chen wrote:
> > 
> > On Thu, Sep 08, 2016 at 09:59:55AM +0200, Peter Zijlstra wrote:
> > > 
> > > I think there's a race here, if two tasks were to write to the
> > > sysctl
> > > they'd both change the value before getting stuck on the mutex in
> > > enable_sched_itmt().
> > > 
> > > One way around that is doing something like:
> > > 
> > > 
> > > 	struct ctl_table t;
> > > 	int val = sysctl_sched_itmt_enabled;
> > > 
> > > 	t = *table;
> > > 	t.data = &val;
> > > 
> > > 	proc_dointvec_minmax(&t, ...);
> > > 
> > > 	/* and update the sysctl_sched_itmt_enabled value inside the
> > > mutex */
> > > 	enable_sched_itmi(val);
> > 
> > Peter,
> > 
> > Since enable_sched_itmt is only used by sched_itmt_update_handler,
> > I've moved the mutex locking to sched_itmt_update_handler to
> > eliminate
> > the race condition in the code path you mentioned.
> 
> That is indeed simpler. Thanks!
Do we need to send v3 to include these changes?

Thanks,
Srinivas

> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm"
> in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology
  2016-09-08 18:28         ` Srinivas Pandruvada
@ 2016-09-08 18:33           ` Peter Zijlstra
  2016-09-08 18:41             ` Srinivas Pandruvada
  2016-09-08 21:22           ` Rafael J. Wysocki
  1 sibling, 1 reply; 28+ messages in thread
From: Peter Zijlstra @ 2016-09-08 18:33 UTC (permalink / raw)
  To: Srinivas Pandruvada
  Cc: Tim Chen, rjw, tglx, mingo, bp, x86, linux-pm, linux-kernel, linux-acpi

On Thu, Sep 08, 2016 at 11:28:48AM -0700, Srinivas Pandruvada wrote:

> Do we need to send v3 to include these changes?

Might as well I suppose. Then we need to figure out who is going to
merge what where ;-)

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology
  2016-09-08 18:33           ` Peter Zijlstra
@ 2016-09-08 18:41             ` Srinivas Pandruvada
  0 siblings, 0 replies; 28+ messages in thread
From: Srinivas Pandruvada @ 2016-09-08 18:41 UTC (permalink / raw)
  To: Peter Zijlstra
  Cc: Tim Chen, rjw, tglx, mingo, bp, x86, linux-pm, linux-kernel, linux-acpi

On Thu, 2016-09-08 at 20:33 +0200, Peter Zijlstra wrote:
> On Thu, Sep 08, 2016 at 11:28:48AM -0700, Srinivas Pandruvada wrote:
> 
> > 
> > Do we need to send v3 to include these changes?
> 
> Might as well I suppose. Then we need to figure out who is going to
> merge what where ;-)
Preferably from Rafael's PM tree as this depends on some CPPC changes
which are in his tree.

Thanks,
Srinivas

> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm"
> in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology
  2016-09-08 18:28         ` Srinivas Pandruvada
  2016-09-08 18:33           ` Peter Zijlstra
@ 2016-09-08 21:22           ` Rafael J. Wysocki
  1 sibling, 0 replies; 28+ messages in thread
From: Rafael J. Wysocki @ 2016-09-08 21:22 UTC (permalink / raw)
  To: Srinivas Pandruvada
  Cc: Peter Zijlstra, Tim Chen, tglx, mingo, bp, x86, linux-pm,
	linux-kernel, linux-acpi

On Thursday, September 08, 2016 11:28:48 AM Srinivas Pandruvada wrote:
> On Thu, 2016-09-08 at 20:22 +0200, Peter Zijlstra wrote:
> > On Thu, Sep 08, 2016 at 11:09:28AM -0700, Tim Chen wrote:
> > > 
> > > On Thu, Sep 08, 2016 at 09:59:55AM +0200, Peter Zijlstra wrote:
> > > > 
> > > > I think there's a race here, if two tasks were to write to the
> > > > sysctl
> > > > they'd both change the value before getting stuck on the mutex in
> > > > enable_sched_itmt().
> > > > 
> > > > One way around that is doing something like:
> > > > 
> > > > 
> > > > 	struct ctl_table t;
> > > > 	int val = sysctl_sched_itmt_enabled;
> > > > 
> > > > 	t = *table;
> > > > 	t.data = &val;
> > > > 
> > > > 	proc_dointvec_minmax(&t, ...);
> > > > 
> > > > 	/* and update the sysctl_sched_itmt_enabled value inside the
> > > > mutex */
> > > > 	enable_sched_itmi(val);
> > > 
> > > Peter,
> > > 
> > > Since enable_sched_itmt is only used by sched_itmt_update_handler,
> > > I've moved the mutex locking to sched_itmt_update_handler to
> > > eliminate
> > > the race condition in the code path you mentioned.
> > 
> > That is indeed simpler. Thanks!
> Do we need to send v3 to include these changes?

Yes, please.

Thanks,
Rafael

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0
  2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
                   ` (8 preceding siblings ...)
  2016-09-08  8:02 ` [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Peter Zijlstra
@ 2016-09-15 12:14 ` Pavel Machek
  2016-09-15 12:46   ` One Thousand Gnomes
  9 siblings, 1 reply; 28+ messages in thread
From: Pavel Machek @ 2016-09-15 12:14 UTC (permalink / raw)
  To: Srinivas Pandruvada
  Cc: rjw, tglx, mingo, bp, peterz, x86, linux-pm, linux-kernel,
	linux-acpi, tim.c.chen

Hi!

> - Feature is enabled by default for single socket systems
> 
> With Intel® Turbo Boost Max Technology 3.0 (ITMT), single-threaded performance is
> optimized by identifying processor's fastest core and running critical workloads
> on it.
> Refere to:
> http://www.intel.com/content/www/us/en/architecture-and-technology/turbo-boost/turbo-boost-max-technology.html

That does not really explain much.

How does it work? Do the different cores have different max
frequencies due to manufacturing differences? Ot is it running the
workload on coldest core?

Thanks,
								Pavel


-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0
  2016-09-15 12:14 ` Pavel Machek
@ 2016-09-15 12:46   ` One Thousand Gnomes
  2016-09-16 16:03     ` Tim Chen
  0 siblings, 1 reply; 28+ messages in thread
From: One Thousand Gnomes @ 2016-09-15 12:46 UTC (permalink / raw)
  To: Pavel Machek
  Cc: Srinivas Pandruvada, rjw, tglx, mingo, bp, peterz, x86, linux-pm,
	linux-kernel, linux-acpi, tim.c.chen

On Thu, 15 Sep 2016 14:14:30 +0200
Pavel Machek <pavel@ucw.cz> wrote:

> Hi!
> 
> > - Feature is enabled by default for single socket systems
> > 
> > With Intel® Turbo Boost Max Technology 3.0 (ITMT), single-threaded performance is
> > optimized by identifying processor's fastest core and running critical workloads
> > on it.
> > Refere to:
> > http://www.intel.com/content/www/us/en/architecture-and-technology/turbo-boost/turbo-boost-max-technology.html  
> 
> That does not really explain much.
> 
> How does it work? Do the different cores have different max
> frequencies due to manufacturing differences? Ot is it running the
> workload on coldest core?

That's all down to the CPU, not architectural and may change.

The ACPI tables describe which cores to use, whether that relates to
manufacturing, positioning or whatever isn't exposed.

Alan

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0
  2016-09-15 12:46   ` One Thousand Gnomes
@ 2016-09-16 16:03     ` Tim Chen
  0 siblings, 0 replies; 28+ messages in thread
From: Tim Chen @ 2016-09-16 16:03 UTC (permalink / raw)
  To: One Thousand Gnomes, Pavel Machek
  Cc: Srinivas Pandruvada, rjw, tglx, mingo, bp, peterz, x86, linux-pm,
	linux-kernel, linux-acpi

On Thu, 2016-09-15 at 13:46 +0100, One Thousand Gnomes wrote:
> On Thu, 15 Sep 2016 14:14:30 +0200
> Pavel Machek <pavel@ucw.cz> wrote:
> 
> > 
> > Hi!
> > 
> > > 
> > > - Feature is enabled by default for single socket systems
> > > 
> > > With Intel® Turbo Boost Max Technology 3.0 (ITMT), single-threaded performance is
> > > optimized by identifying processor's fastest core and running critical workloads
> > > on it.
> > > Refere to:
> > > http://www.intel.com/content/www/us/en/architecture-and-technology/turbo-boost/turbo-boost-max-technology.html  
> > That does not really explain much.
> > 
> > How does it work? Do the different cores have different max
> > frequencies due to manufacturing differences? Ot is it running the
> > workload on coldest core?
> That's all down to the CPU, not architectural and may change.
> 
> The ACPI tables describe which cores to use, whether that relates to
> manufacturing, positioning or whatever isn't exposed.

Please refer to patches 
acpi: Enable HWP CPPC objects 
acpi: bus: Set _OSC for diverse core support
cpufreq: intel_pstate: Use CPPC to get max performance

for how the differences in core's capabilities are exposed to OS.

The asymmetric packing feature in the scheduler defines an
order of which core should be scheduled with a load first.
By using this feature, we can put load first on 
the core that can be boosted to the highest
frequency.

Tim

^ permalink raw reply	[flat|nested] 28+ messages in thread

end of thread, other threads:[~2016-09-16 16:03 UTC | newest]

Thread overview: 28+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-09-01 20:33 [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
2016-09-01 20:33 ` [PATCH v2 1/8] sched, x86: Add SD_ASYM_PACKING flags to x86 cpu topology for ITMT Srinivas Pandruvada
2016-09-01 20:33 ` [PATCH v2 2/8] sched: Extend scheduler's asym packing Srinivas Pandruvada
2016-09-08  8:01   ` Peter Zijlstra
2016-09-08 18:03     ` Tim Chen
2016-09-08 18:21       ` Peter Zijlstra
2016-09-01 20:33 ` [PATCH v2 3/8] x86, cpu: provide a function topology_num_packages to enumerate #packages Srinivas Pandruvada
2016-09-01 20:33 ` [PATCH v2 4/8] sched, x86: use arch_update_cpu_topology to indicate x86 need sched domain rebuild Srinivas Pandruvada
2016-09-01 20:33 ` [PATCH v2 5/8] sched,x86: Enable Turbo Boost Max Technology Srinivas Pandruvada
2016-09-08  7:59   ` Peter Zijlstra
2016-09-08 18:09     ` Tim Chen
2016-09-08 18:22       ` Peter Zijlstra
2016-09-08 18:28         ` Srinivas Pandruvada
2016-09-08 18:33           ` Peter Zijlstra
2016-09-08 18:41             ` Srinivas Pandruvada
2016-09-08 21:22           ` Rafael J. Wysocki
2016-09-01 20:33 ` [PATCH v2 6/8] acpi: bus: Enable HWP CPPC objects Srinivas Pandruvada
2016-09-01 23:15   ` kbuild test robot
2016-09-01 23:15     ` kbuild test robot
2016-09-01 23:46     ` Srinivas Pandruvada
2016-09-01 20:33 ` [PATCH v2 7/8] acpi: bus: Set _OSC for diverse core support Srinivas Pandruvada
2016-09-01 20:33 ` [PATCH v2 8/8] cpufreq: intel_pstate: Use CPPC to get max performance Srinivas Pandruvada
2016-09-01 22:31   ` kbuild test robot
2016-09-01 22:31     ` kbuild test robot
2016-09-08  8:02 ` [PATCH v2 0/8] Support Intel® Turbo Boost Max Technology 3.0 Peter Zijlstra
2016-09-15 12:14 ` Pavel Machek
2016-09-15 12:46   ` One Thousand Gnomes
2016-09-16 16:03     ` Tim Chen

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