From: Brian Norris <briannorris@chromium.org> To: Marc Zyngier <marc.zyngier@arm.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Mark Rutland <mark.rutland@arm.com>, Stephen Boyd <sboyd@codeaurora.org>, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, wxt@rock-chips.com Subject: Re: [PATCH] clocksource: arm_arch_timer: Don't assume clock runs in suspend Date: Mon, 19 Sep 2016 16:14:42 -0700 [thread overview] Message-ID: <20160919231441.GA60928@google.com> (raw) In-Reply-To: <57DBA81F.2060404@arm.com> On Fri, Sep 16, 2016 at 09:06:55AM +0100, Marc Zyngier wrote: > Hi Brian, Hi Marc, Thanks for the quick response. > On 16/09/16 06:49, Brian Norris wrote: > > Since commit 4fbcdc813fb9 ("clocksource: arm_arch_timer: Use clocksource > > for suspend timekeeping"), this driver assumes that the ARM architected > > timer keeps running in suspend. This is not the case for some ARM SoCs, > > depending on the HW state used for system suspend. Let's not assume that > > all SoCs support this, and instead only support this if the device tree > > explicitly tells us it's "always on". In all other cases, just fall back > > to the RTC. This should be relatively harmless. > > I'm afraid you're confusing two things: > - the counter, which *must* carry on counting no matter what, as > (quoting the ARM ARM) "The system counter must be implemented in an > always-on power domain" > - the timer, which is allowed to be powered off, and can be tagged with > the "always-on" property to indicate that it is guaranteed to stay up > (which in practice only exists in virtual machines and never on real HW). Indeed, sorry for that confusion, and thanks for the explanations. > If your counter does stop counting when suspended, then this is starting > to either feel like a HW bug, or someone is killing the clock that feeds > this counter when entering suspend. > > If this is the former, then we need a separate quirk to indicate the > non-standard behaviour. If it is the latter, don't do it! ;-) It's beginning to seem more like a HW quirk which yields nonstandard behavior. AIUI, this SoC normally runs the counter off its 24 MHz clock, but for low power modes, this "always-on" domain switches over to a 32 KHz alternative clock. Unfortunately, the counter doesn't actually tick when run this way. I'm trying to confirm with the chip designers (Rockchip, RK3399) about the nature of the quirk, but I think we'll need a separate DT flag for this behavior. Brian
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From: briannorris@chromium.org (Brian Norris) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] clocksource: arm_arch_timer: Don't assume clock runs in suspend Date: Mon, 19 Sep 2016 16:14:42 -0700 [thread overview] Message-ID: <20160919231441.GA60928@google.com> (raw) In-Reply-To: <57DBA81F.2060404@arm.com> On Fri, Sep 16, 2016 at 09:06:55AM +0100, Marc Zyngier wrote: > Hi Brian, Hi Marc, Thanks for the quick response. > On 16/09/16 06:49, Brian Norris wrote: > > Since commit 4fbcdc813fb9 ("clocksource: arm_arch_timer: Use clocksource > > for suspend timekeeping"), this driver assumes that the ARM architected > > timer keeps running in suspend. This is not the case for some ARM SoCs, > > depending on the HW state used for system suspend. Let's not assume that > > all SoCs support this, and instead only support this if the device tree > > explicitly tells us it's "always on". In all other cases, just fall back > > to the RTC. This should be relatively harmless. > > I'm afraid you're confusing two things: > - the counter, which *must* carry on counting no matter what, as > (quoting the ARM ARM) "The system counter must be implemented in an > always-on power domain" > - the timer, which is allowed to be powered off, and can be tagged with > the "always-on" property to indicate that it is guaranteed to stay up > (which in practice only exists in virtual machines and never on real HW). Indeed, sorry for that confusion, and thanks for the explanations. > If your counter does stop counting when suspended, then this is starting > to either feel like a HW bug, or someone is killing the clock that feeds > this counter when entering suspend. > > If this is the former, then we need a separate quirk to indicate the > non-standard behaviour. If it is the latter, don't do it! ;-) It's beginning to seem more like a HW quirk which yields nonstandard behavior. AIUI, this SoC normally runs the counter off its 24 MHz clock, but for low power modes, this "always-on" domain switches over to a 32 KHz alternative clock. Unfortunately, the counter doesn't actually tick when run this way. I'm trying to confirm with the chip designers (Rockchip, RK3399) about the nature of the quirk, but I think we'll need a separate DT flag for this behavior. Brian
next prev parent reply other threads:[~2016-09-19 23:14 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-09-16 5:49 [PATCH] clocksource: arm_arch_timer: Don't assume clock runs in suspend Brian Norris 2016-09-16 5:49 ` Brian Norris 2016-09-16 5:49 ` Brian Norris 2016-09-16 8:06 ` Marc Zyngier 2016-09-16 8:06 ` Marc Zyngier [not found] ` <57DBA81F.2060404-5wv7dgnIgG8@public.gmane.org> 2016-09-16 8:10 ` Daniel Lezcano 2016-09-16 8:10 ` Daniel Lezcano 2016-09-19 23:14 ` Brian Norris [this message] 2016-09-19 23:14 ` Brian Norris 2016-09-20 7:47 ` Marc Zyngier 2016-09-20 7:47 ` Marc Zyngier 2016-09-28 1:23 ` Brian Norris 2016-09-28 1:23 ` Brian Norris 2016-09-29 16:08 ` Marc Zyngier 2016-09-29 16:08 ` Marc Zyngier 2016-10-04 17:49 ` Brian Norris 2016-10-04 17:49 ` Brian Norris 2016-10-19 1:24 ` Stephen Boyd 2016-10-19 1:24 ` Stephen Boyd 2016-10-19 1:36 ` Brian Norris 2016-10-19 1:36 ` Brian Norris 2016-10-19 1:36 ` Brian Norris 2016-10-19 1:55 ` Stephen Boyd 2016-10-19 1:55 ` Stephen Boyd
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