* [PATCH 01/11] PCI: hisi: Rename APB accessors
@ 2016-10-07 16:36 Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 02/11] PCI: hisi: Rename config accessors Bjorn Helgaas
` (9 more replies)
0 siblings, 10 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:36 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
Rename hisi_pcie_apb_readl() to hisi_apb_readl() and hisi_pcie_apb_writel()
to hisi_apb_writel() for consistency with other drivers. Uninline them;
there's no performance issue here, and the compiler can inline them if it's
worthwhile. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 24 +++++++++++-------------
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index 7ee9dfc..15a1167 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -44,15 +44,14 @@ struct hisi_pcie {
struct pcie_soc_ops *soc_ops;
};
-static inline void hisi_pcie_apb_writel(struct hisi_pcie *pcie,
- u32 val, u32 reg)
+static u32 hisi_apb_readl(struct hisi_pcie *pcie, u32 reg)
{
- writel(val, pcie->reg_base + reg);
+ return readl(pcie->reg_base + reg);
}
-static inline u32 hisi_pcie_apb_readl(struct hisi_pcie *pcie, u32 reg)
+static void hisi_apb_writel(struct hisi_pcie *pcie, u32 val, u32 reg)
{
- return readl(pcie->reg_base + reg);
+ writel(val, pcie->reg_base + reg);
}
/* HipXX PCIe host only supports 32-bit config access */
@@ -66,7 +65,7 @@ static int hisi_pcie_cfg_read(struct pcie_port *pp, int where, int size,
walker += (where & 0x3);
reg = where & ~0x3;
- reg_val = hisi_pcie_apb_readl(pcie, reg);
+ reg_val = hisi_apb_readl(pcie, reg);
if (size == 1)
*val = *(u8 __force *) walker;
@@ -92,15 +91,15 @@ static int hisi_pcie_cfg_write(struct pcie_port *pp, int where, int size,
walker += (where & 0x3);
reg = where & ~0x3;
if (size == 4)
- hisi_pcie_apb_writel(pcie, val, reg);
+ hisi_apb_writel(pcie, val, reg);
else if (size == 2) {
- reg_val = hisi_pcie_apb_readl(pcie, reg);
+ reg_val = hisi_apb_readl(pcie, reg);
*(u16 __force *) walker = val;
- hisi_pcie_apb_writel(pcie, reg_val, reg);
+ hisi_apb_writel(pcie, reg_val, reg);
} else if (size == 1) {
- reg_val = hisi_pcie_apb_readl(pcie, reg);
+ reg_val = hisi_apb_readl(pcie, reg);
*(u8 __force *) walker = val;
- hisi_pcie_apb_writel(pcie, reg_val, reg);
+ hisi_apb_writel(pcie, reg_val, reg);
} else
return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -121,8 +120,7 @@ static int hisi_pcie_link_up_hip06(struct hisi_pcie *hisi_pcie)
{
u32 val;
- val = hisi_pcie_apb_readl(hisi_pcie, PCIE_HIP06_CTRL_OFF +
- PCIE_SYS_STATE4);
+ val = hisi_apb_readl(hisi_pcie, PCIE_HIP06_CTRL_OFF + PCIE_SYS_STATE4);
return ((val & PCIE_LTSSM_STATE_MASK) == PCIE_LTSSM_LINKUP_STATE);
}
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 02/11] PCI: hisi: Rename config accessors
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
@ 2016-10-07 16:37 ` Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 03/11] PCI: hisi: Name private struct pointer "hisi" consistently Bjorn Helgaas
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:37 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
Rename hisi_pcie_cfg_read() to hisi_cfg_read() and hisi_pcie_cfg_write() to
hisi_cfg_write() for consistency with other drivers. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index 15a1167..d590999 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -55,8 +55,7 @@ static void hisi_apb_writel(struct hisi_pcie *pcie, u32 val, u32 reg)
}
/* HipXX PCIe host only supports 32-bit config access */
-static int hisi_pcie_cfg_read(struct pcie_port *pp, int where, int size,
- u32 *val)
+static int hisi_cfg_read(struct pcie_port *pp, int where, int size, u32 *val)
{
u32 reg;
u32 reg_val;
@@ -80,8 +79,7 @@ static int hisi_pcie_cfg_read(struct pcie_port *pp, int where, int size,
}
/* HipXX PCIe host only supports 32-bit config access */
-static int hisi_pcie_cfg_write(struct pcie_port *pp, int where, int size,
- u32 val)
+static int hisi_cfg_write(struct pcie_port *pp, int where, int size, u32 val)
{
u32 reg_val;
u32 reg;
@@ -133,8 +131,8 @@ static int hisi_pcie_link_up(struct pcie_port *pp)
}
static struct pcie_host_ops hisi_pcie_host_ops = {
- .rd_own_conf = hisi_pcie_cfg_read,
- .wr_own_conf = hisi_pcie_cfg_write,
+ .rd_own_conf = hisi_cfg_read,
+ .wr_own_conf = hisi_cfg_write,
.link_up = hisi_pcie_link_up,
};
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 03/11] PCI: hisi: Name private struct pointer "hisi" consistently
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 02/11] PCI: hisi: Rename config accessors Bjorn Helgaas
@ 2016-10-07 16:37 ` Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 04/11] PCI: hisi: Remove redundant struct hisi_pcie.reg_base Bjorn Helgaas
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:37 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
Use a device-specific name, "hisi", for struct hisi_pcie pointers
to hint that this is device-specific information. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 70 +++++++++++++++++++++---------------------
1 file changed, 35 insertions(+), 35 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index d590999..c2bdcd1 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -33,7 +33,7 @@
struct hisi_pcie;
struct pcie_soc_ops {
- int (*hisi_pcie_link_up)(struct hisi_pcie *pcie);
+ int (*hisi_pcie_link_up)(struct hisi_pcie *hisi);
};
struct hisi_pcie {
@@ -44,27 +44,27 @@ struct hisi_pcie {
struct pcie_soc_ops *soc_ops;
};
-static u32 hisi_apb_readl(struct hisi_pcie *pcie, u32 reg)
+static u32 hisi_apb_readl(struct hisi_pcie *hisi, u32 reg)
{
- return readl(pcie->reg_base + reg);
+ return readl(hisi->reg_base + reg);
}
-static void hisi_apb_writel(struct hisi_pcie *pcie, u32 val, u32 reg)
+static void hisi_apb_writel(struct hisi_pcie *hisi, u32 val, u32 reg)
{
- writel(val, pcie->reg_base + reg);
+ writel(val, hisi->reg_base + reg);
}
/* HipXX PCIe host only supports 32-bit config access */
static int hisi_cfg_read(struct pcie_port *pp, int where, int size, u32 *val)
{
+ struct hisi_pcie *hisi = to_hisi_pcie(pp);
u32 reg;
u32 reg_val;
- struct hisi_pcie *pcie = to_hisi_pcie(pp);
void *walker = ®_val;
walker += (where & 0x3);
reg = where & ~0x3;
- reg_val = hisi_apb_readl(pcie, reg);
+ reg_val = hisi_apb_readl(hisi, reg);
if (size == 1)
*val = *(u8 __force *) walker;
@@ -81,53 +81,53 @@ static int hisi_cfg_read(struct pcie_port *pp, int where, int size, u32 *val)
/* HipXX PCIe host only supports 32-bit config access */
static int hisi_cfg_write(struct pcie_port *pp, int where, int size, u32 val)
{
+ struct hisi_pcie *hisi = to_hisi_pcie(pp);
u32 reg_val;
u32 reg;
- struct hisi_pcie *pcie = to_hisi_pcie(pp);
void *walker = ®_val;
walker += (where & 0x3);
reg = where & ~0x3;
if (size == 4)
- hisi_apb_writel(pcie, val, reg);
+ hisi_apb_writel(hisi, val, reg);
else if (size == 2) {
- reg_val = hisi_apb_readl(pcie, reg);
+ reg_val = hisi_apb_readl(hisi, reg);
*(u16 __force *) walker = val;
- hisi_apb_writel(pcie, reg_val, reg);
+ hisi_apb_writel(hisi, reg_val, reg);
} else if (size == 1) {
- reg_val = hisi_apb_readl(pcie, reg);
+ reg_val = hisi_apb_readl(hisi, reg);
*(u8 __force *) walker = val;
- hisi_apb_writel(pcie, reg_val, reg);
+ hisi_apb_writel(hisi, reg_val, reg);
} else
return PCIBIOS_BAD_REGISTER_NUMBER;
return PCIBIOS_SUCCESSFUL;
}
-static int hisi_pcie_link_up_hip05(struct hisi_pcie *hisi_pcie)
+static int hisi_pcie_link_up_hip05(struct hisi_pcie *hisi)
{
u32 val;
- regmap_read(hisi_pcie->subctrl, PCIE_SUBCTRL_SYS_STATE4_REG +
- 0x100 * hisi_pcie->port_id, &val);
+ regmap_read(hisi->subctrl, PCIE_SUBCTRL_SYS_STATE4_REG +
+ 0x100 * hisi->port_id, &val);
return ((val & PCIE_LTSSM_STATE_MASK) == PCIE_LTSSM_LINKUP_STATE);
}
-static int hisi_pcie_link_up_hip06(struct hisi_pcie *hisi_pcie)
+static int hisi_pcie_link_up_hip06(struct hisi_pcie *hisi)
{
u32 val;
- val = hisi_apb_readl(hisi_pcie, PCIE_HIP06_CTRL_OFF + PCIE_SYS_STATE4);
+ val = hisi_apb_readl(hisi, PCIE_HIP06_CTRL_OFF + PCIE_SYS_STATE4);
return ((val & PCIE_LTSSM_STATE_MASK) == PCIE_LTSSM_LINKUP_STATE);
}
static int hisi_pcie_link_up(struct pcie_port *pp)
{
- struct hisi_pcie *hisi_pcie = to_hisi_pcie(pp);
+ struct hisi_pcie *hisi = to_hisi_pcie(pp);
- return hisi_pcie->soc_ops->hisi_pcie_link_up(hisi_pcie);
+ return hisi->soc_ops->hisi_pcie_link_up(hisi);
}
static struct pcie_host_ops hisi_pcie_host_ops = {
@@ -139,9 +139,9 @@ static struct pcie_host_ops hisi_pcie_host_ops = {
static int hisi_add_pcie_port(struct pcie_port *pp,
struct platform_device *pdev)
{
+ struct hisi_pcie *hisi = to_hisi_pcie(pp);
int ret;
u32 port_id;
- struct hisi_pcie *hisi_pcie = to_hisi_pcie(pp);
if (of_property_read_u32(pdev->dev.of_node, "port-id", &port_id)) {
dev_err(&pdev->dev, "failed to read port-id\n");
@@ -151,7 +151,7 @@ static int hisi_add_pcie_port(struct pcie_port *pp,
dev_err(&pdev->dev, "Invalid port-id: %d\n", port_id);
return -EINVAL;
}
- hisi_pcie->port_id = port_id;
+ hisi->port_id = port_id;
pp->ops = &hisi_pcie_host_ops;
@@ -166,45 +166,45 @@ static int hisi_add_pcie_port(struct pcie_port *pp,
static int hisi_pcie_probe(struct platform_device *pdev)
{
- struct hisi_pcie *hisi_pcie;
+ struct hisi_pcie *hisi;
struct pcie_port *pp;
const struct of_device_id *match;
struct resource *reg;
struct device_driver *driver;
int ret;
- hisi_pcie = devm_kzalloc(&pdev->dev, sizeof(*hisi_pcie), GFP_KERNEL);
- if (!hisi_pcie)
+ hisi = devm_kzalloc(&pdev->dev, sizeof(*hisi), GFP_KERNEL);
+ if (!hisi)
return -ENOMEM;
- pp = &hisi_pcie->pp;
+ pp = &hisi->pp;
pp->dev = &pdev->dev;
driver = (pdev->dev).driver;
match = of_match_device(driver->of_match_table, &pdev->dev);
- hisi_pcie->soc_ops = (struct pcie_soc_ops *) match->data;
+ hisi->soc_ops = (struct pcie_soc_ops *) match->data;
- hisi_pcie->subctrl =
+ hisi->subctrl =
syscon_regmap_lookup_by_compatible("hisilicon,pcie-sas-subctrl");
- if (IS_ERR(hisi_pcie->subctrl)) {
+ if (IS_ERR(hisi->subctrl)) {
dev_err(pp->dev, "cannot get subctrl base\n");
- return PTR_ERR(hisi_pcie->subctrl);
+ return PTR_ERR(hisi->subctrl);
}
reg = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rc_dbi");
- hisi_pcie->reg_base = devm_ioremap_resource(&pdev->dev, reg);
- if (IS_ERR(hisi_pcie->reg_base)) {
+ hisi->reg_base = devm_ioremap_resource(&pdev->dev, reg);
+ if (IS_ERR(hisi->reg_base)) {
dev_err(pp->dev, "cannot get rc_dbi base\n");
- return PTR_ERR(hisi_pcie->reg_base);
+ return PTR_ERR(hisi->reg_base);
}
- hisi_pcie->pp.dbi_base = hisi_pcie->reg_base;
+ hisi->pp.dbi_base = hisi->reg_base;
ret = hisi_add_pcie_port(pp, pdev);
if (ret)
return ret;
- platform_set_drvdata(pdev, hisi_pcie);
+ platform_set_drvdata(pdev, hisi);
dev_warn(pp->dev, "only 32-bit config accesses supported; smaller writes may corrupt adjacent RW1C fields\n");
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 04/11] PCI: hisi: Remove redundant struct hisi_pcie.reg_base
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 02/11] PCI: hisi: Rename config accessors Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 03/11] PCI: hisi: Name private struct pointer "hisi" consistently Bjorn Helgaas
@ 2016-10-07 16:37 ` Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 05/11] PCI: hisi: Pass device-specific struct to internal functions Bjorn Helgaas
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:37 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
Remove the struct hisi_pcie.reg_base member, which is a duplicate of the
generic pp.dbi_base member. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 13 +++++--------
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index c2bdcd1..64f668c 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -38,7 +38,6 @@ struct pcie_soc_ops {
struct hisi_pcie {
struct regmap *subctrl;
- void __iomem *reg_base;
u32 port_id;
struct pcie_port pp;
struct pcie_soc_ops *soc_ops;
@@ -46,12 +45,12 @@ struct hisi_pcie {
static u32 hisi_apb_readl(struct hisi_pcie *hisi, u32 reg)
{
- return readl(hisi->reg_base + reg);
+ return readl(hisi->pp.dbi_base + reg);
}
static void hisi_apb_writel(struct hisi_pcie *hisi, u32 val, u32 reg)
{
- writel(val, hisi->reg_base + reg);
+ writel(val, hisi->pp.dbi_base + reg);
}
/* HipXX PCIe host only supports 32-bit config access */
@@ -192,14 +191,12 @@ static int hisi_pcie_probe(struct platform_device *pdev)
}
reg = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rc_dbi");
- hisi->reg_base = devm_ioremap_resource(&pdev->dev, reg);
- if (IS_ERR(hisi->reg_base)) {
+ pp->dbi_base = devm_ioremap_resource(&pdev->dev, reg);
+ if (IS_ERR(pp->dbi_base)) {
dev_err(pp->dev, "cannot get rc_dbi base\n");
- return PTR_ERR(hisi->reg_base);
+ return PTR_ERR(pp->dbi_base);
}
- hisi->pp.dbi_base = hisi->reg_base;
-
ret = hisi_add_pcie_port(pp, pdev);
if (ret)
return ret;
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 05/11] PCI: hisi: Pass device-specific struct to internal functions
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
` (2 preceding siblings ...)
2016-10-07 16:37 ` [PATCH 04/11] PCI: hisi: Remove redundant struct hisi_pcie.reg_base Bjorn Helgaas
@ 2016-10-07 16:37 ` Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 06/11] PCI: hisi: Reorder struct hisi_pcie Bjorn Helgaas
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:37 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
Only interfaces used from outside the driver, e.g., those called by the
DesignWare core, need to accept pointers to the generic struct pcie_port.
Internal interfaces can accept pointers to the device-specific struct,
which makes them more straightforward. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index 64f668c..e6bbe94 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -135,10 +135,10 @@ static struct pcie_host_ops hisi_pcie_host_ops = {
.link_up = hisi_pcie_link_up,
};
-static int hisi_add_pcie_port(struct pcie_port *pp,
- struct platform_device *pdev)
+static int hisi_add_pcie_port(struct hisi_pcie *hisi,
+ struct platform_device *pdev)
{
- struct hisi_pcie *hisi = to_hisi_pcie(pp);
+ struct pcie_port *pp = &hisi->pp;
int ret;
u32 port_id;
@@ -197,7 +197,7 @@ static int hisi_pcie_probe(struct platform_device *pdev)
return PTR_ERR(pp->dbi_base);
}
- ret = hisi_add_pcie_port(pp, pdev);
+ ret = hisi_add_pcie_port(hisi, pdev);
if (ret)
return ret;
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 06/11] PCI: hisi: Reorder struct hisi_pcie
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
` (3 preceding siblings ...)
2016-10-07 16:37 ` [PATCH 05/11] PCI: hisi: Pass device-specific struct to internal functions Bjorn Helgaas
@ 2016-10-07 16:37 ` Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 07/11] PCI: hisi: Swap order of hisi_apb_writel() reg/val arguments Bjorn Helgaas
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:37 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
Reorder struct hisi_pcie to put generic fields first. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index e6bbe94..e14ce13 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -37,9 +37,9 @@ struct pcie_soc_ops {
};
struct hisi_pcie {
+ struct pcie_port pp; /* pp.dbi_base is DT rc_dbi */
struct regmap *subctrl;
u32 port_id;
- struct pcie_port pp;
struct pcie_soc_ops *soc_ops;
};
@@ -109,7 +109,6 @@ static int hisi_pcie_link_up_hip05(struct hisi_pcie *hisi)
regmap_read(hisi->subctrl, PCIE_SUBCTRL_SYS_STATE4_REG +
0x100 * hisi->port_id, &val);
-
return ((val & PCIE_LTSSM_STATE_MASK) == PCIE_LTSSM_LINKUP_STATE);
}
@@ -178,13 +177,13 @@ static int hisi_pcie_probe(struct platform_device *pdev)
pp = &hisi->pp;
pp->dev = &pdev->dev;
- driver = (pdev->dev).driver;
+ driver = (pdev->dev).driver;
match = of_match_device(driver->of_match_table, &pdev->dev);
hisi->soc_ops = (struct pcie_soc_ops *) match->data;
hisi->subctrl =
- syscon_regmap_lookup_by_compatible("hisilicon,pcie-sas-subctrl");
+ syscon_regmap_lookup_by_compatible("hisilicon,pcie-sas-subctrl");
if (IS_ERR(hisi->subctrl)) {
dev_err(pp->dev, "cannot get subctrl base\n");
return PTR_ERR(hisi->subctrl);
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 07/11] PCI: hisi: Swap order of hisi_apb_writel() reg/val arguments
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
` (4 preceding siblings ...)
2016-10-07 16:37 ` [PATCH 06/11] PCI: hisi: Reorder struct hisi_pcie Bjorn Helgaas
@ 2016-10-07 16:37 ` Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 08/11] PCI: hisi: Replace hisi_apb_readl() with dw_pcie_readl_rc() Bjorn Helgaas
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:37 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
Swap order of hisi_apb_writel() arguments to match the "dev, pos, val"
order used by pci_write_config_word() and other drivers. No functional
change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index e14ce13..c6b0459 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -48,7 +48,7 @@ static u32 hisi_apb_readl(struct hisi_pcie *hisi, u32 reg)
return readl(hisi->pp.dbi_base + reg);
}
-static void hisi_apb_writel(struct hisi_pcie *hisi, u32 val, u32 reg)
+static void hisi_apb_writel(struct hisi_pcie *hisi, u32 reg, u32 val)
{
writel(val, hisi->pp.dbi_base + reg);
}
@@ -88,15 +88,15 @@ static int hisi_cfg_write(struct pcie_port *pp, int where, int size, u32 val)
walker += (where & 0x3);
reg = where & ~0x3;
if (size == 4)
- hisi_apb_writel(hisi, val, reg);
+ hisi_apb_writel(hisi, reg, val);
else if (size == 2) {
reg_val = hisi_apb_readl(hisi, reg);
*(u16 __force *) walker = val;
- hisi_apb_writel(hisi, reg_val, reg);
+ hisi_apb_writel(hisi, reg, reg_val);
} else if (size == 1) {
reg_val = hisi_apb_readl(hisi, reg);
*(u8 __force *) walker = val;
- hisi_apb_writel(hisi, reg_val, reg);
+ hisi_apb_writel(hisi, reg, reg_val);
} else
return PCIBIOS_BAD_REGISTER_NUMBER;
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 08/11] PCI: hisi: Replace hisi_apb_readl() with dw_pcie_readl_rc()
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
` (5 preceding siblings ...)
2016-10-07 16:37 ` [PATCH 07/11] PCI: hisi: Swap order of hisi_apb_writel() reg/val arguments Bjorn Helgaas
@ 2016-10-07 16:37 ` Bjorn Helgaas
2016-10-07 16:38 ` [PATCH 09/11] PCI: hisi: Include register block base in PCIE_SYS_STATE4 register address Bjorn Helgaas
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:37 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
The dw_pcie_readl_rc() and dw_pcie_writel_rc() interfaces do the same as
hisi_apb_readl() and hisi_apb_writel(), and they also give us a clue that
we're using the DesignWare-generic functionality. Use the dw_*()
interfaces and remove the hisi-specific ones. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 26 +++++++-------------------
1 file changed, 7 insertions(+), 19 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index c6b0459..707dafd 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -43,27 +43,16 @@ struct hisi_pcie {
struct pcie_soc_ops *soc_ops;
};
-static u32 hisi_apb_readl(struct hisi_pcie *hisi, u32 reg)
-{
- return readl(hisi->pp.dbi_base + reg);
-}
-
-static void hisi_apb_writel(struct hisi_pcie *hisi, u32 reg, u32 val)
-{
- writel(val, hisi->pp.dbi_base + reg);
-}
-
/* HipXX PCIe host only supports 32-bit config access */
static int hisi_cfg_read(struct pcie_port *pp, int where, int size, u32 *val)
{
- struct hisi_pcie *hisi = to_hisi_pcie(pp);
u32 reg;
u32 reg_val;
void *walker = ®_val;
walker += (where & 0x3);
reg = where & ~0x3;
- reg_val = hisi_apb_readl(hisi, reg);
+ reg_val = dw_pcie_readl_rc(pp, reg);
if (size == 1)
*val = *(u8 __force *) walker;
@@ -80,7 +69,6 @@ static int hisi_cfg_read(struct pcie_port *pp, int where, int size, u32 *val)
/* HipXX PCIe host only supports 32-bit config access */
static int hisi_cfg_write(struct pcie_port *pp, int where, int size, u32 val)
{
- struct hisi_pcie *hisi = to_hisi_pcie(pp);
u32 reg_val;
u32 reg;
void *walker = ®_val;
@@ -88,15 +76,15 @@ static int hisi_cfg_write(struct pcie_port *pp, int where, int size, u32 val)
walker += (where & 0x3);
reg = where & ~0x3;
if (size == 4)
- hisi_apb_writel(hisi, reg, val);
+ dw_pcie_writel_rc(pp, reg, val);
else if (size == 2) {
- reg_val = hisi_apb_readl(hisi, reg);
+ reg_val = dw_pcie_readl_rc(pp, reg);
*(u16 __force *) walker = val;
- hisi_apb_writel(hisi, reg, reg_val);
+ dw_pcie_writel_rc(pp, reg, reg_val);
} else if (size == 1) {
- reg_val = hisi_apb_readl(hisi, reg);
+ reg_val = dw_pcie_readl_rc(pp, reg);
*(u8 __force *) walker = val;
- hisi_apb_writel(hisi, reg, reg_val);
+ dw_pcie_writel_rc(pp, reg, reg_val);
} else
return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -116,7 +104,7 @@ static int hisi_pcie_link_up_hip06(struct hisi_pcie *hisi)
{
u32 val;
- val = hisi_apb_readl(hisi, PCIE_HIP06_CTRL_OFF + PCIE_SYS_STATE4);
+ val = dw_pcie_readl_rc(&hisi->pp, PCIE_HIP06_CTRL_OFF + PCIE_SYS_STATE4);
return ((val & PCIE_LTSSM_STATE_MASK) == PCIE_LTSSM_LINKUP_STATE);
}
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 09/11] PCI: hisi: Include register block base in PCIE_SYS_STATE4 register address
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
` (6 preceding siblings ...)
2016-10-07 16:37 ` [PATCH 08/11] PCI: hisi: Replace hisi_apb_readl() with dw_pcie_readl_rc() Bjorn Helgaas
@ 2016-10-07 16:38 ` Bjorn Helgaas
2016-10-07 16:38 ` [PATCH 10/11] PCI: hisi: Add local struct device pointers Bjorn Helgaas
2016-10-07 16:38 ` [PATCH 11/11] PCI: hisi: Remove unused platform data Bjorn Helgaas
9 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:38 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
Include the PCIE_HIP06_CTRL_OFF block base in the PCIE_SYS_STATE4 register
address so reads of PCIE_SYS_STATE4 don't have to mention both. No
functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index 707dafd..405a7f7 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -22,11 +22,11 @@
#include "pcie-designware.h"
-#define PCIE_LTSSM_LINKUP_STATE 0x11
-#define PCIE_LTSSM_STATE_MASK 0x3F
-#define PCIE_SUBCTRL_SYS_STATE4_REG 0x6818
-#define PCIE_SYS_STATE4 0x31c
-#define PCIE_HIP06_CTRL_OFF 0x1000
+#define PCIE_SUBCTRL_SYS_STATE4_REG 0x6818
+#define PCIE_HIP06_CTRL_OFF 0x1000
+#define PCIE_SYS_STATE4 (PCIE_HIP06_CTRL_OFF + 0x31c)
+#define PCIE_LTSSM_LINKUP_STATE 0x11
+#define PCIE_LTSSM_STATE_MASK 0x3F
#define to_hisi_pcie(x) container_of(x, struct hisi_pcie, pp)
@@ -104,8 +104,7 @@ static int hisi_pcie_link_up_hip06(struct hisi_pcie *hisi)
{
u32 val;
- val = dw_pcie_readl_rc(&hisi->pp, PCIE_HIP06_CTRL_OFF + PCIE_SYS_STATE4);
-
+ val = dw_pcie_readl_rc(&hisi->pp, PCIE_SYS_STATE4);
return ((val & PCIE_LTSSM_STATE_MASK) == PCIE_LTSSM_LINKUP_STATE);
}
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 10/11] PCI: hisi: Add local struct device pointers
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
` (7 preceding siblings ...)
2016-10-07 16:38 ` [PATCH 09/11] PCI: hisi: Include register block base in PCIE_SYS_STATE4 register address Bjorn Helgaas
@ 2016-10-07 16:38 ` Bjorn Helgaas
2016-10-07 16:38 ` [PATCH 11/11] PCI: hisi: Remove unused platform data Bjorn Helgaas
9 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:38 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 24 +++++++++++++-----------
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index 405a7f7..3fd6757 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -125,15 +125,16 @@ static int hisi_add_pcie_port(struct hisi_pcie *hisi,
struct platform_device *pdev)
{
struct pcie_port *pp = &hisi->pp;
+ struct device *dev = pp->dev;
int ret;
u32 port_id;
- if (of_property_read_u32(pdev->dev.of_node, "port-id", &port_id)) {
- dev_err(&pdev->dev, "failed to read port-id\n");
+ if (of_property_read_u32(dev->of_node, "port-id", &port_id)) {
+ dev_err(dev, "failed to read port-id\n");
return -EINVAL;
}
if (port_id > 3) {
- dev_err(&pdev->dev, "Invalid port-id: %d\n", port_id);
+ dev_err(dev, "Invalid port-id: %d\n", port_id);
return -EINVAL;
}
hisi->port_id = port_id;
@@ -142,7 +143,7 @@ static int hisi_add_pcie_port(struct hisi_pcie *hisi,
ret = dw_pcie_host_init(pp);
if (ret) {
- dev_err(&pdev->dev, "failed to initialize host\n");
+ dev_err(dev, "failed to initialize host\n");
return ret;
}
@@ -151,6 +152,7 @@ static int hisi_add_pcie_port(struct hisi_pcie *hisi,
static int hisi_pcie_probe(struct platform_device *pdev)
{
+ struct device *dev = &pdev->dev;
struct hisi_pcie *hisi;
struct pcie_port *pp;
const struct of_device_id *match;
@@ -158,28 +160,28 @@ static int hisi_pcie_probe(struct platform_device *pdev)
struct device_driver *driver;
int ret;
- hisi = devm_kzalloc(&pdev->dev, sizeof(*hisi), GFP_KERNEL);
+ hisi = devm_kzalloc(dev, sizeof(*hisi), GFP_KERNEL);
if (!hisi)
return -ENOMEM;
pp = &hisi->pp;
- pp->dev = &pdev->dev;
+ pp->dev = dev;
driver = (pdev->dev).driver;
- match = of_match_device(driver->of_match_table, &pdev->dev);
+ match = of_match_device(driver->of_match_table, dev);
hisi->soc_ops = (struct pcie_soc_ops *) match->data;
hisi->subctrl =
syscon_regmap_lookup_by_compatible("hisilicon,pcie-sas-subctrl");
if (IS_ERR(hisi->subctrl)) {
- dev_err(pp->dev, "cannot get subctrl base\n");
+ dev_err(dev, "cannot get subctrl base\n");
return PTR_ERR(hisi->subctrl);
}
reg = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rc_dbi");
- pp->dbi_base = devm_ioremap_resource(&pdev->dev, reg);
+ pp->dbi_base = devm_ioremap_resource(dev, reg);
if (IS_ERR(pp->dbi_base)) {
- dev_err(pp->dev, "cannot get rc_dbi base\n");
+ dev_err(dev, "cannot get rc_dbi base\n");
return PTR_ERR(pp->dbi_base);
}
@@ -189,7 +191,7 @@ static int hisi_pcie_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, hisi);
- dev_warn(pp->dev, "only 32-bit config accesses supported; smaller writes may corrupt adjacent RW1C fields\n");
+ dev_warn(dev, "only 32-bit config accesses supported; smaller writes may corrupt adjacent RW1C fields\n");
return 0;
}
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 11/11] PCI: hisi: Remove unused platform data
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
` (8 preceding siblings ...)
2016-10-07 16:38 ` [PATCH 10/11] PCI: hisi: Add local struct device pointers Bjorn Helgaas
@ 2016-10-07 16:38 ` Bjorn Helgaas
9 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2016-10-07 16:38 UTC (permalink / raw)
To: Zhou Wang, Gabriele Paoloni; +Cc: linux-pci
The hisi driver never uses the platform drvdata pointer, so don't bother
setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-hisi.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c
index 3fd6757..eef91a4 100644
--- a/drivers/pci/host/pcie-hisi.c
+++ b/drivers/pci/host/pcie-hisi.c
@@ -189,8 +189,6 @@ static int hisi_pcie_probe(struct platform_device *pdev)
if (ret)
return ret;
- platform_set_drvdata(pdev, hisi);
-
dev_warn(dev, "only 32-bit config accesses supported; smaller writes may corrupt adjacent RW1C fields\n");
return 0;
^ permalink raw reply related [flat|nested] 11+ messages in thread
end of thread, other threads:[~2016-10-07 16:38 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-10-07 16:36 [PATCH 01/11] PCI: hisi: Rename APB accessors Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 02/11] PCI: hisi: Rename config accessors Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 03/11] PCI: hisi: Name private struct pointer "hisi" consistently Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 04/11] PCI: hisi: Remove redundant struct hisi_pcie.reg_base Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 05/11] PCI: hisi: Pass device-specific struct to internal functions Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 06/11] PCI: hisi: Reorder struct hisi_pcie Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 07/11] PCI: hisi: Swap order of hisi_apb_writel() reg/val arguments Bjorn Helgaas
2016-10-07 16:37 ` [PATCH 08/11] PCI: hisi: Replace hisi_apb_readl() with dw_pcie_readl_rc() Bjorn Helgaas
2016-10-07 16:38 ` [PATCH 09/11] PCI: hisi: Include register block base in PCIE_SYS_STATE4 register address Bjorn Helgaas
2016-10-07 16:38 ` [PATCH 10/11] PCI: hisi: Add local struct device pointers Bjorn Helgaas
2016-10-07 16:38 ` [PATCH 11/11] PCI: hisi: Remove unused platform data Bjorn Helgaas
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