[PATCH 1/8] PCI: artpec6: Name private struct pointer "artpec6" consistently

[PATCH 1/8] PCI: artpec6: Name private struct pointer "artpec6" consistently

[Bjorn Helgaas]

Use a device-specific name, "artpec6", for struct artpec6_pcie pointers
to hint that this is device-specific information.  No functional change
intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/host/pcie-artpec6.c |   57 +++++++++++++++++++--------------------
 1 file changed, 28 insertions(+), 29 deletions(-)

diff --git a/drivers/pci/host/pcie-artpec6.c b/drivers/pci/host/pcie-artpec6.c
index 39bf1a6..55f69eb 100644
--- a/drivers/pci/host/pcie-artpec6.c
+++ b/drivers/pci/host/pcie-artpec6.c
@@ -67,16 +67,16 @@ struct artpec6_pcie {
 
 static int artpec6_pcie_establish_link(struct pcie_port *pp)
 {
-	struct artpec6_pcie *artpec6_pcie = to_artpec6_pcie(pp);
+	struct artpec6_pcie *artpec6 = to_artpec6_pcie(pp);
 	u32 val;
 	unsigned int retries;
 
 	/* Hold DW core in reset */
-	regmap_read(artpec6_pcie->regmap, PCIECFG, &val);
+	regmap_read(artpec6->regmap, PCIECFG, &val);
 	val |= PCIECFG_CORE_RESET_REQ;
-	regmap_write(artpec6_pcie->regmap, PCIECFG, val);
+	regmap_write(artpec6->regmap, PCIECFG, val);
 
-	regmap_read(artpec6_pcie->regmap, PCIECFG, &val);
+	regmap_read(artpec6->regmap, PCIECFG, &val);
 	val |=  PCIECFG_RISRCREN |	/* Receiver term. 50 Ohm */
 		PCIECFG_MODE_TX_DRV_EN |
 		PCIECFG_CISRREN |	/* Reference clock term. 100 Ohm */
@@ -84,27 +84,27 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp)
 	val |= PCIECFG_REFCLK_ENABLE;
 	val &= ~PCIECFG_DBG_OEN;
 	val &= ~PCIECFG_CLKREQ_B;
-	regmap_write(artpec6_pcie->regmap, PCIECFG, val);
+	regmap_write(artpec6->regmap, PCIECFG, val);
 	usleep_range(5000, 6000);
 
-	regmap_read(artpec6_pcie->regmap, NOCCFG, &val);
+	regmap_read(artpec6->regmap, NOCCFG, &val);
 	val |= NOCCFG_ENABLE_CLK_PCIE;
-	regmap_write(artpec6_pcie->regmap, NOCCFG, val);
+	regmap_write(artpec6->regmap, NOCCFG, val);
 	usleep_range(20, 30);
 
-	regmap_read(artpec6_pcie->regmap, PCIECFG, &val);
+	regmap_read(artpec6->regmap, PCIECFG, &val);
 	val |= PCIECFG_PCLK_ENABLE | PCIECFG_PLL_ENABLE;
-	regmap_write(artpec6_pcie->regmap, PCIECFG, val);
+	regmap_write(artpec6->regmap, PCIECFG, val);
 	usleep_range(6000, 7000);
 
-	regmap_read(artpec6_pcie->regmap, NOCCFG, &val);
+	regmap_read(artpec6->regmap, NOCCFG, &val);
 	val &= ~NOCCFG_POWER_PCIE_IDLEREQ;
-	regmap_write(artpec6_pcie->regmap, NOCCFG, val);
+	regmap_write(artpec6->regmap, NOCCFG, val);
 
 	retries = 50;
 	do {
 		usleep_range(1000, 2000);
-		regmap_read(artpec6_pcie->regmap, NOCCFG, &val);
+		regmap_read(artpec6->regmap, NOCCFG, &val);
 		retries--;
 	} while (retries &&
 		(val & (NOCCFG_POWER_PCIE_IDLEACK | NOCCFG_POWER_PCIE_IDLE)));
@@ -112,14 +112,14 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp)
 	retries = 50;
 	do {
 		usleep_range(1000, 2000);
-		val = readl(artpec6_pcie->phy_base + PHY_STATUS);
+		val = readl(artpec6->phy_base + PHY_STATUS);
 		retries--;
 	} while (retries && !(val & PHY_COSPLLLOCK));
 
 	/* Take DW core out of reset */
-	regmap_read(artpec6_pcie->regmap, PCIECFG, &val);
+	regmap_read(artpec6->regmap, PCIECFG, &val);
 	val &= ~PCIECFG_CORE_RESET_REQ;
-	regmap_write(artpec6_pcie->regmap, PCIECFG, val);
+	regmap_write(artpec6->regmap, PCIECFG, val);
 	usleep_range(100, 200);
 
 	/*
@@ -137,9 +137,9 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp)
 	dw_pcie_setup_rc(pp);
 
 	/* assert LTSSM enable */
-	regmap_read(artpec6_pcie->regmap, PCIECFG, &val);
+	regmap_read(artpec6->regmap, PCIECFG, &val);
 	val |= PCIECFG_LTSSM_ENABLE;
-	regmap_write(artpec6_pcie->regmap, PCIECFG, val);
+	regmap_write(artpec6->regmap, PCIECFG, val);
 
 	/* check if the link is up or not */
 	if (!dw_pcie_wait_for_link(pp))
@@ -227,18 +227,17 @@ static int artpec6_add_pcie_port(struct pcie_port *pp,
 
 static int artpec6_pcie_probe(struct platform_device *pdev)
 {
-	struct artpec6_pcie *artpec6_pcie;
+	struct artpec6_pcie *artpec6;
 	struct pcie_port *pp;
 	struct resource *dbi_base;
 	struct resource *phy_base;
 	int ret;
 
-	artpec6_pcie = devm_kzalloc(&pdev->dev, sizeof(*artpec6_pcie),
-				    GFP_KERNEL);
-	if (!artpec6_pcie)
+	artpec6 = devm_kzalloc(&pdev->dev, sizeof(*artpec6), GFP_KERNEL);
+	if (!artpec6)
 		return -ENOMEM;
 
-	pp = &artpec6_pcie->pp;
+	pp = &artpec6->pp;
 	pp->dev = &pdev->dev;
 
 	dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
@@ -247,21 +246,21 @@ static int artpec6_pcie_probe(struct platform_device *pdev)
 		return PTR_ERR(pp->dbi_base);
 
 	phy_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy");
-	artpec6_pcie->phy_base = devm_ioremap_resource(&pdev->dev, phy_base);
-	if (IS_ERR(artpec6_pcie->phy_base))
-		return PTR_ERR(artpec6_pcie->phy_base);
+	artpec6->phy_base = devm_ioremap_resource(&pdev->dev, phy_base);
+	if (IS_ERR(artpec6->phy_base))
+		return PTR_ERR(artpec6->phy_base);
 
-	artpec6_pcie->regmap =
+	artpec6->regmap =
 		syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
 						"axis,syscon-pcie");
-	if (IS_ERR(artpec6_pcie->regmap))
-		return PTR_ERR(artpec6_pcie->regmap);
+	if (IS_ERR(artpec6->regmap))
+		return PTR_ERR(artpec6->regmap);
 
 	ret = artpec6_add_pcie_port(pp, pdev);
 	if (ret < 0)
 		return ret;
 
-	platform_set_drvdata(pdev, artpec6_pcie);
+	platform_set_drvdata(pdev, artpec6);
 	return 0;
 }
 

[PATCH 2/8] PCI: artpec6: Add register accessors

[Bjorn Helgaas]

Add device-specific register accessors for consistency across host
drivers.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/host/pcie-artpec6.c |   43 +++++++++++++++++++++++++--------------
 1 file changed, 28 insertions(+), 15 deletions(-)

diff --git a/drivers/pci/host/pcie-artpec6.c b/drivers/pci/host/pcie-artpec6.c
index 55f69eb..6cfd7a5 100644
--- a/drivers/pci/host/pcie-artpec6.c
+++ b/drivers/pci/host/pcie-artpec6.c
@@ -65,6 +65,19 @@ struct artpec6_pcie {
 
 #define ARTPEC6_CPU_TO_BUS_ADDR		0x0fffffff
 
+static u32 artpec6_readl(struct artpec6_pcie *artpec6, u32 offset)
+{
+	u32 val;
+
+	regmap_read(artpec6->regmap, offset, &val);
+	return val;
+}
+
+static void artpec6_writel(struct artpec6_pcie *artpec6, u32 offset, u32 val)
+{
+	regmap_write(artpec6->regmap, offset, val);
+}
+
 static int artpec6_pcie_establish_link(struct pcie_port *pp)
 {
 	struct artpec6_pcie *artpec6 = to_artpec6_pcie(pp);
@@ -72,11 +85,11 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp)
 	unsigned int retries;
 
 	/* Hold DW core in reset */
-	regmap_read(artpec6->regmap, PCIECFG, &val);
+	val = artpec6_readl(artpec6, PCIECFG);
 	val |= PCIECFG_CORE_RESET_REQ;
-	regmap_write(artpec6->regmap, PCIECFG, val);
+	artpec6_writel(artpec6, PCIECFG, val);
 
-	regmap_read(artpec6->regmap, PCIECFG, &val);
+	val = artpec6_readl(artpec6, PCIECFG);
 	val |=  PCIECFG_RISRCREN |	/* Receiver term. 50 Ohm */
 		PCIECFG_MODE_TX_DRV_EN |
 		PCIECFG_CISRREN |	/* Reference clock term. 100 Ohm */
@@ -84,27 +97,27 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp)
 	val |= PCIECFG_REFCLK_ENABLE;
 	val &= ~PCIECFG_DBG_OEN;
 	val &= ~PCIECFG_CLKREQ_B;
-	regmap_write(artpec6->regmap, PCIECFG, val);
+	artpec6_writel(artpec6, PCIECFG, val);
 	usleep_range(5000, 6000);
 
-	regmap_read(artpec6->regmap, NOCCFG, &val);
+	val = artpec6_readl(artpec6, NOCCFG);
 	val |= NOCCFG_ENABLE_CLK_PCIE;
-	regmap_write(artpec6->regmap, NOCCFG, val);
+	artpec6_writel(artpec6, NOCCFG, val);
 	usleep_range(20, 30);
 
-	regmap_read(artpec6->regmap, PCIECFG, &val);
+	val = artpec6_readl(artpec6, PCIECFG);
 	val |= PCIECFG_PCLK_ENABLE | PCIECFG_PLL_ENABLE;
-	regmap_write(artpec6->regmap, PCIECFG, val);
+	artpec6_writel(artpec6, PCIECFG, val);
 	usleep_range(6000, 7000);
 
-	regmap_read(artpec6->regmap, NOCCFG, &val);
+	val = artpec6_readl(artpec6, NOCCFG);
 	val &= ~NOCCFG_POWER_PCIE_IDLEREQ;
-	regmap_write(artpec6->regmap, NOCCFG, val);
+	artpec6_writel(artpec6, NOCCFG, val);
 
 	retries = 50;
 	do {
 		usleep_range(1000, 2000);
-		regmap_read(artpec6->regmap, NOCCFG, &val);
+		val = artpec6_readl(artpec6, NOCCFG);
 		retries--;
 	} while (retries &&
 		(val & (NOCCFG_POWER_PCIE_IDLEACK | NOCCFG_POWER_PCIE_IDLE)));
@@ -117,9 +130,9 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp)
 	} while (retries && !(val & PHY_COSPLLLOCK));
 
 	/* Take DW core out of reset */
-	regmap_read(artpec6->regmap, PCIECFG, &val);
+	val = artpec6_readl(artpec6, PCIECFG);
 	val &= ~PCIECFG_CORE_RESET_REQ;
-	regmap_write(artpec6->regmap, PCIECFG, val);
+	artpec6_writel(artpec6, PCIECFG, val);
 	usleep_range(100, 200);
 
 	/*
@@ -137,9 +150,9 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp)
 	dw_pcie_setup_rc(pp);
 
 	/* assert LTSSM enable */
-	regmap_read(artpec6->regmap, PCIECFG, &val);
+	val = artpec6_readl(artpec6, PCIECFG);
 	val |= PCIECFG_LTSSM_ENABLE;
-	regmap_write(artpec6->regmap, PCIECFG, val);
+	artpec6_writel(artpec6, PCIECFG, val);
 
 	/* check if the link is up or not */
 	if (!dw_pcie_wait_for_link(pp))

[PATCH 3/8] PCI: artpec6: Pass device-specific struct to internal functions

[Bjorn Helgaas]

Only interfaces used from outside the driver, e.g., those called by the
DesignWare core, need to accept pointers to the generic struct pcie_port.
Internal interfaces can accept pointers to the device-specific struct,
which makes them more straightforward.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/host/pcie-artpec6.c |   24 +++++++++++++++---------
 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/drivers/pci/host/pcie-artpec6.c b/drivers/pci/host/pcie-artpec6.c
index 6cfd7a5..585aac21b 100644
--- a/drivers/pci/host/pcie-artpec6.c
+++ b/drivers/pci/host/pcie-artpec6.c
@@ -78,9 +78,9 @@ static void artpec6_writel(struct artpec6_pcie *artpec6, u32 offset, u32 val)
 	regmap_write(artpec6->regmap, offset, val);
 }
 
-static int artpec6_pcie_establish_link(struct pcie_port *pp)
+static int artpec6_pcie_establish_link(struct artpec6_pcie *artpec6)
 {
-	struct artpec6_pcie *artpec6 = to_artpec6_pcie(pp);
+	struct pcie_port *pp = &artpec6->pp;
 	u32 val;
 	unsigned int retries;
 
@@ -165,16 +165,20 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp)
 	return -ETIMEDOUT;
 }
 
-static void artpec6_pcie_enable_interrupts(struct pcie_port *pp)
+static void artpec6_pcie_enable_interrupts(struct artpec6_pcie *artpec6)
 {
+	struct pcie_port *pp = &artpec6->pp;
+
 	if (IS_ENABLED(CONFIG_PCI_MSI))
 		dw_pcie_msi_init(pp);
 }
 
 static void artpec6_pcie_host_init(struct pcie_port *pp)
 {
-	artpec6_pcie_establish_link(pp);
-	artpec6_pcie_enable_interrupts(pp);
+	struct artpec6_pcie *artpec6 = to_artpec6_pcie(pp);
+
+	artpec6_pcie_establish_link(artpec6);
+	artpec6_pcie_enable_interrupts(artpec6);
 }
 
 static int artpec6_pcie_link_up(struct pcie_port *pp)
@@ -199,14 +203,16 @@ static struct pcie_host_ops artpec6_pcie_host_ops = {
 
 static irqreturn_t artpec6_pcie_msi_handler(int irq, void *arg)
 {
-	struct pcie_port *pp = arg;
+	struct artpec6_pcie *artpec6 = arg;
+	struct pcie_port *pp = &artpec6->pp;
 
 	return dw_handle_msi_irq(pp);
 }
 
-static int artpec6_add_pcie_port(struct pcie_port *pp,
+static int artpec6_add_pcie_port(struct artpec6_pcie *artpec6,
 				 struct platform_device *pdev)
 {
+	struct pcie_port *pp = &artpec6->pp;
 	int ret;
 
 	if (IS_ENABLED(CONFIG_PCI_MSI)) {
@@ -219,7 +225,7 @@ static int artpec6_add_pcie_port(struct pcie_port *pp,
 		ret = devm_request_irq(&pdev->dev, pp->msi_irq,
 				       artpec6_pcie_msi_handler,
 				       IRQF_SHARED | IRQF_NO_THREAD,
-				       "artpec6-pcie-msi", pp);
+				       "artpec6-pcie-msi", artpec6);
 		if (ret) {
 			dev_err(&pdev->dev, "failed to request MSI irq\n");
 			return ret;
@@ -269,7 +275,7 @@ static int artpec6_pcie_probe(struct platform_device *pdev)
 	if (IS_ERR(artpec6->regmap))
 		return PTR_ERR(artpec6->regmap);
 
-	ret = artpec6_add_pcie_port(pp, pdev);
+	ret = artpec6_add_pcie_port(artpec6, pdev);
 	if (ret < 0)
 		return ret;
 

[PATCH 4/8] PCI: artpec6: Add resource name comments

[Bjorn Helgaas]

Add comments about the Device Tree source of resources.  No functional
change.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/host/pcie-artpec6.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pcie-artpec6.c b/drivers/pci/host/pcie-artpec6.c
index 585aac21b..add6b21 100644
--- a/drivers/pci/host/pcie-artpec6.c
+++ b/drivers/pci/host/pcie-artpec6.c
@@ -27,9 +27,9 @@
 #define to_artpec6_pcie(x)	container_of(x, struct artpec6_pcie, pp)
 
 struct artpec6_pcie {
-	struct pcie_port	pp;
-	struct regmap		*regmap;
-	void __iomem		*phy_base;
+	struct pcie_port	pp;		/* pp.dbi_base is DT dbi */
+	struct regmap		*regmap;	/* DT axis,syscon-pcie */
+	void __iomem		*phy_base;	/* DT phy */
 };
 
 /* PCIe Port Logic registers (memory-mapped) */

[PATCH 5/8] PCI: artpec6: Remove unnecessary artpec6_pcie_link_up()

[Bjorn Helgaas]

Remove artpec6_pcie_link_up(); the generic dw_pcie_link_up() does the same
thing, so we don't need a device-specific version.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/host/pcie-artpec6.c |   16 ----------------
 1 file changed, 16 deletions(-)

diff --git a/drivers/pci/host/pcie-artpec6.c b/drivers/pci/host/pcie-artpec6.c
index add6b21..8840e30 100644
--- a/drivers/pci/host/pcie-artpec6.c
+++ b/drivers/pci/host/pcie-artpec6.c
@@ -181,23 +181,7 @@ static void artpec6_pcie_host_init(struct pcie_port *pp)
 	artpec6_pcie_enable_interrupts(artpec6);
 }
 
-static int artpec6_pcie_link_up(struct pcie_port *pp)
-{
-	u32 rc;
-
-	/*
-	 * Get status from Synopsys IP
-	 * link is debug bit 36, debug register 1 starts at bit 32
-	 */
-	rc = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1) & (0x1 << (36 - 32));
-	if (rc)
-		return 1;
-
-	return 0;
-}
-
 static struct pcie_host_ops artpec6_pcie_host_ops = {
-	.link_up = artpec6_pcie_link_up,
 	.host_init = artpec6_pcie_host_init,
 };
 

[PATCH 6/8] PCI: artpec6: Use dw_pcie_readl_rc() and dw_pcie_pcie_writel_rc()

[Bjorn Helgaas]

Use the DesignWare-generic register accessors instead of doing readl() and
writel() directly.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/host/pcie-artpec6.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pcie-artpec6.c b/drivers/pci/host/pcie-artpec6.c
index 8840e30..c3dd571 100644
--- a/drivers/pci/host/pcie-artpec6.c
+++ b/drivers/pci/host/pcie-artpec6.c
@@ -139,7 +139,7 @@ static int artpec6_pcie_establish_link(struct artpec6_pcie *artpec6)
 	 * Enable writing to config regs. This is required as the Synopsys
 	 * driver changes the class code. That register needs DBI write enable.
 	 */
-	writel(DBI_RO_WR_EN, pp->dbi_base + MISC_CONTROL_1_OFF);
+	dw_pcie_writel_rc(pp, MISC_CONTROL_1_OFF, DBI_RO_WR_EN);
 
 	pp->io_base &= ARTPEC6_CPU_TO_BUS_ADDR;
 	pp->mem_base &= ARTPEC6_CPU_TO_BUS_ADDR;
@@ -159,8 +159,8 @@ static int artpec6_pcie_establish_link(struct artpec6_pcie *artpec6)
 		return 0;
 
 	dev_dbg(pp->dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",
-		readl(pp->dbi_base + PCIE_PHY_DEBUG_R0),
-		readl(pp->dbi_base + PCIE_PHY_DEBUG_R1));
+		dw_pcie_readl_rc(pp, PCIE_PHY_DEBUG_R0),
+		dw_pcie_readl_rc(pp, PCIE_PHY_DEBUG_R1));
 
 	return -ETIMEDOUT;
 }

[PATCH 7/8] PCI: artpec6: Add local struct device pointers

[Bjorn Helgaas]

Use a local "struct device *dev" for brevity and consistency with other
drivers.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/host/pcie-artpec6.c |   18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/host/pcie-artpec6.c b/drivers/pci/host/pcie-artpec6.c
index c3dd571..e3f828f 100644
--- a/drivers/pci/host/pcie-artpec6.c
+++ b/drivers/pci/host/pcie-artpec6.c
@@ -197,21 +197,22 @@ static int artpec6_add_pcie_port(struct artpec6_pcie *artpec6,
 				 struct platform_device *pdev)
 {
 	struct pcie_port *pp = &artpec6->pp;
+	struct device *dev = pp->dev;
 	int ret;
 
 	if (IS_ENABLED(CONFIG_PCI_MSI)) {
 		pp->msi_irq = platform_get_irq_byname(pdev, "msi");
 		if (pp->msi_irq <= 0) {
-			dev_err(&pdev->dev, "failed to get MSI irq\n");
+			dev_err(dev, "failed to get MSI irq\n");
 			return -ENODEV;
 		}
 
-		ret = devm_request_irq(&pdev->dev, pp->msi_irq,
+		ret = devm_request_irq(dev, pp->msi_irq,
 				       artpec6_pcie_msi_handler,
 				       IRQF_SHARED | IRQF_NO_THREAD,
 				       "artpec6-pcie-msi", artpec6);
 		if (ret) {
-			dev_err(&pdev->dev, "failed to request MSI irq\n");
+			dev_err(dev, "failed to request MSI irq\n");
 			return ret;
 		}
 	}
@@ -221,7 +222,7 @@ static int artpec6_add_pcie_port(struct artpec6_pcie *artpec6,
 
 	ret = dw_pcie_host_init(pp);
 	if (ret) {
-		dev_err(&pdev->dev, "failed to initialize host\n");
+		dev_err(dev, "failed to initialize host\n");
 		return ret;
 	}
 
@@ -230,26 +231,27 @@ static int artpec6_add_pcie_port(struct artpec6_pcie *artpec6,
 
 static int artpec6_pcie_probe(struct platform_device *pdev)
 {
+	struct device *dev = &pdev->dev;
 	struct artpec6_pcie *artpec6;
 	struct pcie_port *pp;
 	struct resource *dbi_base;
 	struct resource *phy_base;
 	int ret;
 
-	artpec6 = devm_kzalloc(&pdev->dev, sizeof(*artpec6), GFP_KERNEL);
+	artpec6 = devm_kzalloc(dev, sizeof(*artpec6), GFP_KERNEL);
 	if (!artpec6)
 		return -ENOMEM;
 
 	pp = &artpec6->pp;
-	pp->dev = &pdev->dev;
+	pp->dev = dev;
 
 	dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
-	pp->dbi_base = devm_ioremap_resource(&pdev->dev, dbi_base);
+	pp->dbi_base = devm_ioremap_resource(dev, dbi_base);
 	if (IS_ERR(pp->dbi_base))
 		return PTR_ERR(pp->dbi_base);
 
 	phy_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy");
-	artpec6->phy_base = devm_ioremap_resource(&pdev->dev, phy_base);
+	artpec6->phy_base = devm_ioremap_resource(dev, phy_base);
 	if (IS_ERR(artpec6->phy_base))
 		return PTR_ERR(artpec6->phy_base);
 

[PATCH 8/8] PCI: artpec6: Remove unused platform data

[Bjorn Helgaas]

The artpec6 driver never uses the platform drvdata pointer, so don't
bother setting it.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/host/pcie-artpec6.c |    1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/pci/host/pcie-artpec6.c b/drivers/pci/host/pcie-artpec6.c
index e3f828f..2a452c0 100644
--- a/drivers/pci/host/pcie-artpec6.c
+++ b/drivers/pci/host/pcie-artpec6.c
@@ -265,7 +265,6 @@ static int artpec6_pcie_probe(struct platform_device *pdev)
 	if (ret < 0)
 		return ret;
 
-	platform_set_drvdata(pdev, artpec6);
 	return 0;
 }
 

Re: [PATCH 1/8] PCI: artpec6: Name private struct pointer "artpec6" consistently

[Jesper Nilsson]

On Fri, Oct 07, 2016 at 11:32:33AM -0500, Bjorn Helgaas wrote:
> Use a device-specific name, "artpec6", for struct artpec6_pcie pointers
> to hint that this is device-specific information.  No functional change
> intended.

Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>

> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

/^JN - Jesper Nilsson
-- 
               Jesper Nilsson -- jesper.nilsson@axis.com

Re: [PATCH 2/8] PCI: artpec6: Add register accessors

[Jesper Nilsson]

On Fri, Oct 07, 2016 at 11:32:45AM -0500, Bjorn Helgaas wrote:
> Add device-specific register accessors for consistency across host
> drivers.  No functional change intended.

Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>

> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

/^JN - Jesper Nilsson
-- 
               Jesper Nilsson -- jesper.nilsson@axis.com

Re: [PATCH 3/8] PCI: artpec6: Pass device-specific struct to internal functions

[Jesper Nilsson]

On Fri, Oct 07, 2016 at 11:32:52AM -0500, Bjorn Helgaas wrote:
> Only interfaces used from outside the driver, e.g., those called by the
> DesignWare core, need to accept pointers to the generic struct pcie_port.
> Internal interfaces can accept pointers to the device-specific struct,
> which makes them more straightforward.  No functional change intended.

Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>

> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

/^JN - Jesper Nilsson
-- 
               Jesper Nilsson -- jesper.nilsson@axis.com

Re: [PATCH 4/8] PCI: artpec6: Add resource name comments

[Jesper Nilsson]

On Fri, Oct 07, 2016 at 11:33:00AM -0500, Bjorn Helgaas wrote:
> Add comments about the Device Tree source of resources.  No functional
> change.

Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>

> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

/^JN - Jesper Nilsson
-- 
               Jesper Nilsson -- jesper.nilsson@axis.com

Re: [PATCH 5/8] PCI: artpec6: Remove unnecessary artpec6_pcie_link_up()

[Jesper Nilsson]

On Fri, Oct 07, 2016 at 11:33:08AM -0500, Bjorn Helgaas wrote:
> Remove artpec6_pcie_link_up(); the generic dw_pcie_link_up() does the same
> thing, so we don't need a device-specific version.

Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>

> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

/^JN - Jesper Nilsson
-- 
               Jesper Nilsson -- jesper.nilsson@axis.com

Re: [PATCH 6/8] PCI: artpec6: Use dw_pcie_readl_rc() and dw_pcie_pcie_writel_rc()

[Jesper Nilsson]

On Fri, Oct 07, 2016 at 11:33:16AM -0500, Bjorn Helgaas wrote:
> Use the DesignWare-generic register accessors instead of doing readl() and
> writel() directly.  No functional change intended.

Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>

> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

/^JN - Jesper Nilsson
-- 
               Jesper Nilsson -- jesper.nilsson@axis.com

Re: [PATCH 7/8] PCI: artpec6: Add local struct device pointers

[Jesper Nilsson]

On Fri, Oct 07, 2016 at 11:33:24AM -0500, Bjorn Helgaas wrote:
> Use a local "struct device *dev" for brevity and consistency with other
> drivers.  No functional change intended.

Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>

> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

/^JN - Jesper Nilsson
-- 
               Jesper Nilsson -- jesper.nilsson@axis.com

Re: [PATCH 8/8] PCI: artpec6: Remove unused platform data

[Jesper Nilsson]

On Fri, Oct 07, 2016 at 11:33:34AM -0500, Bjorn Helgaas wrote:
> The artpec6 driver never uses the platform drvdata pointer, so don't
> bother setting it.  No functional change intended.

Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>

> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

/^JN - Jesper Nilsson
-- 
               Jesper Nilsson -- jesper.nilsson@axis.com

Re: [PATCH 1/8] PCI: artpec6: Name private struct pointer "artpec6" consistently

[Bjorn Helgaas]

On Sat, Oct 08, 2016 at 09:40:45AM +0200, Jesper Nilsson wrote:
> On Fri, Oct 07, 2016 at 11:32:33AM -0500, Bjorn Helgaas wrote:
> > Use a device-specific name, "artpec6", for struct artpec6_pcie pointers
> > to hint that this is device-specific information.  No functional change
> > intended.
> 
> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>

Hi Jesper,

I updated this series to keep "artpec6_pcie" instead of changing to
"artpec" and change the accessor names similarly.  I repushed the
branch.

> > Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> 
> /^JN - Jesper Nilsson
> -- 
>                Jesper Nilsson -- jesper.nilsson@axis.com
> --
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