[Qemu-devel] [Bug 1631625] [NEW] target-mips/dsp_helper.c: two possible bad shifts

[Qemu-devel] [Bug 1631625] [NEW] target-mips/dsp_helper.c: two possible bad shifts

[dcb]

Public bug reported:

target-mips/dsp_helper.c:3480:1: error: V629 Consider inspecting the
'0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with a
subsequent expansion to the 64-bit type.

Source code is

        temp = temp & ((0x01 << (size + 1)) - 1);

If size >= 32, then better code might be

        temp = temp & ((0x01UL << (size + 1)) - 1);

target-mips/dsp_helper.c:3509:1: error: V629 Consider inspecting the
'0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with a
subsequent expansion to the 64-bit type.

Duplicate

** Affects: qemu
     Importance: Undecided
         Status: New

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https://bugs.launchpad.net/bugs/1631625

Title:
  target-mips/dsp_helper.c: two possible bad shifts

Status in QEMU:
  New

Bug description:
  target-mips/dsp_helper.c:3480:1: error: V629 Consider inspecting the
  '0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with
  a subsequent expansion to the 64-bit type.

  Source code is

          temp = temp & ((0x01 << (size + 1)) - 1);

  If size >= 32, then better code might be

          temp = temp & ((0x01UL << (size + 1)) - 1);

  target-mips/dsp_helper.c:3509:1: error: V629 Consider inspecting the
  '0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with
  a subsequent expansion to the 64-bit type.

  Duplicate

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[Qemu-devel] [Bug 1631625] Re: target-mips/dsp_helper.c: two possible bad shifts

[Thomas Huth]

Fix has been committed:
http://git.qemu.org/?p=qemu.git;a=commitdiff;h=e6e2784cacd4cfec149

** Changed in: qemu
       Status: New => Fix Committed

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1631625

Title:
  target-mips/dsp_helper.c: two possible bad shifts

Status in QEMU:
  Fix Committed

Bug description:
  target-mips/dsp_helper.c:3480:1: error: V629 Consider inspecting the
  '0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with
  a subsequent expansion to the 64-bit type.

  Source code is

          temp = temp & ((0x01 << (size + 1)) - 1);

  If size >= 32, then better code might be

          temp = temp & ((0x01UL << (size + 1)) - 1);

  target-mips/dsp_helper.c:3509:1: error: V629 Consider inspecting the
  '0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with
  a subsequent expansion to the 64-bit type.

  Duplicate

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[Qemu-devel] [Bug 1631625] Re: target-mips/dsp_helper.c: two possible bad shifts

[Thomas Huth]

Released with version 2.8

** Changed in: qemu
       Status: Fix Committed => Fix Released

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1631625

Title:
  target-mips/dsp_helper.c: two possible bad shifts

Status in QEMU:
  Fix Released

Bug description:
  target-mips/dsp_helper.c:3480:1: error: V629 Consider inspecting the
  '0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with
  a subsequent expansion to the 64-bit type.

  Source code is

          temp = temp & ((0x01 << (size + 1)) - 1);

  If size >= 32, then better code might be

          temp = temp & ((0x01UL << (size + 1)) - 1);

  target-mips/dsp_helper.c:3509:1: error: V629 Consider inspecting the
  '0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with
  a subsequent expansion to the 64-bit type.

  Duplicate

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