* [U-Boot] [RFC PATCH 0/1] 4-byte SPI flash addressing
@ 2016-10-17 0:51 Chris Packham
2016-10-17 0:51 ` [U-Boot] [RFC PATCH 1/1] sf: support chips using 4-byte addressing Chris Packham
0 siblings, 1 reply; 5+ messages in thread
From: Chris Packham @ 2016-10-17 0:51 UTC (permalink / raw)
To: u-boot
I'm working on a board that uses a MX25L25735E spi-nor flash chip from
Macronix. This is a 32MB chip that uses 4-bytes for addressing.
Annoyingly this chip identifies the same as a MX25L25635F the only
difference appears to be the size reported (I don't actually have a
MX25L25635F so that statement is an educated guess based on the
datasheets).
What follows is a patch that gets the flash going on the board I'm
working on. But I am wondering if instead of a config option I should
follow more closely what Linux does and add and addr_width to struct
spi_flash which gets set based on the size detected.
Chris Packham (1):
sf: support chips using 4-byte addressing
drivers/mtd/spi/Kconfig | 7 +++++++
drivers/mtd/spi/sf_internal.h | 5 +++++
drivers/mtd/spi/spi_flash.c | 7 +++++++
3 files changed, 19 insertions(+)
--
2.10.0.479.g7c56b16
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [RFC PATCH 1/1] sf: support chips using 4-byte addressing
2016-10-17 0:51 [U-Boot] [RFC PATCH 0/1] 4-byte SPI flash addressing Chris Packham
@ 2016-10-17 0:51 ` Chris Packham
2016-10-19 8:36 ` [U-Boot] [RFC PATCH v2] " Chris Packham
0 siblings, 1 reply; 5+ messages in thread
From: Chris Packham @ 2016-10-17 0:51 UTC (permalink / raw)
To: u-boot
Signed-off-by: Chris Packham <judge.packham@gmail.com>
---
drivers/mtd/spi/Kconfig | 7 +++++++
drivers/mtd/spi/sf_internal.h | 5 +++++
drivers/mtd/spi/spi_flash.c | 7 +++++++
3 files changed, 19 insertions(+)
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 1f23c8e34e6f..f5020f799d78 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -42,6 +42,13 @@ config SPI_FLASH_BAR
Bank/Extended address registers are used to access the flash
which has size > 16MiB in 3-byte addressing.
+config SPI_FLASH_4B_ADDR
+ bool "SPI flash use 4-byte addressing"
+ depends on SPI_FLASH
+ help
+ Enable 4-byte addressing for SPI flash. This allows use of SPI flash
+ chips which use 4-byte addressing.
+
if SPI_FLASH
config SPI_FLASH_ATMEL
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index cde4cfbf2e32..fef8d1ecc89e 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -26,7 +26,12 @@ enum spi_nor_option_flags {
};
#define SPI_FLASH_3B_ADDR_LEN 3
+#define SPI_FLASH_4B_ADDR_LEN 4
+#ifdef CONFIG_SPI_FLASH_4B_ADDR
+#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_4B_ADDR_LEN)
+#else
#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
+#endif
#define SPI_FLASH_16MB_BOUN 0x1000000
/* CFI Manufacture ID's */
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 7f6e9ae23ea8..bed3ab4762cf 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -25,9 +25,16 @@ DECLARE_GLOBAL_DATA_PTR;
static void spi_flash_addr(u32 addr, u8 *cmd)
{
/* cmd[0] is actual command */
+#ifdef CONFIG_SPI_FLASH_4B_ADDR
+ cmd[1] = addr >> 24;
+ cmd[2] = addr >> 16;
+ cmd[3] = addr >> 8;
+ cmd[4] = addr;
+#else
cmd[1] = addr >> 16;
cmd[2] = addr >> 8;
cmd[3] = addr >> 0;
+#endif
}
static int read_sr(struct spi_flash *flash, u8 *rs)
--
2.10.0.479.g7c56b16
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [RFC PATCH v2] sf: support chips using 4-byte addressing
2016-10-17 0:51 ` [U-Boot] [RFC PATCH 1/1] sf: support chips using 4-byte addressing Chris Packham
@ 2016-10-19 8:36 ` Chris Packham
2016-10-19 11:50 ` Siva Durga Prasad Paladugu
0 siblings, 1 reply; 5+ messages in thread
From: Chris Packham @ 2016-10-19 8:36 UTC (permalink / raw)
To: u-boot
SPI chips with >16MB capacity use 4-byte addressing to allow
accessing beyond 16MB. When the size of the SPI flash exceeds 16MB
switch to using 4 byte addressing.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
---
Changes in v2:
- automatically detect when 4 byte addressing is needed. This is similar
to how the linux kernel does the same detection
drivers/mtd/spi/sf_internal.h | 4 ++--
drivers/mtd/spi/spi_flash.c | 32 ++++++++++++++++++++++----------
include/spi_flash.h | 2 ++
3 files changed, 26 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index cde4cfbf2e32..db4532849145 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -25,8 +25,8 @@ enum spi_nor_option_flags {
SNOR_F_USE_FSR = BIT(1),
};
-#define SPI_FLASH_3B_ADDR_LEN 3
-#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
+#define SPI_FLASE_MAX_ADDR_WIDTH 4
+#define SPI_FLASH_CMD_LEN (1 + SPI_FLASE_MAX_ADDR_WIDTH)
#define SPI_FLASH_16MB_BOUN 0x1000000
/* CFI Manufacture ID's */
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 7f6e9ae23ea8..a3efaa129231 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -22,12 +22,19 @@
DECLARE_GLOBAL_DATA_PTR;
-static void spi_flash_addr(u32 addr, u8 *cmd)
+static void spi_flash_addr(u32 addr, u8 *cmd, u8 addr_width)
{
/* cmd[0] is actual command */
- cmd[1] = addr >> 16;
- cmd[2] = addr >> 8;
- cmd[3] = addr >> 0;
+ if (addr_width == 4) {
+ cmd[1] = addr >> 24;
+ cmd[2] = addr >> 16;
+ cmd[3] = addr >> 8;
+ cmd[4] = addr;
+ } else {
+ cmd[1] = addr >> 16;
+ cmd[2] = addr >> 8;
+ cmd[3] = addr >> 0;
+ }
}
static int read_sr(struct spi_flash *flash, u8 *rs)
@@ -357,12 +364,13 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
if (ret < 0)
return ret;
#endif
- spi_flash_addr(erase_addr, cmd);
+ spi_flash_addr(erase_addr, cmd, flash->addr_width);
debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
cmd[2], cmd[3], erase_addr);
- ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
+ ret = spi_flash_write_common(flash, cmd, flash->addr_width + 1,
+ NULL, 0);
if (ret < 0) {
debug("SF: erase failed\n");
break;
@@ -415,12 +423,12 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
chunk_len = min(chunk_len,
(size_t)spi->max_write_size);
- spi_flash_addr(write_addr, cmd);
+ spi_flash_addr(write_addr, cmd, flash->addr_width);
debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
- ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
+ ret = spi_flash_write_common(flash, cmd, flash->addr_width + 1,
buf + actual, chunk_len);
if (ret < 0) {
debug("SF: write failed\n");
@@ -492,7 +500,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
return 0;
}
- cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
+ cmdsz = flash->addr_width + 1 + flash->dummy_byte;
cmd = calloc(1, cmdsz);
if (!cmd) {
debug("SF: Failed to allocate cmd\n");
@@ -520,7 +528,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
else
read_len = remain_len;
- spi_flash_addr(read_addr, cmd);
+ spi_flash_addr(read_addr, cmd, flash->addr_width);
ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
if (ret < 0) {
@@ -1154,6 +1162,10 @@ int spi_flash_scan(struct spi_flash *flash)
if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
flash->size <<= 1;
#endif
+ if (flash->size > SPI_FLASH_16MB_BOUN)
+ flash->addr_width = 4;
+ else
+ flash->addr_width = 3;
#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
/* Compute erase sector and command */
diff --git a/include/spi_flash.h b/include/spi_flash.h
index be2fe3f84cb9..c65bf22aee8b 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -39,6 +39,7 @@ struct spi_slave;
* @flags: Indication of spi flash flags
* @size: Total flash size
* @page_size: Write (page) size
+ * @addr_width: number of address bytes
* @sector_size: Sector size
* @erase_size: Erase size
* @bank_read_cmd: Bank read cmd
@@ -72,6 +73,7 @@ struct spi_flash {
u32 size;
u32 page_size;
+ u8 addr_width;
u32 sector_size;
u32 erase_size;
#ifdef CONFIG_SPI_FLASH_BAR
--
2.10.0.479.g7c56b16
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [RFC PATCH v2] sf: support chips using 4-byte addressing
2016-10-19 8:36 ` [U-Boot] [RFC PATCH v2] " Chris Packham
@ 2016-10-19 11:50 ` Siva Durga Prasad Paladugu
2016-10-20 4:35 ` Vignesh R
0 siblings, 1 reply; 5+ messages in thread
From: Siva Durga Prasad Paladugu @ 2016-10-19 11:50 UTC (permalink / raw)
To: u-boot
Hi Chris,
> -----Original Message-----
> From: U-Boot [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Chris
> Packham
> Sent: Wednesday, October 19, 2016 2:06 PM
> To: u-boot at lists.denx.de
> Cc: Jagan Teki <jteki@openedev.com>; Chris Packham
> <judge.packham@gmail.com>
> Subject: [U-Boot] [RFC PATCH v2] sf: support chips using 4-byte addressing
>
> SPI chips with >16MB capacity use 4-byte addressing to allow accessing
> beyond 16MB. When the size of the SPI flash exceeds 16MB switch to using 4
> byte addressing.
Not all spi controllers support 4-byte addressing and hence its better not to decide
just using spi flash device size but consider capability of driver also into account.
Thanks,
Siva
>
> Signed-off-by: Chris Packham <judge.packham@gmail.com>
>
> ---
>
> Changes in v2:
> - automatically detect when 4 byte addressing is needed. This is similar
> to how the linux kernel does the same detection
>
> drivers/mtd/spi/sf_internal.h | 4 ++--
> drivers/mtd/spi/spi_flash.c | 32 ++++++++++++++++++++++----------
> include/spi_flash.h | 2 ++
> 3 files changed, 26 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
> index cde4cfbf2e32..db4532849145 100644
> --- a/drivers/mtd/spi/sf_internal.h
> +++ b/drivers/mtd/spi/sf_internal.h
> @@ -25,8 +25,8 @@ enum spi_nor_option_flags {
> SNOR_F_USE_FSR = BIT(1),
> };
>
> -#define SPI_FLASH_3B_ADDR_LEN 3
> -#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
> +#define SPI_FLASE_MAX_ADDR_WIDTH 4
> +#define SPI_FLASH_CMD_LEN (1 + SPI_FLASE_MAX_ADDR_WIDTH)
> #define SPI_FLASH_16MB_BOUN 0x1000000
>
> /* CFI Manufacture ID's */
> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index
> 7f6e9ae23ea8..a3efaa129231 100644
> --- a/drivers/mtd/spi/spi_flash.c
> +++ b/drivers/mtd/spi/spi_flash.c
> @@ -22,12 +22,19 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> -static void spi_flash_addr(u32 addr, u8 *cmd)
> +static void spi_flash_addr(u32 addr, u8 *cmd, u8 addr_width)
> {
> /* cmd[0] is actual command */
> - cmd[1] = addr >> 16;
> - cmd[2] = addr >> 8;
> - cmd[3] = addr >> 0;
> + if (addr_width == 4) {
> + cmd[1] = addr >> 24;
> + cmd[2] = addr >> 16;
> + cmd[3] = addr >> 8;
> + cmd[4] = addr;
> + } else {
> + cmd[1] = addr >> 16;
> + cmd[2] = addr >> 8;
> + cmd[3] = addr >> 0;
> + }
> }
>
> static int read_sr(struct spi_flash *flash, u8 *rs) @@ -357,12 +364,13 @@
> int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
> if (ret < 0)
> return ret;
> #endif
> - spi_flash_addr(erase_addr, cmd);
> + spi_flash_addr(erase_addr, cmd, flash->addr_width);
>
> debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
> cmd[2], cmd[3], erase_addr);
>
> - ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL,
> 0);
> + ret = spi_flash_write_common(flash, cmd, flash->addr_width
> + 1,
> + NULL, 0);
> if (ret < 0) {
> debug("SF: erase failed\n");
> break;
> @@ -415,12 +423,12 @@ int spi_flash_cmd_write_ops(struct spi_flash
> *flash, u32 offset,
> chunk_len = min(chunk_len,
> (size_t)spi->max_write_size);
>
> - spi_flash_addr(write_addr, cmd);
> + spi_flash_addr(write_addr, cmd, flash->addr_width);
>
> debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }
> chunk_len = %zu\n",
> buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
>
> - ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
> + ret = spi_flash_write_common(flash, cmd, flash->addr_width
> + 1,
> buf + actual, chunk_len);
> if (ret < 0) {
> debug("SF: write failed\n");
> @@ -492,7 +500,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash,
> u32 offset,
> return 0;
> }
>
> - cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
> + cmdsz = flash->addr_width + 1 + flash->dummy_byte;
> cmd = calloc(1, cmdsz);
> if (!cmd) {
> debug("SF: Failed to allocate cmd\n"); @@ -520,7 +528,7 @@
> int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
> else
> read_len = remain_len;
>
> - spi_flash_addr(read_addr, cmd);
> + spi_flash_addr(read_addr, cmd, flash->addr_width);
>
> ret = spi_flash_read_common(flash, cmd, cmdsz, data,
> read_len);
> if (ret < 0) {
> @@ -1154,6 +1162,10 @@ int spi_flash_scan(struct spi_flash *flash)
> if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
> flash->size <<= 1;
> #endif
> + if (flash->size > SPI_FLASH_16MB_BOUN)
> + flash->addr_width = 4;
> + else
> + flash->addr_width = 3;
>
> #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
> /* Compute erase sector and command */ diff --git
> a/include/spi_flash.h b/include/spi_flash.h index
> be2fe3f84cb9..c65bf22aee8b 100644
> --- a/include/spi_flash.h
> +++ b/include/spi_flash.h
> @@ -39,6 +39,7 @@ struct spi_slave;
> * @flags: Indication of spi flash flags
> * @size: Total flash size
> * @page_size: Write (page) size
> + * @addr_width: number of address bytes
> * @sector_size: Sector size
> * @erase_size: Erase size
> * @bank_read_cmd: Bank read cmd
> @@ -72,6 +73,7 @@ struct spi_flash {
>
> u32 size;
> u32 page_size;
> + u8 addr_width;
> u32 sector_size;
> u32 erase_size;
> #ifdef CONFIG_SPI_FLASH_BAR
> --
> 2.10.0.479.g7c56b16
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [RFC PATCH v2] sf: support chips using 4-byte addressing
2016-10-19 11:50 ` Siva Durga Prasad Paladugu
@ 2016-10-20 4:35 ` Vignesh R
0 siblings, 0 replies; 5+ messages in thread
From: Vignesh R @ 2016-10-20 4:35 UTC (permalink / raw)
To: u-boot
On Wednesday 19 October 2016 05:20 PM, Siva Durga Prasad Paladugu wrote:
> Hi Chris,
>
>> -----Original Message-----
>> From: U-Boot [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Chris
>> Packham
>> Sent: Wednesday, October 19, 2016 2:06 PM
>> To: u-boot at lists.denx.de
>> Cc: Jagan Teki <jteki@openedev.com>; Chris Packham
>> <judge.packham@gmail.com>
>> Subject: [U-Boot] [RFC PATCH v2] sf: support chips using 4-byte addressing
>>
>> SPI chips with >16MB capacity use 4-byte addressing to allow accessing
>> beyond 16MB. When the size of the SPI flash exceeds 16MB switch to using 4
>> byte addressing.
>
> Not all spi controllers support 4-byte addressing and hence its better not to decide
> just using spi flash device size but consider capability of driver also into account.
Also not all SPI devices >16MB support 4 byte addressing, some flash
devices just using BAR register to support > 4byte addressing
Please look at the series posted by Cyrille Pitchen on linux-mtd to see
how kernel is planning to support 4 byte addressing opcodes:
http://lists-archives.com/linux-kernel/28675410-mtd-spi-nor-parse-sfdp-tables-to-setup-q-spi-memories.html
>
> Thanks,
> Siva
>
>>
>> Signed-off-by: Chris Packham <judge.packham@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - automatically detect when 4 byte addressing is needed. This is similar
>> to how the linux kernel does the same detection
>>
>> drivers/mtd/spi/sf_internal.h | 4 ++--
>> drivers/mtd/spi/spi_flash.c | 32 ++++++++++++++++++++++----------
>> include/spi_flash.h | 2 ++
>> 3 files changed, 26 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
>> index cde4cfbf2e32..db4532849145 100644
>> --- a/drivers/mtd/spi/sf_internal.h
>> +++ b/drivers/mtd/spi/sf_internal.h
>> @@ -25,8 +25,8 @@ enum spi_nor_option_flags {
>> SNOR_F_USE_FSR = BIT(1),
>> };
>>
>> -#define SPI_FLASH_3B_ADDR_LEN 3
>> -#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
>> +#define SPI_FLASE_MAX_ADDR_WIDTH 4
>> +#define SPI_FLASH_CMD_LEN (1 + SPI_FLASE_MAX_ADDR_WIDTH)
>> #define SPI_FLASH_16MB_BOUN 0x1000000
>>
>> /* CFI Manufacture ID's */
>> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index
>> 7f6e9ae23ea8..a3efaa129231 100644
>> --- a/drivers/mtd/spi/spi_flash.c
>> +++ b/drivers/mtd/spi/spi_flash.c
>> @@ -22,12 +22,19 @@
>>
>> DECLARE_GLOBAL_DATA_PTR;
>>
>> -static void spi_flash_addr(u32 addr, u8 *cmd)
>> +static void spi_flash_addr(u32 addr, u8 *cmd, u8 addr_width)
>> {
>> /* cmd[0] is actual command */
>> - cmd[1] = addr >> 16;
>> - cmd[2] = addr >> 8;
>> - cmd[3] = addr >> 0;
>> + if (addr_width == 4) {
>> + cmd[1] = addr >> 24;
>> + cmd[2] = addr >> 16;
>> + cmd[3] = addr >> 8;
>> + cmd[4] = addr;
>> + } else {
>> + cmd[1] = addr >> 16;
>> + cmd[2] = addr >> 8;
>> + cmd[3] = addr >> 0;
>> + }
>> }
>>
>> static int read_sr(struct spi_flash *flash, u8 *rs) @@ -357,12 +364,13 @@
>> int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
>> if (ret < 0)
>> return ret;
>> #endif
>> - spi_flash_addr(erase_addr, cmd);
>> + spi_flash_addr(erase_addr, cmd, flash->addr_width);
>>
>> debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
>> cmd[2], cmd[3], erase_addr);
>>
>> - ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL,
>> 0);
>> + ret = spi_flash_write_common(flash, cmd, flash->addr_width
>> + 1,
>> + NULL, 0);
>> if (ret < 0) {
>> debug("SF: erase failed\n");
>> break;
>> @@ -415,12 +423,12 @@ int spi_flash_cmd_write_ops(struct spi_flash
>> *flash, u32 offset,
>> chunk_len = min(chunk_len,
>> (size_t)spi->max_write_size);
>>
>> - spi_flash_addr(write_addr, cmd);
>> + spi_flash_addr(write_addr, cmd, flash->addr_width);
>>
>> debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }
>> chunk_len = %zu\n",
>> buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
>>
>> - ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
>> + ret = spi_flash_write_common(flash, cmd, flash->addr_width
>> + 1,
>> buf + actual, chunk_len);
>> if (ret < 0) {
>> debug("SF: write failed\n");
>> @@ -492,7 +500,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash,
>> u32 offset,
>> return 0;
>> }
>>
>> - cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
>> + cmdsz = flash->addr_width + 1 + flash->dummy_byte;
>> cmd = calloc(1, cmdsz);
>> if (!cmd) {
>> debug("SF: Failed to allocate cmd\n"); @@ -520,7 +528,7 @@
>> int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
>> else
>> read_len = remain_len;
>>
>> - spi_flash_addr(read_addr, cmd);
>> + spi_flash_addr(read_addr, cmd, flash->addr_width);
>>
>> ret = spi_flash_read_common(flash, cmd, cmdsz, data,
>> read_len);
>> if (ret < 0) {
>> @@ -1154,6 +1162,10 @@ int spi_flash_scan(struct spi_flash *flash)
>> if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
>> flash->size <<= 1;
>> #endif
>> + if (flash->size > SPI_FLASH_16MB_BOUN)
>> + flash->addr_width = 4;
>> + else
>> + flash->addr_width = 3;
>>
>> #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
>> /* Compute erase sector and command */ diff --git
>> a/include/spi_flash.h b/include/spi_flash.h index
>> be2fe3f84cb9..c65bf22aee8b 100644
>> --- a/include/spi_flash.h
>> +++ b/include/spi_flash.h
>> @@ -39,6 +39,7 @@ struct spi_slave;
>> * @flags: Indication of spi flash flags
>> * @size: Total flash size
>> * @page_size: Write (page) size
>> + * @addr_width: number of address bytes
>> * @sector_size: Sector size
>> * @erase_size: Erase size
>> * @bank_read_cmd: Bank read cmd
>> @@ -72,6 +73,7 @@ struct spi_flash {
>>
>> u32 size;
>> u32 page_size;
>> + u8 addr_width;
>> u32 sector_size;
>> u32 erase_size;
>> #ifdef CONFIG_SPI_FLASH_BAR
>> --
>> 2.10.0.479.g7c56b16
>>
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> http://lists.denx.de/mailman/listinfo/u-boot
> _______________________________________________
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> U-Boot at lists.denx.de
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--
Regards
Vignesh
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2016-10-20 4:35 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-10-17 0:51 [U-Boot] [RFC PATCH 0/1] 4-byte SPI flash addressing Chris Packham
2016-10-17 0:51 ` [U-Boot] [RFC PATCH 1/1] sf: support chips using 4-byte addressing Chris Packham
2016-10-19 8:36 ` [U-Boot] [RFC PATCH v2] " Chris Packham
2016-10-19 11:50 ` Siva Durga Prasad Paladugu
2016-10-20 4:35 ` Vignesh R
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