From: Rob Herring <robh@kernel.org> To: Pan Wen <wenpan@hisilicon.com> Cc: mturquette@baylibre.com, sboyd@codeaurora.org, mark.rutland@arm.com, linux@armlinux.org.uk, xuwei5@hisilicon.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, howell.yang@hisilicon.com, xuejiancheng@hisilicon.com, jalen.hsu@hisilicon.com, lvkuanliang@hisilicon.com, suwenping@hisilicon.com, raojun@hisilicon.com, kevin.lixu@hisilicon.com Subject: Re: [PATCH 2/3] clk: hisilicon: add CRG driver for Hi3516CV300 SoC Date: Tue, 18 Oct 2016 10:58:35 -0500 [thread overview] Message-ID: <20161018155835.qyoffwznacdac46y@rob-hp-laptop> (raw) In-Reply-To: <20161017120705.3726-3-wenpan@hisilicon.com> On Mon, Oct 17, 2016 at 08:07:04PM +0800, Pan Wen wrote: > Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset > Generator) module generates clock and reset signals used > by other module blocks on SoC. > > Signed-off-by: Pan Wen <wenpan@hisilicon.com> > --- > .../devicetree/bindings/clock/hisi-crg.txt | 50 ++++ > drivers/clk/hisilicon/Kconfig | 8 + > drivers/clk/hisilicon/Makefile | 1 + > drivers/clk/hisilicon/crg-hi3516cv300.c | 330 +++++++++++++++++++++ > drivers/clk/hisilicon/crg.h | 34 +++ > include/dt-bindings/clock/hi3516cv300-clock.h | 48 +++ > 6 files changed, 471 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/hisi-crg.txt > create mode 100644 drivers/clk/hisilicon/crg-hi3516cv300.c > create mode 100644 drivers/clk/hisilicon/crg.h > create mode 100644 include/dt-bindings/clock/hi3516cv300-clock.h > > diff --git a/Documentation/devicetree/bindings/clock/hisi-crg.txt b/Documentation/devicetree/bindings/clock/hisi-crg.txt > new file mode 100644 > index 0000000..cc60b3d > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/hisi-crg.txt > @@ -0,0 +1,50 @@ > +* HiSilicon Clock and Reset Generator(CRG) Seems kind of generic given there's already various HiSi clock bindings documented. > + > +The CRG module provides clock and reset signals to various > +modules within the SoC. > + > +This binding uses the following bindings: > + Documentation/devicetree/bindings/clock/clock-bindings.txt > + Documentation/devicetree/bindings/reset/reset.txt > + > +Required Properties: > + > +- compatible: should be one of the following. > + - "hisilicon,hi3516cv300-crg" > + - "hisilicon,hi3516cv300-sysctrl" > + - "hisilicon,hi3519-crg" There is already a binding for this. Please merge them. > + - "hisilicon,hi3798cv200-crg" > + - "hisilicon,hi3798cv200-sysctrl" > + > +- reg: physical base address of the controller and length of memory mapped > + region. > + > +- #clock-cells: should be 1. > + > +Each clock is assigned an identifier and client nodes use this identifier > +to specify the clock which they consume. > + > +All these identifier could be found in <dt-bindings/clock/hi3519-clock.h>. > + > +- #reset-cells: should be 2. > + > +A reset signal can be controlled by writing a bit register in the CRG module. > +The reset specifier consists of two cells. The first cell represents the > +register offset relative to the base address. The second cell represents the > +bit index in the register. > + > +Example: CRG nodes > +CRG: clock-reset-controller@12010000 { > + compatible = "hisilicon,hi3519-crg"; > + reg = <0x12010000 0x10000>; > + #clock-cells = <1>; > + #reset-cells = <2>; > +}; > + > +Example: consumer nodes > +i2c0: i2c@12110000 { > + compatible = "hisilicon,hi3519-i2c"; > + reg = <0x12110000 0x1000>; > + clocks = <&CRG HI3519_I2C0_RST>; > + resets = <&CRG 0xe4 0>; > +};
WARNING: multiple messages have this Message-ID (diff)
From: robh@kernel.org (Rob Herring) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] clk: hisilicon: add CRG driver for Hi3516CV300 SoC Date: Tue, 18 Oct 2016 10:58:35 -0500 [thread overview] Message-ID: <20161018155835.qyoffwznacdac46y@rob-hp-laptop> (raw) In-Reply-To: <20161017120705.3726-3-wenpan@hisilicon.com> On Mon, Oct 17, 2016 at 08:07:04PM +0800, Pan Wen wrote: > Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset > Generator) module generates clock and reset signals used > by other module blocks on SoC. > > Signed-off-by: Pan Wen <wenpan@hisilicon.com> > --- > .../devicetree/bindings/clock/hisi-crg.txt | 50 ++++ > drivers/clk/hisilicon/Kconfig | 8 + > drivers/clk/hisilicon/Makefile | 1 + > drivers/clk/hisilicon/crg-hi3516cv300.c | 330 +++++++++++++++++++++ > drivers/clk/hisilicon/crg.h | 34 +++ > include/dt-bindings/clock/hi3516cv300-clock.h | 48 +++ > 6 files changed, 471 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/hisi-crg.txt > create mode 100644 drivers/clk/hisilicon/crg-hi3516cv300.c > create mode 100644 drivers/clk/hisilicon/crg.h > create mode 100644 include/dt-bindings/clock/hi3516cv300-clock.h > > diff --git a/Documentation/devicetree/bindings/clock/hisi-crg.txt b/Documentation/devicetree/bindings/clock/hisi-crg.txt > new file mode 100644 > index 0000000..cc60b3d > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/hisi-crg.txt > @@ -0,0 +1,50 @@ > +* HiSilicon Clock and Reset Generator(CRG) Seems kind of generic given there's already various HiSi clock bindings documented. > + > +The CRG module provides clock and reset signals to various > +modules within the SoC. > + > +This binding uses the following bindings: > + Documentation/devicetree/bindings/clock/clock-bindings.txt > + Documentation/devicetree/bindings/reset/reset.txt > + > +Required Properties: > + > +- compatible: should be one of the following. > + - "hisilicon,hi3516cv300-crg" > + - "hisilicon,hi3516cv300-sysctrl" > + - "hisilicon,hi3519-crg" There is already a binding for this. Please merge them. > + - "hisilicon,hi3798cv200-crg" > + - "hisilicon,hi3798cv200-sysctrl" > + > +- reg: physical base address of the controller and length of memory mapped > + region. > + > +- #clock-cells: should be 1. > + > +Each clock is assigned an identifier and client nodes use this identifier > +to specify the clock which they consume. > + > +All these identifier could be found in <dt-bindings/clock/hi3519-clock.h>. > + > +- #reset-cells: should be 2. > + > +A reset signal can be controlled by writing a bit register in the CRG module. > +The reset specifier consists of two cells. The first cell represents the > +register offset relative to the base address. The second cell represents the > +bit index in the register. > + > +Example: CRG nodes > +CRG: clock-reset-controller at 12010000 { > + compatible = "hisilicon,hi3519-crg"; > + reg = <0x12010000 0x10000>; > + #clock-cells = <1>; > + #reset-cells = <2>; > +}; > + > +Example: consumer nodes > +i2c0: i2c at 12110000 { > + compatible = "hisilicon,hi3519-i2c"; > + reg = <0x12110000 0x1000>; > + clocks = <&CRG HI3519_I2C0_RST>; > + resets = <&CRG 0xe4 0>; > +};
next prev parent reply other threads:[~2016-10-18 15:58 UTC|newest] Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-10-17 12:07 [PATCH 0/3] add basic SoC support for HiSilicon Hi3516CV300 Pan Wen 2016-10-17 12:07 ` Pan Wen 2016-10-17 12:07 ` Pan Wen 2016-10-17 12:07 ` [PATCH 1/3] arm: hisi: add ARCH_MULTI_V5 support Pan Wen 2016-10-17 12:07 ` Pan Wen 2016-10-17 12:07 ` Pan Wen 2016-10-17 13:48 ` Arnd Bergmann 2016-10-17 13:48 ` Arnd Bergmann 2016-10-17 13:48 ` Arnd Bergmann 2016-11-16 8:56 ` wenpan 2016-11-16 8:56 ` wenpan 2016-11-16 8:56 ` wenpan 2016-11-16 9:31 ` Wei Xu 2016-11-16 9:31 ` Wei Xu 2016-11-16 9:31 ` Wei Xu 2016-11-17 3:03 ` Jiancheng Xue 2016-11-17 3:03 ` Jiancheng Xue 2016-11-17 3:03 ` Jiancheng Xue 2016-11-18 6:42 ` Jiancheng Xue 2016-11-18 6:42 ` Jiancheng Xue 2016-11-18 6:42 ` Jiancheng Xue 2017-10-11 5:35 ` Hao Zhang 2016-12-05 2:03 ` Jiancheng Xue 2016-12-05 2:03 ` Jiancheng Xue 2016-12-09 15:07 ` Marty Plummer 2016-12-09 15:07 ` Marty Plummer 2016-12-12 7:11 ` Jiancheng Xue 2016-12-12 7:11 ` Jiancheng Xue [not found] ` <59a9b91c-d7be-cf3a-d461-252cb493d61c@gmail.com> 2017-01-20 1:47 ` Jiancheng Xue 2017-01-20 1:47 ` Jiancheng Xue 2017-01-27 16:44 ` Arnd Bergmann 2017-01-27 16:44 ` Arnd Bergmann 2016-10-17 12:07 ` [PATCH 2/3] clk: hisilicon: add CRG driver for Hi3516CV300 SoC Pan Wen 2016-10-17 12:07 ` Pan Wen 2016-10-17 12:07 ` Pan Wen 2016-10-18 15:58 ` Rob Herring [this message] 2016-10-18 15:58 ` Rob Herring 2016-10-19 2:38 ` Jiancheng Xue 2016-10-19 2:38 ` Jiancheng Xue 2016-10-19 2:38 ` Jiancheng Xue 2016-10-19 2:45 ` Rob Herring 2016-10-19 2:45 ` Rob Herring 2016-10-19 2:45 ` Rob Herring 2016-10-19 2:45 ` Rob Herring 2016-10-19 3:54 ` Jiancheng Xue 2016-10-19 3:54 ` Jiancheng Xue 2016-10-19 3:54 ` Jiancheng Xue 2016-10-19 3:54 ` Jiancheng Xue 2016-10-20 17:48 ` Stephen Boyd 2016-10-20 17:48 ` Stephen Boyd 2016-10-20 17:48 ` Stephen Boyd 2016-10-20 17:48 ` Stephen Boyd 2016-10-21 1:46 ` Jiancheng Xue 2016-10-21 1:46 ` Jiancheng Xue 2016-10-21 1:46 ` Jiancheng Xue 2016-10-21 1:46 ` Jiancheng Xue 2016-10-17 12:07 ` [PATCH 3/3] dts: hisi: add dts files for Hi3516CV300 demo board Pan Wen 2016-10-17 12:07 ` Pan Wen 2016-10-17 12:07 ` Pan Wen 2016-12-12 11:34 ` Jiancheng Xue 2016-12-12 11:34 ` Jiancheng Xue 2016-12-12 11:34 ` Jiancheng Xue 2017-01-20 16:40 ` Wei Xu 2017-01-20 16:40 ` Wei Xu 2017-01-20 16:40 ` Wei Xu 2017-01-22 9:33 ` Kefeng Wang 2017-01-22 9:33 ` Kefeng Wang 2017-01-22 9:33 ` Kefeng Wang
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