From: Andi Kleen <andi@firstfloor.org>
To: Andi Kleen <andi@firstfloor.org>
Cc: Ingo Molnar <mingo@kernel.org>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>,
Jiri Olsa <jolsa@kernel.org>, Wang Nan <wangnan0@huawei.com>,
Namhyung Kim <namhyung@kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [GIT PULL] Vendor events file/dir names
Date: Wed, 19 Oct 2016 10:49:07 -0700 [thread overview]
Message-ID: <20161019174907.GT26852@two.firstfloor.org> (raw)
In-Reply-To: <20161019164136.GS26852@two.firstfloor.org>
On Wed, Oct 19, 2016 at 09:41:37AM -0700, Andi Kleen wrote:
> > How do I query individual hw event groups?
> >
> > 'perf list' output is really long now, and for example it gives me:
> >
> > cache:
> > l1d.replacement
> > [L1D data line replacements]
> > ...
> >
> > If I knew that I'm interested in cache related events, I'd have expected to be
> > able to do:
> >
> > perf list cache
> >
> > or at least:
> >
> > perf list cache:
> >
> > or something similar to list just - but it does not seem to do the right thing.
>
> perf list doesn't support topic matching, only event name
> matching. I'll send a patch to add topic matching too.
>
> > triton:~/tip> perf list longest_lat_cache.miss
> >
> > List of pre-defined events (to be used in -e):
> >
> > cache:
> > longest_lat_cache.miss
> > [Core-originated cacheable demand requests missed LLC]
> >
> > But the event table actually includes the following as well:
> >
> > "PublicDescription": "This event counts each cache miss condition for references to the last level cache.",
> >
> > which is not printed anywhere. I tried the obvious 'perf list -v longest_lat_cache.miss'.
>
> -v (or --long-desc) should work and it did at some point. I'll investigate.
I tested this and it works here with -v
% PERF_CPUID=GenuineIntel-6-4E perf list -v longest_lat_cache.miss
List of pre-defined events (to be used in -e):
cache:
longest_lat_cache.miss
[This event counts core-originated cacheable demand requests that miss the last level cache
(LLC). Demand requests include loads, RFOs, and hardware prefetches from L1D, and instruction
fetches from IFU Spec update: SKL057]
% PERF_CPUID=GenuineIntel-6-4E perf list longest_lat_cache.miss
List of pre-defined events (to be used in -e):
cache:
longest_lat_cache.miss
[Core-originated cacheable demand requests missed L3 Spec update: SKL057]
-Andi
prev parent reply other threads:[~2016-10-19 17:49 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-17 19:04 [RFC] Vendor events file/dir names Arnaldo Carvalho de Melo
2016-10-17 21:26 ` Andi Kleen
2016-10-18 7:59 ` Ingo Molnar
2016-10-18 15:36 ` [GIT PULL] " Arnaldo Carvalho de Melo
2016-10-19 13:38 ` Ingo Molnar
2016-10-19 14:07 ` Arnaldo Carvalho de Melo
2016-10-19 15:24 ` Ingo Molnar
2016-10-19 16:41 ` Andi Kleen
2016-10-19 17:49 ` Andi Kleen [this message]
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