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* [PATCH igt] igt/kms_flip: Calibrate timestamp errors
@ 2016-10-24  8:54 Chris Wilson
  2016-10-24  9:14 ` Daniel Vetter
  0 siblings, 1 reply; 10+ messages in thread
From: Chris Wilson @ 2016-10-24  8:54 UTC (permalink / raw)
  To: intel-gfx

We assert that the interval between a vblank and a flip corresponds with
the computed frametime derived from the modeline. However, historically
the dotclock is unreliable (in error of about 1%) for VBT supplied data
about LVDS panels - the situation looks to be much improved with eDP at
least. The simple fact that we cannot rely on the manufacturer's supplied
modeline causes us to fail the test. So before we claim a driver failure,
do a calibration pass and check for inconsistencies with the modeline.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/kms_flip.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 71 insertions(+), 2 deletions(-)

diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index b30e07c..44aec75 100644
--- a/tests/kms_flip.c
+++ b/tests/kms_flip.c
@@ -26,6 +26,7 @@
 #endif
 
 #include "igt.h"
+
 #include <cairo.h>
 #include <errno.h>
 #include <fcntl.h>
@@ -43,6 +44,7 @@
 #include <time.h>
 #include <pthread.h>
 
+#include "igt_stats.h"
 
 #define TEST_DPMS		(1 << 0)
 #define TEST_WITH_DUMMY_BCS	(1 << 1)
@@ -175,6 +177,8 @@ struct test_output {
 	int seq_step;
 	unsigned int pending_events;
 	int flip_count;
+
+	double ts_error;
 };
 
 
@@ -698,7 +702,7 @@ static void check_state(const struct test_output *o, const struct event_state *e
 			  elapsed, expected, expected * 0.005,
 			  fabs((elapsed - expected) / expected) * 100);
 
-		igt_assert_f(fabs((elapsed - expected) / expected) <= 0.005,
+		igt_assert_f(fabs(elapsed - expected) / expected <= o->ts_error,
 			     "inconsistent %s ts/seq: last %ld.%06ld/%u, current %ld.%06ld/%u: elapsed=%.1fus expected=%.1fus\n",
 			     es->name, es->last_ts.tv_sec, es->last_ts.tv_usec, es->last_seq,
 			     es->current_ts.tv_sec, es->current_ts.tv_usec, es->current_seq,
@@ -1301,6 +1305,71 @@ static void free_test_output(struct test_output *o)
 	}
 }
 
+static double calibrate_ts(struct test_output *o, int crtc_idx)
+{
+#define CALIBRATE_TS_STEPS 16
+	drmVBlank wait;
+	igt_stats_t stats;
+	uint32_t last_seq;
+	uint64_t last_timestamp;
+	double expected;
+	double mean;
+	double stddev;
+	double median;
+	int n;
+
+	memset(&wait, 0, sizeof(wait));
+	wait.request.type = kmstest_get_vbl_flag(crtc_idx);
+	wait.request.type |= DRM_VBLANK_ABSOLUTE | DRM_VBLANK_NEXTONMISS;
+	do_or_die(drmWaitVBlank(drm_fd, &wait));
+
+	last_seq = wait.reply.sequence;
+	last_timestamp = wait.reply.tval_sec;
+	last_timestamp *= 1000000;
+	last_timestamp += wait.reply.tval_usec;
+
+	memset(&wait, 0, sizeof(wait));
+	wait.request.type = kmstest_get_vbl_flag(crtc_idx);
+	wait.request.type |= DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT;
+	wait.request.sequence = last_seq;
+	for (n = 0; n < CALIBRATE_TS_STEPS; n++) {
+		++wait.request.sequence;
+		do_or_die(drmWaitVBlank(drm_fd, &wait));
+	}
+
+	igt_stats_init_with_size(&stats, CALIBRATE_TS_STEPS);
+	for (n = 0; n < CALIBRATE_TS_STEPS; n++) {
+		struct drm_event_vblank ev;
+		uint64_t now;
+
+		igt_assert(read(drm_fd, &ev, sizeof(ev)) == sizeof(ev));
+		igt_assert_eq(ev.sequence, last_seq + 1);
+
+		now = ev.tv_sec;
+		now *= 1000000;
+		now += ev.tv_usec;
+
+		igt_stats_push(&stats, now - last_timestamp);
+
+		last_timestamp = now;
+		last_seq = ev.sequence;
+	}
+
+	expected = frame_time(o);
+
+	mean = igt_stats_get_mean(&stats);
+	stddev = igt_stats_get_std_deviation(&stats);
+	median = igt_stats_get_median(&stats);
+
+	igt_info("Expected frametime: %.0fus; measured %.1fus +- %.3fus accuracy %.2f%%; median %.1fus error=%.1f%%\n",
+		 expected, mean, stddev, 100 * 6 * stddev / mean,
+		 median, 100* fabs(median - expected) / expected);
+	igt_assert(6 * stddev / mean < 0.005); /* 99% accuracy within 0.5% */
+	igt_require(fabs(mean - expected) < 2*stddev);
+
+	return 2*fabs(median - expected) / expected;
+}
+
 static void run_test_on_crtc_set(struct test_output *o, int *crtc_idxs,
 				 int crtc_count, int duration_ms)
 {
@@ -1404,7 +1473,7 @@ static void run_test_on_crtc_set(struct test_output *o, int *crtc_idxs,
 
 	/* quiescent the hw a bit so ensure we don't miss a single frame */
 	if (o->flags & TEST_CHECK_TS)
-		sleep(1);
+		o->ts_error = calibrate_ts(o, crtc_idxs[0]);
 
 	igt_assert_eq(do_page_flip(o, o->fb_ids[1], true), 0);
 	wait_for_events(o);
-- 
2.10.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH igt] igt/kms_flip: Calibrate timestamp errors
  2016-10-24  8:54 [PATCH igt] igt/kms_flip: Calibrate timestamp errors Chris Wilson
@ 2016-10-24  9:14 ` Daniel Vetter
  2016-10-24  9:38   ` Chris Wilson
  0 siblings, 1 reply; 10+ messages in thread
From: Daniel Vetter @ 2016-10-24  9:14 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

On Mon, Oct 24, 2016 at 09:54:52AM +0100, Chris Wilson wrote:
> We assert that the interval between a vblank and a flip corresponds with
> the computed frametime derived from the modeline. However, historically
> the dotclock is unreliable (in error of about 1%) for VBT supplied data
> about LVDS panels - the situation looks to be much improved with eDP at
> least. The simple fact that we cannot rely on the manufacturer's supplied
> modeline causes us to fail the test. So before we claim a driver failure,
> do a calibration pass and check for inconsistencies with the modeline.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Yeah, throwing some decent stats at this makes sense.

> ---
>  tests/kms_flip.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++++++++++--
>  1 file changed, 71 insertions(+), 2 deletions(-)
> 
> diff --git a/tests/kms_flip.c b/tests/kms_flip.c
> index b30e07c..44aec75 100644
> --- a/tests/kms_flip.c
> +++ b/tests/kms_flip.c
> @@ -26,6 +26,7 @@
>  #endif
>  
>  #include "igt.h"
> +
>  #include <cairo.h>
>  #include <errno.h>
>  #include <fcntl.h>
> @@ -43,6 +44,7 @@
>  #include <time.h>
>  #include <pthread.h>
>  
> +#include "igt_stats.h"
>  
>  #define TEST_DPMS		(1 << 0)
>  #define TEST_WITH_DUMMY_BCS	(1 << 1)
> @@ -175,6 +177,8 @@ struct test_output {
>  	int seq_step;
>  	unsigned int pending_events;
>  	int flip_count;
> +
> +	double ts_error;
>  };
>  
>  
> @@ -698,7 +702,7 @@ static void check_state(const struct test_output *o, const struct event_state *e
>  			  elapsed, expected, expected * 0.005,
>  			  fabs((elapsed - expected) / expected) * 100);
>  
> -		igt_assert_f(fabs((elapsed - expected) / expected) <= 0.005,
> +		igt_assert_f(fabs(elapsed - expected) / expected <= o->ts_error,
>  			     "inconsistent %s ts/seq: last %ld.%06ld/%u, current %ld.%06ld/%u: elapsed=%.1fus expected=%.1fus\n",
>  			     es->name, es->last_ts.tv_sec, es->last_ts.tv_usec, es->last_seq,
>  			     es->current_ts.tv_sec, es->current_ts.tv_usec, es->current_seq,
> @@ -1301,6 +1305,71 @@ static void free_test_output(struct test_output *o)
>  	}
>  }
>  
> +static double calibrate_ts(struct test_output *o, int crtc_idx)
> +{
> +#define CALIBRATE_TS_STEPS 16
> +	drmVBlank wait;
> +	igt_stats_t stats;
> +	uint32_t last_seq;
> +	uint64_t last_timestamp;
> +	double expected;
> +	double mean;
> +	double stddev;
> +	double median;
> +	int n;
> +
> +	memset(&wait, 0, sizeof(wait));
> +	wait.request.type = kmstest_get_vbl_flag(crtc_idx);
> +	wait.request.type |= DRM_VBLANK_ABSOLUTE | DRM_VBLANK_NEXTONMISS;
> +	do_or_die(drmWaitVBlank(drm_fd, &wait));
> +
> +	last_seq = wait.reply.sequence;
> +	last_timestamp = wait.reply.tval_sec;
> +	last_timestamp *= 1000000;
> +	last_timestamp += wait.reply.tval_usec;
> +
> +	memset(&wait, 0, sizeof(wait));
> +	wait.request.type = kmstest_get_vbl_flag(crtc_idx);
> +	wait.request.type |= DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT;
> +	wait.request.sequence = last_seq;
> +	for (n = 0; n < CALIBRATE_TS_STEPS; n++) {
> +		++wait.request.sequence;
> +		do_or_die(drmWaitVBlank(drm_fd, &wait));
> +	}
> +
> +	igt_stats_init_with_size(&stats, CALIBRATE_TS_STEPS);
> +	for (n = 0; n < CALIBRATE_TS_STEPS; n++) {
> +		struct drm_event_vblank ev;
> +		uint64_t now;
> +
> +		igt_assert(read(drm_fd, &ev, sizeof(ev)) == sizeof(ev));
> +		igt_assert_eq(ev.sequence, last_seq + 1);
> +
> +		now = ev.tv_sec;
> +		now *= 1000000;
> +		now += ev.tv_usec;
> +
> +		igt_stats_push(&stats, now - last_timestamp);
> +
> +		last_timestamp = now;
> +		last_seq = ev.sequence;
> +	}
> +
> +	expected = frame_time(o);
> +
> +	mean = igt_stats_get_mean(&stats);
> +	stddev = igt_stats_get_std_deviation(&stats);
> +	median = igt_stats_get_median(&stats);
> +
> +	igt_info("Expected frametime: %.0fus; measured %.1fus +- %.3fus accuracy %.2f%%; median %.1fus error=%.1f%%\n",
> +		 expected, mean, stddev, 100 * 6 * stddev / mean,
> +		 median, 100* fabs(median - expected) / expected);
> +	igt_assert(6 * stddev / mean < 0.005); /* 99% accuracy within 0.5% */
> +	igt_require(fabs(mean - expected) < 2*stddev);

I think an igt_require_f here with an explanation of what's going on would
be good here.

Also with this patch we should be able to throw out the hacks for tv-out.
I only added those because the reported mode-timings are massively off
(due to the magic tv scaler thing) from the real timestamps we receive.
Auto-detecting this is much better.

And another issue: Failing to match the reported mode timings is a driver
bug. I think a separate testcase which _only_ does the ts calibration (and
makes it a fail/pass instead of require/pass) would be great. I think
having an expectation that the timings userspace asks for is the timing it
gets would be great for kms ;-)

Ack on the patch.
-Daniel

> +
> +	return 2*fabs(median - expected) / expected;
> +}
> +
>  static void run_test_on_crtc_set(struct test_output *o, int *crtc_idxs,
>  				 int crtc_count, int duration_ms)
>  {
> @@ -1404,7 +1473,7 @@ static void run_test_on_crtc_set(struct test_output *o, int *crtc_idxs,
>  
>  	/* quiescent the hw a bit so ensure we don't miss a single frame */
>  	if (o->flags & TEST_CHECK_TS)
> -		sleep(1);
> +		o->ts_error = calibrate_ts(o, crtc_idxs[0]);
>  
>  	igt_assert_eq(do_page_flip(o, o->fb_ids[1], true), 0);
>  	wait_for_events(o);
> -- 
> 2.10.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH igt] igt/kms_flip: Calibrate timestamp errors
  2016-10-24  9:14 ` Daniel Vetter
@ 2016-10-24  9:38   ` Chris Wilson
  2016-10-26  6:18     ` Daniel Vetter
  0 siblings, 1 reply; 10+ messages in thread
From: Chris Wilson @ 2016-10-24  9:38 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: intel-gfx

On Mon, Oct 24, 2016 at 11:14:31AM +0200, Daniel Vetter wrote:
> On Mon, Oct 24, 2016 at 09:54:52AM +0100, Chris Wilson wrote:
> Also with this patch we should be able to throw out the hacks for tv-out.
> I only added those because the reported mode-timings are massively off
> (due to the magic tv scaler thing) from the real timestamps we receive.
> Auto-detecting this is much better.

Not quite just yet, we need to split the timing tests into a subgroup
with a subtest per output so that we can skip one without skipping the
others. At the moment, this check makes it bail out on my ctg/ilk who
have a difference of about 50us between measured and expected vblank
interval on LVDS (which is nigh on impossible given our confidence in the
measurement, i.e. about 7 sigma).
 
> And another issue: Failing to match the reported mode timings is a driver
> bug.

Not quite, remember we override the user for fixed mode panels. But yes,
piglit also has a similar expectation that the dotclock we report (via
GetMscRate) in someway corresponds to actual vblank interval.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH igt] igt/kms_flip: Calibrate timestamp errors
  2016-10-24  9:38   ` Chris Wilson
@ 2016-10-26  6:18     ` Daniel Vetter
  2016-10-26  9:10       ` Chris Wilson
  2016-10-26  9:17       ` Ville Syrjälä
  0 siblings, 2 replies; 10+ messages in thread
From: Daniel Vetter @ 2016-10-26  6:18 UTC (permalink / raw)
  To: Chris Wilson, Daniel Vetter, intel-gfx

On Mon, Oct 24, 2016 at 10:38:34AM +0100, Chris Wilson wrote:
> On Mon, Oct 24, 2016 at 11:14:31AM +0200, Daniel Vetter wrote:
> > On Mon, Oct 24, 2016 at 09:54:52AM +0100, Chris Wilson wrote:
> > Also with this patch we should be able to throw out the hacks for tv-out.
> > I only added those because the reported mode-timings are massively off
> > (due to the magic tv scaler thing) from the real timestamps we receive.
> > Auto-detecting this is much better.
> 
> Not quite just yet, we need to split the timing tests into a subgroup
> with a subtest per output so that we can skip one without skipping the
> others. At the moment, this check makes it bail out on my ctg/ilk who
> have a difference of about 50us between measured and expected vblank
> interval on LVDS (which is nigh on impossible given our confidence in the
> measurement, i.e. about 7 sigma).

Hm, should we be a bit more sloppy in our acceptance? Iirc Ville has made
changes to make it a bit more strict a while ago, and way, way back this
stuff worked on my ctg. Haven't fired it up in a while ;-)

> > And another issue: Failing to match the reported mode timings is a driver
> > bug.
> 
> Not quite, remember we override the user for fixed mode panels. But yes,
> piglit also has a similar expectation that the dotclock we report (via
> GetMscRate) in someway corresponds to actual vblank interval.

Yeah, I hope that DRRS would fix that, at least on newer stuff. At least I
proposed just using the matching dotclock for manual DRRS (mostly to
perfectly match with the refresh rate of a video). Didn't yet happen :(

But at least for the default mode we should try real hard to match.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH igt] igt/kms_flip: Calibrate timestamp errors
  2016-10-26  6:18     ` Daniel Vetter
@ 2016-10-26  9:10       ` Chris Wilson
  2016-10-26  9:17       ` Ville Syrjälä
  1 sibling, 0 replies; 10+ messages in thread
From: Chris Wilson @ 2016-10-26  9:10 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: intel-gfx

On Wed, Oct 26, 2016 at 08:18:13AM +0200, Daniel Vetter wrote:
> On Mon, Oct 24, 2016 at 10:38:34AM +0100, Chris Wilson wrote:
> > On Mon, Oct 24, 2016 at 11:14:31AM +0200, Daniel Vetter wrote:
> > > On Mon, Oct 24, 2016 at 09:54:52AM +0100, Chris Wilson wrote:
> > > Also with this patch we should be able to throw out the hacks for tv-out.
> > > I only added those because the reported mode-timings are massively off
> > > (due to the magic tv scaler thing) from the real timestamps we receive.
> > > Auto-detecting this is much better.
> > 
> > Not quite just yet, we need to split the timing tests into a subgroup
> > with a subtest per output so that we can skip one without skipping the
> > others. At the moment, this check makes it bail out on my ctg/ilk who
> > have a difference of about 50us between measured and expected vblank
> > interval on LVDS (which is nigh on impossible given our confidence in the
> > measurement, i.e. about 7 sigma).
> 
> Hm, should we be a bit more sloppy in our acceptance? Iirc Ville has made
> changes to make it a bit more strict a while ago, and way, way back this
> stuff worked on my ctg. Haven't fired it up in a while ;-)

Our vblank intervals are pretty stable, so the time compensation for the
interrupt latency is within a scanline. (Of the top of my head, stddev
for the interval is approximately half a scanline.) We are consistent at
least :)

The problem is just that we use the dotclock as our expected value for
the timing tests. I considered changing that but frame_time() wasn't
just used for the TEST_TS pass and I was less confident about the other
uses. But for our subtest, we could get away with using the computed
interval...
 
> > > And another issue: Failing to match the reported mode timings is a driver
> > > bug.
> > 
> > Not quite, remember we override the user for fixed mode panels. But yes,
> > piglit also has a similar expectation that the dotclock we report (via
> > GetMscRate) in someway corresponds to actual vblank interval.
> 
> Yeah, I hope that DRRS would fix that, at least on newer stuff. At least I
> proposed just using the matching dotclock for manual DRRS (mostly to
> perfectly match with the refresh rate of a video). Didn't yet happen :(

Yup, DRRS breaks all the expectations userspace has that MscRate is
fixed. Even a simple mode change leads to trouble.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH igt] igt/kms_flip: Calibrate timestamp errors
  2016-10-26  6:18     ` Daniel Vetter
  2016-10-26  9:10       ` Chris Wilson
@ 2016-10-26  9:17       ` Ville Syrjälä
  2016-10-27  6:43         ` Daniel Vetter
  1 sibling, 1 reply; 10+ messages in thread
From: Ville Syrjälä @ 2016-10-26  9:17 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: intel-gfx

On Wed, Oct 26, 2016 at 08:18:13AM +0200, Daniel Vetter wrote:
> On Mon, Oct 24, 2016 at 10:38:34AM +0100, Chris Wilson wrote:
> > On Mon, Oct 24, 2016 at 11:14:31AM +0200, Daniel Vetter wrote:
> > > On Mon, Oct 24, 2016 at 09:54:52AM +0100, Chris Wilson wrote:
> > > Also with this patch we should be able to throw out the hacks for tv-out.
> > > I only added those because the reported mode-timings are massively off
> > > (due to the magic tv scaler thing) from the real timestamps we receive.
> > > Auto-detecting this is much better.
> > 
> > Not quite just yet, we need to split the timing tests into a subgroup
> > with a subtest per output so that we can skip one without skipping the
> > others. At the moment, this check makes it bail out on my ctg/ilk who
> > have a difference of about 50us between measured and expected vblank
> > interval on LVDS (which is nigh on impossible given our confidence in the
> > measurement, i.e. about 7 sigma).
> 
> Hm, should we be a bit more sloppy in our acceptance? Iirc Ville has made
> changes to make it a bit more strict a while ago, and way, way back this
> stuff worked on my ctg. Haven't fired it up in a while ;-)
> 
> > > And another issue: Failing to match the reported mode timings is a driver
> > > bug.
> > 
> > Not quite, remember we override the user for fixed mode panels. But yes,
> > piglit also has a similar expectation that the dotclock we report (via
> > GetMscRate) in someway corresponds to actual vblank interval.
> 
> Yeah, I hope that DRRS would fix that, at least on newer stuff. At least I
> proposed just using the matching dotclock for manual DRRS (mostly to
> perfectly match with the refresh rate of a video). Didn't yet happen :(
> 
> But at least for the default mode we should try real hard to match.

The problem is the granularity of the PLL. For fixed mode panels we
could easily fix up what we report to userspace as the clock, which
would fix these tests. For external displays it's not quite so clear.

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH igt] igt/kms_flip: Calibrate timestamp errors
  2016-10-26  9:17       ` Ville Syrjälä
@ 2016-10-27  6:43         ` Daniel Vetter
  2016-10-27 10:13           ` Ville Syrjälä
  0 siblings, 1 reply; 10+ messages in thread
From: Daniel Vetter @ 2016-10-27  6:43 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

On Wed, Oct 26, 2016 at 12:17:25PM +0300, Ville Syrjälä wrote:
> On Wed, Oct 26, 2016 at 08:18:13AM +0200, Daniel Vetter wrote:
> > On Mon, Oct 24, 2016 at 10:38:34AM +0100, Chris Wilson wrote:
> > > On Mon, Oct 24, 2016 at 11:14:31AM +0200, Daniel Vetter wrote:
> > > > On Mon, Oct 24, 2016 at 09:54:52AM +0100, Chris Wilson wrote:
> > > > Also with this patch we should be able to throw out the hacks for tv-out.
> > > > I only added those because the reported mode-timings are massively off
> > > > (due to the magic tv scaler thing) from the real timestamps we receive.
> > > > Auto-detecting this is much better.
> > > 
> > > Not quite just yet, we need to split the timing tests into a subgroup
> > > with a subtest per output so that we can skip one without skipping the
> > > others. At the moment, this check makes it bail out on my ctg/ilk who
> > > have a difference of about 50us between measured and expected vblank
> > > interval on LVDS (which is nigh on impossible given our confidence in the
> > > measurement, i.e. about 7 sigma).
> > 
> > Hm, should we be a bit more sloppy in our acceptance? Iirc Ville has made
> > changes to make it a bit more strict a while ago, and way, way back this
> > stuff worked on my ctg. Haven't fired it up in a while ;-)
> > 
> > > > And another issue: Failing to match the reported mode timings is a driver
> > > > bug.
> > > 
> > > Not quite, remember we override the user for fixed mode panels. But yes,
> > > piglit also has a similar expectation that the dotclock we report (via
> > > GetMscRate) in someway corresponds to actual vblank interval.
> > 
> > Yeah, I hope that DRRS would fix that, at least on newer stuff. At least I
> > proposed just using the matching dotclock for manual DRRS (mostly to
> > perfectly match with the refresh rate of a video). Didn't yet happen :(
> > 
> > But at least for the default mode we should try real hard to match.
> 
> The problem is the granularity of the PLL. For fixed mode panels we
> could easily fix up what we report to userspace as the clock, which
> would fix these tests. For external displays it's not quite so clear.

Over-the top idea would be to adjust the reported modlines to match what
we can do with the PLL on each platform. Probably not worth the trouble,
but I guess if we bother with this for panels it won't be more work
really.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH igt] igt/kms_flip: Calibrate timestamp errors
  2016-10-27  6:43         ` Daniel Vetter
@ 2016-10-27 10:13           ` Ville Syrjälä
  2016-10-27 10:29             ` Chris Wilson
  0 siblings, 1 reply; 10+ messages in thread
From: Ville Syrjälä @ 2016-10-27 10:13 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: intel-gfx

On Thu, Oct 27, 2016 at 08:43:44AM +0200, Daniel Vetter wrote:
> On Wed, Oct 26, 2016 at 12:17:25PM +0300, Ville Syrjälä wrote:
> > On Wed, Oct 26, 2016 at 08:18:13AM +0200, Daniel Vetter wrote:
> > > On Mon, Oct 24, 2016 at 10:38:34AM +0100, Chris Wilson wrote:
> > > > On Mon, Oct 24, 2016 at 11:14:31AM +0200, Daniel Vetter wrote:
> > > > > On Mon, Oct 24, 2016 at 09:54:52AM +0100, Chris Wilson wrote:
> > > > > Also with this patch we should be able to throw out the hacks for tv-out.
> > > > > I only added those because the reported mode-timings are massively off
> > > > > (due to the magic tv scaler thing) from the real timestamps we receive.
> > > > > Auto-detecting this is much better.
> > > > 
> > > > Not quite just yet, we need to split the timing tests into a subgroup
> > > > with a subtest per output so that we can skip one without skipping the
> > > > others. At the moment, this check makes it bail out on my ctg/ilk who
> > > > have a difference of about 50us between measured and expected vblank
> > > > interval on LVDS (which is nigh on impossible given our confidence in the
> > > > measurement, i.e. about 7 sigma).
> > > 
> > > Hm, should we be a bit more sloppy in our acceptance? Iirc Ville has made
> > > changes to make it a bit more strict a while ago, and way, way back this
> > > stuff worked on my ctg. Haven't fired it up in a while ;-)
> > > 
> > > > > And another issue: Failing to match the reported mode timings is a driver
> > > > > bug.
> > > > 
> > > > Not quite, remember we override the user for fixed mode panels. But yes,
> > > > piglit also has a similar expectation that the dotclock we report (via
> > > > GetMscRate) in someway corresponds to actual vblank interval.
> > > 
> > > Yeah, I hope that DRRS would fix that, at least on newer stuff. At least I
> > > proposed just using the matching dotclock for manual DRRS (mostly to
> > > perfectly match with the refresh rate of a video). Didn't yet happen :(
> > > 
> > > But at least for the default mode we should try real hard to match.
> > 
> > The problem is the granularity of the PLL. For fixed mode panels we
> > could easily fix up what we report to userspace as the clock, which
> > would fix these tests. For external displays it's not quite so clear.
> 
> Over-the top idea would be to adjust the reported modlines to match what
> we can do with the PLL on each platform. Probably not worth the trouble,
> but I guess if we bother with this for panels it won't be more work
> really.

Yeah for panels it should be quite doable. For external displays we may
run into problems with cloning (maybe would affect the PLL limits and
whatnot, can't recall exactly). And at least HDMI 12bpc would still
affect the clock you can get so not clear if we should report the 8bpc
one or the 12bpc one, or maybe both?

Hmm, or do you mean just adjuting the mode blob on the crtc? I think
that might confuse userspace if it compares that against what it
thought it set, or against the thing it pulled off from the connector's
mode list. We could add some kind of "actual pixel clock" type of
property though. Or even an "actual mode" blob if the driver would feel
the need to fudge things just a little to get a picture on the screen.

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH igt] igt/kms_flip: Calibrate timestamp errors
  2016-10-27 10:13           ` Ville Syrjälä
@ 2016-10-27 10:29             ` Chris Wilson
  2016-10-27 11:41               ` Ville Syrjälä
  0 siblings, 1 reply; 10+ messages in thread
From: Chris Wilson @ 2016-10-27 10:29 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

On Thu, Oct 27, 2016 at 01:13:59PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 27, 2016 at 08:43:44AM +0200, Daniel Vetter wrote:
> > On Wed, Oct 26, 2016 at 12:17:25PM +0300, Ville Syrjälä wrote:
> > > On Wed, Oct 26, 2016 at 08:18:13AM +0200, Daniel Vetter wrote:
> > > > On Mon, Oct 24, 2016 at 10:38:34AM +0100, Chris Wilson wrote:
> > > > > On Mon, Oct 24, 2016 at 11:14:31AM +0200, Daniel Vetter wrote:
> > > > > > On Mon, Oct 24, 2016 at 09:54:52AM +0100, Chris Wilson wrote:
> > > > > > Also with this patch we should be able to throw out the hacks for tv-out.
> > > > > > I only added those because the reported mode-timings are massively off
> > > > > > (due to the magic tv scaler thing) from the real timestamps we receive.
> > > > > > Auto-detecting this is much better.
> > > > > 
> > > > > Not quite just yet, we need to split the timing tests into a subgroup
> > > > > with a subtest per output so that we can skip one without skipping the
> > > > > others. At the moment, this check makes it bail out on my ctg/ilk who
> > > > > have a difference of about 50us between measured and expected vblank
> > > > > interval on LVDS (which is nigh on impossible given our confidence in the
> > > > > measurement, i.e. about 7 sigma).
> > > > 
> > > > Hm, should we be a bit more sloppy in our acceptance? Iirc Ville has made
> > > > changes to make it a bit more strict a while ago, and way, way back this
> > > > stuff worked on my ctg. Haven't fired it up in a while ;-)
> > > > 
> > > > > > And another issue: Failing to match the reported mode timings is a driver
> > > > > > bug.
> > > > > 
> > > > > Not quite, remember we override the user for fixed mode panels. But yes,
> > > > > piglit also has a similar expectation that the dotclock we report (via
> > > > > GetMscRate) in someway corresponds to actual vblank interval.
> > > > 
> > > > Yeah, I hope that DRRS would fix that, at least on newer stuff. At least I
> > > > proposed just using the matching dotclock for manual DRRS (mostly to
> > > > perfectly match with the refresh rate of a video). Didn't yet happen :(
> > > > 
> > > > But at least for the default mode we should try real hard to match.
> > > 
> > > The problem is the granularity of the PLL. For fixed mode panels we
> > > could easily fix up what we report to userspace as the clock, which
> > > would fix these tests. For external displays it's not quite so clear.
> > 
> > Over-the top idea would be to adjust the reported modlines to match what
> > we can do with the PLL on each platform. Probably not worth the trouble,
> > but I guess if we bother with this for panels it won't be more work
> > really.
> 
> Yeah for panels it should be quite doable. For external displays we may
> run into problems with cloning (maybe would affect the PLL limits and
> whatnot, can't recall exactly). And at least HDMI 12bpc would still
> affect the clock you can get so not clear if we should report the 8bpc
> one or the 12bpc one, or maybe both?
> 
> Hmm, or do you mean just adjuting the mode blob on the crtc? I think
> that might confuse userspace if it compares that against what it
> thought it set, or against the thing it pulled off from the connector's
> mode list. We could add some kind of "actual pixel clock" type of
> property though. Or even an "actual mode" blob if the driver would feel
> the need to fudge things just a little to get a picture on the screen.

So does the adjusted_mode match reality? Just exposing that as a blob
seems reasonable... However, will also have to propagate the
check-after-set to randr clients. I can make it work for GetMscRate()
which is probably enough for the majority (by doing a query for the
current crtc mode and ignoring the connector modes).
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH igt] igt/kms_flip: Calibrate timestamp errors
  2016-10-27 10:29             ` Chris Wilson
@ 2016-10-27 11:41               ` Ville Syrjälä
  0 siblings, 0 replies; 10+ messages in thread
From: Ville Syrjälä @ 2016-10-27 11:41 UTC (permalink / raw)
  To: Chris Wilson, Daniel Vetter, intel-gfx

On Thu, Oct 27, 2016 at 11:29:55AM +0100, Chris Wilson wrote:
> On Thu, Oct 27, 2016 at 01:13:59PM +0300, Ville Syrjälä wrote:
> > On Thu, Oct 27, 2016 at 08:43:44AM +0200, Daniel Vetter wrote:
> > > On Wed, Oct 26, 2016 at 12:17:25PM +0300, Ville Syrjälä wrote:
> > > > On Wed, Oct 26, 2016 at 08:18:13AM +0200, Daniel Vetter wrote:
> > > > > On Mon, Oct 24, 2016 at 10:38:34AM +0100, Chris Wilson wrote:
> > > > > > On Mon, Oct 24, 2016 at 11:14:31AM +0200, Daniel Vetter wrote:
> > > > > > > On Mon, Oct 24, 2016 at 09:54:52AM +0100, Chris Wilson wrote:
> > > > > > > Also with this patch we should be able to throw out the hacks for tv-out.
> > > > > > > I only added those because the reported mode-timings are massively off
> > > > > > > (due to the magic tv scaler thing) from the real timestamps we receive.
> > > > > > > Auto-detecting this is much better.
> > > > > > 
> > > > > > Not quite just yet, we need to split the timing tests into a subgroup
> > > > > > with a subtest per output so that we can skip one without skipping the
> > > > > > others. At the moment, this check makes it bail out on my ctg/ilk who
> > > > > > have a difference of about 50us between measured and expected vblank
> > > > > > interval on LVDS (which is nigh on impossible given our confidence in the
> > > > > > measurement, i.e. about 7 sigma).
> > > > > 
> > > > > Hm, should we be a bit more sloppy in our acceptance? Iirc Ville has made
> > > > > changes to make it a bit more strict a while ago, and way, way back this
> > > > > stuff worked on my ctg. Haven't fired it up in a while ;-)
> > > > > 
> > > > > > > And another issue: Failing to match the reported mode timings is a driver
> > > > > > > bug.
> > > > > > 
> > > > > > Not quite, remember we override the user for fixed mode panels. But yes,
> > > > > > piglit also has a similar expectation that the dotclock we report (via
> > > > > > GetMscRate) in someway corresponds to actual vblank interval.
> > > > > 
> > > > > Yeah, I hope that DRRS would fix that, at least on newer stuff. At least I
> > > > > proposed just using the matching dotclock for manual DRRS (mostly to
> > > > > perfectly match with the refresh rate of a video). Didn't yet happen :(
> > > > > 
> > > > > But at least for the default mode we should try real hard to match.
> > > > 
> > > > The problem is the granularity of the PLL. For fixed mode panels we
> > > > could easily fix up what we report to userspace as the clock, which
> > > > would fix these tests. For external displays it's not quite so clear.
> > > 
> > > Over-the top idea would be to adjust the reported modlines to match what
> > > we can do with the PLL on each platform. Probably not worth the trouble,
> > > but I guess if we bother with this for panels it won't be more work
> > > really.
> > 
> > Yeah for panels it should be quite doable. For external displays we may
> > run into problems with cloning (maybe would affect the PLL limits and
> > whatnot, can't recall exactly). And at least HDMI 12bpc would still
> > affect the clock you can get so not clear if we should report the 8bpc
> > one or the 12bpc one, or maybe both?
> > 
> > Hmm, or do you mean just adjuting the mode blob on the crtc? I think
> > that might confuse userspace if it compares that against what it
> > thought it set, or against the thing it pulled off from the connector's
> > mode list. We could add some kind of "actual pixel clock" type of
> > property though. Or even an "actual mode" blob if the driver would feel
> > the need to fudge things just a little to get a picture on the screen.
> 
> So does the adjusted_mode match reality?

Actually not right now. I think everything else but the clock is correct
in there. We really should fix up the clock as well since we use it to
calculate further things like FDI bandwidth. So everything else depending
on the clock might come out a little wrong currently.

Last time I looked it seemed that we'd have to move the clock
computation up in the modeset sequence quite a bit (assuming it wasn't
calculated by the encoders .compute_config() hook) since right now we do
it way too late.

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2016-10-27 11:41 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-10-24  8:54 [PATCH igt] igt/kms_flip: Calibrate timestamp errors Chris Wilson
2016-10-24  9:14 ` Daniel Vetter
2016-10-24  9:38   ` Chris Wilson
2016-10-26  6:18     ` Daniel Vetter
2016-10-26  9:10       ` Chris Wilson
2016-10-26  9:17       ` Ville Syrjälä
2016-10-27  6:43         ` Daniel Vetter
2016-10-27 10:13           ` Ville Syrjälä
2016-10-27 10:29             ` Chris Wilson
2016-10-27 11:41               ` Ville Syrjälä

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