From: Patchwork <patchwork@emeril.freedesktop.org>
To: Andrzej Lawrynowicz <andrzej.lawrynowicz@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
Date: Thu, 27 Oct 2016 15:19:56 -0000 [thread overview]
Message-ID: <20161027151956.12299.48375@emeril.freedesktop.org> (raw)
In-Reply-To: <20161027143931.28160-1-andrzej.lawrynowicz@intel.com>
== Series Details ==
Series: drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
URL : https://patchwork.freedesktop.org/series/14482/
State : warning
== Summary ==
Series 14482v1 drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
https://patchwork.freedesktop.org/api/1.0/series/14482/revisions/1/mbox/
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-a:
pass -> DMESG-WARN (fi-ilk-650)
fi-bdw-5557u total:246 pass:231 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:246 pass:204 dwarn:0 dfail:0 fail:0 skip:42
fi-bxt-t5700 total:246 pass:216 dwarn:0 dfail:0 fail:0 skip:30
fi-byt-j1900 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31
fi-byt-n2820 total:246 pass:211 dwarn:0 dfail:0 fail:0 skip:35
fi-hsw-4770 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22
fi-hsw-4770r total:246 pass:223 dwarn:0 dfail:0 fail:0 skip:23
fi-ilk-650 total:246 pass:184 dwarn:1 dfail:0 fail:0 skip:61
fi-ivb-3520m total:246 pass:220 dwarn:0 dfail:0 fail:0 skip:26
fi-ivb-3770 total:246 pass:220 dwarn:0 dfail:0 fail:0 skip:26
fi-kbl-7200u total:246 pass:222 dwarn:0 dfail:0 fail:0 skip:24
fi-skl-6260u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:246 pass:223 dwarn:0 dfail:0 fail:0 skip:23
fi-skl-6700k total:246 pass:222 dwarn:1 dfail:0 fail:0 skip:23
fi-skl-6770hq total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:246 pass:209 dwarn:0 dfail:0 fail:0 skip:37
fi-snb-2600 total:246 pass:208 dwarn:0 dfail:0 fail:0 skip:38
0fb1abf5eac2230894a7352e36022066f88a9b19 drm-intel-nightly: 2016y-10m-27d-14h-09m-00s UTC integration manifest
a6368f3 drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2841/
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next prev parent reply other threads:[~2016-10-27 15:19 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-27 14:39 [PATCH] drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring Andrzej Lawrynowicz
2016-10-27 15:19 ` Patchwork [this message]
2016-10-28 10:49 ` [PATCH v2] drm/i915: Whitelist TIMESTAMP register from BLT ring for gen9+ Arkadiusz Hiler
2016-10-28 11:46 ` ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring (rev2) Patchwork
2016-10-31 13:20 ` Andrzej Lawrynowicz
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