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* [PATCH] drm/i915: Round tile chunks up for constructing partial VMAs
@ 2016-11-07 10:54 Chris Wilson
  2016-11-07 11:02 ` Joonas Lahtinen
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Chris Wilson @ 2016-11-07 10:54 UTC (permalink / raw)
  To: intel-gfx; +Cc: # v4 . 9-rc1+

When we split a large object up into chunks for GTT faulting (because we
can't fit the whole object into the aperture) we have to align our cuts
with the fence registers. Each partial VMA must cover a complete set of
tile rows or the offset into each partial VMA is not aligned with the
whole image. Currently we enforce a minimum size on each partial VMA,
but this minimum size itself was not aligned to the tile row causing
distortion.

Reported-by: Andreas Reis <andreas.reis@gmail.com>
Reported-by: Chris Clayton <chris2553@googlemail.com>
Reported-by: Norbert Preining <preining@logic.at>
Tested-by: Norbert Preining <preining@logic.at>
Fixes: 03af84fe7f48 ("drm/i915: Choose partial chunksize based on tile row size")
Fixes: a61007a83a46 ("drm/i915: Fix partial GGTT faulting") # enabling patch
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98402
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.9-rc1+
---
 drivers/gpu/drm/i915/i915_gem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c642385bb236..a52b40bbac6f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1837,7 +1837,7 @@ int i915_gem_fault(struct vm_area_struct *area, struct vm_fault *vmf)
 		/* Use a partial view if it is bigger than available space */
 		chunk_size = MIN_CHUNK_PAGES;
 		if (i915_gem_object_is_tiled(obj))
-			chunk_size = max(chunk_size, tile_row_pages(obj));
+			chunk_size = roundup(chunk_size, tile_row_pages(obj));
 
 		memset(&view, 0, sizeof(view));
 		view.type = I915_GGTT_VIEW_PARTIAL;
-- 
2.10.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915: Round tile chunks up for constructing partial VMAs
  2016-11-07 10:54 [PATCH] drm/i915: Round tile chunks up for constructing partial VMAs Chris Wilson
@ 2016-11-07 11:02 ` Joonas Lahtinen
  2016-11-07 11:09 ` Chris Wilson
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 6+ messages in thread
From: Joonas Lahtinen @ 2016-11-07 11:02 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx; +Cc: # v4 . 9-rc1+

On ma, 2016-11-07 at 10:54 +0000, Chris Wilson wrote:
> When we split a large object up into chunks for GTT faulting (because we
> can't fit the whole object into the aperture) we have to align our cuts
> with the fence registers. Each partial VMA must cover a complete set of
> tile rows or the offset into each partial VMA is not aligned with the
> whole image. Currently we enforce a minimum size on each partial VMA,
> but this minimum size itself was not aligned to the tile row causing
> distortion.
> 
> > Reported-by: Andreas Reis <andreas.reis@gmail.com>
> > Reported-by: Chris Clayton <chris2553@googlemail.com>
> > Reported-by: Norbert Preining <preining@logic.at>
> > Tested-by: Norbert Preining <preining@logic.at>
> Fixes: 03af84fe7f48 ("drm/i915: Choose partial chunksize based on tile row size")
> Fixes: a61007a83a46 ("drm/i915: Fix partial GGTT faulting") # enabling patch
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98402
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.9-rc1+
> ---
>  drivers/gpu/drm/i915/i915_gem.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index c642385bb236..a52b40bbac6f 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1837,7 +1837,7 @@ int i915_gem_fault(struct vm_area_struct *area, struct vm_fault *vmf)
>  		/* Use a partial view if it is bigger than available space */
>  		chunk_size = MIN_CHUNK_PAGES;
>  		if (i915_gem_object_is_tiled(obj))
> -			chunk_size = max(chunk_size, tile_row_pages(obj));
> +			chunk_size = roundup(chunk_size, tile_row_pages(obj));
>  

Later in code, if chunk_size ends up bigger than object size, we
convert back to normal view, so this is good. Not sure if it's worth a
comment.

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915: Round tile chunks up for constructing partial VMAs
  2016-11-07 10:54 [PATCH] drm/i915: Round tile chunks up for constructing partial VMAs Chris Wilson
  2016-11-07 11:02 ` Joonas Lahtinen
@ 2016-11-07 11:09 ` Chris Wilson
  2016-11-07 11:15 ` ✗ Fi.CI.BAT: failure for " Patchwork
  2016-11-07 11:19 ` [PATCH] " Chris Wilson
  3 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2016-11-07 11:09 UTC (permalink / raw)
  To: intel-gfx; +Cc: # v4 . 9-rc1+

On Mon, Nov 07, 2016 at 10:54:43AM +0000, Chris Wilson wrote:
> When we split a large object up into chunks for GTT faulting (because we
> can't fit the whole object into the aperture) we have to align our cuts
> with the fence registers. Each partial VMA must cover a complete set of
> tile rows or the offset into each partial VMA is not aligned with the
> whole image. Currently we enforce a minimum size on each partial VMA,
> but this minimum size itself was not aligned to the tile row causing
> distortion.
> 
> Reported-by: Andreas Reis <andreas.reis@gmail.com>
> Reported-by: Chris Clayton <chris2553@googlemail.com>
> Reported-by: Norbert Preining <preining@logic.at>
> Tested-by: Norbert Preining <preining@logic.at>
> Fixes: 03af84fe7f48 ("drm/i915: Choose partial chunksize based on tile row size")
> Fixes: a61007a83a46 ("drm/i915: Fix partial GGTT faulting") # enabling patch
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98402
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.9-rc1+

Tested-by: Chris Clayton <chris2553@googlemail.com>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* ✗ Fi.CI.BAT: failure for drm/i915: Round tile chunks up for constructing partial VMAs
  2016-11-07 10:54 [PATCH] drm/i915: Round tile chunks up for constructing partial VMAs Chris Wilson
  2016-11-07 11:02 ` Joonas Lahtinen
  2016-11-07 11:09 ` Chris Wilson
@ 2016-11-07 11:15 ` Patchwork
  2016-11-07 11:42   ` Chris Wilson
  2016-11-07 11:19 ` [PATCH] " Chris Wilson
  3 siblings, 1 reply; 6+ messages in thread
From: Patchwork @ 2016-11-07 11:15 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Round tile chunks up for constructing partial VMAs
URL   : https://patchwork.freedesktop.org/series/14922/
State : failure

== Summary ==

Series 14922v1 drm/i915: Round tile chunks up for constructing partial VMAs
https://patchwork.freedesktop.org/api/1.0/series/14922/revisions/1/mbox/

Test kms_flip:
        Subgroup basic-flip-vs-wf_vblank:
                pass       -> FAIL       (fi-ivb-3770)

fi-bdw-5557u     total:241  pass:226  dwarn:0   dfail:0   fail:0   skip:15 
fi-bsw-n3050     total:241  pass:201  dwarn:0   dfail:0   fail:0   skip:40 
fi-bxt-t5700     total:241  pass:213  dwarn:0   dfail:0   fail:0   skip:28 
fi-byt-j1900     total:241  pass:213  dwarn:0   dfail:0   fail:0   skip:28 
fi-byt-n2820     total:241  pass:209  dwarn:0   dfail:0   fail:0   skip:32 
fi-hsw-4770      total:241  pass:221  dwarn:0   dfail:0   fail:0   skip:20 
fi-hsw-4770r     total:241  pass:221  dwarn:0   dfail:0   fail:0   skip:20 
fi-ilk-650       total:241  pass:188  dwarn:0   dfail:0   fail:0   skip:53 
fi-ivb-3520m     total:241  pass:219  dwarn:0   dfail:0   fail:0   skip:22 
fi-ivb-3770      total:241  pass:218  dwarn:0   dfail:0   fail:1   skip:22 
fi-kbl-7200u     total:241  pass:219  dwarn:0   dfail:0   fail:0   skip:22 
fi-skl-6260u     total:241  pass:227  dwarn:0   dfail:0   fail:0   skip:14 
fi-skl-6700hq    total:241  pass:220  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6700k     total:241  pass:219  dwarn:1   dfail:0   fail:0   skip:21 
fi-skl-6770hq    total:241  pass:227  dwarn:0   dfail:0   fail:0   skip:14 
fi-snb-2520m     total:241  pass:209  dwarn:0   dfail:0   fail:0   skip:32 
fi-snb-2600      total:241  pass:208  dwarn:0   dfail:0   fail:0   skip:33 

5385d13fdacbf8fbb345ecdc533ee407fd86e2f2 drm-intel-nightly: 2016y-11m-07d-09h-18m-42s UTC integration manifest
fb1a485 drm/i915: Round tile chunks up for constructing partial VMAs

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2918/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/i915: Round tile chunks up for constructing partial VMAs
  2016-11-07 10:54 [PATCH] drm/i915: Round tile chunks up for constructing partial VMAs Chris Wilson
                   ` (2 preceding siblings ...)
  2016-11-07 11:15 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2016-11-07 11:19 ` Chris Wilson
  3 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2016-11-07 11:19 UTC (permalink / raw)
  To: intel-gfx; +Cc: # v4 . 9-rc1+

On Mon, Nov 07, 2016 at 10:54:43AM +0000, Chris Wilson wrote:
> When we split a large object up into chunks for GTT faulting (because we
> can't fit the whole object into the aperture) we have to align our cuts
> with the fence registers. Each partial VMA must cover a complete set of
> tile rows or the offset into each partial VMA is not aligned with the
> whole image. Currently we enforce a minimum size on each partial VMA,
> but this minimum size itself was not aligned to the tile row causing
> distortion.
> 
> Reported-by: Andreas Reis <andreas.reis@gmail.com>
> Reported-by: Chris Clayton <chris2553@googlemail.com>
> Reported-by: Norbert Preining <preining@logic.at>
> Tested-by: Norbert Preining <preining@logic.at>
> Fixes: 03af84fe7f48 ("drm/i915: Choose partial chunksize based on tile row size")
> Fixes: a61007a83a46 ("drm/i915: Fix partial GGTT faulting") # enabling patch
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98402
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.9-rc1+

Testcase: igt/gem_mmap_gtt/medium-copy-odd

Appears quite difficult to actually aim for. I was expecting the
huge-copy to be the main test case (since its objects can never fit) -
not sure why it still passes. Still we manage to it with one of them!
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: ✗ Fi.CI.BAT: failure for drm/i915: Round tile chunks up for constructing partial VMAs
  2016-11-07 11:15 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2016-11-07 11:42   ` Chris Wilson
  0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2016-11-07 11:42 UTC (permalink / raw)
  To: intel-gfx

On Mon, Nov 07, 2016 at 11:15:40AM -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Round tile chunks up for constructing partial VMAs
> URL   : https://patchwork.freedesktop.org/series/14922/
> State : failure
> 
> == Summary ==
> 
> Series 14922v1 drm/i915: Round tile chunks up for constructing partial VMAs
> https://patchwork.freedesktop.org/api/1.0/series/14922/revisions/1/mbox/
> 
> Test kms_flip:
>         Subgroup basic-flip-vs-wf_vblank:
>                 pass       -> FAIL       (fi-ivb-3770)

Annoying, unstable timing result on ivb (unrelated).

Thanks for the review and testing, pushed to dinq and should flow into
drm-intel-fixes shortly.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2016-11-07 11:42 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-11-07 10:54 [PATCH] drm/i915: Round tile chunks up for constructing partial VMAs Chris Wilson
2016-11-07 11:02 ` Joonas Lahtinen
2016-11-07 11:09 ` Chris Wilson
2016-11-07 11:15 ` ✗ Fi.CI.BAT: failure for " Patchwork
2016-11-07 11:42   ` Chris Wilson
2016-11-07 11:19 ` [PATCH] " Chris Wilson

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