* [PATCH v1 1/1] ACPI / LPSS: enable hard LLP for DMA
@ 2016-11-08 13:46 Andy Shevchenko
2016-11-08 13:57 ` Mika Westerberg
0 siblings, 1 reply; 4+ messages in thread
From: Andy Shevchenko @ 2016-11-08 13:46 UTC (permalink / raw)
To: linux-acpi, Rafael J. Wysocki, mika.westerberg; +Cc: Andy Shevchenko
Right now the DMA support of hard LLP is fused. Enable it via specific message
sent to SoC at run time.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/acpi/acpi_lpss.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index 5520102..c471239 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -724,13 +724,14 @@ static int acpi_lpss_resume_early(struct device *dev)
#define LPSS_GPIODEF0_DMA1_D3 BIT(2)
#define LPSS_GPIODEF0_DMA2_D3 BIT(3)
#define LPSS_GPIODEF0_DMA_D3_MASK GENMASK(3, 2)
+#define LPSS_GPIODEF0_DMA_LLP BIT(13)
static DEFINE_MUTEX(lpss_iosf_mutex);
static void lpss_iosf_enter_d3_state(void)
{
u32 value1 = 0;
- u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK;
+ u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
u32 value2 = LPSS_PMCSR_D3hot;
u32 mask2 = LPSS_PMCSR_Dx_MASK;
/*
@@ -774,8 +775,9 @@ static void lpss_iosf_enter_d3_state(void)
static void lpss_iosf_exit_d3_state(void)
{
- u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3;
- u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK;
+ u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
+ LPSS_GPIODEF0_DMA_LLP;
+ u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
u32 value2 = LPSS_PMCSR_D0;
u32 mask2 = LPSS_PMCSR_Dx_MASK;
--
2.9.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v1 1/1] ACPI / LPSS: enable hard LLP for DMA
2016-11-08 13:46 [PATCH v1 1/1] ACPI / LPSS: enable hard LLP for DMA Andy Shevchenko
@ 2016-11-08 13:57 ` Mika Westerberg
2016-11-17 10:39 ` Andy Shevchenko
0 siblings, 1 reply; 4+ messages in thread
From: Mika Westerberg @ 2016-11-08 13:57 UTC (permalink / raw)
To: Andy Shevchenko; +Cc: linux-acpi, Rafael J. Wysocki
On Tue, Nov 08, 2016 at 03:46:38PM +0200, Andy Shevchenko wrote:
> Right now the DMA support of hard LLP is fused. Enable it via specific message
> sent to SoC at run time.
It would help the reviewer if you explain what hard LLP actually means ;-)
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
I tested this on Minnowboard MAX using SPI and DMA still works fine even
if using larger (>4k) blocks.
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v1 1/1] ACPI / LPSS: enable hard LLP for DMA
2016-11-08 13:57 ` Mika Westerberg
@ 2016-11-17 10:39 ` Andy Shevchenko
2016-11-17 13:39 ` Rafael J. Wysocki
0 siblings, 1 reply; 4+ messages in thread
From: Andy Shevchenko @ 2016-11-17 10:39 UTC (permalink / raw)
To: Mika Westerberg; +Cc: linux-acpi, Rafael J. Wysocki
On Tue, 2016-11-08 at 15:57 +0200, Mika Westerberg wrote:
> On Tue, Nov 08, 2016 at 03:46:38PM +0200, Andy Shevchenko wrote:
> > Right now the DMA support of hard LLP is fused. Enable it via
> > specific message
> > sent to SoC at run time.
>
> It would help the reviewer if you explain what hard LLP actually means
> ;-)
Rafael, shall I fix commit message and resend?
>
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>
> I tested this on Minnowboard MAX using SPI and DMA still works fine
> even
> if using larger (>4k) blocks.
>
> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Thanks!
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v1 1/1] ACPI / LPSS: enable hard LLP for DMA
2016-11-17 10:39 ` Andy Shevchenko
@ 2016-11-17 13:39 ` Rafael J. Wysocki
0 siblings, 0 replies; 4+ messages in thread
From: Rafael J. Wysocki @ 2016-11-17 13:39 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Mika Westerberg, ACPI Devel Maling List, Rafael J. Wysocki
On Thu, Nov 17, 2016 at 11:39 AM, Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
> On Tue, 2016-11-08 at 15:57 +0200, Mika Westerberg wrote:
>> On Tue, Nov 08, 2016 at 03:46:38PM +0200, Andy Shevchenko wrote:
>> > Right now the DMA support of hard LLP is fused. Enable it via
>> > specific message
>> > sent to SoC at run time.
>>
>> It would help the reviewer if you explain what hard LLP actually means
>> ;-)
>
> Rafael, shall I fix commit message and resend?
Not strictly necessary, but if you can do that, it would be nice. :-)
Thanks,
Rafael
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-11-17 14:31 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2016-11-08 13:46 [PATCH v1 1/1] ACPI / LPSS: enable hard LLP for DMA Andy Shevchenko
2016-11-08 13:57 ` Mika Westerberg
2016-11-17 10:39 ` Andy Shevchenko
2016-11-17 13:39 ` Rafael J. Wysocki
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