From: "Michael S. Tsirkin" <mst@redhat.com>
To: Zhuangyanying <ann.zhuangyanying@huawei.com>
Cc: marcandre.lureau@redhat.com, armbru@redhat.com,
pbonzini@redhat.com, qemu-devel@nongnu.org,
qemu-stable@nongnu.org, arei.gonglei@huawei.com
Subject: Re: [Qemu-devel] [PATCH v3] ivshmem: Fix 64 bit memory bar configuration
Date: Thu, 17 Nov 2016 18:45:59 +0200 [thread overview]
Message-ID: <20161117184538-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <1479385863-7648-1-git-send-email-ann.zhuangyanying@huawei.com>
On Thu, Nov 17, 2016 at 08:31:03PM +0800, Zhuangyanying wrote:
> From: Zhuang Yanying <ann.zhuangyanying@huawei.com>
>
> Device ivshmem property use64=0 is designed to make the device
> expose a 32 bit shared memory BAR instead of 64 bit one. The
> default is a 64 bit BAR, except pc-1.2 and older retain a 32 bit
> BAR. A 32 bit BAR can support only up to 1 GiB of shared memory.
>
> This worked as designed until commit 5400c02 accidentally flipped
> its sense: since then, we misinterpret use64=0 as use64=1 and vice
> versa. Worse, the default got flipped as well. Devices
> ivshmem-plain and ivshmem-doorbell are not affected.
>
> Fix by restoring the test of IVShmemState member not_legacy_32bit
> that got messed up in commit 5400c02. Also update its
> initialization for devices ivhsmem-plain and ivshmem-doorbell.
> Without that, they'd regress to 32 bit BARs.
>
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Zhuang Yanying <ann.zhuangyanying@huawei.com>
> Reviewed-by: Gonglei <arei.gonglei@huawei.com>
> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
this is malformed, pls shift it left to start at beginning of the line.
> ---
> hw/misc/ivshmem.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
> index 230e51b..abeaf3d 100644
> --- a/hw/misc/ivshmem.c
> +++ b/hw/misc/ivshmem.c
> @@ -858,7 +858,7 @@ static void ivshmem_common_realize(PCIDevice *dev, Error **errp)
> pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
> &s->ivshmem_mmio);
>
> - if (!s->not_legacy_32bit) {
> + if (s->not_legacy_32bit) {
> attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
> }
>
> @@ -1045,6 +1045,7 @@ static void ivshmem_plain_init(Object *obj)
> ivshmem_check_memdev_is_busy,
> OBJ_PROP_LINK_UNREF_ON_RELEASE,
> &error_abort);
> + s->not_legacy_32bit = 1;
> }
>
> static void ivshmem_plain_realize(PCIDevice *dev, Error **errp)
> @@ -1116,6 +1117,7 @@ static void ivshmem_doorbell_init(Object *obj)
>
> s->features |= (1 << IVSHMEM_MSI);
> s->legacy_size = SIZE_MAX; /* whatever the server sends */
> + s->not_legacy_32bit = 1;
> }
>
> static void ivshmem_doorbell_realize(PCIDevice *dev, Error **errp)
> --
> 1.8.3.1
>
next prev parent reply other threads:[~2016-11-17 16:46 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-17 12:31 [Qemu-devel] [PATCH v3] ivshmem: Fix 64 bit memory bar configuration Zhuangyanying
2016-11-17 13:27 ` Markus Armbruster
2016-11-17 16:45 ` Michael S. Tsirkin [this message]
2016-11-18 15:27 ` Michael S. Tsirkin
2016-11-18 15:30 ` Michael S. Tsirkin
2016-11-18 17:30 ` Paolo Bonzini
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