* [PATCH v2 0/5] GuC code reorganization
@ 2016-11-24 16:13 Arkadiusz Hiler
2016-11-24 16:13 ` [PATCH 1/5] drm/i915: Rename intel_guc.h to intel_uc.h Arkadiusz Hiler
` (4 more replies)
0 siblings, 5 replies; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-24 16:13 UTC (permalink / raw)
To: intel-gfx
With HuC being imminent we could benefit from some code reorganization.
There will be more uC than just GuC so we should name files accordingly.
There is also need to use host2guc_*() family of functions, which are currently
limited to submission only.
In effect host2guc and guc2host entities were renamed and moved around.
v2: host2guc and guc2host renaming, init mutex in intel_uc_init()
Arkadiusz Hiler (5):
drm/i915: Rename intel_guc.h to intel_uc.h
drm/i915/guc: Drop guc2host/host2guc from names
drm/i915/guc: Move guc_{send,recv}() to intel_uc.c
drm/i915/guc: Init send_mutex in intel_uc_init()
drm/i915/guc: Remove spurious include
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/i915_drv.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_guc_reg.h | 4 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 158 ++++-------------------
drivers/gpu/drm/i915/i915_irq.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 49 +++----
drivers/gpu/drm/i915/intel_guc_loader.c | 2 +-
drivers/gpu/drm/i915/intel_uc.c | 143 ++++++++++++++++++++
drivers/gpu/drm/i915/{intel_guc.h => intel_uc.h} | 20 ++-
10 files changed, 215 insertions(+), 171 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_uc.c
rename drivers/gpu/drm/i915/{intel_guc.h => intel_uc.h} (91%)
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 1/5] drm/i915: Rename intel_guc.h to intel_uc.h
2016-11-24 16:13 [PATCH v2 0/5] GuC code reorganization Arkadiusz Hiler
@ 2016-11-24 16:13 ` Arkadiusz Hiler
2016-11-24 16:13 ` [PATCH 2/5] drm/i915/guc: Drop guc2host/host2guc from names Arkadiusz Hiler
` (3 subsequent siblings)
4 siblings, 0 replies; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-24 16:13 UTC (permalink / raw)
To: intel-gfx
GuC is not the only one micro controller we have.
There are also HuC and DMC.
Making the file more general will help with code organization.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 2 +-
drivers/gpu/drm/i915/intel_guc_loader.c | 2 +-
drivers/gpu/drm/i915/{intel_guc.h => intel_uc.h} | 4 ++--
4 files changed, 5 insertions(+), 5 deletions(-)
rename drivers/gpu/drm/i915/{intel_guc.h => intel_uc.h} (99%)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e3f1a4b..be1ba08 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -55,7 +55,7 @@
#include "intel_bios.h"
#include "intel_dpll_mgr.h"
-#include "intel_guc.h"
+#include "intel_uc.h"
#include "intel_lrc.h"
#include "intel_ringbuffer.h"
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 4462112..e14220e 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -26,7 +26,7 @@
#include <linux/debugfs.h>
#include <linux/relay.h>
#include "i915_drv.h"
-#include "intel_guc.h"
+#include "intel_uc.h"
/**
* DOC: GuC-based command submission
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index e2d0bda..27f6fd5 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -28,7 +28,7 @@
*/
#include <linux/firmware.h>
#include "i915_drv.h"
-#include "intel_guc.h"
+#include "intel_uc.h"
/**
* DOC: GuC-specific firmware loader
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_uc.h
similarity index 99%
rename from drivers/gpu/drm/i915/intel_guc.h
rename to drivers/gpu/drm/i915/intel_uc.h
index 02337a8..0d8a493 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -21,8 +21,8 @@
* IN THE SOFTWARE.
*
*/
-#ifndef _INTEL_GUC_H_
-#define _INTEL_GUC_H_
+#ifndef _INTEL_UC_H_
+#define _INTEL_UC_H_
#include "intel_guc_fwif.h"
#include "i915_guc_reg.h"
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 2/5] drm/i915/guc: Drop guc2host/host2guc from names
2016-11-24 16:13 [PATCH v2 0/5] GuC code reorganization Arkadiusz Hiler
2016-11-24 16:13 ` [PATCH 1/5] drm/i915: Rename intel_guc.h to intel_uc.h Arkadiusz Hiler
@ 2016-11-24 16:13 ` Arkadiusz Hiler
2016-11-24 17:06 ` Chris Wilson
2016-11-24 16:13 ` [PATCH 3/5] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c Arkadiusz Hiler
` (2 subsequent siblings)
4 siblings, 1 reply; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-24 16:13 UTC (permalink / raw)
To: intel-gfx
To facilitate code reorganization we are renaming everything that
contains guc2host or host2guc.
host2guc_action() and host2guc_action_response() become guc_send()
and guc_recv() respectively.
Other host2guc_*() functions become simply guc_*().
Other entities are renamed basing on context they appear in:
- HOST2GUC_ACTIONS_& become INTEL_GUC_ACTION_*
- HOST2GUC_{INTERRUPT,TRIGGER} become GUC_SEND_{INTERRUPT,TRIGGER}
- GUC2HOST_* become INTEL_GUC_RECV_*
- action_lock becomes send_mutex
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
---
drivers/gpu/drm/i915/i915_guc_reg.h | 4 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 91 +++++++++++++++---------------
drivers/gpu/drm/i915/i915_irq.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 49 ++++++++--------
drivers/gpu/drm/i915/intel_uc.h | 6 +-
5 files changed, 78 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
index a47e1e4..5e638fc 100644
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ b/drivers/gpu/drm/i915/i915_guc_reg.h
@@ -100,8 +100,8 @@
GUC_ENABLE_READ_CACHE_FOR_WOPCM_DATA | \
GUC_ENABLE_MIA_CLOCK_GATING)
-#define HOST2GUC_INTERRUPT _MMIO(0xc4c8)
-#define HOST2GUC_TRIGGER (1<<0)
+#define GUC_SEND_INTERRUPT _MMIO(0xc4c8)
+#define GUC_SEND_TRIGGER (1<<0)
#define GEN8_DRBREGL(x) _MMIO(0x1000 + (x) * 8)
#define GEN8_DRB_VALID (1<<0)
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index e14220e..f8957df 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -49,7 +49,7 @@
* Firmware writes a success/fail code back to the action register after
* processes the request. The kernel driver polls waiting for this update and
* then proceeds.
- * See host2guc_action()
+ * See guc_send()
*
* Doorbells:
* Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
@@ -69,15 +69,14 @@
* Read GuC command/status register (SOFT_SCRATCH_0)
* Return true if it contains a response rather than a command
*/
-static inline bool host2guc_action_response(struct drm_i915_private *dev_priv,
- u32 *status)
+static inline bool guc_recv(struct drm_i915_private *dev_priv, u32 *status)
{
u32 val = I915_READ(SOFT_SCRATCH(0));
*status = val;
- return GUC2HOST_IS_RESPONSE(val);
+ return INTEL_GUC_RECV_IS_RESPONSE(val);
}
-static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
+static int guc_send(struct intel_guc *guc, u32 *data, u32 len)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
u32 status;
@@ -87,7 +86,7 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
if (WARN_ON(len < 1 || len > 15))
return -EINVAL;
- mutex_lock(&guc->action_lock);
+ mutex_lock(&guc->send_mutex);
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
dev_priv->guc.action_count += 1;
@@ -98,17 +97,17 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
POSTING_READ(SOFT_SCRATCH(i - 1));
- I915_WRITE(HOST2GUC_INTERRUPT, HOST2GUC_TRIGGER);
+ I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
/*
* Fast commands should complete in less than 10us, so sample quickly
* up to that length of time, then switch to a slower sleep-wait loop.
- * No HOST2GUC command should ever take longer than 10ms.
+ * No INTEL_GUC_ACTION command should ever take longer than 10ms.
*/
- ret = wait_for_us(host2guc_action_response(dev_priv, &status), 10);
+ ret = wait_for_us(guc_recv(dev_priv, &status), 10);
if (ret)
- ret = wait_for(host2guc_action_response(dev_priv, &status), 10);
- if (status != GUC2HOST_STATUS_SUCCESS) {
+ ret = wait_for(guc_recv(dev_priv, &status), 10);
+ if (status != INTEL_GUC_RECV_STATUS_SUCCESS) {
/*
* Either the GuC explicitly returned an error (which
* we convert to -EIO here) or no response at all was
@@ -126,7 +125,7 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
dev_priv->guc.action_status = status;
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
- mutex_unlock(&guc->action_lock);
+ mutex_unlock(&guc->send_mutex);
return ret;
}
@@ -135,35 +134,35 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
* Tell the GuC to allocate or deallocate a specific doorbell
*/
-static int host2guc_allocate_doorbell(struct intel_guc *guc,
- struct i915_guc_client *client)
+static int guc_allocate_doorbell(struct intel_guc *guc,
+ struct i915_guc_client *client)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_ALLOCATE_DOORBELL;
+ data[0] = INTEL_GUC_ACTION_ALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
-static int host2guc_release_doorbell(struct intel_guc *guc,
- struct i915_guc_client *client)
+static int guc_release_doorbell(struct intel_guc *guc,
+ struct i915_guc_client *client)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_DEALLOCATE_DOORBELL;
+ data[0] = INTEL_GUC_ACTION_DEALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
-static int host2guc_sample_forcewake(struct intel_guc *guc,
- struct i915_guc_client *client)
+static int guc_sample_forcewake(struct intel_guc *guc,
+ struct i915_guc_client *client)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
u32 data[2];
- data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE;
+ data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
/* WaRsDisableCoarsePowerGating:skl,bxt */
if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
data[1] = 0;
@@ -171,36 +170,36 @@ static int host2guc_sample_forcewake(struct intel_guc *guc,
/* bit 0 and 1 are for Render and Media domain separately */
data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return guc_send(guc, data, ARRAY_SIZE(data));
}
-static int host2guc_logbuffer_flush_complete(struct intel_guc *guc)
+static int guc_logbuffer_flush_complete(struct intel_guc *guc)
{
u32 data[1];
- data[0] = HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
+ data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
- return host2guc_action(guc, data, 1);
+ return guc_send(guc, data, 1);
}
-static int host2guc_force_logbuffer_flush(struct intel_guc *guc)
+static int guc_force_logbuffer_flush(struct intel_guc *guc)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
+ data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
data[1] = 0;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
-static int host2guc_logging_control(struct intel_guc *guc, u32 control_val)
+static int guc_logging_control(struct intel_guc *guc, u32 control_val)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING;
+ data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
data[1] = control_val;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
/*
@@ -226,7 +225,7 @@ static int guc_update_doorbell_id(struct intel_guc *guc,
test_bit(client->doorbell_id, doorbell_bitmap)) {
/* Deactivate the old doorbell */
doorbell->db_status = GUC_DOORBELL_DISABLED;
- (void)host2guc_release_doorbell(guc, client);
+ (void)guc_release_doorbell(guc, client);
__clear_bit(client->doorbell_id, doorbell_bitmap);
}
@@ -249,7 +248,7 @@ static int guc_update_doorbell_id(struct intel_guc *guc,
__set_bit(new_id, doorbell_bitmap);
doorbell->cookie = 0;
doorbell->db_status = GUC_DOORBELL_ENABLED;
- return host2guc_allocate_doorbell(guc, client);
+ return guc_allocate_doorbell(guc, client);
}
static int guc_init_doorbell(struct intel_guc *guc,
@@ -298,7 +297,7 @@ select_doorbell_register(struct intel_guc *guc, uint32_t priority)
* Select, assign and relase doorbell cachelines
*
* These functions track which doorbell cachelines are in use.
- * The data they manipulate is protected by the host2guc lock.
+ * The data they manipulate is protected by the guc_send lock.
*/
static uint32_t select_doorbell_cacheline(struct intel_guc *guc)
@@ -1500,7 +1499,7 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv)
guc->ctx_pool_vma = vma;
ida_init(&guc->ctx_ids);
- mutex_init(&guc->action_lock);
+ mutex_init(&guc->send_mutex);
guc_log_create(guc);
guc_addon_create(guc);
@@ -1526,7 +1525,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
}
guc->execbuf_client = client;
- host2guc_sample_forcewake(guc, client);
+ guc_sample_forcewake(guc, client);
guc_init_doorbell_hw(guc);
/* Take over from manual control of ELSP (execlists) */
@@ -1590,13 +1589,13 @@ int intel_guc_suspend(struct drm_device *dev)
ctx = dev_priv->kernel_context;
- data[0] = HOST2GUC_ACTION_ENTER_S_STATE;
+ data[0] = INTEL_GUC_ACTION_ENTER_S_STATE;
/* any value greater than GUC_POWER_D0 */
data[1] = GUC_POWER_D1;
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return guc_send(guc, data, ARRAY_SIZE(data));
}
@@ -1619,12 +1618,12 @@ int intel_guc_resume(struct drm_device *dev)
ctx = dev_priv->kernel_context;
- data[0] = HOST2GUC_ACTION_EXIT_S_STATE;
+ data[0] = INTEL_GUC_ACTION_EXIT_S_STATE;
data[1] = GUC_POWER_D0;
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return guc_send(guc, data, ARRAY_SIZE(data));
}
void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
@@ -1635,7 +1634,7 @@ void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
* time, so get/put should be really quick.
*/
intel_runtime_pm_get(dev_priv);
- host2guc_logbuffer_flush_complete(&dev_priv->guc);
+ guc_logbuffer_flush_complete(&dev_priv->guc);
intel_runtime_pm_put(dev_priv);
}
@@ -1653,7 +1652,7 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv)
flush_work(&dev_priv->guc.log.flush_work);
/* Ask GuC to update the log buffer state */
- host2guc_force_logbuffer_flush(&dev_priv->guc);
+ guc_force_logbuffer_flush(&dev_priv->guc);
/* GuC would have updated log buffer by now, so capture it */
i915_guc_capture_logs(dev_priv);
@@ -1694,9 +1693,9 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
if (!log_param.logging_enabled && (i915.guc_log_level < 0))
return 0;
- ret = host2guc_logging_control(&dev_priv->guc, log_param.value);
+ ret = guc_logging_control(&dev_priv->guc, log_param.value);
if (ret < 0) {
- DRM_DEBUG_DRIVER("host2guc action failed %d\n", ret);
+ DRM_DEBUG_DRIVER("guc_logging_control action failed %d\n", ret);
return ret;
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 07ca71c..0b119b9 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1683,8 +1683,8 @@ static void gen9_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir)
u32 msg, flush;
msg = I915_READ(SOFT_SCRATCH(15));
- flush = msg & (GUC2HOST_MSG_CRASH_DUMP_POSTED |
- GUC2HOST_MSG_FLUSH_LOG_BUFFER);
+ flush = msg & (INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED |
+ INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER);
if (flush) {
/* Clear the message bits that are handled */
I915_WRITE(SOFT_SCRATCH(15), msg & ~flush);
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 324ea90..42234ff 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -489,18 +489,18 @@ union guc_log_control {
} __packed;
/* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */
-enum host2guc_action {
- HOST2GUC_ACTION_DEFAULT = 0x0,
- HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
- HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
- HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
- HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30,
- HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302,
- HOST2GUC_ACTION_ENTER_S_STATE = 0x501,
- HOST2GUC_ACTION_EXIT_S_STATE = 0x502,
- HOST2GUC_ACTION_SLPC_REQUEST = 0x3003,
- HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000,
- HOST2GUC_ACTION_LIMIT
+enum intel_guc_send_action {
+ INTEL_GUC_ACTION_DEFAULT = 0x0,
+ INTEL_GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
+ INTEL_GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
+ INTEL_GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
+ INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30,
+ INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302,
+ INTEL_GUC_ACTION_ENTER_S_STATE = 0x501,
+ INTEL_GUC_ACTION_EXIT_S_STATE = 0x502,
+ INTEL_GUC_ACTION_SLPC_REQUEST = 0x3003,
+ INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000,
+ INTEL_GUC_ACTION_LIMIT
};
/*
@@ -509,22 +509,25 @@ enum host2guc_action {
* by the fact that all the MASK bits are set. The remaining bits
* give more detail.
*/
-#define GUC2HOST_RESPONSE_MASK ((u32)0xF0000000)
-#define GUC2HOST_IS_RESPONSE(x) ((u32)(x) >= GUC2HOST_RESPONSE_MASK)
-#define GUC2HOST_STATUS(x) (GUC2HOST_RESPONSE_MASK | (x))
+#define INTEL_GUC_RECV_MASK ((u32)0xF0000000)
+#define INTEL_GUC_RECV_IS_RESPONSE(x) ((u32)(x) >= INTEL_GUC_RECV_MASK)
+#define INTEL_GUC_RECV_STATUS(x) (INTEL_GUC_RECV_MASK | (x))
/* GUC will return status back to SOFT_SCRATCH_O_REG */
-enum guc2host_status {
- GUC2HOST_STATUS_SUCCESS = GUC2HOST_STATUS(0x0),
- GUC2HOST_STATUS_ALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x10),
- GUC2HOST_STATUS_DEALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x20),
- GUC2HOST_STATUS_GENERIC_FAIL = GUC2HOST_STATUS(0x0000F000)
+enum intel_guc_recv_status {
+ INTEL_GUC_RECV_STATUS_SUCCESS = INTEL_GUC_RECV_STATUS(0x0),
+ INTEL_GUC_RECV_STATUS_ALLOCATE_DOORBELL_FAIL = \
+ INTEL_GUC_RECV_STATUS(0x10),
+ INTEL_GUC_RECV_STATUS_DEALLOCATE_DOORBELL_FAIL = \
+ INTEL_GUC_RECV_STATUS(0x20),
+ INTEL_GUC_RECV_STATUS_GENERIC_FAIL = \
+ INTEL_GUC_RECV_STATUS(0x0000F000)
};
/* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */
-enum guc2host_message {
- GUC2HOST_MSG_CRASH_DUMP_POSTED = (1 << 1),
- GUC2HOST_MSG_FLUSH_LOG_BUFFER = (1 << 3)
+enum intel_guc_recv_message {
+ INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED = (1 << 1),
+ INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER = (1 << 3)
};
#endif
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 0d8a493..4b4a91e 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -142,7 +142,7 @@ struct intel_guc {
struct intel_guc_fw guc_fw;
struct intel_guc_log log;
- /* GuC2Host interrupt related state */
+ /* intel_guc_recv interrupt related state */
bool interrupts_enabled;
struct i915_vma *ads_vma;
@@ -164,8 +164,8 @@ struct intel_guc {
uint64_t submissions[I915_NUM_ENGINES];
uint32_t last_seqno[I915_NUM_ENGINES];
- /* To serialize the Host2GuC actions */
- struct mutex action_lock;
+ /* To serialize the intel_guc_send actions */
+ struct mutex send_mutex;
};
/* intel_guc_loader.c */
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/5] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c
2016-11-24 16:13 [PATCH v2 0/5] GuC code reorganization Arkadiusz Hiler
2016-11-24 16:13 ` [PATCH 1/5] drm/i915: Rename intel_guc.h to intel_uc.h Arkadiusz Hiler
2016-11-24 16:13 ` [PATCH 2/5] drm/i915/guc: Drop guc2host/host2guc from names Arkadiusz Hiler
@ 2016-11-24 16:13 ` Arkadiusz Hiler
2016-11-25 11:23 ` Chris Wilson
2016-11-24 16:13 ` [PATCH 4/5] drm/i915/guc: Init send_mutex in intel_uc_init() Arkadiusz Hiler
2016-11-24 16:13 ` [PATCH 5/5] drm/i915/guc: Remove spurious include Arkadiusz Hiler
4 siblings, 1 reply; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-24 16:13 UTC (permalink / raw)
To: intel-gfx
guc_send(), guc_recv() and related functions were introduced in the
i915_guc_submission.c and their scope was limited only to that file.
Those are not submission specific though.
This patch moves moves them to intel_uc.c with intel_ prefix added.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 131 +++------------------------
drivers/gpu/drm/i915/intel_uc.c | 138 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.h | 9 ++
4 files changed, 159 insertions(+), 122 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_uc.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 580602d..3c30916 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -55,7 +55,8 @@ i915-y += i915_cmd_parser.o \
intel_uncore.o
# general-purpose microcontroller (GuC) support
-i915-y += intel_guc_loader.o \
+i915-y += intel_uc.o \
+ intel_guc_loader.o \
i915_guc_submission.o
# autogenerated null render state
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index f8957df..d1f0d6d 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -49,7 +49,7 @@
* Firmware writes a success/fail code back to the action register after
* processes the request. The kernel driver polls waiting for this update and
* then proceeds.
- * See guc_send()
+ * See intel_guc_send()
*
* Doorbells:
* Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
@@ -66,71 +66,6 @@
*/
/*
- * Read GuC command/status register (SOFT_SCRATCH_0)
- * Return true if it contains a response rather than a command
- */
-static inline bool guc_recv(struct drm_i915_private *dev_priv, u32 *status)
-{
- u32 val = I915_READ(SOFT_SCRATCH(0));
- *status = val;
- return INTEL_GUC_RECV_IS_RESPONSE(val);
-}
-
-static int guc_send(struct intel_guc *guc, u32 *data, u32 len)
-{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 status;
- int i;
- int ret;
-
- if (WARN_ON(len < 1 || len > 15))
- return -EINVAL;
-
- mutex_lock(&guc->send_mutex);
- intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
-
- dev_priv->guc.action_count += 1;
- dev_priv->guc.action_cmd = data[0];
-
- for (i = 0; i < len; i++)
- I915_WRITE(SOFT_SCRATCH(i), data[i]);
-
- POSTING_READ(SOFT_SCRATCH(i - 1));
-
- I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
-
- /*
- * Fast commands should complete in less than 10us, so sample quickly
- * up to that length of time, then switch to a slower sleep-wait loop.
- * No INTEL_GUC_ACTION command should ever take longer than 10ms.
- */
- ret = wait_for_us(guc_recv(dev_priv, &status), 10);
- if (ret)
- ret = wait_for(guc_recv(dev_priv, &status), 10);
- if (status != INTEL_GUC_RECV_STATUS_SUCCESS) {
- /*
- * Either the GuC explicitly returned an error (which
- * we convert to -EIO here) or no response at all was
- * received within the timeout limit (-ETIMEDOUT)
- */
- if (ret != -ETIMEDOUT)
- ret = -EIO;
-
- DRM_WARN("Action 0x%X failed; ret=%d status=0x%08X response=0x%08X\n",
- data[0], ret, status, I915_READ(SOFT_SCRATCH(15)));
-
- dev_priv->guc.action_fail += 1;
- dev_priv->guc.action_err = ret;
- }
- dev_priv->guc.action_status = status;
-
- intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
- mutex_unlock(&guc->send_mutex);
-
- return ret;
-}
-
-/*
* Tell the GuC to allocate or deallocate a specific doorbell
*/
@@ -142,7 +77,7 @@ static int guc_allocate_doorbell(struct intel_guc *guc,
data[0] = INTEL_GUC_ACTION_ALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return guc_send(guc, data, 2);
+ return intel_guc_send(guc, data, 2);
}
static int guc_release_doorbell(struct intel_guc *guc,
@@ -153,53 +88,7 @@ static int guc_release_doorbell(struct intel_guc *guc,
data[0] = INTEL_GUC_ACTION_DEALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return guc_send(guc, data, 2);
-}
-
-static int guc_sample_forcewake(struct intel_guc *guc,
- struct i915_guc_client *client)
-{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 data[2];
-
- data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
- /* WaRsDisableCoarsePowerGating:skl,bxt */
- if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
- data[1] = 0;
- else
- /* bit 0 and 1 are for Render and Media domain separately */
- data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
-
- return guc_send(guc, data, ARRAY_SIZE(data));
-}
-
-static int guc_logbuffer_flush_complete(struct intel_guc *guc)
-{
- u32 data[1];
-
- data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
-
- return guc_send(guc, data, 1);
-}
-
-static int guc_force_logbuffer_flush(struct intel_guc *guc)
-{
- u32 data[2];
-
- data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
- data[1] = 0;
-
- return guc_send(guc, data, 2);
-}
-
-static int guc_logging_control(struct intel_guc *guc, u32 control_val)
-{
- u32 data[2];
-
- data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
- data[1] = control_val;
-
- return guc_send(guc, data, 2);
+ return intel_guc_send(guc, data, 2);
}
/*
@@ -297,7 +186,7 @@ select_doorbell_register(struct intel_guc *guc, uint32_t priority)
* Select, assign and relase doorbell cachelines
*
* These functions track which doorbell cachelines are in use.
- * The data they manipulate is protected by the guc_send lock.
+ * The data they manipulate is protected by the intel_guc_send lock.
*/
static uint32_t select_doorbell_cacheline(struct intel_guc *guc)
@@ -1525,7 +1414,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
}
guc->execbuf_client = client;
- guc_sample_forcewake(guc, client);
+ intel_guc_sample_forcewake(guc, client);
guc_init_doorbell_hw(guc);
/* Take over from manual control of ELSP (execlists) */
@@ -1595,7 +1484,7 @@ int intel_guc_suspend(struct drm_device *dev)
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return guc_send(guc, data, ARRAY_SIZE(data));
+ return intel_guc_send(guc, data, ARRAY_SIZE(data));
}
@@ -1623,7 +1512,7 @@ int intel_guc_resume(struct drm_device *dev)
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return guc_send(guc, data, ARRAY_SIZE(data));
+ return intel_guc_send(guc, data, ARRAY_SIZE(data));
}
void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
@@ -1634,7 +1523,7 @@ void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
* time, so get/put should be really quick.
*/
intel_runtime_pm_get(dev_priv);
- guc_logbuffer_flush_complete(&dev_priv->guc);
+ intel_guc_logbuffer_flush_complete(&dev_priv->guc);
intel_runtime_pm_put(dev_priv);
}
@@ -1652,7 +1541,7 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv)
flush_work(&dev_priv->guc.log.flush_work);
/* Ask GuC to update the log buffer state */
- guc_force_logbuffer_flush(&dev_priv->guc);
+ intel_guc_force_logbuffer_flush(&dev_priv->guc);
/* GuC would have updated log buffer by now, so capture it */
i915_guc_capture_logs(dev_priv);
@@ -1693,7 +1582,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
if (!log_param.logging_enabled && (i915.guc_log_level < 0))
return 0;
- ret = guc_logging_control(&dev_priv->guc, log_param.value);
+ ret = intel_guc_logging_control(&dev_priv->guc, log_param.value);
if (ret < 0) {
DRM_DEBUG_DRIVER("guc_logging_control action failed %d\n", ret);
return ret;
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
new file mode 100644
index 0000000..497c9c3
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -0,0 +1,138 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+
+#include "i915_drv.h"
+#include "intel_uc.h"
+
+/*
+ * Read GuC command/status register (SOFT_SCRATCH_0)
+ * Return true if it contains a response rather than a command
+ */
+bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status)
+{
+ u32 val = I915_READ(SOFT_SCRATCH(0));
+ *status = val;
+ return INTEL_GUC_RECV_IS_RESPONSE(val);
+}
+
+int intel_guc_send(struct intel_guc *guc, u32 *data, u32 len)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ u32 status;
+ int i;
+ int ret;
+
+ if (WARN_ON(len < 1 || len > 15))
+ return -EINVAL;
+
+ mutex_lock(&guc->send_mutex);
+ intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+
+ dev_priv->guc.action_count += 1;
+ dev_priv->guc.action_cmd = data[0];
+
+ for (i = 0; i < len; i++)
+ I915_WRITE(SOFT_SCRATCH(i), data[i]);
+
+ POSTING_READ(SOFT_SCRATCH(i - 1));
+
+ I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
+
+ /*
+ * Fast commands should complete in less than 10us, so sample quickly
+ * up to that length of time, then switch to a slower sleep-wait loop.
+ * No inte_guc_send command should ever take longer than 10ms.
+ */
+ ret = wait_for_us(intel_guc_recv(dev_priv, &status), 10);
+ if (ret)
+ ret = wait_for(intel_guc_recv(dev_priv, &status), 10);
+ if (status != INTEL_GUC_RECV_STATUS_SUCCESS) {
+ /*
+ * Either the GuC explicitly returned an error (which
+ * we convert to -EIO here) or no response at all was
+ * received within the timeout limit (-ETIMEDOUT)
+ */
+ if (ret != -ETIMEDOUT)
+ ret = -EIO;
+
+ DRM_WARN("Action 0x%X failed; ret=%d status=0x%08X response=0x%08X\n",
+ data[0], ret, status, I915_READ(SOFT_SCRATCH(15)));
+
+ dev_priv->guc.action_fail += 1;
+ dev_priv->guc.action_err = ret;
+ }
+ dev_priv->guc.action_status = status;
+
+ intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+ mutex_unlock(&guc->send_mutex);
+
+ return ret;
+}
+
+int intel_guc_sample_forcewake(struct intel_guc *guc,
+ struct i915_guc_client *client)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ u32 data[2];
+
+ data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
+ /* WaRsDisableCoarsePowerGating:skl,bxt */
+ if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
+ data[1] = 0;
+ else
+ /* bit 0 and 1 are for Render and Media domain separately */
+ data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
+
+ return intel_guc_send(guc, data, ARRAY_SIZE(data));
+}
+
+int intel_guc_logbuffer_flush_complete(struct intel_guc *guc)
+{
+ u32 data[1];
+
+ data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
+
+ return intel_guc_send(guc, data, 1);
+}
+
+int intel_guc_force_logbuffer_flush(struct intel_guc *guc)
+{
+ u32 data[2];
+
+ data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
+ data[1] = 0;
+
+ return intel_guc_send(guc, data, 2);
+}
+
+int intel_guc_logging_control(struct intel_guc *guc, u32 control_val)
+{
+ u32 data[2];
+
+ data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
+ data[1] = control_val;
+
+ return intel_guc_send(guc, data, 2);
+}
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 4b4a91e..0a55e5a 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -168,6 +168,15 @@ struct intel_guc {
struct mutex send_mutex;
};
+/* intel_uc.c */
+bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status);
+int intel_guc_send(struct intel_guc *guc, u32 *data, u32 len);
+int intel_guc_sample_forcewake(struct intel_guc *guc,
+ struct i915_guc_client *client);
+int intel_guc_logbuffer_flush_complete(struct intel_guc *guc);
+int intel_guc_force_logbuffer_flush(struct intel_guc *guc);
+int intel_guc_logging_control(struct intel_guc *guc, u32 control_val);
+
/* intel_guc_loader.c */
extern void intel_guc_init(struct drm_device *dev);
extern int intel_guc_setup(struct drm_device *dev);
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 4/5] drm/i915/guc: Init send_mutex in intel_uc_init()
2016-11-24 16:13 [PATCH v2 0/5] GuC code reorganization Arkadiusz Hiler
` (2 preceding siblings ...)
2016-11-24 16:13 ` [PATCH 3/5] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c Arkadiusz Hiler
@ 2016-11-24 16:13 ` Arkadiusz Hiler
2016-11-24 17:12 ` Chris Wilson
2016-11-24 16:13 ` [PATCH 5/5] drm/i915/guc: Remove spurious include Arkadiusz Hiler
4 siblings, 1 reply; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-24 16:13 UTC (permalink / raw)
To: intel-gfx
send_mutex is used to serialise communication with GuC via
intel_guc_send().
Since functions that utilize it are no longer limited to submission,
initialization should be handled as a part of general setup.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 1 +
drivers/gpu/drm/i915/i915_guc_submission.c | 1 -
drivers/gpu/drm/i915/intel_uc.c | 5 +++++
drivers/gpu/drm/i915/intel_uc.h | 1 +
4 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b893e67..21d61dc 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -603,6 +603,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
if (ret)
goto cleanup_irq;
+ intel_uc_init(dev_priv);
intel_guc_init(dev);
ret = i915_gem_init(dev);
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index d1f0d6d..0f09d5c 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -1388,7 +1388,6 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv)
guc->ctx_pool_vma = vma;
ida_init(&guc->ctx_ids);
- mutex_init(&guc->send_mutex);
guc_log_create(guc);
guc_addon_create(guc);
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 497c9c3..4f4070a 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -26,6 +26,11 @@
#include "i915_drv.h"
#include "intel_uc.h"
+void intel_uc_init(struct drm_i915_private *dev_priv)
+{
+ mutex_init(&dev_priv->guc.send_mutex);
+}
+
/*
* Read GuC command/status register (SOFT_SCRATCH_0)
* Return true if it contains a response rather than a command
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 0a55e5a..be72709 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -169,6 +169,7 @@ struct intel_guc {
};
/* intel_uc.c */
+void intel_uc_init(struct drm_i915_private *dev_priv);
bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status);
int intel_guc_send(struct intel_guc *guc, u32 *data, u32 len);
int intel_guc_sample_forcewake(struct intel_guc *guc,
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 5/5] drm/i915/guc: Remove spurious include
2016-11-24 16:13 [PATCH v2 0/5] GuC code reorganization Arkadiusz Hiler
` (3 preceding siblings ...)
2016-11-24 16:13 ` [PATCH 4/5] drm/i915/guc: Init send_mutex in intel_uc_init() Arkadiusz Hiler
@ 2016-11-24 16:13 ` Arkadiusz Hiler
4 siblings, 0 replies; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-24 16:13 UTC (permalink / raw)
To: intel-gfx
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_guc_submission.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 0f09d5c..2e9a341 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -21,7 +21,6 @@
* IN THE SOFTWARE.
*
*/
-#include <linux/firmware.h>
#include <linux/circ_buf.h>
#include <linux/debugfs.h>
#include <linux/relay.h>
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 2/5] drm/i915/guc: Drop guc2host/host2guc from names
2016-11-24 16:13 ` [PATCH 2/5] drm/i915/guc: Drop guc2host/host2guc from names Arkadiusz Hiler
@ 2016-11-24 17:06 ` Chris Wilson
2016-11-25 12:29 ` [PATCH v2] " Arkadiusz Hiler
0 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2016-11-24 17:06 UTC (permalink / raw)
To: Arkadiusz Hiler; +Cc: intel-gfx
On Thu, Nov 24, 2016 at 05:13:20PM +0100, Arkadiusz Hiler wrote:
> To facilitate code reorganization we are renaming everything that
> contains guc2host or host2guc.
>
> host2guc_action() and host2guc_action_response() become guc_send()
> and guc_recv() respectively.
>
> Other host2guc_*() functions become simply guc_*().
>
> Other entities are renamed basing on context they appear in:
> - HOST2GUC_ACTIONS_& become INTEL_GUC_ACTION_*
> - HOST2GUC_{INTERRUPT,TRIGGER} become GUC_SEND_{INTERRUPT,TRIGGER}
> - GUC2HOST_* become INTEL_GUC_RECV_*
> - action_lock becomes send_mutex
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
> ---
> drivers/gpu/drm/i915/i915_guc_reg.h | 4 +-
> drivers/gpu/drm/i915/i915_guc_submission.c | 91 +++++++++++++++---------------
> drivers/gpu/drm/i915/i915_irq.c | 4 +-
> drivers/gpu/drm/i915/intel_guc_fwif.h | 49 ++++++++--------
> drivers/gpu/drm/i915/intel_uc.h | 6 +-
> 5 files changed, 78 insertions(+), 76 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
> index a47e1e4..5e638fc 100644
> --- a/drivers/gpu/drm/i915/i915_guc_reg.h
> +++ b/drivers/gpu/drm/i915/i915_guc_reg.h
> @@ -100,8 +100,8 @@
> GUC_ENABLE_READ_CACHE_FOR_WOPCM_DATA | \
> GUC_ENABLE_MIA_CLOCK_GATING)
>
> -#define HOST2GUC_INTERRUPT _MMIO(0xc4c8)
> -#define HOST2GUC_TRIGGER (1<<0)
> +#define GUC_SEND_INTERRUPT _MMIO(0xc4c8)
> +#define GUC_SEND_TRIGGER (1<<0)
>
> #define GEN8_DRBREGL(x) _MMIO(0x1000 + (x) * 8)
> #define GEN8_DRB_VALID (1<<0)
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> index e14220e..f8957df 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -49,7 +49,7 @@
> * Firmware writes a success/fail code back to the action register after
> * processes the request. The kernel driver polls waiting for this update and
> * then proceeds.
> - * See host2guc_action()
> + * See guc_send()
> *
> * Doorbells:
> * Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
> @@ -69,15 +69,14 @@
> * Read GuC command/status register (SOFT_SCRATCH_0)
> * Return true if it contains a response rather than a command
> */
> -static inline bool host2guc_action_response(struct drm_i915_private *dev_priv,
> - u32 *status)
> +static inline bool guc_recv(struct drm_i915_private *dev_priv, u32 *status)
> {
> u32 val = I915_READ(SOFT_SCRATCH(0));
> *status = val;
> - return GUC2HOST_IS_RESPONSE(val);
> + return INTEL_GUC_RECV_IS_RESPONSE(val);
> }
>
> -static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
> +static int guc_send(struct intel_guc *guc, u32 *data, u32 len)
> {
> struct drm_i915_private *dev_priv = guc_to_i915(guc);
> u32 status;
> @@ -87,7 +86,7 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
> if (WARN_ON(len < 1 || len > 15))
> return -EINVAL;
>
> - mutex_lock(&guc->action_lock);
> + mutex_lock(&guc->send_mutex);
> intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
>
> dev_priv->guc.action_count += 1;
> @@ -98,17 +97,17 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
>
> POSTING_READ(SOFT_SCRATCH(i - 1));
>
> - I915_WRITE(HOST2GUC_INTERRUPT, HOST2GUC_TRIGGER);
> + I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
>
> /*
> * Fast commands should complete in less than 10us, so sample quickly
> * up to that length of time, then switch to a slower sleep-wait loop.
> - * No HOST2GUC command should ever take longer than 10ms.
> + * No INTEL_GUC_ACTION command should ever take longer than 10ms.
> */
> - ret = wait_for_us(host2guc_action_response(dev_priv, &status), 10);
> + ret = wait_for_us(guc_recv(dev_priv, &status), 10);
> if (ret)
> - ret = wait_for(host2guc_action_response(dev_priv, &status), 10);
> - if (status != GUC2HOST_STATUS_SUCCESS) {
> + ret = wait_for(guc_recv(dev_priv, &status), 10);
> + if (status != INTEL_GUC_RECV_STATUS_SUCCESS) {
> /*
> * Either the GuC explicitly returned an error (which
> * we convert to -EIO here) or no response at all was
> @@ -126,7 +125,7 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
> dev_priv->guc.action_status = status;
>
> intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
> - mutex_unlock(&guc->action_lock);
> + mutex_unlock(&guc->send_mutex);
>
> return ret;
> }
> @@ -135,35 +134,35 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
> * Tell the GuC to allocate or deallocate a specific doorbell
> */
>
> -static int host2guc_allocate_doorbell(struct intel_guc *guc,
> - struct i915_guc_client *client)
> +static int guc_allocate_doorbell(struct intel_guc *guc,
> + struct i915_guc_client *client)
> {
> u32 data[2];
>
> - data[0] = HOST2GUC_ACTION_ALLOCATE_DOORBELL;
> + data[0] = INTEL_GUC_ACTION_ALLOCATE_DOORBELL;
> data[1] = client->ctx_index;
>
> - return host2guc_action(guc, data, 2);
> + return guc_send(guc, data, 2);
> }
>
> -static int host2guc_release_doorbell(struct intel_guc *guc,
> - struct i915_guc_client *client)
> +static int guc_release_doorbell(struct intel_guc *guc,
> + struct i915_guc_client *client)
> {
> u32 data[2];
>
> - data[0] = HOST2GUC_ACTION_DEALLOCATE_DOORBELL;
> + data[0] = INTEL_GUC_ACTION_DEALLOCATE_DOORBELL;
> data[1] = client->ctx_index;
>
> - return host2guc_action(guc, data, 2);
> + return guc_send(guc, data, 2);
> }
>
> -static int host2guc_sample_forcewake(struct intel_guc *guc,
> - struct i915_guc_client *client)
> +static int guc_sample_forcewake(struct intel_guc *guc,
> + struct i915_guc_client *client)
> {
> struct drm_i915_private *dev_priv = guc_to_i915(guc);
> u32 data[2];
>
> - data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE;
> + data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
> /* WaRsDisableCoarsePowerGating:skl,bxt */
> if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
> data[1] = 0;
> @@ -171,36 +170,36 @@ static int host2guc_sample_forcewake(struct intel_guc *guc,
> /* bit 0 and 1 are for Render and Media domain separately */
> data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
>
> - return host2guc_action(guc, data, ARRAY_SIZE(data));
> + return guc_send(guc, data, ARRAY_SIZE(data));
> }
>
> -static int host2guc_logbuffer_flush_complete(struct intel_guc *guc)
> +static int guc_logbuffer_flush_complete(struct intel_guc *guc)
> {
> u32 data[1];
>
> - data[0] = HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
> + data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
>
> - return host2guc_action(guc, data, 1);
> + return guc_send(guc, data, 1);
> }
>
> -static int host2guc_force_logbuffer_flush(struct intel_guc *guc)
> +static int guc_force_logbuffer_flush(struct intel_guc *guc)
> {
> u32 data[2];
>
> - data[0] = HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
> + data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
> data[1] = 0;
>
> - return host2guc_action(guc, data, 2);
> + return guc_send(guc, data, 2);
> }
>
> -static int host2guc_logging_control(struct intel_guc *guc, u32 control_val)
> +static int guc_logging_control(struct intel_guc *guc, u32 control_val)
> {
> u32 data[2];
>
> - data[0] = HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING;
> + data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
> data[1] = control_val;
>
> - return host2guc_action(guc, data, 2);
> + return guc_send(guc, data, 2);
> }
>
> /*
> @@ -226,7 +225,7 @@ static int guc_update_doorbell_id(struct intel_guc *guc,
> test_bit(client->doorbell_id, doorbell_bitmap)) {
> /* Deactivate the old doorbell */
> doorbell->db_status = GUC_DOORBELL_DISABLED;
> - (void)host2guc_release_doorbell(guc, client);
> + (void)guc_release_doorbell(guc, client);
> __clear_bit(client->doorbell_id, doorbell_bitmap);
> }
>
> @@ -249,7 +248,7 @@ static int guc_update_doorbell_id(struct intel_guc *guc,
> __set_bit(new_id, doorbell_bitmap);
> doorbell->cookie = 0;
> doorbell->db_status = GUC_DOORBELL_ENABLED;
> - return host2guc_allocate_doorbell(guc, client);
> + return guc_allocate_doorbell(guc, client);
> }
>
> static int guc_init_doorbell(struct intel_guc *guc,
> @@ -298,7 +297,7 @@ select_doorbell_register(struct intel_guc *guc, uint32_t priority)
> * Select, assign and relase doorbell cachelines
> *
> * These functions track which doorbell cachelines are in use.
> - * The data they manipulate is protected by the host2guc lock.
> + * The data they manipulate is protected by the guc_send lock.
> */
>
> static uint32_t select_doorbell_cacheline(struct intel_guc *guc)
> @@ -1500,7 +1499,7 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv)
>
> guc->ctx_pool_vma = vma;
> ida_init(&guc->ctx_ids);
> - mutex_init(&guc->action_lock);
> + mutex_init(&guc->send_mutex);
> guc_log_create(guc);
> guc_addon_create(guc);
>
> @@ -1526,7 +1525,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
> }
>
> guc->execbuf_client = client;
> - host2guc_sample_forcewake(guc, client);
> + guc_sample_forcewake(guc, client);
> guc_init_doorbell_hw(guc);
>
> /* Take over from manual control of ELSP (execlists) */
> @@ -1590,13 +1589,13 @@ int intel_guc_suspend(struct drm_device *dev)
>
> ctx = dev_priv->kernel_context;
>
> - data[0] = HOST2GUC_ACTION_ENTER_S_STATE;
> + data[0] = INTEL_GUC_ACTION_ENTER_S_STATE;
> /* any value greater than GUC_POWER_D0 */
> data[1] = GUC_POWER_D1;
> /* first page is shared data with GuC */
> data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
>
> - return host2guc_action(guc, data, ARRAY_SIZE(data));
> + return guc_send(guc, data, ARRAY_SIZE(data));
> }
>
>
> @@ -1619,12 +1618,12 @@ int intel_guc_resume(struct drm_device *dev)
>
> ctx = dev_priv->kernel_context;
>
> - data[0] = HOST2GUC_ACTION_EXIT_S_STATE;
> + data[0] = INTEL_GUC_ACTION_EXIT_S_STATE;
> data[1] = GUC_POWER_D0;
> /* first page is shared data with GuC */
> data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
>
> - return host2guc_action(guc, data, ARRAY_SIZE(data));
> + return guc_send(guc, data, ARRAY_SIZE(data));
> }
>
> void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
> @@ -1635,7 +1634,7 @@ void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
> * time, so get/put should be really quick.
> */
> intel_runtime_pm_get(dev_priv);
> - host2guc_logbuffer_flush_complete(&dev_priv->guc);
> + guc_logbuffer_flush_complete(&dev_priv->guc);
> intel_runtime_pm_put(dev_priv);
> }
>
> @@ -1653,7 +1652,7 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv)
> flush_work(&dev_priv->guc.log.flush_work);
>
> /* Ask GuC to update the log buffer state */
> - host2guc_force_logbuffer_flush(&dev_priv->guc);
> + guc_force_logbuffer_flush(&dev_priv->guc);
>
> /* GuC would have updated log buffer by now, so capture it */
> i915_guc_capture_logs(dev_priv);
> @@ -1694,9 +1693,9 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
> if (!log_param.logging_enabled && (i915.guc_log_level < 0))
> return 0;
>
> - ret = host2guc_logging_control(&dev_priv->guc, log_param.value);
> + ret = guc_logging_control(&dev_priv->guc, log_param.value);
> if (ret < 0) {
> - DRM_DEBUG_DRIVER("host2guc action failed %d\n", ret);
> + DRM_DEBUG_DRIVER("guc_logging_control action failed %d\n", ret);
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 07ca71c..0b119b9 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1683,8 +1683,8 @@ static void gen9_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir)
> u32 msg, flush;
>
> msg = I915_READ(SOFT_SCRATCH(15));
> - flush = msg & (GUC2HOST_MSG_CRASH_DUMP_POSTED |
> - GUC2HOST_MSG_FLUSH_LOG_BUFFER);
> + flush = msg & (INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED |
> + INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER);
> if (flush) {
> /* Clear the message bits that are handled */
> I915_WRITE(SOFT_SCRATCH(15), msg & ~flush);
> diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
> index 324ea90..42234ff 100644
> --- a/drivers/gpu/drm/i915/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
> @@ -489,18 +489,18 @@ union guc_log_control {
> } __packed;
>
> /* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */
> -enum host2guc_action {
> - HOST2GUC_ACTION_DEFAULT = 0x0,
> - HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
> - HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
> - HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
> - HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30,
> - HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302,
> - HOST2GUC_ACTION_ENTER_S_STATE = 0x501,
> - HOST2GUC_ACTION_EXIT_S_STATE = 0x502,
> - HOST2GUC_ACTION_SLPC_REQUEST = 0x3003,
> - HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000,
> - HOST2GUC_ACTION_LIMIT
> +enum intel_guc_send_action {
> + INTEL_GUC_ACTION_DEFAULT = 0x0,
> + INTEL_GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
> + INTEL_GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
> + INTEL_GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
> + INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30,
> + INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302,
> + INTEL_GUC_ACTION_ENTER_S_STATE = 0x501,
> + INTEL_GUC_ACTION_EXIT_S_STATE = 0x502,
> + INTEL_GUC_ACTION_SLPC_REQUEST = 0x3003,
> + INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000,
> + INTEL_GUC_ACTION_LIMIT
> };
>
> /*
> @@ -509,22 +509,25 @@ enum host2guc_action {
> * by the fact that all the MASK bits are set. The remaining bits
> * give more detail.
> */
> -#define GUC2HOST_RESPONSE_MASK ((u32)0xF0000000)
> -#define GUC2HOST_IS_RESPONSE(x) ((u32)(x) >= GUC2HOST_RESPONSE_MASK)
> -#define GUC2HOST_STATUS(x) (GUC2HOST_RESPONSE_MASK | (x))
> +#define INTEL_GUC_RECV_MASK ((u32)0xF0000000)
> +#define INTEL_GUC_RECV_IS_RESPONSE(x) ((u32)(x) >= INTEL_GUC_RECV_MASK)
> +#define INTEL_GUC_RECV_STATUS(x) (INTEL_GUC_RECV_MASK | (x))
>
> /* GUC will return status back to SOFT_SCRATCH_O_REG */
> -enum guc2host_status {
> - GUC2HOST_STATUS_SUCCESS = GUC2HOST_STATUS(0x0),
> - GUC2HOST_STATUS_ALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x10),
> - GUC2HOST_STATUS_DEALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x20),
> - GUC2HOST_STATUS_GENERIC_FAIL = GUC2HOST_STATUS(0x0000F000)
> +enum intel_guc_recv_status {
> + INTEL_GUC_RECV_STATUS_SUCCESS = INTEL_GUC_RECV_STATUS(0x0),
> + INTEL_GUC_RECV_STATUS_ALLOCATE_DOORBELL_FAIL = \
It's not a macro the escape ('\') before the newline is not required.
> + INTEL_GUC_RECV_STATUS(0x10),
> + INTEL_GUC_RECV_STATUS_DEALLOCATE_DOORBELL_FAIL = \
> + INTEL_GUC_RECV_STATUS(0x20),
> + INTEL_GUC_RECV_STATUS_GENERIC_FAIL = \
> + INTEL_GUC_RECV_STATUS(0x0000F000)
> };
>
> /* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */
> -enum guc2host_message {
> - GUC2HOST_MSG_CRASH_DUMP_POSTED = (1 << 1),
> - GUC2HOST_MSG_FLUSH_LOG_BUFFER = (1 << 3)
> +enum intel_guc_recv_message {
> + INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED = (1 << 1),
> + INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER = (1 << 3)
If these are meant to be part of a bitmask, use BIT(1), BIT(3). If they
are simple numbers (that just happen to be pot), let them be.
Otherwise, it reads and looks ok.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 4/5] drm/i915/guc: Init send_mutex in intel_uc_init()
2016-11-24 16:13 ` [PATCH 4/5] drm/i915/guc: Init send_mutex in intel_uc_init() Arkadiusz Hiler
@ 2016-11-24 17:12 ` Chris Wilson
2016-11-25 11:05 ` [PATCH v2] drm/i915/guc: Init send_mutex in intel_uc_init_early() Arkadiusz Hiler
0 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2016-11-24 17:12 UTC (permalink / raw)
To: Arkadiusz Hiler; +Cc: intel-gfx
On Thu, Nov 24, 2016 at 05:13:22PM +0100, Arkadiusz Hiler wrote:
> send_mutex is used to serialise communication with GuC via
> intel_guc_send().
>
> Since functions that utilize it are no longer limited to submission,
> initialization should be handled as a part of general setup.
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 1 +
> drivers/gpu/drm/i915/i915_guc_submission.c | 1 -
> drivers/gpu/drm/i915/intel_uc.c | 5 +++++
> drivers/gpu/drm/i915/intel_uc.h | 1 +
> 4 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index b893e67..21d61dc 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -603,6 +603,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
> if (ret)
> goto cleanup_irq;
>
> + intel_uc_init(dev_priv);
> intel_guc_init(dev);
Probably wants to be in i915_driver_init_early() or i915_driver_init_mmio().
My preferences would be i915_driver_init_early(). (So call it
intel_uc_init_early()).
With that minor change,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v2] drm/i915/guc: Init send_mutex in intel_uc_init_early()
2016-11-24 17:12 ` Chris Wilson
@ 2016-11-25 11:05 ` Arkadiusz Hiler
0 siblings, 0 replies; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-25 11:05 UTC (permalink / raw)
To: intel-gfx
send_mutex is used to serialise communication with GuC via
intel_guc_send().
Since functions that utilize it are no longer limited to submission,
initialization should be handled as a part of general setup.
v2: move initialization to *_early()
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_drv.c | 2 ++
drivers/gpu/drm/i915/i915_guc_submission.c | 1 -
drivers/gpu/drm/i915/intel_uc.c | 5 +++++
drivers/gpu/drm/i915/intel_uc.h | 1 +
4 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b893e67..3cd99c0 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -817,6 +817,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
mutex_init(&dev_priv->wm.wm_mutex);
mutex_init(&dev_priv->pps_mutex);
+ intel_uc_init_early(dev_priv);
+
i915_memcpy_init_early(dev_priv);
ret = i915_workqueues_init(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index d1f0d6d..0f09d5c 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -1388,7 +1388,6 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv)
guc->ctx_pool_vma = vma;
ida_init(&guc->ctx_ids);
- mutex_init(&guc->send_mutex);
guc_log_create(guc);
guc_addon_create(guc);
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 497c9c3..531e7fc 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -26,6 +26,11 @@
#include "i915_drv.h"
#include "intel_uc.h"
+void intel_uc_init_early(struct drm_i915_private *dev_priv)
+{
+ mutex_init(&dev_priv->guc.send_mutex);
+}
+
/*
* Read GuC command/status register (SOFT_SCRATCH_0)
* Return true if it contains a response rather than a command
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 0a55e5a..2a0e0d9 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -169,6 +169,7 @@ struct intel_guc {
};
/* intel_uc.c */
+void intel_uc_init_early(struct drm_i915_private *dev_priv);
bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status);
int intel_guc_send(struct intel_guc *guc, u32 *data, u32 len);
int intel_guc_sample_forcewake(struct intel_guc *guc,
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 3/5] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c
2016-11-24 16:13 ` [PATCH 3/5] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c Arkadiusz Hiler
@ 2016-11-25 11:23 ` Chris Wilson
2016-11-25 12:18 ` Chris Wilson
0 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2016-11-25 11:23 UTC (permalink / raw)
To: Arkadiusz Hiler; +Cc: intel-gfx
On Thu, Nov 24, 2016 at 05:13:21PM +0100, Arkadiusz Hiler wrote:
> guc_send(), guc_recv() and related functions were introduced in the
> i915_guc_submission.c and their scope was limited only to that file.
>
> Those are not submission specific though.
> This patch moves moves them to intel_uc.c with intel_ prefix added.
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
> ---
> drivers/gpu/drm/i915/Makefile | 3 +-
> drivers/gpu/drm/i915/i915_guc_submission.c | 131 +++------------------------
> drivers/gpu/drm/i915/intel_uc.c | 138 +++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_uc.h | 9 ++
> 4 files changed, 159 insertions(+), 122 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/intel_uc.c
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 580602d..3c30916 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -55,7 +55,8 @@ i915-y += i915_cmd_parser.o \
> intel_uncore.o
>
> # general-purpose microcontroller (GuC) support
> -i915-y += intel_guc_loader.o \
> +i915-y += intel_uc.o \
> + intel_guc_loader.o \
> i915_guc_submission.o
>
> # autogenerated null render state
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> index f8957df..d1f0d6d 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -49,7 +49,7 @@
> * Firmware writes a success/fail code back to the action register after
> * processes the request. The kernel driver polls waiting for this update and
> * then proceeds.
> - * See guc_send()
> + * See intel_guc_send()
> *
> * Doorbells:
> * Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
> @@ -66,71 +66,6 @@
> */
>
> /*
> - * Read GuC command/status register (SOFT_SCRATCH_0)
> - * Return true if it contains a response rather than a command
> - */
> -static inline bool guc_recv(struct drm_i915_private *dev_priv, u32 *status)
> -{
> - u32 val = I915_READ(SOFT_SCRATCH(0));
> - *status = val;
> - return INTEL_GUC_RECV_IS_RESPONSE(val);
> -}
> -
> -static int guc_send(struct intel_guc *guc, u32 *data, u32 len)
> -{
> - struct drm_i915_private *dev_priv = guc_to_i915(guc);
> - u32 status;
> - int i;
> - int ret;
> -
> - if (WARN_ON(len < 1 || len > 15))
> - return -EINVAL;
> -
> - mutex_lock(&guc->send_mutex);
> - intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
> -
> - dev_priv->guc.action_count += 1;
> - dev_priv->guc.action_cmd = data[0];
> -
> - for (i = 0; i < len; i++)
> - I915_WRITE(SOFT_SCRATCH(i), data[i]);
> -
> - POSTING_READ(SOFT_SCRATCH(i - 1));
> -
> - I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
> -
> - /*
> - * Fast commands should complete in less than 10us, so sample quickly
> - * up to that length of time, then switch to a slower sleep-wait loop.
> - * No INTEL_GUC_ACTION command should ever take longer than 10ms.
> - */
> - ret = wait_for_us(guc_recv(dev_priv, &status), 10);
> - if (ret)
> - ret = wait_for(guc_recv(dev_priv, &status), 10);
> - if (status != INTEL_GUC_RECV_STATUS_SUCCESS) {
> - /*
> - * Either the GuC explicitly returned an error (which
> - * we convert to -EIO here) or no response at all was
> - * received within the timeout limit (-ETIMEDOUT)
> - */
> - if (ret != -ETIMEDOUT)
> - ret = -EIO;
> -
> - DRM_WARN("Action 0x%X failed; ret=%d status=0x%08X response=0x%08X\n",
> - data[0], ret, status, I915_READ(SOFT_SCRATCH(15)));
> -
> - dev_priv->guc.action_fail += 1;
> - dev_priv->guc.action_err = ret;
> - }
> - dev_priv->guc.action_status = status;
> -
> - intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
> - mutex_unlock(&guc->send_mutex);
> -
> - return ret;
> -}
> -
> -/*
> * Tell the GuC to allocate or deallocate a specific doorbell
> */
>
> @@ -142,7 +77,7 @@ static int guc_allocate_doorbell(struct intel_guc *guc,
> data[0] = INTEL_GUC_ACTION_ALLOCATE_DOORBELL;
> data[1] = client->ctx_index;
>
> - return guc_send(guc, data, 2);
> + return intel_guc_send(guc, data, 2);
> }
>
> static int guc_release_doorbell(struct intel_guc *guc,
> @@ -153,53 +88,7 @@ static int guc_release_doorbell(struct intel_guc *guc,
> data[0] = INTEL_GUC_ACTION_DEALLOCATE_DOORBELL;
> data[1] = client->ctx_index;
>
> - return guc_send(guc, data, 2);
> -}
> -
> -static int guc_sample_forcewake(struct intel_guc *guc,
> - struct i915_guc_client *client)
> -{
> - struct drm_i915_private *dev_priv = guc_to_i915(guc);
> - u32 data[2];
> -
> - data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
> - /* WaRsDisableCoarsePowerGating:skl,bxt */
> - if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
> - data[1] = 0;
> - else
> - /* bit 0 and 1 are for Render and Media domain separately */
> - data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
> -
> - return guc_send(guc, data, ARRAY_SIZE(data));
> -}
> -
> -static int guc_logbuffer_flush_complete(struct intel_guc *guc)
> -{
> - u32 data[1];
> -
> - data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
> -
> - return guc_send(guc, data, 1);
> -}
> -
> -static int guc_force_logbuffer_flush(struct intel_guc *guc)
> -{
> - u32 data[2];
> -
> - data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
> - data[1] = 0;
> -
> - return guc_send(guc, data, 2);
> -}
> -
> -static int guc_logging_control(struct intel_guc *guc, u32 control_val)
> -{
> - u32 data[2];
> -
> - data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
> - data[1] = control_val;
> -
> - return guc_send(guc, data, 2);
> + return intel_guc_send(guc, data, 2);
> }
>
> /*
> @@ -297,7 +186,7 @@ select_doorbell_register(struct intel_guc *guc, uint32_t priority)
> * Select, assign and relase doorbell cachelines
> *
> * These functions track which doorbell cachelines are in use.
> - * The data they manipulate is protected by the guc_send lock.
> + * The data they manipulate is protected by the intel_guc_send lock.
> */
>
> static uint32_t select_doorbell_cacheline(struct intel_guc *guc)
> @@ -1525,7 +1414,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
> }
>
> guc->execbuf_client = client;
> - guc_sample_forcewake(guc, client);
> + intel_guc_sample_forcewake(guc, client);
> guc_init_doorbell_hw(guc);
>
> /* Take over from manual control of ELSP (execlists) */
> @@ -1595,7 +1484,7 @@ int intel_guc_suspend(struct drm_device *dev)
> /* first page is shared data with GuC */
> data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
>
> - return guc_send(guc, data, ARRAY_SIZE(data));
> + return intel_guc_send(guc, data, ARRAY_SIZE(data));
> }
>
>
> @@ -1623,7 +1512,7 @@ int intel_guc_resume(struct drm_device *dev)
> /* first page is shared data with GuC */
> data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
>
> - return guc_send(guc, data, ARRAY_SIZE(data));
> + return intel_guc_send(guc, data, ARRAY_SIZE(data));
> }
>
> void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
> @@ -1634,7 +1523,7 @@ void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
> * time, so get/put should be really quick.
> */
> intel_runtime_pm_get(dev_priv);
> - guc_logbuffer_flush_complete(&dev_priv->guc);
> + intel_guc_logbuffer_flush_complete(&dev_priv->guc);
> intel_runtime_pm_put(dev_priv);
> }
>
> @@ -1652,7 +1541,7 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv)
> flush_work(&dev_priv->guc.log.flush_work);
>
> /* Ask GuC to update the log buffer state */
> - guc_force_logbuffer_flush(&dev_priv->guc);
> + intel_guc_force_logbuffer_flush(&dev_priv->guc);
>
> /* GuC would have updated log buffer by now, so capture it */
> i915_guc_capture_logs(dev_priv);
> @@ -1693,7 +1582,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
> if (!log_param.logging_enabled && (i915.guc_log_level < 0))
> return 0;
>
> - ret = guc_logging_control(&dev_priv->guc, log_param.value);
> + ret = intel_guc_logging_control(&dev_priv->guc, log_param.value);
> if (ret < 0) {
> DRM_DEBUG_DRIVER("guc_logging_control action failed %d\n", ret);
> return ret;
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> new file mode 100644
> index 0000000..497c9c3
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -0,0 +1,138 @@
> +/*
> + * Copyright © 2016 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +
> +#include "i915_drv.h"
> +#include "intel_uc.h"
> +
> +/*
> + * Read GuC command/status register (SOFT_SCRATCH_0)
> + * Return true if it contains a response rather than a command
> + */
> +bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status)
> +{
> + u32 val = I915_READ(SOFT_SCRATCH(0));
> + *status = val;
> + return INTEL_GUC_RECV_IS_RESPONSE(val);
> +}
> +
> +int intel_guc_send(struct intel_guc *guc, u32 *data, u32 len)
Should be const u32 *data.
> +{
> + struct drm_i915_private *dev_priv = guc_to_i915(guc);
> + u32 status;
> + int i;
> + int ret;
> +
> + if (WARN_ON(len < 1 || len > 15))
> + return -EINVAL;
> +
> + mutex_lock(&guc->send_mutex);
> + intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
> +
> + dev_priv->guc.action_count += 1;
> + dev_priv->guc.action_cmd = data[0];
> +
> + for (i = 0; i < len; i++)
> + I915_WRITE(SOFT_SCRATCH(i), data[i]);
> +
> + POSTING_READ(SOFT_SCRATCH(i - 1));
> +
> + I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
> +
> + /*
> + * Fast commands should complete in less than 10us, so sample quickly
> + * up to that length of time, then switch to a slower sleep-wait loop.
> + * No inte_guc_send command should ever take longer than 10ms.
> + */
> + ret = wait_for_us(intel_guc_recv(dev_priv, &status), 10);
> + if (ret)
> + ret = wait_for(intel_guc_recv(dev_priv, &status), 10);
> + if (status != INTEL_GUC_RECV_STATUS_SUCCESS) {
> + /*
> + * Either the GuC explicitly returned an error (which
> + * we convert to -EIO here) or no response at all was
> + * received within the timeout limit (-ETIMEDOUT)
> + */
> + if (ret != -ETIMEDOUT)
> + ret = -EIO;
> +
> + DRM_WARN("Action 0x%X failed; ret=%d status=0x%08X response=0x%08X\n",
> + data[0], ret, status, I915_READ(SOFT_SCRATCH(15)));
DRM_WARN excludes the function name, it lacks context, so the message
needs to be cystal clear and identifiable (remember it is also user
facing).
> +
> + dev_priv->guc.action_fail += 1;
> + dev_priv->guc.action_err = ret;
> + }
> + dev_priv->guc.action_status = status;
> +
> + intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
> + mutex_unlock(&guc->send_mutex);
> +
> + return ret;
> +}
> +
> +int intel_guc_sample_forcewake(struct intel_guc *guc,
> + struct i915_guc_client *client)
> +{
> + struct drm_i915_private *dev_priv = guc_to_i915(guc);
> + u32 data[2];
> +
> + data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
> + /* WaRsDisableCoarsePowerGating:skl,bxt */
> + if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
> + data[1] = 0;
> + else
> + /* bit 0 and 1 are for Render and Media domain separately */
> + data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
> +
> + return intel_guc_send(guc, data, ARRAY_SIZE(data));
> +}
> +
> +int intel_guc_logbuffer_flush_complete(struct intel_guc *guc)
> +{
> + u32 data[1];
> +
> + data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
> +
> + return intel_guc_send(guc, data, 1);
> +}
> +
> +int intel_guc_force_logbuffer_flush(struct intel_guc *guc)
> +{
> + u32 data[2];
> +
> + data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
> + data[1] = 0;
> +
> + return intel_guc_send(guc, data, 2);
> +}
> +
> +int intel_guc_logging_control(struct intel_guc *guc, u32 control_val)
> +{
> + u32 data[2];
> +
> + data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
> + data[1] = control_val;
> +
> + return intel_guc_send(guc, data, 2);
u32 pkt[] = {
INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING,
control_val,
};
return intel_guc_send(guc, pkt, ARRAY_SIZE(pkt);
Or being fancy
return intel_guc_send_cmd(guc, {
INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING,
control_val
});
#define intel_guc_send_cmd(G, PKT) ({ \
u32 pkt__[] = PKT;\
intel_guc_send(G, pkt__, ARRAY_SIZE(pkt__)); \
)}
or intel_guc_send_pkt
> +}
> diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
> index 4b4a91e..0a55e5a 100644
> --- a/drivers/gpu/drm/i915/intel_uc.h
> +++ b/drivers/gpu/drm/i915/intel_uc.h
> @@ -168,6 +168,15 @@ struct intel_guc {
> struct mutex send_mutex;
> };
>
> +/* intel_uc.c */
> +bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status);
> +int intel_guc_send(struct intel_guc *guc, u32 *data, u32 len);
> +int intel_guc_sample_forcewake(struct intel_guc *guc,
> + struct i915_guc_client *client);
> +int intel_guc_logbuffer_flush_complete(struct intel_guc *guc);
> +int intel_guc_force_logbuffer_flush(struct intel_guc *guc);
> +int intel_guc_logging_control(struct intel_guc *guc, u32 control_val);
Ugh. (Names chosen based on enum, but lack consistency with our code)
intel_guc_log_control();
intel_guc_log_flush()
intel_guc_log_flush_complete()
Looks ok, but the code could do with some polish. The benefit of
exposing it ;)
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/5] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c
2016-11-25 11:23 ` Chris Wilson
@ 2016-11-25 12:18 ` Chris Wilson
2016-11-25 14:22 ` [PATCH v2] " Arkadiusz Hiler
0 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2016-11-25 12:18 UTC (permalink / raw)
To: Arkadiusz Hiler, intel-gfx, Michal Winiarski
On Fri, Nov 25, 2016 at 11:23:19AM +0000, Chris Wilson wrote:
> > +int intel_guc_logging_control(struct intel_guc *guc, u32 control_val)
> > +{
> > + u32 data[2];
> > +
> > + data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
> > + data[1] = control_val;
> > +
> > + return intel_guc_send(guc, data, 2);
>
> u32 pkt[] = {
> INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING,
> control_val,
> };
> return intel_guc_send(guc, pkt, ARRAY_SIZE(pkt);
>
> Or being fancy
> return intel_guc_send_cmd(guc, {
> INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING,
> control_val
> });
>
> #define intel_guc_send_cmd(G, PKT) ({ \
> u32 pkt__[] = PKT;\
> intel_guc_send(G, pkt__, ARRAY_SIZE(pkt__)); \
> )}
>
> or intel_guc_send_pkt
#define intel_guc_send_pkt(G, PKT...) ({ \
u32 pkt__[] = { PKT }; \
host2guc_action((G), pkt__, ARRAY_SIZE(pkt__)); \
})
static int host2guc_allocate_doorbell(struct intel_guc *guc,
struct i915_guc_client *client)
{
return intel_guc_send_pkt(guc,
HOST2GUC_ACTION_ALLOCATE_DOORBELL,
client->ctx_index);
}
At which point, you may want to call that intel_guc_send() and rename the
other __intel_guc_send() :)
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v2] drm/i915/guc: Drop guc2host/host2guc from names
2016-11-24 17:06 ` Chris Wilson
@ 2016-11-25 12:29 ` Arkadiusz Hiler
2016-11-25 13:03 ` Chris Wilson
0 siblings, 1 reply; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-25 12:29 UTC (permalink / raw)
To: intel-gfx
To facilitate code reorganization we are renaming everything that
contains guc2host or host2guc.
host2guc_action() and host2guc_action_response() become guc_send()
and guc_recv() respectively.
Other host2guc_*() functions become simply guc_*().
Other entities are renamed basing on context they appear in:
- HOST2GUC_ACTIONS_& become INTEL_GUC_ACTION_*
- HOST2GUC_{INTERRUPT,TRIGGER} become GUC_SEND_{INTERRUPT,TRIGGER}
- GUC2HOST_* become INTEL_GUC_RECV_*
- action_lock becomes send_mutex
v2: drop unnecessary backslashes and use BIT() instead of '<<'
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
---
drivers/gpu/drm/i915/i915_guc_reg.h | 4 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 91 +++++++++++++++---------------
drivers/gpu/drm/i915/i915_irq.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 49 ++++++++--------
drivers/gpu/drm/i915/intel_uc.h | 6 +-
5 files changed, 78 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
index a47e1e4..5e638fc 100644
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ b/drivers/gpu/drm/i915/i915_guc_reg.h
@@ -100,8 +100,8 @@
GUC_ENABLE_READ_CACHE_FOR_WOPCM_DATA | \
GUC_ENABLE_MIA_CLOCK_GATING)
-#define HOST2GUC_INTERRUPT _MMIO(0xc4c8)
-#define HOST2GUC_TRIGGER (1<<0)
+#define GUC_SEND_INTERRUPT _MMIO(0xc4c8)
+#define GUC_SEND_TRIGGER (1<<0)
#define GEN8_DRBREGL(x) _MMIO(0x1000 + (x) * 8)
#define GEN8_DRB_VALID (1<<0)
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index e14220e..f8957df 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -49,7 +49,7 @@
* Firmware writes a success/fail code back to the action register after
* processes the request. The kernel driver polls waiting for this update and
* then proceeds.
- * See host2guc_action()
+ * See guc_send()
*
* Doorbells:
* Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
@@ -69,15 +69,14 @@
* Read GuC command/status register (SOFT_SCRATCH_0)
* Return true if it contains a response rather than a command
*/
-static inline bool host2guc_action_response(struct drm_i915_private *dev_priv,
- u32 *status)
+static inline bool guc_recv(struct drm_i915_private *dev_priv, u32 *status)
{
u32 val = I915_READ(SOFT_SCRATCH(0));
*status = val;
- return GUC2HOST_IS_RESPONSE(val);
+ return INTEL_GUC_RECV_IS_RESPONSE(val);
}
-static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
+static int guc_send(struct intel_guc *guc, u32 *data, u32 len)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
u32 status;
@@ -87,7 +86,7 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
if (WARN_ON(len < 1 || len > 15))
return -EINVAL;
- mutex_lock(&guc->action_lock);
+ mutex_lock(&guc->send_mutex);
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
dev_priv->guc.action_count += 1;
@@ -98,17 +97,17 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
POSTING_READ(SOFT_SCRATCH(i - 1));
- I915_WRITE(HOST2GUC_INTERRUPT, HOST2GUC_TRIGGER);
+ I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
/*
* Fast commands should complete in less than 10us, so sample quickly
* up to that length of time, then switch to a slower sleep-wait loop.
- * No HOST2GUC command should ever take longer than 10ms.
+ * No INTEL_GUC_ACTION command should ever take longer than 10ms.
*/
- ret = wait_for_us(host2guc_action_response(dev_priv, &status), 10);
+ ret = wait_for_us(guc_recv(dev_priv, &status), 10);
if (ret)
- ret = wait_for(host2guc_action_response(dev_priv, &status), 10);
- if (status != GUC2HOST_STATUS_SUCCESS) {
+ ret = wait_for(guc_recv(dev_priv, &status), 10);
+ if (status != INTEL_GUC_RECV_STATUS_SUCCESS) {
/*
* Either the GuC explicitly returned an error (which
* we convert to -EIO here) or no response at all was
@@ -126,7 +125,7 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
dev_priv->guc.action_status = status;
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
- mutex_unlock(&guc->action_lock);
+ mutex_unlock(&guc->send_mutex);
return ret;
}
@@ -135,35 +134,35 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
* Tell the GuC to allocate or deallocate a specific doorbell
*/
-static int host2guc_allocate_doorbell(struct intel_guc *guc,
- struct i915_guc_client *client)
+static int guc_allocate_doorbell(struct intel_guc *guc,
+ struct i915_guc_client *client)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_ALLOCATE_DOORBELL;
+ data[0] = INTEL_GUC_ACTION_ALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
-static int host2guc_release_doorbell(struct intel_guc *guc,
- struct i915_guc_client *client)
+static int guc_release_doorbell(struct intel_guc *guc,
+ struct i915_guc_client *client)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_DEALLOCATE_DOORBELL;
+ data[0] = INTEL_GUC_ACTION_DEALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
-static int host2guc_sample_forcewake(struct intel_guc *guc,
- struct i915_guc_client *client)
+static int guc_sample_forcewake(struct intel_guc *guc,
+ struct i915_guc_client *client)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
u32 data[2];
- data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE;
+ data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
/* WaRsDisableCoarsePowerGating:skl,bxt */
if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
data[1] = 0;
@@ -171,36 +170,36 @@ static int host2guc_sample_forcewake(struct intel_guc *guc,
/* bit 0 and 1 are for Render and Media domain separately */
data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return guc_send(guc, data, ARRAY_SIZE(data));
}
-static int host2guc_logbuffer_flush_complete(struct intel_guc *guc)
+static int guc_logbuffer_flush_complete(struct intel_guc *guc)
{
u32 data[1];
- data[0] = HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
+ data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
- return host2guc_action(guc, data, 1);
+ return guc_send(guc, data, 1);
}
-static int host2guc_force_logbuffer_flush(struct intel_guc *guc)
+static int guc_force_logbuffer_flush(struct intel_guc *guc)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
+ data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
data[1] = 0;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
-static int host2guc_logging_control(struct intel_guc *guc, u32 control_val)
+static int guc_logging_control(struct intel_guc *guc, u32 control_val)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING;
+ data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
data[1] = control_val;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
/*
@@ -226,7 +225,7 @@ static int guc_update_doorbell_id(struct intel_guc *guc,
test_bit(client->doorbell_id, doorbell_bitmap)) {
/* Deactivate the old doorbell */
doorbell->db_status = GUC_DOORBELL_DISABLED;
- (void)host2guc_release_doorbell(guc, client);
+ (void)guc_release_doorbell(guc, client);
__clear_bit(client->doorbell_id, doorbell_bitmap);
}
@@ -249,7 +248,7 @@ static int guc_update_doorbell_id(struct intel_guc *guc,
__set_bit(new_id, doorbell_bitmap);
doorbell->cookie = 0;
doorbell->db_status = GUC_DOORBELL_ENABLED;
- return host2guc_allocate_doorbell(guc, client);
+ return guc_allocate_doorbell(guc, client);
}
static int guc_init_doorbell(struct intel_guc *guc,
@@ -298,7 +297,7 @@ select_doorbell_register(struct intel_guc *guc, uint32_t priority)
* Select, assign and relase doorbell cachelines
*
* These functions track which doorbell cachelines are in use.
- * The data they manipulate is protected by the host2guc lock.
+ * The data they manipulate is protected by the guc_send lock.
*/
static uint32_t select_doorbell_cacheline(struct intel_guc *guc)
@@ -1500,7 +1499,7 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv)
guc->ctx_pool_vma = vma;
ida_init(&guc->ctx_ids);
- mutex_init(&guc->action_lock);
+ mutex_init(&guc->send_mutex);
guc_log_create(guc);
guc_addon_create(guc);
@@ -1526,7 +1525,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
}
guc->execbuf_client = client;
- host2guc_sample_forcewake(guc, client);
+ guc_sample_forcewake(guc, client);
guc_init_doorbell_hw(guc);
/* Take over from manual control of ELSP (execlists) */
@@ -1590,13 +1589,13 @@ int intel_guc_suspend(struct drm_device *dev)
ctx = dev_priv->kernel_context;
- data[0] = HOST2GUC_ACTION_ENTER_S_STATE;
+ data[0] = INTEL_GUC_ACTION_ENTER_S_STATE;
/* any value greater than GUC_POWER_D0 */
data[1] = GUC_POWER_D1;
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return guc_send(guc, data, ARRAY_SIZE(data));
}
@@ -1619,12 +1618,12 @@ int intel_guc_resume(struct drm_device *dev)
ctx = dev_priv->kernel_context;
- data[0] = HOST2GUC_ACTION_EXIT_S_STATE;
+ data[0] = INTEL_GUC_ACTION_EXIT_S_STATE;
data[1] = GUC_POWER_D0;
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return guc_send(guc, data, ARRAY_SIZE(data));
}
void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
@@ -1635,7 +1634,7 @@ void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
* time, so get/put should be really quick.
*/
intel_runtime_pm_get(dev_priv);
- host2guc_logbuffer_flush_complete(&dev_priv->guc);
+ guc_logbuffer_flush_complete(&dev_priv->guc);
intel_runtime_pm_put(dev_priv);
}
@@ -1653,7 +1652,7 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv)
flush_work(&dev_priv->guc.log.flush_work);
/* Ask GuC to update the log buffer state */
- host2guc_force_logbuffer_flush(&dev_priv->guc);
+ guc_force_logbuffer_flush(&dev_priv->guc);
/* GuC would have updated log buffer by now, so capture it */
i915_guc_capture_logs(dev_priv);
@@ -1694,9 +1693,9 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
if (!log_param.logging_enabled && (i915.guc_log_level < 0))
return 0;
- ret = host2guc_logging_control(&dev_priv->guc, log_param.value);
+ ret = guc_logging_control(&dev_priv->guc, log_param.value);
if (ret < 0) {
- DRM_DEBUG_DRIVER("host2guc action failed %d\n", ret);
+ DRM_DEBUG_DRIVER("guc_logging_control action failed %d\n", ret);
return ret;
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 07ca71c..0b119b9 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1683,8 +1683,8 @@ static void gen9_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir)
u32 msg, flush;
msg = I915_READ(SOFT_SCRATCH(15));
- flush = msg & (GUC2HOST_MSG_CRASH_DUMP_POSTED |
- GUC2HOST_MSG_FLUSH_LOG_BUFFER);
+ flush = msg & (INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED |
+ INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER);
if (flush) {
/* Clear the message bits that are handled */
I915_WRITE(SOFT_SCRATCH(15), msg & ~flush);
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 324ea90..9ccb8f8 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -489,18 +489,18 @@ union guc_log_control {
} __packed;
/* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */
-enum host2guc_action {
- HOST2GUC_ACTION_DEFAULT = 0x0,
- HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
- HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
- HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
- HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30,
- HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302,
- HOST2GUC_ACTION_ENTER_S_STATE = 0x501,
- HOST2GUC_ACTION_EXIT_S_STATE = 0x502,
- HOST2GUC_ACTION_SLPC_REQUEST = 0x3003,
- HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000,
- HOST2GUC_ACTION_LIMIT
+enum intel_guc_send_action {
+ INTEL_GUC_ACTION_DEFAULT = 0x0,
+ INTEL_GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
+ INTEL_GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
+ INTEL_GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
+ INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30,
+ INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302,
+ INTEL_GUC_ACTION_ENTER_S_STATE = 0x501,
+ INTEL_GUC_ACTION_EXIT_S_STATE = 0x502,
+ INTEL_GUC_ACTION_SLPC_REQUEST = 0x3003,
+ INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000,
+ INTEL_GUC_ACTION_LIMIT
};
/*
@@ -509,22 +509,25 @@ enum host2guc_action {
* by the fact that all the MASK bits are set. The remaining bits
* give more detail.
*/
-#define GUC2HOST_RESPONSE_MASK ((u32)0xF0000000)
-#define GUC2HOST_IS_RESPONSE(x) ((u32)(x) >= GUC2HOST_RESPONSE_MASK)
-#define GUC2HOST_STATUS(x) (GUC2HOST_RESPONSE_MASK | (x))
+#define INTEL_GUC_RECV_MASK ((u32)0xF0000000)
+#define INTEL_GUC_RECV_IS_RESPONSE(x) ((u32)(x) >= INTEL_GUC_RECV_MASK)
+#define INTEL_GUC_RECV_STATUS(x) (INTEL_GUC_RECV_MASK | (x))
/* GUC will return status back to SOFT_SCRATCH_O_REG */
-enum guc2host_status {
- GUC2HOST_STATUS_SUCCESS = GUC2HOST_STATUS(0x0),
- GUC2HOST_STATUS_ALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x10),
- GUC2HOST_STATUS_DEALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x20),
- GUC2HOST_STATUS_GENERIC_FAIL = GUC2HOST_STATUS(0x0000F000)
+enum intel_guc_recv_status {
+ INTEL_GUC_RECV_STATUS_SUCCESS = INTEL_GUC_RECV_STATUS(0x0),
+ INTEL_GUC_RECV_STATUS_ALLOCATE_DOORBELL_FAIL =
+ INTEL_GUC_RECV_STATUS(0x10),
+ INTEL_GUC_RECV_STATUS_DEALLOCATE_DOORBELL_FAIL =
+ INTEL_GUC_RECV_STATUS(0x20),
+ INTEL_GUC_RECV_STATUS_GENERIC_FAIL =
+ INTEL_GUC_RECV_STATUS(0x0000F000)
};
/* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */
-enum guc2host_message {
- GUC2HOST_MSG_CRASH_DUMP_POSTED = (1 << 1),
- GUC2HOST_MSG_FLUSH_LOG_BUFFER = (1 << 3)
+enum intel_guc_recv_message {
+ INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED = BIT(1),
+ INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER = BIT(3)
};
#endif
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 0d8a493..4b4a91e 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -142,7 +142,7 @@ struct intel_guc {
struct intel_guc_fw guc_fw;
struct intel_guc_log log;
- /* GuC2Host interrupt related state */
+ /* intel_guc_recv interrupt related state */
bool interrupts_enabled;
struct i915_vma *ads_vma;
@@ -164,8 +164,8 @@ struct intel_guc {
uint64_t submissions[I915_NUM_ENGINES];
uint32_t last_seqno[I915_NUM_ENGINES];
- /* To serialize the Host2GuC actions */
- struct mutex action_lock;
+ /* To serialize the intel_guc_send actions */
+ struct mutex send_mutex;
};
/* intel_guc_loader.c */
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH v2] drm/i915/guc: Drop guc2host/host2guc from names
2016-11-25 12:29 ` [PATCH v2] " Arkadiusz Hiler
@ 2016-11-25 13:03 ` Chris Wilson
2016-11-25 14:02 ` [PATCH v3] " Arkadiusz Hiler
0 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2016-11-25 13:03 UTC (permalink / raw)
To: Arkadiusz Hiler; +Cc: intel-gfx
On Fri, Nov 25, 2016 at 01:29:21PM +0100, Arkadiusz Hiler wrote:
> diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
> index 324ea90..9ccb8f8 100644
> --- a/drivers/gpu/drm/i915/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
> @@ -489,18 +489,18 @@ union guc_log_control {
> } __packed;
>
> /* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */
> -enum host2guc_action {
> - HOST2GUC_ACTION_DEFAULT = 0x0,
> - HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
> - HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
> - HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
> - HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30,
> - HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302,
> - HOST2GUC_ACTION_ENTER_S_STATE = 0x501,
> - HOST2GUC_ACTION_EXIT_S_STATE = 0x502,
> - HOST2GUC_ACTION_SLPC_REQUEST = 0x3003,
> - HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000,
> - HOST2GUC_ACTION_LIMIT
> +enum intel_guc_send_action {
> + INTEL_GUC_ACTION_DEFAULT = 0x0,
> + INTEL_GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
> + INTEL_GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
> + INTEL_GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
> + INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30,
> + INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302,
> + INTEL_GUC_ACTION_ENTER_S_STATE = 0x501,
> + INTEL_GUC_ACTION_EXIT_S_STATE = 0x502,
> + INTEL_GUC_ACTION_SLPC_REQUEST = 0x3003,
> + INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000,
> + INTEL_GUC_ACTION_LIMIT
> };
>
> /*
> @@ -509,22 +509,25 @@ enum host2guc_action {
> * by the fact that all the MASK bits are set. The remaining bits
> * give more detail.
> */
> -#define GUC2HOST_RESPONSE_MASK ((u32)0xF0000000)
> -#define GUC2HOST_IS_RESPONSE(x) ((u32)(x) >= GUC2HOST_RESPONSE_MASK)
> -#define GUC2HOST_STATUS(x) (GUC2HOST_RESPONSE_MASK | (x))
> +#define INTEL_GUC_RECV_MASK ((u32)0xF0000000)
> +#define INTEL_GUC_RECV_IS_RESPONSE(x) ((u32)(x) >= INTEL_GUC_RECV_MASK)
> +#define INTEL_GUC_RECV_STATUS(x) (INTEL_GUC_RECV_MASK | (x))
>
> /* GUC will return status back to SOFT_SCRATCH_O_REG */
> -enum guc2host_status {
> - GUC2HOST_STATUS_SUCCESS = GUC2HOST_STATUS(0x0),
> - GUC2HOST_STATUS_ALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x10),
> - GUC2HOST_STATUS_DEALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x20),
> - GUC2HOST_STATUS_GENERIC_FAIL = GUC2HOST_STATUS(0x0000F000)
> +enum intel_guc_recv_status {
> + INTEL_GUC_RECV_STATUS_SUCCESS = INTEL_GUC_RECV_STATUS(0x0),
> + INTEL_GUC_RECV_STATUS_ALLOCATE_DOORBELL_FAIL =
> + INTEL_GUC_RECV_STATUS(0x10),
> + INTEL_GUC_RECV_STATUS_DEALLOCATE_DOORBELL_FAIL =
> + INTEL_GUC_RECV_STATUS(0x20),
> + INTEL_GUC_RECV_STATUS_GENERIC_FAIL =
> + INTEL_GUC_RECV_STATUS(0x0000F000)
> };
Looking at these, these are still ok as
enum intel_guc_action, enum intel_guc_status
> /* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */
> -enum guc2host_message {
> - GUC2HOST_MSG_CRASH_DUMP_POSTED = (1 << 1),
> - GUC2HOST_MSG_FLUSH_LOG_BUFFER = (1 << 3)
> +enum intel_guc_recv_message {
> + INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED = BIT(1),
> + INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER = BIT(3)
> };
Whereas this is ok as intel_guc_recv_message since it is quite
specialised.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v3] drm/i915/guc: Drop guc2host/host2guc from names
2016-11-25 13:03 ` Chris Wilson
@ 2016-11-25 14:02 ` Arkadiusz Hiler
0 siblings, 0 replies; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-25 14:02 UTC (permalink / raw)
To: intel-gfx
To facilitate code reorganization we are renaming everything that
contains guc2host or host2guc.
host2guc_action() and host2guc_action_response() become guc_send()
and guc_recv() respectively.
Other host2guc_*() functions become simply guc_*().
Other entities are renamed basing on context they appear in:
- HOST2GUC_ACTIONS_& become INTEL_GUC_ACTION_*
- HOST2GUC_{INTERRUPT,TRIGGER} become GUC_SEND_{INTERRUPT,TRIGGER}
- GUC2HOST_STATUS_* become INTEL_GUC_STATUS_*
- GUC2HOST_MSG* become INTEL_GUC_RECV_MSG_*
- action_lock becomes send_mutex
v2: drop unnecessary backslashes and use BIT() instead of '<<'
v3: shortened enum names and INTEL_GUC_STATUS_*
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
---
drivers/gpu/drm/i915/i915_guc_reg.h | 4 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 91 +++++++++++++++---------------
drivers/gpu/drm/i915/i915_irq.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 46 +++++++--------
drivers/gpu/drm/i915/intel_uc.h | 6 +-
5 files changed, 75 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
index a47e1e4..5e638fc 100644
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ b/drivers/gpu/drm/i915/i915_guc_reg.h
@@ -100,8 +100,8 @@
GUC_ENABLE_READ_CACHE_FOR_WOPCM_DATA | \
GUC_ENABLE_MIA_CLOCK_GATING)
-#define HOST2GUC_INTERRUPT _MMIO(0xc4c8)
-#define HOST2GUC_TRIGGER (1<<0)
+#define GUC_SEND_INTERRUPT _MMIO(0xc4c8)
+#define GUC_SEND_TRIGGER (1<<0)
#define GEN8_DRBREGL(x) _MMIO(0x1000 + (x) * 8)
#define GEN8_DRB_VALID (1<<0)
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index e14220e..69eba03 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -49,7 +49,7 @@
* Firmware writes a success/fail code back to the action register after
* processes the request. The kernel driver polls waiting for this update and
* then proceeds.
- * See host2guc_action()
+ * See guc_send()
*
* Doorbells:
* Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
@@ -69,15 +69,14 @@
* Read GuC command/status register (SOFT_SCRATCH_0)
* Return true if it contains a response rather than a command
*/
-static inline bool host2guc_action_response(struct drm_i915_private *dev_priv,
- u32 *status)
+static inline bool guc_recv(struct drm_i915_private *dev_priv, u32 *status)
{
u32 val = I915_READ(SOFT_SCRATCH(0));
*status = val;
- return GUC2HOST_IS_RESPONSE(val);
+ return INTEL_GUC_RECV_IS_RESPONSE(val);
}
-static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
+static int guc_send(struct intel_guc *guc, u32 *data, u32 len)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
u32 status;
@@ -87,7 +86,7 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
if (WARN_ON(len < 1 || len > 15))
return -EINVAL;
- mutex_lock(&guc->action_lock);
+ mutex_lock(&guc->send_mutex);
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
dev_priv->guc.action_count += 1;
@@ -98,17 +97,17 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
POSTING_READ(SOFT_SCRATCH(i - 1));
- I915_WRITE(HOST2GUC_INTERRUPT, HOST2GUC_TRIGGER);
+ I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
/*
* Fast commands should complete in less than 10us, so sample quickly
* up to that length of time, then switch to a slower sleep-wait loop.
- * No HOST2GUC command should ever take longer than 10ms.
+ * No INTEL_GUC_ACTION command should ever take longer than 10ms.
*/
- ret = wait_for_us(host2guc_action_response(dev_priv, &status), 10);
+ ret = wait_for_us(guc_recv(dev_priv, &status), 10);
if (ret)
- ret = wait_for(host2guc_action_response(dev_priv, &status), 10);
- if (status != GUC2HOST_STATUS_SUCCESS) {
+ ret = wait_for(guc_recv(dev_priv, &status), 10);
+ if (status != INTEL_GUC_STATUS_SUCCESS) {
/*
* Either the GuC explicitly returned an error (which
* we convert to -EIO here) or no response at all was
@@ -126,7 +125,7 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
dev_priv->guc.action_status = status;
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
- mutex_unlock(&guc->action_lock);
+ mutex_unlock(&guc->send_mutex);
return ret;
}
@@ -135,35 +134,35 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
* Tell the GuC to allocate or deallocate a specific doorbell
*/
-static int host2guc_allocate_doorbell(struct intel_guc *guc,
- struct i915_guc_client *client)
+static int guc_allocate_doorbell(struct intel_guc *guc,
+ struct i915_guc_client *client)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_ALLOCATE_DOORBELL;
+ data[0] = INTEL_GUC_ACTION_ALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
-static int host2guc_release_doorbell(struct intel_guc *guc,
- struct i915_guc_client *client)
+static int guc_release_doorbell(struct intel_guc *guc,
+ struct i915_guc_client *client)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_DEALLOCATE_DOORBELL;
+ data[0] = INTEL_GUC_ACTION_DEALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
-static int host2guc_sample_forcewake(struct intel_guc *guc,
- struct i915_guc_client *client)
+static int guc_sample_forcewake(struct intel_guc *guc,
+ struct i915_guc_client *client)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
u32 data[2];
- data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE;
+ data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
/* WaRsDisableCoarsePowerGating:skl,bxt */
if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
data[1] = 0;
@@ -171,36 +170,36 @@ static int host2guc_sample_forcewake(struct intel_guc *guc,
/* bit 0 and 1 are for Render and Media domain separately */
data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return guc_send(guc, data, ARRAY_SIZE(data));
}
-static int host2guc_logbuffer_flush_complete(struct intel_guc *guc)
+static int guc_logbuffer_flush_complete(struct intel_guc *guc)
{
u32 data[1];
- data[0] = HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
+ data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
- return host2guc_action(guc, data, 1);
+ return guc_send(guc, data, 1);
}
-static int host2guc_force_logbuffer_flush(struct intel_guc *guc)
+static int guc_force_logbuffer_flush(struct intel_guc *guc)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
+ data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
data[1] = 0;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
-static int host2guc_logging_control(struct intel_guc *guc, u32 control_val)
+static int guc_logging_control(struct intel_guc *guc, u32 control_val)
{
u32 data[2];
- data[0] = HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING;
+ data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
data[1] = control_val;
- return host2guc_action(guc, data, 2);
+ return guc_send(guc, data, 2);
}
/*
@@ -226,7 +225,7 @@ static int guc_update_doorbell_id(struct intel_guc *guc,
test_bit(client->doorbell_id, doorbell_bitmap)) {
/* Deactivate the old doorbell */
doorbell->db_status = GUC_DOORBELL_DISABLED;
- (void)host2guc_release_doorbell(guc, client);
+ (void)guc_release_doorbell(guc, client);
__clear_bit(client->doorbell_id, doorbell_bitmap);
}
@@ -249,7 +248,7 @@ static int guc_update_doorbell_id(struct intel_guc *guc,
__set_bit(new_id, doorbell_bitmap);
doorbell->cookie = 0;
doorbell->db_status = GUC_DOORBELL_ENABLED;
- return host2guc_allocate_doorbell(guc, client);
+ return guc_allocate_doorbell(guc, client);
}
static int guc_init_doorbell(struct intel_guc *guc,
@@ -298,7 +297,7 @@ select_doorbell_register(struct intel_guc *guc, uint32_t priority)
* Select, assign and relase doorbell cachelines
*
* These functions track which doorbell cachelines are in use.
- * The data they manipulate is protected by the host2guc lock.
+ * The data they manipulate is protected by the guc_send lock.
*/
static uint32_t select_doorbell_cacheline(struct intel_guc *guc)
@@ -1500,7 +1499,7 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv)
guc->ctx_pool_vma = vma;
ida_init(&guc->ctx_ids);
- mutex_init(&guc->action_lock);
+ mutex_init(&guc->send_mutex);
guc_log_create(guc);
guc_addon_create(guc);
@@ -1526,7 +1525,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
}
guc->execbuf_client = client;
- host2guc_sample_forcewake(guc, client);
+ guc_sample_forcewake(guc, client);
guc_init_doorbell_hw(guc);
/* Take over from manual control of ELSP (execlists) */
@@ -1590,13 +1589,13 @@ int intel_guc_suspend(struct drm_device *dev)
ctx = dev_priv->kernel_context;
- data[0] = HOST2GUC_ACTION_ENTER_S_STATE;
+ data[0] = INTEL_GUC_ACTION_ENTER_S_STATE;
/* any value greater than GUC_POWER_D0 */
data[1] = GUC_POWER_D1;
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return guc_send(guc, data, ARRAY_SIZE(data));
}
@@ -1619,12 +1618,12 @@ int intel_guc_resume(struct drm_device *dev)
ctx = dev_priv->kernel_context;
- data[0] = HOST2GUC_ACTION_EXIT_S_STATE;
+ data[0] = INTEL_GUC_ACTION_EXIT_S_STATE;
data[1] = GUC_POWER_D0;
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return guc_send(guc, data, ARRAY_SIZE(data));
}
void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
@@ -1635,7 +1634,7 @@ void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
* time, so get/put should be really quick.
*/
intel_runtime_pm_get(dev_priv);
- host2guc_logbuffer_flush_complete(&dev_priv->guc);
+ guc_logbuffer_flush_complete(&dev_priv->guc);
intel_runtime_pm_put(dev_priv);
}
@@ -1653,7 +1652,7 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv)
flush_work(&dev_priv->guc.log.flush_work);
/* Ask GuC to update the log buffer state */
- host2guc_force_logbuffer_flush(&dev_priv->guc);
+ guc_force_logbuffer_flush(&dev_priv->guc);
/* GuC would have updated log buffer by now, so capture it */
i915_guc_capture_logs(dev_priv);
@@ -1694,9 +1693,9 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
if (!log_param.logging_enabled && (i915.guc_log_level < 0))
return 0;
- ret = host2guc_logging_control(&dev_priv->guc, log_param.value);
+ ret = guc_logging_control(&dev_priv->guc, log_param.value);
if (ret < 0) {
- DRM_DEBUG_DRIVER("host2guc action failed %d\n", ret);
+ DRM_DEBUG_DRIVER("guc_logging_control action failed %d\n", ret);
return ret;
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 07ca71c..0b119b9 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1683,8 +1683,8 @@ static void gen9_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir)
u32 msg, flush;
msg = I915_READ(SOFT_SCRATCH(15));
- flush = msg & (GUC2HOST_MSG_CRASH_DUMP_POSTED |
- GUC2HOST_MSG_FLUSH_LOG_BUFFER);
+ flush = msg & (INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED |
+ INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER);
if (flush) {
/* Clear the message bits that are handled */
I915_WRITE(SOFT_SCRATCH(15), msg & ~flush);
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 324ea90..00ca0df 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -489,18 +489,18 @@ union guc_log_control {
} __packed;
/* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */
-enum host2guc_action {
- HOST2GUC_ACTION_DEFAULT = 0x0,
- HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
- HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
- HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
- HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30,
- HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302,
- HOST2GUC_ACTION_ENTER_S_STATE = 0x501,
- HOST2GUC_ACTION_EXIT_S_STATE = 0x502,
- HOST2GUC_ACTION_SLPC_REQUEST = 0x3003,
- HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000,
- HOST2GUC_ACTION_LIMIT
+enum intel_guc_action {
+ INTEL_GUC_ACTION_DEFAULT = 0x0,
+ INTEL_GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
+ INTEL_GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
+ INTEL_GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
+ INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30,
+ INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302,
+ INTEL_GUC_ACTION_ENTER_S_STATE = 0x501,
+ INTEL_GUC_ACTION_EXIT_S_STATE = 0x502,
+ INTEL_GUC_ACTION_SLPC_REQUEST = 0x3003,
+ INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000,
+ INTEL_GUC_ACTION_LIMIT
};
/*
@@ -509,22 +509,22 @@ enum host2guc_action {
* by the fact that all the MASK bits are set. The remaining bits
* give more detail.
*/
-#define GUC2HOST_RESPONSE_MASK ((u32)0xF0000000)
-#define GUC2HOST_IS_RESPONSE(x) ((u32)(x) >= GUC2HOST_RESPONSE_MASK)
-#define GUC2HOST_STATUS(x) (GUC2HOST_RESPONSE_MASK | (x))
+#define INTEL_GUC_RECV_MASK ((u32)0xF0000000)
+#define INTEL_GUC_RECV_IS_RESPONSE(x) ((u32)(x) >= INTEL_GUC_RECV_MASK)
+#define INTEL_GUC_RECV_STATUS(x) (INTEL_GUC_RECV_MASK | (x))
/* GUC will return status back to SOFT_SCRATCH_O_REG */
-enum guc2host_status {
- GUC2HOST_STATUS_SUCCESS = GUC2HOST_STATUS(0x0),
- GUC2HOST_STATUS_ALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x10),
- GUC2HOST_STATUS_DEALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x20),
- GUC2HOST_STATUS_GENERIC_FAIL = GUC2HOST_STATUS(0x0000F000)
+enum intel_guc_status {
+ INTEL_GUC_STATUS_SUCCESS = INTEL_GUC_RECV_STATUS(0x0),
+ INTEL_GUC_STATUS_ALLOCATE_DOORBELL_FAIL = INTEL_GUC_RECV_STATUS(0x10),
+ INTEL_GUC_STATUS_DEALLOCATE_DOORBELL_FAIL = INTEL_GUC_RECV_STATUS(0x20),
+ INTEL_GUC_STATUS_GENERIC_FAIL = INTEL_GUC_RECV_STATUS(0x0000F000)
};
/* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */
-enum guc2host_message {
- GUC2HOST_MSG_CRASH_DUMP_POSTED = (1 << 1),
- GUC2HOST_MSG_FLUSH_LOG_BUFFER = (1 << 3)
+enum intel_guc_recv_message {
+ INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED = BIT(1),
+ INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER = BIT(3)
};
#endif
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 0d8a493..4b4a91e 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -142,7 +142,7 @@ struct intel_guc {
struct intel_guc_fw guc_fw;
struct intel_guc_log log;
- /* GuC2Host interrupt related state */
+ /* intel_guc_recv interrupt related state */
bool interrupts_enabled;
struct i915_vma *ads_vma;
@@ -164,8 +164,8 @@ struct intel_guc {
uint64_t submissions[I915_NUM_ENGINES];
uint32_t last_seqno[I915_NUM_ENGINES];
- /* To serialize the Host2GuC actions */
- struct mutex action_lock;
+ /* To serialize the intel_guc_send actions */
+ struct mutex send_mutex;
};
/* intel_guc_loader.c */
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c
2016-11-25 12:18 ` Chris Wilson
@ 2016-11-25 14:22 ` Arkadiusz Hiler
2016-11-25 14:26 ` Chris Wilson
0 siblings, 1 reply; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-25 14:22 UTC (permalink / raw)
To: intel-gfx
guc_send(), guc_recv() and related functions were introduced in the
i915_guc_submission.c and their scope was limited only to that file.
Those are not submission specific though.
This patch moves moves them to intel_uc.c with intel_ prefix added.
v2: rename intel_guc_log_* functions and clean up intel_guc_send uses
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 147 ++++-------------------------
drivers/gpu/drm/i915/intel_uc.c | 138 +++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.h | 9 ++
4 files changed, 167 insertions(+), 130 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_uc.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 580602d..3c30916 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -55,7 +55,8 @@ i915-y += i915_cmd_parser.o \
intel_uncore.o
# general-purpose microcontroller (GuC) support
-i915-y += intel_guc_loader.o \
+i915-y += intel_uc.o \
+ intel_guc_loader.o \
i915_guc_submission.o
# autogenerated null render state
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 69eba03..5633a87 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -49,7 +49,7 @@
* Firmware writes a success/fail code back to the action register after
* processes the request. The kernel driver polls waiting for this update and
* then proceeds.
- * See guc_send()
+ * See intel_guc_send()
*
* Doorbells:
* Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
@@ -66,140 +66,29 @@
*/
/*
- * Read GuC command/status register (SOFT_SCRATCH_0)
- * Return true if it contains a response rather than a command
- */
-static inline bool guc_recv(struct drm_i915_private *dev_priv, u32 *status)
-{
- u32 val = I915_READ(SOFT_SCRATCH(0));
- *status = val;
- return INTEL_GUC_RECV_IS_RESPONSE(val);
-}
-
-static int guc_send(struct intel_guc *guc, u32 *data, u32 len)
-{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 status;
- int i;
- int ret;
-
- if (WARN_ON(len < 1 || len > 15))
- return -EINVAL;
-
- mutex_lock(&guc->send_mutex);
- intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
-
- dev_priv->guc.action_count += 1;
- dev_priv->guc.action_cmd = data[0];
-
- for (i = 0; i < len; i++)
- I915_WRITE(SOFT_SCRATCH(i), data[i]);
-
- POSTING_READ(SOFT_SCRATCH(i - 1));
-
- I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
-
- /*
- * Fast commands should complete in less than 10us, so sample quickly
- * up to that length of time, then switch to a slower sleep-wait loop.
- * No INTEL_GUC_ACTION command should ever take longer than 10ms.
- */
- ret = wait_for_us(guc_recv(dev_priv, &status), 10);
- if (ret)
- ret = wait_for(guc_recv(dev_priv, &status), 10);
- if (status != INTEL_GUC_STATUS_SUCCESS) {
- /*
- * Either the GuC explicitly returned an error (which
- * we convert to -EIO here) or no response at all was
- * received within the timeout limit (-ETIMEDOUT)
- */
- if (ret != -ETIMEDOUT)
- ret = -EIO;
-
- DRM_WARN("Action 0x%X failed; ret=%d status=0x%08X response=0x%08X\n",
- data[0], ret, status, I915_READ(SOFT_SCRATCH(15)));
-
- dev_priv->guc.action_fail += 1;
- dev_priv->guc.action_err = ret;
- }
- dev_priv->guc.action_status = status;
-
- intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
- mutex_unlock(&guc->send_mutex);
-
- return ret;
-}
-
-/*
* Tell the GuC to allocate or deallocate a specific doorbell
*/
static int guc_allocate_doorbell(struct intel_guc *guc,
struct i915_guc_client *client)
{
- u32 data[2];
+ u32 action[] = {
+ INTEL_GUC_ACTION_ALLOCATE_DOORBELL,
+ client->ctx_index
+ };
- data[0] = INTEL_GUC_ACTION_ALLOCATE_DOORBELL;
- data[1] = client->ctx_index;
-
- return guc_send(guc, data, 2);
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
}
static int guc_release_doorbell(struct intel_guc *guc,
struct i915_guc_client *client)
{
- u32 data[2];
+ u32 action[] = {
+ INTEL_GUC_ACTION_DEALLOCATE_DOORBELL,
+ client->ctx_index
+ };
- data[0] = INTEL_GUC_ACTION_DEALLOCATE_DOORBELL;
- data[1] = client->ctx_index;
-
- return guc_send(guc, data, 2);
-}
-
-static int guc_sample_forcewake(struct intel_guc *guc,
- struct i915_guc_client *client)
-{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 data[2];
-
- data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
- /* WaRsDisableCoarsePowerGating:skl,bxt */
- if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
- data[1] = 0;
- else
- /* bit 0 and 1 are for Render and Media domain separately */
- data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
-
- return guc_send(guc, data, ARRAY_SIZE(data));
-}
-
-static int guc_logbuffer_flush_complete(struct intel_guc *guc)
-{
- u32 data[1];
-
- data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
-
- return guc_send(guc, data, 1);
-}
-
-static int guc_force_logbuffer_flush(struct intel_guc *guc)
-{
- u32 data[2];
-
- data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
- data[1] = 0;
-
- return guc_send(guc, data, 2);
-}
-
-static int guc_logging_control(struct intel_guc *guc, u32 control_val)
-{
- u32 data[2];
-
- data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
- data[1] = control_val;
-
- return guc_send(guc, data, 2);
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
}
/*
@@ -297,7 +186,7 @@ select_doorbell_register(struct intel_guc *guc, uint32_t priority)
* Select, assign and relase doorbell cachelines
*
* These functions track which doorbell cachelines are in use.
- * The data they manipulate is protected by the guc_send lock.
+ * The data they manipulate is protected by the intel_guc_send lock.
*/
static uint32_t select_doorbell_cacheline(struct intel_guc *guc)
@@ -1525,7 +1414,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
}
guc->execbuf_client = client;
- guc_sample_forcewake(guc, client);
+ intel_guc_sample_forcewake(guc, client);
guc_init_doorbell_hw(guc);
/* Take over from manual control of ELSP (execlists) */
@@ -1595,7 +1484,7 @@ int intel_guc_suspend(struct drm_device *dev)
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return guc_send(guc, data, ARRAY_SIZE(data));
+ return intel_guc_send(guc, data, ARRAY_SIZE(data));
}
@@ -1623,7 +1512,7 @@ int intel_guc_resume(struct drm_device *dev)
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return guc_send(guc, data, ARRAY_SIZE(data));
+ return intel_guc_send(guc, data, ARRAY_SIZE(data));
}
void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
@@ -1634,7 +1523,7 @@ void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
* time, so get/put should be really quick.
*/
intel_runtime_pm_get(dev_priv);
- guc_logbuffer_flush_complete(&dev_priv->guc);
+ intel_guc_log_flush_complete(&dev_priv->guc);
intel_runtime_pm_put(dev_priv);
}
@@ -1652,7 +1541,7 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv)
flush_work(&dev_priv->guc.log.flush_work);
/* Ask GuC to update the log buffer state */
- guc_force_logbuffer_flush(&dev_priv->guc);
+ intel_guc_log_flush(&dev_priv->guc);
/* GuC would have updated log buffer by now, so capture it */
i915_guc_capture_logs(dev_priv);
@@ -1693,7 +1582,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
if (!log_param.logging_enabled && (i915.guc_log_level < 0))
return 0;
- ret = guc_logging_control(&dev_priv->guc, log_param.value);
+ ret = intel_guc_log_control(&dev_priv->guc, log_param.value);
if (ret < 0) {
DRM_DEBUG_DRIVER("guc_logging_control action failed %d\n", ret);
return ret;
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
new file mode 100644
index 0000000..9440802
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -0,0 +1,138 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+
+#include "i915_drv.h"
+#include "intel_uc.h"
+
+/*
+ * Read GuC command/status register (SOFT_SCRATCH_0)
+ * Return true if it contains a response rather than a command
+ */
+bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status)
+{
+ u32 val = I915_READ(SOFT_SCRATCH(0));
+ *status = val;
+ return INTEL_GUC_RECV_IS_RESPONSE(val);
+}
+
+int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ u32 status;
+ int i;
+ int ret;
+
+ if (WARN_ON(len < 1 || len > 15))
+ return -EINVAL;
+
+ mutex_lock(&guc->send_mutex);
+ intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+
+ dev_priv->guc.action_count += 1;
+ dev_priv->guc.action_cmd = action[0];
+
+ for (i = 0; i < len; i++)
+ I915_WRITE(SOFT_SCRATCH(i), action[i]);
+
+ POSTING_READ(SOFT_SCRATCH(i - 1));
+
+ I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
+
+ /*
+ * Fast commands should complete in less than 10us, so sample quickly
+ * up to that length of time, then switch to a slower sleep-wait loop.
+ * No inte_guc_send command should ever take longer than 10ms.
+ */
+ ret = wait_for_us(intel_guc_recv(dev_priv, &status), 10);
+ if (ret)
+ ret = wait_for(intel_guc_recv(dev_priv, &status), 10);
+ if (status != INTEL_GUC_STATUS_SUCCESS) {
+ /*
+ * Either the GuC explicitly returned an error (which
+ * we convert to -EIO here) or no response at all was
+ * received within the timeout limit (-ETIMEDOUT)
+ */
+ if (ret != -ETIMEDOUT)
+ ret = -EIO;
+
+ DRM_WARN("INTEL_GUC_SEND: Action 0x%X failed;"
+ " ret=%d status=0x%08X response=0x%08X\n",
+ action[0], ret, status, I915_READ(SOFT_SCRATCH(15)));
+
+ dev_priv->guc.action_fail += 1;
+ dev_priv->guc.action_err = ret;
+ }
+ dev_priv->guc.action_status = status;
+
+ intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+ mutex_unlock(&guc->send_mutex);
+
+ return ret;
+}
+
+int intel_guc_sample_forcewake(struct intel_guc *guc,
+ struct i915_guc_client *client)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ u32 action[2];
+
+ action[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
+ /* WaRsDisableCoarsePowerGating:skl,bxt */
+ if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
+ action[1] = 0;
+ else
+ /* bit 0 and 1 are for Render and Media domain separately */
+ action[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
+
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
+}
+
+int intel_guc_log_flush_complete(struct intel_guc *guc)
+{
+ u32 action[] = { INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE };
+
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
+}
+
+int intel_guc_log_flush(struct intel_guc *guc)
+{
+ u32 action[] = {
+ INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH,
+ 0
+ };
+
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
+}
+
+int intel_guc_log_control(struct intel_guc *guc, u32 control_val)
+{
+
+ u32 action[] = {
+ INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING,
+ control_val
+ };
+
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
+}
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 4b4a91e..bc548d3 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -168,6 +168,15 @@ struct intel_guc {
struct mutex send_mutex;
};
+/* intel_uc.c */
+bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status);
+int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len);
+int intel_guc_sample_forcewake(struct intel_guc *guc,
+ struct i915_guc_client *client);
+int intel_guc_log_flush_complete(struct intel_guc *guc);
+int intel_guc_log_flush(struct intel_guc *guc);
+int intel_guc_log_control(struct intel_guc *guc, u32 control_val);
+
/* intel_guc_loader.c */
extern void intel_guc_init(struct drm_device *dev);
extern int intel_guc_setup(struct drm_device *dev);
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH v2] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c
2016-11-25 14:22 ` [PATCH v2] " Arkadiusz Hiler
@ 2016-11-25 14:26 ` Chris Wilson
0 siblings, 0 replies; 17+ messages in thread
From: Chris Wilson @ 2016-11-25 14:26 UTC (permalink / raw)
To: Arkadiusz Hiler; +Cc: intel-gfx
On Fri, Nov 25, 2016 at 03:22:13PM +0100, Arkadiusz Hiler wrote:
> guc_send(), guc_recv() and related functions were introduced in the
> i915_guc_submission.c and their scope was limited only to that file.
>
> Those are not submission specific though.
> This patch moves moves them to intel_uc.c with intel_ prefix added.
>
> v2: rename intel_guc_log_* functions and clean up intel_guc_send uses
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 3/5] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c
2016-11-25 17:59 [PATCH v3 0/5] GuC code reorganization Arkadiusz Hiler
@ 2016-11-25 17:59 ` Arkadiusz Hiler
0 siblings, 0 replies; 17+ messages in thread
From: Arkadiusz Hiler @ 2016-11-25 17:59 UTC (permalink / raw)
To: intel-gfx
guc_send(), guc_recv() and related functions were introduced in the
i915_guc_submission.c and their scope was limited only to that file.
Those are not submission specific though.
This patch moves moves them to intel_uc.c with intel_ prefix added.
v2: rename intel_guc_log_* functions and clean up intel_guc_send usages
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 147 ++++-------------------------
drivers/gpu/drm/i915/intel_uc.c | 138 +++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.h | 9 ++
4 files changed, 167 insertions(+), 130 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_uc.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 580602d..3c30916 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -55,7 +55,8 @@ i915-y += i915_cmd_parser.o \
intel_uncore.o
# general-purpose microcontroller (GuC) support
-i915-y += intel_guc_loader.o \
+i915-y += intel_uc.o \
+ intel_guc_loader.o \
i915_guc_submission.o
# autogenerated null render state
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 69eba03..5633a87 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -49,7 +49,7 @@
* Firmware writes a success/fail code back to the action register after
* processes the request. The kernel driver polls waiting for this update and
* then proceeds.
- * See guc_send()
+ * See intel_guc_send()
*
* Doorbells:
* Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
@@ -66,140 +66,29 @@
*/
/*
- * Read GuC command/status register (SOFT_SCRATCH_0)
- * Return true if it contains a response rather than a command
- */
-static inline bool guc_recv(struct drm_i915_private *dev_priv, u32 *status)
-{
- u32 val = I915_READ(SOFT_SCRATCH(0));
- *status = val;
- return INTEL_GUC_RECV_IS_RESPONSE(val);
-}
-
-static int guc_send(struct intel_guc *guc, u32 *data, u32 len)
-{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 status;
- int i;
- int ret;
-
- if (WARN_ON(len < 1 || len > 15))
- return -EINVAL;
-
- mutex_lock(&guc->send_mutex);
- intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
-
- dev_priv->guc.action_count += 1;
- dev_priv->guc.action_cmd = data[0];
-
- for (i = 0; i < len; i++)
- I915_WRITE(SOFT_SCRATCH(i), data[i]);
-
- POSTING_READ(SOFT_SCRATCH(i - 1));
-
- I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
-
- /*
- * Fast commands should complete in less than 10us, so sample quickly
- * up to that length of time, then switch to a slower sleep-wait loop.
- * No INTEL_GUC_ACTION command should ever take longer than 10ms.
- */
- ret = wait_for_us(guc_recv(dev_priv, &status), 10);
- if (ret)
- ret = wait_for(guc_recv(dev_priv, &status), 10);
- if (status != INTEL_GUC_STATUS_SUCCESS) {
- /*
- * Either the GuC explicitly returned an error (which
- * we convert to -EIO here) or no response at all was
- * received within the timeout limit (-ETIMEDOUT)
- */
- if (ret != -ETIMEDOUT)
- ret = -EIO;
-
- DRM_WARN("Action 0x%X failed; ret=%d status=0x%08X response=0x%08X\n",
- data[0], ret, status, I915_READ(SOFT_SCRATCH(15)));
-
- dev_priv->guc.action_fail += 1;
- dev_priv->guc.action_err = ret;
- }
- dev_priv->guc.action_status = status;
-
- intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
- mutex_unlock(&guc->send_mutex);
-
- return ret;
-}
-
-/*
* Tell the GuC to allocate or deallocate a specific doorbell
*/
static int guc_allocate_doorbell(struct intel_guc *guc,
struct i915_guc_client *client)
{
- u32 data[2];
+ u32 action[] = {
+ INTEL_GUC_ACTION_ALLOCATE_DOORBELL,
+ client->ctx_index
+ };
- data[0] = INTEL_GUC_ACTION_ALLOCATE_DOORBELL;
- data[1] = client->ctx_index;
-
- return guc_send(guc, data, 2);
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
}
static int guc_release_doorbell(struct intel_guc *guc,
struct i915_guc_client *client)
{
- u32 data[2];
+ u32 action[] = {
+ INTEL_GUC_ACTION_DEALLOCATE_DOORBELL,
+ client->ctx_index
+ };
- data[0] = INTEL_GUC_ACTION_DEALLOCATE_DOORBELL;
- data[1] = client->ctx_index;
-
- return guc_send(guc, data, 2);
-}
-
-static int guc_sample_forcewake(struct intel_guc *guc,
- struct i915_guc_client *client)
-{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 data[2];
-
- data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
- /* WaRsDisableCoarsePowerGating:skl,bxt */
- if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
- data[1] = 0;
- else
- /* bit 0 and 1 are for Render and Media domain separately */
- data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
-
- return guc_send(guc, data, ARRAY_SIZE(data));
-}
-
-static int guc_logbuffer_flush_complete(struct intel_guc *guc)
-{
- u32 data[1];
-
- data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
-
- return guc_send(guc, data, 1);
-}
-
-static int guc_force_logbuffer_flush(struct intel_guc *guc)
-{
- u32 data[2];
-
- data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
- data[1] = 0;
-
- return guc_send(guc, data, 2);
-}
-
-static int guc_logging_control(struct intel_guc *guc, u32 control_val)
-{
- u32 data[2];
-
- data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING;
- data[1] = control_val;
-
- return guc_send(guc, data, 2);
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
}
/*
@@ -297,7 +186,7 @@ select_doorbell_register(struct intel_guc *guc, uint32_t priority)
* Select, assign and relase doorbell cachelines
*
* These functions track which doorbell cachelines are in use.
- * The data they manipulate is protected by the guc_send lock.
+ * The data they manipulate is protected by the intel_guc_send lock.
*/
static uint32_t select_doorbell_cacheline(struct intel_guc *guc)
@@ -1525,7 +1414,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv)
}
guc->execbuf_client = client;
- guc_sample_forcewake(guc, client);
+ intel_guc_sample_forcewake(guc, client);
guc_init_doorbell_hw(guc);
/* Take over from manual control of ELSP (execlists) */
@@ -1595,7 +1484,7 @@ int intel_guc_suspend(struct drm_device *dev)
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return guc_send(guc, data, ARRAY_SIZE(data));
+ return intel_guc_send(guc, data, ARRAY_SIZE(data));
}
@@ -1623,7 +1512,7 @@ int intel_guc_resume(struct drm_device *dev)
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return guc_send(guc, data, ARRAY_SIZE(data));
+ return intel_guc_send(guc, data, ARRAY_SIZE(data));
}
void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
@@ -1634,7 +1523,7 @@ void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
* time, so get/put should be really quick.
*/
intel_runtime_pm_get(dev_priv);
- guc_logbuffer_flush_complete(&dev_priv->guc);
+ intel_guc_log_flush_complete(&dev_priv->guc);
intel_runtime_pm_put(dev_priv);
}
@@ -1652,7 +1541,7 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv)
flush_work(&dev_priv->guc.log.flush_work);
/* Ask GuC to update the log buffer state */
- guc_force_logbuffer_flush(&dev_priv->guc);
+ intel_guc_log_flush(&dev_priv->guc);
/* GuC would have updated log buffer by now, so capture it */
i915_guc_capture_logs(dev_priv);
@@ -1693,7 +1582,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
if (!log_param.logging_enabled && (i915.guc_log_level < 0))
return 0;
- ret = guc_logging_control(&dev_priv->guc, log_param.value);
+ ret = intel_guc_log_control(&dev_priv->guc, log_param.value);
if (ret < 0) {
DRM_DEBUG_DRIVER("guc_logging_control action failed %d\n", ret);
return ret;
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
new file mode 100644
index 0000000..9440802
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -0,0 +1,138 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+
+#include "i915_drv.h"
+#include "intel_uc.h"
+
+/*
+ * Read GuC command/status register (SOFT_SCRATCH_0)
+ * Return true if it contains a response rather than a command
+ */
+bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status)
+{
+ u32 val = I915_READ(SOFT_SCRATCH(0));
+ *status = val;
+ return INTEL_GUC_RECV_IS_RESPONSE(val);
+}
+
+int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ u32 status;
+ int i;
+ int ret;
+
+ if (WARN_ON(len < 1 || len > 15))
+ return -EINVAL;
+
+ mutex_lock(&guc->send_mutex);
+ intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+
+ dev_priv->guc.action_count += 1;
+ dev_priv->guc.action_cmd = action[0];
+
+ for (i = 0; i < len; i++)
+ I915_WRITE(SOFT_SCRATCH(i), action[i]);
+
+ POSTING_READ(SOFT_SCRATCH(i - 1));
+
+ I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
+
+ /*
+ * Fast commands should complete in less than 10us, so sample quickly
+ * up to that length of time, then switch to a slower sleep-wait loop.
+ * No inte_guc_send command should ever take longer than 10ms.
+ */
+ ret = wait_for_us(intel_guc_recv(dev_priv, &status), 10);
+ if (ret)
+ ret = wait_for(intel_guc_recv(dev_priv, &status), 10);
+ if (status != INTEL_GUC_STATUS_SUCCESS) {
+ /*
+ * Either the GuC explicitly returned an error (which
+ * we convert to -EIO here) or no response at all was
+ * received within the timeout limit (-ETIMEDOUT)
+ */
+ if (ret != -ETIMEDOUT)
+ ret = -EIO;
+
+ DRM_WARN("INTEL_GUC_SEND: Action 0x%X failed;"
+ " ret=%d status=0x%08X response=0x%08X\n",
+ action[0], ret, status, I915_READ(SOFT_SCRATCH(15)));
+
+ dev_priv->guc.action_fail += 1;
+ dev_priv->guc.action_err = ret;
+ }
+ dev_priv->guc.action_status = status;
+
+ intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+ mutex_unlock(&guc->send_mutex);
+
+ return ret;
+}
+
+int intel_guc_sample_forcewake(struct intel_guc *guc,
+ struct i915_guc_client *client)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ u32 action[2];
+
+ action[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
+ /* WaRsDisableCoarsePowerGating:skl,bxt */
+ if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
+ action[1] = 0;
+ else
+ /* bit 0 and 1 are for Render and Media domain separately */
+ action[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
+
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
+}
+
+int intel_guc_log_flush_complete(struct intel_guc *guc)
+{
+ u32 action[] = { INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE };
+
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
+}
+
+int intel_guc_log_flush(struct intel_guc *guc)
+{
+ u32 action[] = {
+ INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH,
+ 0
+ };
+
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
+}
+
+int intel_guc_log_control(struct intel_guc *guc, u32 control_val)
+{
+
+ u32 action[] = {
+ INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING,
+ control_val
+ };
+
+ return intel_guc_send(guc, action, ARRAY_SIZE(action));
+}
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 4b4a91e..bc548d3 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -168,6 +168,15 @@ struct intel_guc {
struct mutex send_mutex;
};
+/* intel_uc.c */
+bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status);
+int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len);
+int intel_guc_sample_forcewake(struct intel_guc *guc,
+ struct i915_guc_client *client);
+int intel_guc_log_flush_complete(struct intel_guc *guc);
+int intel_guc_log_flush(struct intel_guc *guc);
+int intel_guc_log_control(struct intel_guc *guc, u32 control_val);
+
/* intel_guc_loader.c */
extern void intel_guc_init(struct drm_device *dev);
extern int intel_guc_setup(struct drm_device *dev);
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply related [flat|nested] 17+ messages in thread
end of thread, other threads:[~2016-11-25 17:59 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-11-24 16:13 [PATCH v2 0/5] GuC code reorganization Arkadiusz Hiler
2016-11-24 16:13 ` [PATCH 1/5] drm/i915: Rename intel_guc.h to intel_uc.h Arkadiusz Hiler
2016-11-24 16:13 ` [PATCH 2/5] drm/i915/guc: Drop guc2host/host2guc from names Arkadiusz Hiler
2016-11-24 17:06 ` Chris Wilson
2016-11-25 12:29 ` [PATCH v2] " Arkadiusz Hiler
2016-11-25 13:03 ` Chris Wilson
2016-11-25 14:02 ` [PATCH v3] " Arkadiusz Hiler
2016-11-24 16:13 ` [PATCH 3/5] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c Arkadiusz Hiler
2016-11-25 11:23 ` Chris Wilson
2016-11-25 12:18 ` Chris Wilson
2016-11-25 14:22 ` [PATCH v2] " Arkadiusz Hiler
2016-11-25 14:26 ` Chris Wilson
2016-11-24 16:13 ` [PATCH 4/5] drm/i915/guc: Init send_mutex in intel_uc_init() Arkadiusz Hiler
2016-11-24 17:12 ` Chris Wilson
2016-11-25 11:05 ` [PATCH v2] drm/i915/guc: Init send_mutex in intel_uc_init_early() Arkadiusz Hiler
2016-11-24 16:13 ` [PATCH 5/5] drm/i915/guc: Remove spurious include Arkadiusz Hiler
2016-11-25 17:59 [PATCH v3 0/5] GuC code reorganization Arkadiusz Hiler
2016-11-25 17:59 ` [PATCH 3/5] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c Arkadiusz Hiler
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