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* [PATCH 1/2] spi: spi-ath79: support multiple internal chip select lines
@ 2016-12-09 19:48 Felix Fietkau
       [not found] ` <20161209194853.71018-1-nbd-Vt+b4OUoWG0@public.gmane.org>
  0 siblings, 1 reply; 5+ messages in thread
From: Felix Fietkau @ 2016-12-09 19:48 UTC (permalink / raw)
  To: linux-spi-u79uwXL29TY76Z2rM5mHXA; +Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A

Several devices with multiple flash chips use the internal chip select
lines. Don't assume that chip select 1 and above are GPIO lines.

Signed-off-by: Felix Fietkau <nbd-Vt+b4OUoWG0@public.gmane.org>
---
 drivers/spi/spi-ath79.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c
index 6165bf2..d51c99a 100644
--- a/drivers/spi/spi-ath79.c
+++ b/drivers/spi/spi-ath79.c
@@ -78,14 +78,16 @@ static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
 		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
 	}
 
-	if (spi->chip_select) {
+	if (gpio_is_valid(spi->cs_gpio)) {
 		/* SPI is normally active-low */
 		gpio_set_value(spi->cs_gpio, cs_high);
 	} else {
+		u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select);
+
 		if (cs_high)
-			sp->ioc_base |= AR71XX_SPI_IOC_CS0;
+			sp->ioc_base |= cs_bit;
 		else
-			sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
+			sp->ioc_base &= ~cs_bit;
 
 		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
 	}
@@ -118,11 +120,8 @@ static int ath79_spi_setup_cs(struct spi_device *spi)
 	struct ath79_spi *sp = ath79_spidev_to_sp(spi);
 	int status;
 
-	if (spi->chip_select && !gpio_is_valid(spi->cs_gpio))
-		return -EINVAL;
-
 	status = 0;
-	if (spi->chip_select) {
+	if (gpio_is_valid(spi->cs_gpio)) {
 		unsigned long flags;
 
 		flags = GPIOF_DIR_OUT;
@@ -134,10 +133,12 @@ static int ath79_spi_setup_cs(struct spi_device *spi)
 		status = gpio_request_one(spi->cs_gpio, flags,
 					  dev_name(&spi->dev));
 	} else {
+		u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select);
+
 		if (spi->mode & SPI_CS_HIGH)
-			sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
+			sp->ioc_base &= ~cs_bit;
 		else
-			sp->ioc_base |= AR71XX_SPI_IOC_CS0;
+			sp->ioc_base |= cs_bit;
 
 		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
 	}
@@ -147,7 +148,7 @@ static int ath79_spi_setup_cs(struct spi_device *spi)
 
 static void ath79_spi_cleanup_cs(struct spi_device *spi)
 {
-	if (spi->chip_select) {
+	if (gpio_is_valid(spi->cs_gpio)) {
 		gpio_free(spi->cs_gpio);
 	}
 }
-- 
2.10.1

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* [PATCH 2/2] spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip select
       [not found] ` <20161209194853.71018-1-nbd-Vt+b4OUoWG0@public.gmane.org>
@ 2016-12-09 19:48   ` Felix Fietkau
       [not found]     ` <20161209194853.71018-2-nbd-Vt+b4OUoWG0@public.gmane.org>
  2016-12-14 18:03   ` Applied "spi: spi-ath79: support multiple internal chip select lines" " Mark Brown
  1 sibling, 1 reply; 5+ messages in thread
From: Felix Fietkau @ 2016-12-09 19:48 UTC (permalink / raw)
  To: linux-spi-u79uwXL29TY76Z2rM5mHXA; +Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A

Signed-off-by: Felix Fietkau <nbd-Vt+b4OUoWG0@public.gmane.org>
---
 drivers/spi/spi-ath79.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c
index d51c99a..2517e1e 100644
--- a/drivers/spi/spi-ath79.c
+++ b/drivers/spi/spi-ath79.c
@@ -80,7 +80,7 @@ static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
 
 	if (gpio_is_valid(spi->cs_gpio)) {
 		/* SPI is normally active-low */
-		gpio_set_value(spi->cs_gpio, cs_high);
+		gpio_set_value_cansleep(spi->cs_gpio, cs_high);
 	} else {
 		u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select);
 
-- 
2.10.1

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^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip select
       [not found]     ` <20161209194853.71018-2-nbd-Vt+b4OUoWG0@public.gmane.org>
@ 2016-12-11  9:29       ` Geert Uytterhoeven
  2016-12-14 18:03       ` Applied "spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip select" to the spi tree Mark Brown
  1 sibling, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2016-12-11  9:29 UTC (permalink / raw)
  To: Felix Fietkau; +Cc: linux-spi, Mark Brown

Hi Felix,

On Fri, Dec 9, 2016 at 8:48 PM, Felix Fietkau <nbd-Vt+b4OUoWG0@public.gmane.org> wrote:
> Signed-off-by: Felix Fietkau <nbd-Vt+b4OUoWG0@public.gmane.org>

Please explain why this is needed, instead of just translating C to English.
A good patch description explains what, why, and how.

Thanks!

> ---
>  drivers/spi/spi-ath79.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c
> index d51c99a..2517e1e 100644
> --- a/drivers/spi/spi-ath79.c
> +++ b/drivers/spi/spi-ath79.c
> @@ -80,7 +80,7 @@ static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
>
>         if (gpio_is_valid(spi->cs_gpio)) {
>                 /* SPI is normally active-low */
> -               gpio_set_value(spi->cs_gpio, cs_high);
> +               gpio_set_value_cansleep(spi->cs_gpio, cs_high);

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
--
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Applied "spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip select" to the spi tree
       [not found]     ` <20161209194853.71018-2-nbd-Vt+b4OUoWG0@public.gmane.org>
  2016-12-11  9:29       ` Geert Uytterhoeven
@ 2016-12-14 18:03       ` Mark Brown
  1 sibling, 0 replies; 5+ messages in thread
From: Mark Brown @ 2016-12-14 18:03 UTC (permalink / raw)
  To: Felix Fietkau
  Cc: Mark Brown, linux-spi-u79uwXL29TY76Z2rM5mHXA,
	broonie-DgEjT+Ai2ygdnm+yROfE0A

The patch

   spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip select

has been applied to the spi tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 91829a9a25cc931b76b01aa091a52e0edd649a72 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd-Vt+b4OUoWG0@public.gmane.org>
Date: Fri, 9 Dec 2016 20:48:53 +0100
Subject: [PATCH] spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip
 select

Signed-off-by: Felix Fietkau <nbd-Vt+b4OUoWG0@public.gmane.org>
Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
 drivers/spi/spi-ath79.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c
index 3e9b928b563b..b89cee11f418 100644
--- a/drivers/spi/spi-ath79.c
+++ b/drivers/spi/spi-ath79.c
@@ -80,7 +80,7 @@ static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
 
 	if (gpio_is_valid(spi->cs_gpio)) {
 		/* SPI is normally active-low */
-		gpio_set_value(spi->cs_gpio, cs_high);
+		gpio_set_value_cansleep(spi->cs_gpio, cs_high);
 	} else {
 		u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select);
 
-- 
2.11.0

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^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Applied "spi: spi-ath79: support multiple internal chip select lines" to the spi tree
       [not found] ` <20161209194853.71018-1-nbd-Vt+b4OUoWG0@public.gmane.org>
  2016-12-09 19:48   ` [PATCH 2/2] spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip select Felix Fietkau
@ 2016-12-14 18:03   ` Mark Brown
  1 sibling, 0 replies; 5+ messages in thread
From: Mark Brown @ 2016-12-14 18:03 UTC (permalink / raw)
  To: Felix Fietkau
  Cc: Mark Brown, linux-spi-u79uwXL29TY76Z2rM5mHXA,
	broonie-DgEjT+Ai2ygdnm+yROfE0A

The patch

   spi: spi-ath79: support multiple internal chip select lines

has been applied to the spi tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 22c76326bff810d220fffdbaab949d09e2564067 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd-Vt+b4OUoWG0@public.gmane.org>
Date: Fri, 9 Dec 2016 20:48:52 +0100
Subject: [PATCH] spi: spi-ath79: support multiple internal chip select lines

Several devices with multiple flash chips use the internal chip select
lines. Don't assume that chip select 1 and above are GPIO lines.

Signed-off-by: Felix Fietkau <nbd-Vt+b4OUoWG0@public.gmane.org>
Signed-off-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
 drivers/spi/spi-ath79.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c
index f369174fbd88..3e9b928b563b 100644
--- a/drivers/spi/spi-ath79.c
+++ b/drivers/spi/spi-ath79.c
@@ -78,14 +78,16 @@ static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
 		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
 	}
 
-	if (spi->chip_select) {
+	if (gpio_is_valid(spi->cs_gpio)) {
 		/* SPI is normally active-low */
 		gpio_set_value(spi->cs_gpio, cs_high);
 	} else {
+		u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select);
+
 		if (cs_high)
-			sp->ioc_base |= AR71XX_SPI_IOC_CS0;
+			sp->ioc_base |= cs_bit;
 		else
-			sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
+			sp->ioc_base &= ~cs_bit;
 
 		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
 	}
@@ -118,11 +120,8 @@ static int ath79_spi_setup_cs(struct spi_device *spi)
 	struct ath79_spi *sp = ath79_spidev_to_sp(spi);
 	int status;
 
-	if (spi->chip_select && !gpio_is_valid(spi->cs_gpio))
-		return -EINVAL;
-
 	status = 0;
-	if (spi->chip_select) {
+	if (gpio_is_valid(spi->cs_gpio)) {
 		unsigned long flags;
 
 		flags = GPIOF_DIR_OUT;
@@ -134,10 +133,12 @@ static int ath79_spi_setup_cs(struct spi_device *spi)
 		status = gpio_request_one(spi->cs_gpio, flags,
 					  dev_name(&spi->dev));
 	} else {
+		u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select);
+
 		if (spi->mode & SPI_CS_HIGH)
-			sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
+			sp->ioc_base &= ~cs_bit;
 		else
-			sp->ioc_base |= AR71XX_SPI_IOC_CS0;
+			sp->ioc_base |= cs_bit;
 
 		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
 	}
@@ -147,7 +148,7 @@ static int ath79_spi_setup_cs(struct spi_device *spi)
 
 static void ath79_spi_cleanup_cs(struct spi_device *spi)
 {
-	if (spi->chip_select) {
+	if (gpio_is_valid(spi->cs_gpio)) {
 		gpio_free(spi->cs_gpio);
 	}
 }
-- 
2.11.0

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^ permalink raw reply related	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2016-12-14 18:03 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-12-09 19:48 [PATCH 1/2] spi: spi-ath79: support multiple internal chip select lines Felix Fietkau
     [not found] ` <20161209194853.71018-1-nbd-Vt+b4OUoWG0@public.gmane.org>
2016-12-09 19:48   ` [PATCH 2/2] spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip select Felix Fietkau
     [not found]     ` <20161209194853.71018-2-nbd-Vt+b4OUoWG0@public.gmane.org>
2016-12-11  9:29       ` Geert Uytterhoeven
2016-12-14 18:03       ` Applied "spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip select" to the spi tree Mark Brown
2016-12-14 18:03   ` Applied "spi: spi-ath79: support multiple internal chip select lines" " Mark Brown

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