[PATCH v2] drm/i915/guc: Exclude the upper end of the Global GTT for the GuC

[PATCH v2] drm/i915/guc: Exclude the upper end of the Global GTT for the GuC

[Chris Wilson]

The GuC uses a special mapping for the upper end of the Global GTT,
similar to the way it uses a special mapping for the lower end, so
exclude it from our drm_mm to prevent us using it.

v2: Rename to reflect that it is unmappable similar to the region at the
bottom of the GGTT, and couple it into the assertion that we don't feed
unmappable addresses to the GuC.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 10 ++++++++++
 drivers/gpu/drm/i915/i915_guc_reg.h |  3 +++
 drivers/gpu/drm/i915/intel_uc.h     |  1 +
 3 files changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 6af9311f72f5..bc2b4421cbd6 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3176,6 +3176,16 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 	if (ret)
 		return ret;
 
+	/* Trim the GGTT to fit the GuC mappable upper range (when enabled).
+	 * This is easier than doing range restriction on the fly, as we
+	 * currently don't have any bits spare to pass in this upper
+	 * restriction!
+	 */
+	if (HAS_GUC(dev_priv) && i915.enable_guc_loading) {
+		ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
+		ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
+	}
+
 	if ((ggtt->base.total - 1) >> 32) {
 		DRM_ERROR("We never expected a Global GTT with more than 32bits"
 			  " of address space! Found %lldM!\n",
diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
index 5e638fc37208..6a0adafe0523 100644
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ b/drivers/gpu/drm/i915/i915_guc_reg.h
@@ -73,6 +73,9 @@
 #define   GUC_WOPCM_TOP			  (0x80 << 12)	/* 512KB */
 #define   BXT_GUC_WOPCM_RC6_RESERVED	  (0x10 << 12)	/* 64KB  */
 
+/* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */
+#define GUC_GGTT_TOP			0xFEE00000
+
 #define GEN8_GT_PM_CONFIG		_MMIO(0x138140)
 #define GEN9LP_GT_PM_CONFIG		_MMIO(0x138140)
 #define GEN9_GT_PM_CONFIG		_MMIO(0x13816c)
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index d556215e691f..c594472d918b 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -204,6 +204,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma)
 {
 	u32 offset = i915_ggtt_offset(vma);
 	GEM_BUG_ON(offset < GUC_WOPCM_TOP);
+	GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));
 	return offset;
 }
 
-- 
2.11.0

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Re: [PATCH v2] drm/i915/guc: Exclude the upper end of the Global GTT for the GuC

[Chris Wilson]

On Wed, Dec 28, 2016 at 11:27:37AM +0000, Chris Wilson wrote:
> The GuC uses a special mapping for the upper end of the Global GTT,
> similar to the way it uses a special mapping for the lower end, so
> exclude it from our drm_mm to prevent us using it.
> 
> v2: Rename to reflect that it is unmappable similar to the region at the
> bottom of the GGTT, and couple it into the assertion that we don't feed
> unmappable addresses to the GuC.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 10 ++++++++++
>  drivers/gpu/drm/i915/i915_guc_reg.h |  3 +++
>  drivers/gpu/drm/i915/intel_uc.h     |  1 +
>  3 files changed, 14 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 6af9311f72f5..bc2b4421cbd6 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -3176,6 +3176,16 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
>  	if (ret)
>  		return ret;
>  
> +	/* Trim the GGTT to fit the GuC mappable upper range (when enabled).
> +	 * This is easier than doing range restriction on the fly, as we
> +	 * currently don't have any bits spare to pass in this upper
> +	 * restriction!
> +	 */
> +	if (HAS_GUC(dev_priv) && i915.enable_guc_loading) {
> +		ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
> +		ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
> +	}
> +
>  	if ((ggtt->base.total - 1) >> 32) {
>  		DRM_ERROR("We never expected a Global GTT with more than 32bits"
>  			  " of address space! Found %lldM!\n",
> diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
> index 5e638fc37208..6a0adafe0523 100644
> --- a/drivers/gpu/drm/i915/i915_guc_reg.h
> +++ b/drivers/gpu/drm/i915/i915_guc_reg.h
> @@ -73,6 +73,9 @@
>  #define   GUC_WOPCM_TOP			  (0x80 << 12)	/* 512KB */
>  #define   BXT_GUC_WOPCM_RC6_RESERVED	  (0x10 << 12)	/* 64KB  */
>  
> +/* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */
> +#define GUC_GGTT_TOP			0xFEE00000
> +
>  #define GEN8_GT_PM_CONFIG		_MMIO(0x138140)
>  #define GEN9LP_GT_PM_CONFIG		_MMIO(0x138140)
>  #define GEN9_GT_PM_CONFIG		_MMIO(0x13816c)
> diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
> index d556215e691f..c594472d918b 100644
> --- a/drivers/gpu/drm/i915/intel_uc.h
> +++ b/drivers/gpu/drm/i915/intel_uc.h
> @@ -204,6 +204,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma)
>  {
>  	u32 offset = i915_ggtt_offset(vma);
>  	GEM_BUG_ON(offset < GUC_WOPCM_TOP);
> +	GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));

range_overflows is not yet visible to this header. :|
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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✗ Fi.CI.BAT: failure for drm/i915/guc: Exclude the upper end of the Global GTT for the GuC

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Exclude the upper end of the Global GTT for the GuC
URL   : https://patchwork.freedesktop.org/series/17246/
State : failure

== Summary ==

cc1: all warnings being treated as errors
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_atomic_plane.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_atomic_plane.o] Error 1
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/i915_gem.o' failed
make[4]: *** [drivers/gpu/drm/i915/i915_gem.o] Error 1
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/dvo_ch7xxx.o' failed
make[4]: *** [drivers/gpu/drm/i915/dvo_ch7xxx.o] Error 1
cc1: all warnings being treated as errors
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_dp_aux_backlight.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_dp_aux_backlight.o] Error 1
  LD      drivers/acpi/built-in.o
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_overlay.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_overlay.o] Error 1
cc1: all warnings being treated as errors
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_sprite.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_sprite.o] Error 1
cc1: all warnings being treated as errors
cc1: all warnings being treated as errors
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_ddi.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_ddi.o] Error 1
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_dp_link_training.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_dp_link_training.o] Error 1
cc1: all warnings being treated as errors
cc1: all warnings being treated as errors
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/dvo_tfp410.o' failed
make[4]: *** [drivers/gpu/drm/i915/dvo_tfp410.o] Error 1
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_dsi.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_dsi.o] Error 1
cc1: all warnings being treated as errors
cc1: all warnings being treated as errors
cc1: all warnings being treated as errors
cc1: all warnings being treated as errors
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_fifo_underrun.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_fifo_underrun.o] Error 1
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/dvo_sil164.o' failed
make[4]: *** [drivers/gpu/drm/i915/dvo_sil164.o] Error 1
cc1: all warnings being treated as errors
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/i915_guc_submission.o' failed
make[4]: *** [drivers/gpu/drm/i915/i915_guc_submission.o] Error 1
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_dsi_dcs_backlight.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_dsi_dcs_backlight.o] Error 1
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_crt.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_crt.o] Error 1
cc1: all warnings being treated as errors
cc1: all warnings being treated as errors
cc1: all warnings being treated as errors
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_sideband.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_sideband.o] Error 1
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_fbdev.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_fbdev.o] Error 1
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_dp_mst.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_dp_mst.o] Error 1
cc1: all warnings being treated as errors
  LD [M]  drivers/net/ethernet/intel/e1000/e1000.o
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_dsi_pll.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_dsi_pll.o] Error 1
  LD      net/xfrm/built-in.o
cc1: all warnings being treated as errors
cc1: all warnings being treated as errors
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_dp.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_dp.o] Error 1
scripts/Makefile.build:293: recipe for target 'drivers/gpu/drm/i915/intel_display.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_display.o] Error 1
scripts/Makefile.build:551: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:551: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:551: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
make[1]: *** Waiting for unfinished jobs....
  LD      fs/btrfs/btrfs.o
  LD      drivers/usb/core/usbcore.o
  LD      drivers/usb/core/built-in.o
  LD      fs/btrfs/built-in.o
  CC      arch/x86/kernel/cpu/capflags.o
  LD      arch/x86/kernel/cpu/built-in.o
  AR      lib/lib.a
  LD      arch/x86/kernel/built-in.o
  EXPORTS lib/lib-ksyms.o
  LD      arch/x86/built-in.o
  LD      lib/built-in.o
  LD      drivers/md/md-mod.o
  LD      drivers/md/built-in.o
  LD      drivers/usb/host/xhci-hcd.o
  LD      fs/ext4/ext4.o
  LD      fs/ext4/built-in.o
  LD      drivers/tty/vt/built-in.o
  LD      drivers/tty/built-in.o
  LD      fs/built-in.o
  LD      drivers/usb/host/built-in.o
  LD      net/core/built-in.o
  LD      drivers/usb/built-in.o
  LD [M]  drivers/net/ethernet/intel/igb/igb.o
  LD      net/ipv4/built-in.o
  LD      net/built-in.o
  LD [M]  drivers/net/ethernet/intel/e1000e/e1000e.o
  LD      drivers/net/ethernet/built-in.o
  LD      drivers/net/built-in.o
Makefile:988: recipe for target 'drivers' failed
make: *** [drivers] Error 2

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Re: [PATCH v2] drm/i915/guc: Exclude the upper end of the Global GTT for the GuC

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 2906 bytes --]

Hi Chris,

[auto build test ERROR on drm-intel/for-linux-next]
[cannot apply to v4.10-rc1 next-20161224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-guc-Exclude-the-upper-end-of-the-Global-GTT-for-the-GuC/20161229-001059
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x007-201652 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All error/warnings (new ones prefixed by >>):

   In file included from include/linux/mmdebug.h:4:0,
                    from include/linux/gfp.h:4,
                    from include/linux/slab.h:14,
                    from include/linux/resource_ext.h:19,
                    from include/linux/acpi.h:26,
                    from drivers/gpu/drm/i915/i915_drv.c:30:
   drivers/gpu/drm/i915/intel_uc.h: In function 'guc_ggtt_offset':
>> drivers/gpu/drm/i915/intel_uc.h:207:13: error: implicit declaration of function 'range_overflows_t' [-Werror=implicit-function-declaration]
     GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));
                ^
   include/linux/bug.h:45:63: note: in definition of macro 'BUILD_BUG_ON_INVALID'
    #define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e))))
                                                                  ^
>> drivers/gpu/drm/i915/intel_uc.h:207:2: note: in expansion of macro 'GEM_BUG_ON'
     GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));
     ^~~~~~~~~~
>> drivers/gpu/drm/i915/intel_uc.h:207:31: error: expected expression before 'u64'
     GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));
                                  ^
   include/linux/bug.h:45:63: note: in definition of macro 'BUILD_BUG_ON_INVALID'
    #define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e))))
                                                                  ^
>> drivers/gpu/drm/i915/intel_uc.h:207:2: note: in expansion of macro 'GEM_BUG_ON'
     GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));
     ^~~~~~~~~~
   cc1: some warnings being treated as errors

vim +/range_overflows_t +207 drivers/gpu/drm/i915/intel_uc.h

   201	int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val);
   202	
   203	static inline u32 guc_ggtt_offset(struct i915_vma *vma)
   204	{
   205		u32 offset = i915_ggtt_offset(vma);
   206		GEM_BUG_ON(offset < GUC_WOPCM_TOP);
 > 207		GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));
   208		return offset;
   209	}
   210	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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Re: [PATCH v2] drm/i915/guc: Exclude the upper end of the Global GTT for the GuC

[Daniele Ceraolo Spurio]

On 28/12/16 03:27, Chris Wilson wrote:
> The GuC uses a special mapping for the upper end of the Global GTT,
> similar to the way it uses a special mapping for the lower end, so
> exclude it from our drm_mm to prevent us using it.
>
> v2: Rename to reflect that it is unmappable similar to the region at the
> bottom of the GGTT, and couple it into the assertion that we don't feed
> unmappable addresses to the GuC.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

LGTM, so once the inclusion of range_overflows_t is fixed (or the check 
done manually) you can add:

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

BR,
Daniele

> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 10 ++++++++++
>  drivers/gpu/drm/i915/i915_guc_reg.h |  3 +++
>  drivers/gpu/drm/i915/intel_uc.h     |  1 +
>  3 files changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 6af9311f72f5..bc2b4421cbd6 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -3176,6 +3176,16 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
>  	if (ret)
>  		return ret;
>
> +	/* Trim the GGTT to fit the GuC mappable upper range (when enabled).
> +	 * This is easier than doing range restriction on the fly, as we
> +	 * currently don't have any bits spare to pass in this upper
> +	 * restriction!
> +	 */
> +	if (HAS_GUC(dev_priv) && i915.enable_guc_loading) {
> +		ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
> +		ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
> +	}
> +
>  	if ((ggtt->base.total - 1) >> 32) {
>  		DRM_ERROR("We never expected a Global GTT with more than 32bits"
>  			  " of address space! Found %lldM!\n",
> diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
> index 5e638fc37208..6a0adafe0523 100644
> --- a/drivers/gpu/drm/i915/i915_guc_reg.h
> +++ b/drivers/gpu/drm/i915/i915_guc_reg.h
> @@ -73,6 +73,9 @@
>  #define   GUC_WOPCM_TOP			  (0x80 << 12)	/* 512KB */
>  #define   BXT_GUC_WOPCM_RC6_RESERVED	  (0x10 << 12)	/* 64KB  */
>
> +/* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */
> +#define GUC_GGTT_TOP			0xFEE00000
> +
>  #define GEN8_GT_PM_CONFIG		_MMIO(0x138140)
>  #define GEN9LP_GT_PM_CONFIG		_MMIO(0x138140)
>  #define GEN9_GT_PM_CONFIG		_MMIO(0x13816c)
> diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
> index d556215e691f..c594472d918b 100644
> --- a/drivers/gpu/drm/i915/intel_uc.h
> +++ b/drivers/gpu/drm/i915/intel_uc.h
> @@ -204,6 +204,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma)
>  {
>  	u32 offset = i915_ggtt_offset(vma);
>  	GEM_BUG_ON(offset < GUC_WOPCM_TOP);
> +	GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));
>  	return offset;
>  }
>
>
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