* [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers
@ 2016-12-28 18:50 Icenowy Zheng
2016-12-28 18:50 ` [U-Boot] [PATCH] sunxi: H3/A64: fix non-ODT setting Icenowy Zheng
2017-01-05 22:16 ` [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers Maxime Ripard
0 siblings, 2 replies; 6+ messages in thread
From: Icenowy Zheng @ 2016-12-28 18:50 UTC (permalink / raw)
To: u-boot
Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
DesignWare DRAM controller, which do not have official free DRAM
initialization code, but can use modified dram_sun8i_h3.c.
Add a invisible option for easier DRAM initialization code reuse.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
arch/arm/include/asm/arch-sunxi/dram.h | 2 +-
arch/arm/mach-sunxi/Makefile | 2 +-
board/sunxi/Kconfig | 7 +++++++
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h
index e0be744dba..c5456658a3 100644
--- a/arch/arm/include/asm/arch-sunxi/dram.h
+++ b/arch/arm/include/asm/arch-sunxi/dram.h
@@ -24,7 +24,7 @@
#include <asm/arch/dram_sun8i_a33.h>
#elif defined(CONFIG_MACH_SUN8I_A83T)
#include <asm/arch/dram_sun8i_a83t.h>
-#elif defined(CONFIG_MACH_SUN8I_H3)
+#elif defined(CONFIG_SUNXI_H3_DW_DRAM)
#include <asm/arch/dram_sun8i_h3.h>
#elif defined(CONFIG_MACH_SUN9I)
#include <asm/arch/dram_sun9i.h>
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
index e73114ee64..dc737db4b9 100644
--- a/arch/arm/mach-sunxi/Makefile
+++ b/arch/arm/mach-sunxi/Makefile
@@ -48,6 +48,6 @@ obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o
obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o
obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o
obj-$(CONFIG_MACH_SUN8I_A83T) += dram_sun8i_a83t.o
-obj-$(CONFIG_MACH_SUN8I_H3) += dram_sun8i_h3.o
+obj-$(CONFIG_SUNXI_H3_DW_DRAM) += dram_sun8i_h3.o
obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o
endif
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index e1d4ab148f..4ddd992684 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -42,6 +42,12 @@ config SUNXI_GEN_SUN6I
separate ahb reset control registers, custom pmic bus, new style
watchdog, etc.
+config SUNXI_H3_DW_DRAM
+ bool
+ ---help---
+ Select this for sunxi SoCs which uses a DRAM controller like the
+ DesignWare controller used in H3, mainly SoCs after H3, which do
+ not have official open-source DRAM initialization code.
choice
prompt "Sunxi SoC Variant"
@@ -113,6 +119,7 @@ config MACH_SUN8I_H3
select ARCH_SUPPORT_PSCI
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
+ select SUNXI_H3_DW_DRAM
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
config MACH_SUN9I
--
2.11.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] sunxi: H3/A64: fix non-ODT setting
2016-12-28 18:50 [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers Icenowy Zheng
@ 2016-12-28 18:50 ` Icenowy Zheng
2017-01-05 22:15 ` Maxime Ripard
2017-01-05 22:16 ` [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers Maxime Ripard
1 sibling, 1 reply; 6+ messages in thread
From: Icenowy Zheng @ 2016-12-28 18:50 UTC (permalink / raw)
To: u-boot
From: Andre Przywara <andre.przywara@arm.com>
According to Jens disabling the on-die-termination should set bit 5,
not bit 1 in the respective register. Fix this.
Reported-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/mach-sunxi/dram_sun8i_h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c b/arch/arm/mach-sunxi/dram_sun8i_h3.c
index b08b8e67cc..8e2527dee1 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_h3.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c
@@ -347,7 +347,7 @@ static int mctl_channel_init(struct dram_para *para)
clrsetbits_le32(&mctl_ctl->datx[i].gcr, (0x3 << 4) |
(0x1 << 1) | (0x3 << 2) | (0x3 << 12) |
(0x3 << 14),
- IS_ENABLED(CONFIG_DRAM_ODT_EN) ? 0x0 : 0x2);
+ IS_ENABLED(CONFIG_DRAM_ODT_EN) ? 0x0 : 0x20);
/* AC PDR should always ON */
setbits_le32(&mctl_ctl->aciocr, 0x1 << 1);
--
2.11.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] sunxi: H3/A64: fix non-ODT setting
2016-12-28 18:50 ` [U-Boot] [PATCH] sunxi: H3/A64: fix non-ODT setting Icenowy Zheng
@ 2017-01-05 22:15 ` Maxime Ripard
0 siblings, 0 replies; 6+ messages in thread
From: Maxime Ripard @ 2017-01-05 22:15 UTC (permalink / raw)
To: u-boot
On Thu, Dec 29, 2016 at 02:50:49AM +0800, Icenowy Zheng wrote:
> From: Andre Przywara <andre.przywara@arm.com>
>
> According to Jens disabling the on-die-termination should set bit 5,
> not bit 1 in the respective register. Fix this.
>
> Reported-by: Jens Kuske <jenskuske@gmail.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This has already been sent and merged (and it's missing your
Signed-off-by).
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers
2016-12-28 18:50 [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers Icenowy Zheng
2016-12-28 18:50 ` [U-Boot] [PATCH] sunxi: H3/A64: fix non-ODT setting Icenowy Zheng
@ 2017-01-05 22:16 ` Maxime Ripard
2017-01-05 23:13 ` Icenowy Zheng
1 sibling, 1 reply; 6+ messages in thread
From: Maxime Ripard @ 2017-01-05 22:16 UTC (permalink / raw)
To: u-boot
On Thu, Dec 29, 2016 at 02:50:48AM +0800, Icenowy Zheng wrote:
> Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
> DesignWare DRAM controller, which do not have official free DRAM
> initialization code, but can use modified dram_sun8i_h3.c.
>
> Add a invisible option for easier DRAM initialization code reuse.
Since it's used on all the newer SoCs, do we need to keep the H3 name
in the config option name?
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers
2017-01-05 22:16 ` [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers Maxime Ripard
@ 2017-01-05 23:13 ` Icenowy Zheng
2017-01-09 11:06 ` Maxime Ripard
0 siblings, 1 reply; 6+ messages in thread
From: Icenowy Zheng @ 2017-01-05 23:13 UTC (permalink / raw)
To: u-boot
06.01.2017, 06:16, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
> On Thu, Dec 29, 2016 at 02:50:48AM +0800, Icenowy Zheng wrote:
>> ?Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
>> ?DesignWare DRAM controller, which do not have official free DRAM
>> ?initialization code, but can use modified dram_sun8i_h3.c.
>>
>> ?Add a invisible option for easier DRAM initialization code reuse.
>
> Since it's used on all the newer SoCs, do we need to keep the H3 name
> in the config option name?
Good question...
Name it "SUNXI_DW_DRAM"?
(Although I think at least A33 uses the same series of DRAM controller)
>
> Thanks,
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers
2017-01-05 23:13 ` Icenowy Zheng
@ 2017-01-09 11:06 ` Maxime Ripard
0 siblings, 0 replies; 6+ messages in thread
From: Maxime Ripard @ 2017-01-09 11:06 UTC (permalink / raw)
To: u-boot
On Fri, Jan 06, 2017 at 07:13:17AM +0800, Icenowy Zheng wrote:
>
>
> 06.01.2017, 06:16, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
> > On Thu, Dec 29, 2016 at 02:50:48AM +0800, Icenowy Zheng wrote:
> >> ?Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
> >> ?DesignWare DRAM controller, which do not have official free DRAM
> >> ?initialization code, but can use modified dram_sun8i_h3.c.
> >>
> >> ?Add a invisible option for easier DRAM initialization code reuse.
> >
> > Since it's used on all the newer SoCs, do we need to keep the H3 name
> > in the config option name?
>
> Good question...
>
> Name it "SUNXI_DW_DRAM"?
Looks good.
> (Although I think at least A33 uses the same series of DRAM controller)
Does it? Why do we need a separate DRAM init code then?
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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end of thread, other threads:[~2017-01-09 11:06 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-12-28 18:50 [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers Icenowy Zheng
2016-12-28 18:50 ` [U-Boot] [PATCH] sunxi: H3/A64: fix non-ODT setting Icenowy Zheng
2017-01-05 22:15 ` Maxime Ripard
2017-01-05 22:16 ` [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers Maxime Ripard
2017-01-05 23:13 ` Icenowy Zheng
2017-01-09 11:06 ` Maxime Ripard
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