* [PATCH 0/2] Cleanup and fix PM_BR_CMPL event code in power9
@ 2017-01-05 11:34 Madhavan Srinivasan
2017-01-05 11:34 ` [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list Madhavan Srinivasan
2017-01-05 11:34 ` [PATCH 2/2] powerpc/perf: fix PM_BR_CMPL event code for power9 Madhavan Srinivasan
0 siblings, 2 replies; 7+ messages in thread
From: Madhavan Srinivasan @ 2017-01-05 11:34 UTC (permalink / raw)
To: mpe; +Cc: linuxppc-dev, Madhavan Srinivasan
Madhavan Srinivasan (2):
powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list
powerpc/perf: fix PM_BR_CMPL event code for power9
arch/powerpc/perf/power9-events-list.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
2.7.4
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list
2017-01-05 11:34 [PATCH 0/2] Cleanup and fix PM_BR_CMPL event code in power9 Madhavan Srinivasan
@ 2017-01-05 11:34 ` Madhavan Srinivasan
2017-01-06 20:41 ` kbuild test robot
2017-01-06 21:18 ` kbuild test robot
2017-01-05 11:34 ` [PATCH 2/2] powerpc/perf: fix PM_BR_CMPL event code for power9 Madhavan Srinivasan
1 sibling, 2 replies; 7+ messages in thread
From: Madhavan Srinivasan @ 2017-01-05 11:34 UTC (permalink / raw)
To: mpe; +Cc: linuxppc-dev, Madhavan Srinivasan
Fixes:34922527a2bcb ('powerpc/perf: Add power9 event list macros for generic and cache events')
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
---
arch/powerpc/perf/power9-events-list.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/power9-events-list.h b/arch/powerpc/perf/power9-events-list.h
index 6447dc1c3d89..c529d9e3e245 100644
--- a/arch/powerpc/perf/power9-events-list.h
+++ b/arch/powerpc/perf/power9-events-list.h
@@ -16,7 +16,7 @@ EVENT(PM_CYC, 0x0001e)
EVENT(PM_ICT_NOSLOT_CYC, 0x100f8)
EVENT(PM_CMPLU_STALL, 0x1e054)
EVENT(PM_INST_CMPL, 0x00002)
-EVENT(PM_BRU_CMPL, 0x40060)
+EVENT(PM_BR_CMPL, 0x40060)
EVENT(PM_BR_MPRED_CMPL, 0x400f6)
/* All L1 D cache load references counted at finish, gated by reject */
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] powerpc/perf: fix PM_BR_CMPL event code for power9
2017-01-05 11:34 [PATCH 0/2] Cleanup and fix PM_BR_CMPL event code in power9 Madhavan Srinivasan
2017-01-05 11:34 ` [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list Madhavan Srinivasan
@ 2017-01-05 11:34 ` Madhavan Srinivasan
1 sibling, 0 replies; 7+ messages in thread
From: Madhavan Srinivasan @ 2017-01-05 11:34 UTC (permalink / raw)
To: mpe; +Cc: linuxppc-dev, Madhavan Srinivasan
Use 0x10012 event code for PM_BR_CMPL event in
power9-event-list instead of 0x40060.
Fixes:34922527a2bcb ('powerpc/perf: Add power9 event list macros for generic and cache events')
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
---
arch/powerpc/perf/power9-events-list.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/power9-events-list.h b/arch/powerpc/perf/power9-events-list.h
index c529d9e3e245..b58b1339d79f 100644
--- a/arch/powerpc/perf/power9-events-list.h
+++ b/arch/powerpc/perf/power9-events-list.h
@@ -16,7 +16,7 @@ EVENT(PM_CYC, 0x0001e)
EVENT(PM_ICT_NOSLOT_CYC, 0x100f8)
EVENT(PM_CMPLU_STALL, 0x1e054)
EVENT(PM_INST_CMPL, 0x00002)
-EVENT(PM_BR_CMPL, 0x40060)
+EVENT(PM_BR_CMPL, 0x10012)
EVENT(PM_BR_MPRED_CMPL, 0x400f6)
/* All L1 D cache load references counted at finish, gated by reject */
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list
2017-01-05 11:34 ` [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list Madhavan Srinivasan
@ 2017-01-06 20:41 ` kbuild test robot
2017-01-09 4:37 ` Madhavan Srinivasan
2017-01-06 21:18 ` kbuild test robot
1 sibling, 1 reply; 7+ messages in thread
From: kbuild test robot @ 2017-01-06 20:41 UTC (permalink / raw)
To: Madhavan Srinivasan; +Cc: kbuild-all, mpe, Madhavan Srinivasan, linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 10930 bytes --]
Hi Madhavan,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.10-rc2 next-20170106]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Madhavan-Srinivasan/Cleanup-and-fix-PM_BR_CMPL-event-code-in-power9/20170107-023212
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-defconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=powerpc
All errors (new ones prefixed by >>):
In file included from arch/powerpc/perf/isa207-common.h:16:0,
from arch/powerpc/perf/power9-pmu.c:16:
>> arch/powerpc/perf/power9-pmu.c:113:42: error: 'PM_BRU_CMPL' undeclared here (not in a function)
GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL);
^
include/linux/perf_event.h:1359:11: note: in definition of macro 'PMU_EVENT_ATTR'
.id = _id, \
^~~
arch/powerpc/include/asm/perf_event_server.h:152:40: note: in expansion of macro 'EVENT_ATTR'
#define GENERIC_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _g)
^~~~~~~~~~
arch/powerpc/perf/power9-pmu.c:113:1: note: in expansion of macro 'GENERIC_EVENT_ATTR'
GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL);
^~~~~~~~~~~~~~~~~~
>> arch/powerpc/perf/power9-pmu.c:347:27: error: initializer element is not constant
[ C(RESULT_ACCESS) ] = PM_BRU_CMPL,
^~~~~~~~~~~
arch/powerpc/perf/power9-pmu.c:347:27: note: (near initialization for 'power9_cache_events[5][0][0]')
vim +/PM_BRU_CMPL +113 arch/powerpc/perf/power9-pmu.c
8c002dbd Madhavan Srinivasan 2016-06-26 10 * as published by the Free Software Foundation; either version
8c002dbd Madhavan Srinivasan 2016-06-26 11 * 2 of the License, or later version.
8c002dbd Madhavan Srinivasan 2016-06-26 12 */
8c002dbd Madhavan Srinivasan 2016-06-26 13
8c002dbd Madhavan Srinivasan 2016-06-26 14 #define pr_fmt(fmt) "power9-pmu: " fmt
8c002dbd Madhavan Srinivasan 2016-06-26 15
8c002dbd Madhavan Srinivasan 2016-06-26 @16 #include "isa207-common.h"
8c002dbd Madhavan Srinivasan 2016-06-26 17
8c002dbd Madhavan Srinivasan 2016-06-26 18 /*
18201b20 Madhavan Srinivasan 2016-12-02 19 * Raw event encoding for Power9:
18201b20 Madhavan Srinivasan 2016-12-02 20 *
18201b20 Madhavan Srinivasan 2016-12-02 21 * 60 56 52 48 44 40 36 32
18201b20 Madhavan Srinivasan 2016-12-02 22 * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - |
18201b20 Madhavan Srinivasan 2016-12-02 23 * | | [ ] [ ] [ thresh_cmp ] [ thresh_ctl ]
18201b20 Madhavan Srinivasan 2016-12-02 24 * | | | | |
18201b20 Madhavan Srinivasan 2016-12-02 25 * | | *- IFM (Linux) | thresh start/stop OR FAB match -*
18201b20 Madhavan Srinivasan 2016-12-02 26 * | *- BHRB (Linux) *sm
18201b20 Madhavan Srinivasan 2016-12-02 27 * *- EBB (Linux)
18201b20 Madhavan Srinivasan 2016-12-02 28 *
18201b20 Madhavan Srinivasan 2016-12-02 29 * 28 24 20 16 12 8 4 0
18201b20 Madhavan Srinivasan 2016-12-02 30 * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - |
18201b20 Madhavan Srinivasan 2016-12-02 31 * [ ] [ sample ] [cache] [ pmc ] [unit ] [] m [ pmcxsel ]
18201b20 Madhavan Srinivasan 2016-12-02 32 * | | | | |
18201b20 Madhavan Srinivasan 2016-12-02 33 * | | | | *- mark
18201b20 Madhavan Srinivasan 2016-12-02 34 * | | *- L1/L2/L3 cache_sel |
18201b20 Madhavan Srinivasan 2016-12-02 35 * | | |
18201b20 Madhavan Srinivasan 2016-12-02 36 * | *- sampling mode for marked events *- combine
18201b20 Madhavan Srinivasan 2016-12-02 37 * |
18201b20 Madhavan Srinivasan 2016-12-02 38 * *- thresh_sel
18201b20 Madhavan Srinivasan 2016-12-02 39 *
18201b20 Madhavan Srinivasan 2016-12-02 40 * Below uses IBM bit numbering.
18201b20 Madhavan Srinivasan 2016-12-02 41 *
18201b20 Madhavan Srinivasan 2016-12-02 42 * MMCR1[x:y] = unit (PMCxUNIT)
18201b20 Madhavan Srinivasan 2016-12-02 43 * MMCR1[24] = pmc1combine[0]
18201b20 Madhavan Srinivasan 2016-12-02 44 * MMCR1[25] = pmc1combine[1]
18201b20 Madhavan Srinivasan 2016-12-02 45 * MMCR1[26] = pmc2combine[0]
18201b20 Madhavan Srinivasan 2016-12-02 46 * MMCR1[27] = pmc2combine[1]
18201b20 Madhavan Srinivasan 2016-12-02 47 * MMCR1[28] = pmc3combine[0]
18201b20 Madhavan Srinivasan 2016-12-02 48 * MMCR1[29] = pmc3combine[1]
18201b20 Madhavan Srinivasan 2016-12-02 49 * MMCR1[30] = pmc4combine[0]
18201b20 Madhavan Srinivasan 2016-12-02 50 * MMCR1[31] = pmc4combine[1]
18201b20 Madhavan Srinivasan 2016-12-02 51 *
18201b20 Madhavan Srinivasan 2016-12-02 52 * if pmc == 3 and unit == 0 and pmcxsel[0:6] == 0b0101011
18201b20 Madhavan Srinivasan 2016-12-02 53 * # PM_MRK_FAB_RSP_MATCH
18201b20 Madhavan Srinivasan 2016-12-02 54 * MMCR1[20:27] = thresh_ctl (FAB_CRESP_MATCH / FAB_TYPE_MATCH)
18201b20 Madhavan Srinivasan 2016-12-02 55 * else if pmc == 4 and unit == 0xf and pmcxsel[0:6] == 0b0101001
18201b20 Madhavan Srinivasan 2016-12-02 56 * # PM_MRK_FAB_RSP_MATCH_CYC
18201b20 Madhavan Srinivasan 2016-12-02 57 * MMCR1[20:27] = thresh_ctl (FAB_CRESP_MATCH / FAB_TYPE_MATCH)
18201b20 Madhavan Srinivasan 2016-12-02 58 * else
18201b20 Madhavan Srinivasan 2016-12-02 59 * MMCRA[48:55] = thresh_ctl (THRESH START/END)
18201b20 Madhavan Srinivasan 2016-12-02 60 *
18201b20 Madhavan Srinivasan 2016-12-02 61 * if thresh_sel:
18201b20 Madhavan Srinivasan 2016-12-02 62 * MMCRA[45:47] = thresh_sel
18201b20 Madhavan Srinivasan 2016-12-02 63 *
18201b20 Madhavan Srinivasan 2016-12-02 64 * if thresh_cmp:
18201b20 Madhavan Srinivasan 2016-12-02 65 * MMCRA[9:11] = thresh_cmp[0:2]
18201b20 Madhavan Srinivasan 2016-12-02 66 * MMCRA[12:18] = thresh_cmp[3:9]
18201b20 Madhavan Srinivasan 2016-12-02 67 *
18201b20 Madhavan Srinivasan 2016-12-02 68 * if unit == 6 or unit == 7
18201b20 Madhavan Srinivasan 2016-12-02 69 * MMCRC[53:55] = cache_sel[1:3] (L2EVENT_SEL)
18201b20 Madhavan Srinivasan 2016-12-02 70 * else if unit == 8 or unit == 9:
18201b20 Madhavan Srinivasan 2016-12-02 71 * if cache_sel[0] == 0: # L3 bank
18201b20 Madhavan Srinivasan 2016-12-02 72 * MMCRC[47:49] = cache_sel[1:3] (L3EVENT_SEL0)
18201b20 Madhavan Srinivasan 2016-12-02 73 * else if cache_sel[0] == 1:
18201b20 Madhavan Srinivasan 2016-12-02 74 * MMCRC[50:51] = cache_sel[2:3] (L3EVENT_SEL1)
18201b20 Madhavan Srinivasan 2016-12-02 75 * else if cache_sel[1]: # L1 event
18201b20 Madhavan Srinivasan 2016-12-02 76 * MMCR1[16] = cache_sel[2]
18201b20 Madhavan Srinivasan 2016-12-02 77 * MMCR1[17] = cache_sel[3]
18201b20 Madhavan Srinivasan 2016-12-02 78 *
18201b20 Madhavan Srinivasan 2016-12-02 79 * if mark:
18201b20 Madhavan Srinivasan 2016-12-02 80 * MMCRA[63] = 1 (SAMPLE_ENABLE)
18201b20 Madhavan Srinivasan 2016-12-02 81 * MMCRA[57:59] = sample[0:2] (RAND_SAMP_ELIG)
18201b20 Madhavan Srinivasan 2016-12-02 82 * MMCRA[61:62] = sample[3:4] (RAND_SAMP_MODE)
18201b20 Madhavan Srinivasan 2016-12-02 83 *
18201b20 Madhavan Srinivasan 2016-12-02 84 * if EBB and BHRB:
18201b20 Madhavan Srinivasan 2016-12-02 85 * MMCRA[32:33] = IFM
18201b20 Madhavan Srinivasan 2016-12-02 86 *
18201b20 Madhavan Srinivasan 2016-12-02 87 * MMCRA[SDAR_MODE] = sm
18201b20 Madhavan Srinivasan 2016-12-02 88 */
18201b20 Madhavan Srinivasan 2016-12-02 89
18201b20 Madhavan Srinivasan 2016-12-02 90 /*
8c002dbd Madhavan Srinivasan 2016-06-26 91 * Some power9 event codes.
8c002dbd Madhavan Srinivasan 2016-06-26 92 */
8c002dbd Madhavan Srinivasan 2016-06-26 93 #define EVENT(_name, _code) _name = _code,
8c002dbd Madhavan Srinivasan 2016-06-26 94
8c002dbd Madhavan Srinivasan 2016-06-26 95 enum {
8c002dbd Madhavan Srinivasan 2016-06-26 96 #include "power9-events-list.h"
8c002dbd Madhavan Srinivasan 2016-06-26 97 };
8c002dbd Madhavan Srinivasan 2016-06-26 98
8c002dbd Madhavan Srinivasan 2016-06-26 99 #undef EVENT
8c002dbd Madhavan Srinivasan 2016-06-26 100
8c002dbd Madhavan Srinivasan 2016-06-26 101 /* MMCRA IFM bits - POWER9 */
8c002dbd Madhavan Srinivasan 2016-06-26 102 #define POWER9_MMCRA_IFM1 0x0000000040000000UL
8c002dbd Madhavan Srinivasan 2016-06-26 103 #define POWER9_MMCRA_IFM2 0x0000000080000000UL
8c002dbd Madhavan Srinivasan 2016-06-26 104 #define POWER9_MMCRA_IFM3 0x00000000C0000000UL
8c002dbd Madhavan Srinivasan 2016-06-26 105
60b00025 Madhavan Srinivasan 2016-12-02 106 /* PowerISA v2.07 format attribute structure*/
60b00025 Madhavan Srinivasan 2016-12-02 107 extern struct attribute_group isa207_pmu_format_group;
60b00025 Madhavan Srinivasan 2016-12-02 108
f1fb60bf Madhavan Srinivasan 2016-06-26 109 GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC);
f1fb60bf Madhavan Srinivasan 2016-06-26 110 GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_ICT_NOSLOT_CYC);
f1fb60bf Madhavan Srinivasan 2016-06-26 111 GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL);
f1fb60bf Madhavan Srinivasan 2016-06-26 112 GENERIC_EVENT_ATTR(instructions, PM_INST_CMPL);
f1fb60bf Madhavan Srinivasan 2016-06-26 @113 GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL);
f1fb60bf Madhavan Srinivasan 2016-06-26 114 GENERIC_EVENT_ATTR(branch-misses, PM_BR_MPRED_CMPL);
f1fb60bf Madhavan Srinivasan 2016-06-26 115 GENERIC_EVENT_ATTR(cache-references, PM_LD_REF_L1);
f1fb60bf Madhavan Srinivasan 2016-06-26 116 GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1_FIN);
:::::: The code at line 113 was first introduced by commit
:::::: f1fb60bfde65fe4c4372d480d1b5d57bdba20367 powerpc/perf: Export Power9 generic and cache events to sysfs
:::::: TO: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
:::::: CC: Michael Ellerman <mpe@ellerman.id.au>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 22332 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list
2017-01-05 11:34 ` [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list Madhavan Srinivasan
2017-01-06 20:41 ` kbuild test robot
@ 2017-01-06 21:18 ` kbuild test robot
1 sibling, 0 replies; 7+ messages in thread
From: kbuild test robot @ 2017-01-06 21:18 UTC (permalink / raw)
To: Madhavan Srinivasan; +Cc: kbuild-all, mpe, Madhavan Srinivasan, linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 4655 bytes --]
Hi Madhavan,
[auto build test WARNING on powerpc/next]
[also build test WARNING on v4.10-rc2 next-20170106]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Madhavan-Srinivasan/Cleanup-and-fix-PM_BR_CMPL-event-code-in-power9/20170107-023212
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-allyesconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=powerpc
All warnings (new ones prefixed by >>):
In file included from arch/powerpc/perf/isa207-common.h:16:0,
from arch/powerpc/perf/power9-pmu.c:16:
arch/powerpc/perf/power9-pmu.c:113:42: error: 'PM_BRU_CMPL' undeclared here (not in a function)
GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL);
^
include/linux/perf_event.h:1359:11: note: in definition of macro 'PMU_EVENT_ATTR'
.id = _id, \
^~~
>> arch/powerpc/include/asm/perf_event_server.h:152:40: note: in expansion of macro 'EVENT_ATTR'
#define GENERIC_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _g)
^~~~~~~~~~
>> arch/powerpc/perf/power9-pmu.c:113:1: note: in expansion of macro 'GENERIC_EVENT_ATTR'
GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL);
^~~~~~~~~~~~~~~~~~
arch/powerpc/perf/power9-pmu.c:347:27: error: initializer element is not constant
[ C(RESULT_ACCESS) ] = PM_BRU_CMPL,
^~~~~~~~~~~
arch/powerpc/perf/power9-pmu.c:347:27: note: (near initialization for 'power9_cache_events[5][0][0]')
vim +/EVENT_ATTR +152 arch/powerpc/include/asm/perf_event_server.h
1c53a270 Sukadev Bhattiprolu 2013-01-22 136 * event 'cpu-cycles' can have two entries in sysfs: 'cpu-cycles' and
1c53a270 Sukadev Bhattiprolu 2013-01-22 137 * 'PM_CYC' where the latter is the name by which the event is known in
1c53a270 Sukadev Bhattiprolu 2013-01-22 138 * POWER CPU specification.
e0728b50 Sukadev Bhattiprolu 2016-01-11 139 *
e0728b50 Sukadev Bhattiprolu 2016-01-11 140 * Similarly, some hardware and cache events use the same event code. Eg.
e0728b50 Sukadev Bhattiprolu 2016-01-11 141 * on POWER8, both "cache-references" and "L1-dcache-loads" events refer
e0728b50 Sukadev Bhattiprolu 2016-01-11 142 * to the same event, PM_LD_REF_L1. The suffix, allows us to have two
e0728b50 Sukadev Bhattiprolu 2016-01-11 143 * sysfs objects for the same event and thus two entries/aliases in sysfs.
1c53a270 Sukadev Bhattiprolu 2013-01-22 144 */
1c53a270 Sukadev Bhattiprolu 2013-01-22 145 #define EVENT_VAR(_id, _suffix) event_attr_##_id##_suffix
f2b4367a Sukadev Bhattiprolu 2013-02-05 146 #define EVENT_PTR(_id, _suffix) &EVENT_VAR(_id, _suffix).attr.attr
1c53a270 Sukadev Bhattiprolu 2013-01-22 147
1c53a270 Sukadev Bhattiprolu 2013-01-22 148 #define EVENT_ATTR(_name, _id, _suffix) \
d4969e24 Sukadev Bhattiprolu 2016-01-11 149 PMU_EVENT_ATTR(_name, EVENT_VAR(_id, _suffix), _id, \
1c53a270 Sukadev Bhattiprolu 2013-01-22 150 power_events_sysfs_show)
1c53a270 Sukadev Bhattiprolu 2013-01-22 151
1c53a270 Sukadev Bhattiprolu 2013-01-22 @152 #define GENERIC_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _g)
1c53a270 Sukadev Bhattiprolu 2013-01-22 153 #define GENERIC_EVENT_PTR(_id) EVENT_PTR(_id, _g)
886c3b2d Sukadev Bhattiprolu 2013-01-22 154
e0728b50 Sukadev Bhattiprolu 2016-01-11 155 #define CACHE_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _c)
e0728b50 Sukadev Bhattiprolu 2016-01-11 156 #define CACHE_EVENT_PTR(_id) EVENT_PTR(_id, _c)
e0728b50 Sukadev Bhattiprolu 2016-01-11 157
cfe0d8ba Runzhen Wang 2013-06-28 158 #define POWER_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _p)
886c3b2d Sukadev Bhattiprolu 2013-01-22 159 #define POWER_EVENT_PTR(_id) EVENT_PTR(_id, _p)
:::::: The code at line 152 was first introduced by commit
:::::: 1c53a270724df91276d28d66f8e5a302fc6a5d74 perf/POWER7: Make generic event translations available in sysfs
:::::: TO: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
:::::: CC: Arnaldo Carvalho de Melo <acme@redhat.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 51012 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list
2017-01-06 20:41 ` kbuild test robot
@ 2017-01-09 4:37 ` Madhavan Srinivasan
0 siblings, 0 replies; 7+ messages in thread
From: Madhavan Srinivasan @ 2017-01-09 4:37 UTC (permalink / raw)
To: kbuild test robot; +Cc: kbuild-all, mpe, linuxppc-dev
On Saturday 07 January 2017 02:11 AM, kbuild test robot wrote:
> Hi Madhavan,
>
> [auto build test ERROR on powerpc/next]
> [also build test ERROR on v4.10-rc2 next-20170106]
> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>
> url: https://github.com/0day-ci/linux/commits/Madhavan-Srinivasan/Cleanup-and-fix-PM_BR_CMPL-event-code-in-power9/20170107-023212
> base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
> config: powerpc-defconfig (attached as .config)
> compiler: powerpc64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
> reproduce:
> wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # save the attached .config to linux build tree
> make.cross ARCH=powerpc
>
> All errors (new ones prefixed by >>):
>
> In file included from arch/powerpc/perf/isa207-common.h:16:0,
> from arch/powerpc/perf/power9-pmu.c:16:
>>> arch/powerpc/perf/power9-pmu.c:113:42: error: 'PM_BRU_CMPL' undeclared here (not in a function)
> GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL);
> ^
> include/linux/perf_event.h:1359:11: note: in definition of macro 'PMU_EVENT_ATTR'
> .id = _id, \
My bad. Sent out wrong version of the patchset.
Will resend it.
Thanks
Maddy
> ^~~
> arch/powerpc/include/asm/perf_event_server.h:152:40: note: in expansion of macro 'EVENT_ATTR'
> #define GENERIC_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _g)
> ^~~~~~~~~~
> arch/powerpc/perf/power9-pmu.c:113:1: note: in expansion of macro 'GENERIC_EVENT_ATTR'
> GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL);
> ^~~~~~~~~~~~~~~~~~
>>> arch/powerpc/perf/power9-pmu.c:347:27: error: initializer element is not constant
> [ C(RESULT_ACCESS) ] = PM_BRU_CMPL,
> ^~~~~~~~~~~
> arch/powerpc/perf/power9-pmu.c:347:27: note: (near initialization for 'power9_cache_events[5][0][0]')
>
> vim +/PM_BRU_CMPL +113 arch/powerpc/perf/power9-pmu.c
>
> 8c002dbd Madhavan Srinivasan 2016-06-26 10 * as published by the Free Software Foundation; either version
> 8c002dbd Madhavan Srinivasan 2016-06-26 11 * 2 of the License, or later version.
> 8c002dbd Madhavan Srinivasan 2016-06-26 12 */
> 8c002dbd Madhavan Srinivasan 2016-06-26 13
> 8c002dbd Madhavan Srinivasan 2016-06-26 14 #define pr_fmt(fmt) "power9-pmu: " fmt
> 8c002dbd Madhavan Srinivasan 2016-06-26 15
> 8c002dbd Madhavan Srinivasan 2016-06-26 @16 #include "isa207-common.h"
> 8c002dbd Madhavan Srinivasan 2016-06-26 17
> 8c002dbd Madhavan Srinivasan 2016-06-26 18 /*
> 18201b20 Madhavan Srinivasan 2016-12-02 19 * Raw event encoding for Power9:
> 18201b20 Madhavan Srinivasan 2016-12-02 20 *
> 18201b20 Madhavan Srinivasan 2016-12-02 21 * 60 56 52 48 44 40 36 32
> 18201b20 Madhavan Srinivasan 2016-12-02 22 * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - |
> 18201b20 Madhavan Srinivasan 2016-12-02 23 * | | [ ] [ ] [ thresh_cmp ] [ thresh_ctl ]
> 18201b20 Madhavan Srinivasan 2016-12-02 24 * | | | | |
> 18201b20 Madhavan Srinivasan 2016-12-02 25 * | | *- IFM (Linux) | thresh start/stop OR FAB match -*
> 18201b20 Madhavan Srinivasan 2016-12-02 26 * | *- BHRB (Linux) *sm
> 18201b20 Madhavan Srinivasan 2016-12-02 27 * *- EBB (Linux)
> 18201b20 Madhavan Srinivasan 2016-12-02 28 *
> 18201b20 Madhavan Srinivasan 2016-12-02 29 * 28 24 20 16 12 8 4 0
> 18201b20 Madhavan Srinivasan 2016-12-02 30 * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - |
> 18201b20 Madhavan Srinivasan 2016-12-02 31 * [ ] [ sample ] [cache] [ pmc ] [unit ] [] m [ pmcxsel ]
> 18201b20 Madhavan Srinivasan 2016-12-02 32 * | | | | |
> 18201b20 Madhavan Srinivasan 2016-12-02 33 * | | | | *- mark
> 18201b20 Madhavan Srinivasan 2016-12-02 34 * | | *- L1/L2/L3 cache_sel |
> 18201b20 Madhavan Srinivasan 2016-12-02 35 * | | |
> 18201b20 Madhavan Srinivasan 2016-12-02 36 * | *- sampling mode for marked events *- combine
> 18201b20 Madhavan Srinivasan 2016-12-02 37 * |
> 18201b20 Madhavan Srinivasan 2016-12-02 38 * *- thresh_sel
> 18201b20 Madhavan Srinivasan 2016-12-02 39 *
> 18201b20 Madhavan Srinivasan 2016-12-02 40 * Below uses IBM bit numbering.
> 18201b20 Madhavan Srinivasan 2016-12-02 41 *
> 18201b20 Madhavan Srinivasan 2016-12-02 42 * MMCR1[x:y] = unit (PMCxUNIT)
> 18201b20 Madhavan Srinivasan 2016-12-02 43 * MMCR1[24] = pmc1combine[0]
> 18201b20 Madhavan Srinivasan 2016-12-02 44 * MMCR1[25] = pmc1combine[1]
> 18201b20 Madhavan Srinivasan 2016-12-02 45 * MMCR1[26] = pmc2combine[0]
> 18201b20 Madhavan Srinivasan 2016-12-02 46 * MMCR1[27] = pmc2combine[1]
> 18201b20 Madhavan Srinivasan 2016-12-02 47 * MMCR1[28] = pmc3combine[0]
> 18201b20 Madhavan Srinivasan 2016-12-02 48 * MMCR1[29] = pmc3combine[1]
> 18201b20 Madhavan Srinivasan 2016-12-02 49 * MMCR1[30] = pmc4combine[0]
> 18201b20 Madhavan Srinivasan 2016-12-02 50 * MMCR1[31] = pmc4combine[1]
> 18201b20 Madhavan Srinivasan 2016-12-02 51 *
> 18201b20 Madhavan Srinivasan 2016-12-02 52 * if pmc == 3 and unit == 0 and pmcxsel[0:6] == 0b0101011
> 18201b20 Madhavan Srinivasan 2016-12-02 53 * # PM_MRK_FAB_RSP_MATCH
> 18201b20 Madhavan Srinivasan 2016-12-02 54 * MMCR1[20:27] = thresh_ctl (FAB_CRESP_MATCH / FAB_TYPE_MATCH)
> 18201b20 Madhavan Srinivasan 2016-12-02 55 * else if pmc == 4 and unit == 0xf and pmcxsel[0:6] == 0b0101001
> 18201b20 Madhavan Srinivasan 2016-12-02 56 * # PM_MRK_FAB_RSP_MATCH_CYC
> 18201b20 Madhavan Srinivasan 2016-12-02 57 * MMCR1[20:27] = thresh_ctl (FAB_CRESP_MATCH / FAB_TYPE_MATCH)
> 18201b20 Madhavan Srinivasan 2016-12-02 58 * else
> 18201b20 Madhavan Srinivasan 2016-12-02 59 * MMCRA[48:55] = thresh_ctl (THRESH START/END)
> 18201b20 Madhavan Srinivasan 2016-12-02 60 *
> 18201b20 Madhavan Srinivasan 2016-12-02 61 * if thresh_sel:
> 18201b20 Madhavan Srinivasan 2016-12-02 62 * MMCRA[45:47] = thresh_sel
> 18201b20 Madhavan Srinivasan 2016-12-02 63 *
> 18201b20 Madhavan Srinivasan 2016-12-02 64 * if thresh_cmp:
> 18201b20 Madhavan Srinivasan 2016-12-02 65 * MMCRA[9:11] = thresh_cmp[0:2]
> 18201b20 Madhavan Srinivasan 2016-12-02 66 * MMCRA[12:18] = thresh_cmp[3:9]
> 18201b20 Madhavan Srinivasan 2016-12-02 67 *
> 18201b20 Madhavan Srinivasan 2016-12-02 68 * if unit == 6 or unit == 7
> 18201b20 Madhavan Srinivasan 2016-12-02 69 * MMCRC[53:55] = cache_sel[1:3] (L2EVENT_SEL)
> 18201b20 Madhavan Srinivasan 2016-12-02 70 * else if unit == 8 or unit == 9:
> 18201b20 Madhavan Srinivasan 2016-12-02 71 * if cache_sel[0] == 0: # L3 bank
> 18201b20 Madhavan Srinivasan 2016-12-02 72 * MMCRC[47:49] = cache_sel[1:3] (L3EVENT_SEL0)
> 18201b20 Madhavan Srinivasan 2016-12-02 73 * else if cache_sel[0] == 1:
> 18201b20 Madhavan Srinivasan 2016-12-02 74 * MMCRC[50:51] = cache_sel[2:3] (L3EVENT_SEL1)
> 18201b20 Madhavan Srinivasan 2016-12-02 75 * else if cache_sel[1]: # L1 event
> 18201b20 Madhavan Srinivasan 2016-12-02 76 * MMCR1[16] = cache_sel[2]
> 18201b20 Madhavan Srinivasan 2016-12-02 77 * MMCR1[17] = cache_sel[3]
> 18201b20 Madhavan Srinivasan 2016-12-02 78 *
> 18201b20 Madhavan Srinivasan 2016-12-02 79 * if mark:
> 18201b20 Madhavan Srinivasan 2016-12-02 80 * MMCRA[63] = 1 (SAMPLE_ENABLE)
> 18201b20 Madhavan Srinivasan 2016-12-02 81 * MMCRA[57:59] = sample[0:2] (RAND_SAMP_ELIG)
> 18201b20 Madhavan Srinivasan 2016-12-02 82 * MMCRA[61:62] = sample[3:4] (RAND_SAMP_MODE)
> 18201b20 Madhavan Srinivasan 2016-12-02 83 *
> 18201b20 Madhavan Srinivasan 2016-12-02 84 * if EBB and BHRB:
> 18201b20 Madhavan Srinivasan 2016-12-02 85 * MMCRA[32:33] = IFM
> 18201b20 Madhavan Srinivasan 2016-12-02 86 *
> 18201b20 Madhavan Srinivasan 2016-12-02 87 * MMCRA[SDAR_MODE] = sm
> 18201b20 Madhavan Srinivasan 2016-12-02 88 */
> 18201b20 Madhavan Srinivasan 2016-12-02 89
> 18201b20 Madhavan Srinivasan 2016-12-02 90 /*
> 8c002dbd Madhavan Srinivasan 2016-06-26 91 * Some power9 event codes.
> 8c002dbd Madhavan Srinivasan 2016-06-26 92 */
> 8c002dbd Madhavan Srinivasan 2016-06-26 93 #define EVENT(_name, _code) _name = _code,
> 8c002dbd Madhavan Srinivasan 2016-06-26 94
> 8c002dbd Madhavan Srinivasan 2016-06-26 95 enum {
> 8c002dbd Madhavan Srinivasan 2016-06-26 96 #include "power9-events-list.h"
> 8c002dbd Madhavan Srinivasan 2016-06-26 97 };
> 8c002dbd Madhavan Srinivasan 2016-06-26 98
> 8c002dbd Madhavan Srinivasan 2016-06-26 99 #undef EVENT
> 8c002dbd Madhavan Srinivasan 2016-06-26 100
> 8c002dbd Madhavan Srinivasan 2016-06-26 101 /* MMCRA IFM bits - POWER9 */
> 8c002dbd Madhavan Srinivasan 2016-06-26 102 #define POWER9_MMCRA_IFM1 0x0000000040000000UL
> 8c002dbd Madhavan Srinivasan 2016-06-26 103 #define POWER9_MMCRA_IFM2 0x0000000080000000UL
> 8c002dbd Madhavan Srinivasan 2016-06-26 104 #define POWER9_MMCRA_IFM3 0x00000000C0000000UL
> 8c002dbd Madhavan Srinivasan 2016-06-26 105
> 60b00025 Madhavan Srinivasan 2016-12-02 106 /* PowerISA v2.07 format attribute structure*/
> 60b00025 Madhavan Srinivasan 2016-12-02 107 extern struct attribute_group isa207_pmu_format_group;
> 60b00025 Madhavan Srinivasan 2016-12-02 108
> f1fb60bf Madhavan Srinivasan 2016-06-26 109 GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC);
> f1fb60bf Madhavan Srinivasan 2016-06-26 110 GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_ICT_NOSLOT_CYC);
> f1fb60bf Madhavan Srinivasan 2016-06-26 111 GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL);
> f1fb60bf Madhavan Srinivasan 2016-06-26 112 GENERIC_EVENT_ATTR(instructions, PM_INST_CMPL);
> f1fb60bf Madhavan Srinivasan 2016-06-26 @113 GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL);
> f1fb60bf Madhavan Srinivasan 2016-06-26 114 GENERIC_EVENT_ATTR(branch-misses, PM_BR_MPRED_CMPL);
> f1fb60bf Madhavan Srinivasan 2016-06-26 115 GENERIC_EVENT_ATTR(cache-references, PM_LD_REF_L1);
> f1fb60bf Madhavan Srinivasan 2016-06-26 116 GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1_FIN);
>
> :::::: The code at line 113 was first introduced by commit
> :::::: f1fb60bfde65fe4c4372d480d1b5d57bdba20367 powerpc/perf: Export Power9 generic and cache events to sysfs
>
> :::::: TO: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
> :::::: CC: Michael Ellerman <mpe@ellerman.id.au>
>
> ---
> 0-DAY kernel test infrastructure Open Source Technology Center
> https://lists.01.org/pipermail/kbuild-all Intel Corporation
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list
@ 2017-01-09 13:30 Madhavan Srinivasan
0 siblings, 0 replies; 7+ messages in thread
From: Madhavan Srinivasan @ 2017-01-09 13:30 UTC (permalink / raw)
To: mpe; +Cc: linuxppc-dev, Madhavan Srinivasan
Fixes:34922527a2bcb ('powerpc/perf: Add power9 event list macros for generic and cache events')
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
---
arch/powerpc/perf/power9-events-list.h | 2 +-
arch/powerpc/perf/power9-pmu.c | 12 ++++++------
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/perf/power9-events-list.h b/arch/powerpc/perf/power9-events-list.h
index 6447dc1c3d89..c529d9e3e245 100644
--- a/arch/powerpc/perf/power9-events-list.h
+++ b/arch/powerpc/perf/power9-events-list.h
@@ -16,7 +16,7 @@ EVENT(PM_CYC, 0x0001e)
EVENT(PM_ICT_NOSLOT_CYC, 0x100f8)
EVENT(PM_CMPLU_STALL, 0x1e054)
EVENT(PM_INST_CMPL, 0x00002)
-EVENT(PM_BRU_CMPL, 0x40060)
+EVENT(PM_BR_CMPL, 0x40060)
EVENT(PM_BR_MPRED_CMPL, 0x400f6)
/* All L1 D cache load references counted at finish, gated by reject */
diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c
index 346010e8d463..9cd36855bdf3 100644
--- a/arch/powerpc/perf/power9-pmu.c
+++ b/arch/powerpc/perf/power9-pmu.c
@@ -110,7 +110,7 @@ GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC);
GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_ICT_NOSLOT_CYC);
GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL);
GENERIC_EVENT_ATTR(instructions, PM_INST_CMPL);
-GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL);
+GENERIC_EVENT_ATTR(branch-instructions, PM_BR_CMPL);
GENERIC_EVENT_ATTR(branch-misses, PM_BR_MPRED_CMPL);
GENERIC_EVENT_ATTR(cache-references, PM_LD_REF_L1);
GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1_FIN);
@@ -128,7 +128,7 @@ CACHE_EVENT_ATTR(LLC-prefetches, PM_L3_PREF_ALL);
CACHE_EVENT_ATTR(LLC-store-misses, PM_L2_ST_MISS);
CACHE_EVENT_ATTR(LLC-stores, PM_L2_ST);
CACHE_EVENT_ATTR(branch-load-misses, PM_BR_MPRED_CMPL);
-CACHE_EVENT_ATTR(branch-loads, PM_BRU_CMPL);
+CACHE_EVENT_ATTR(branch-loads, PM_BR_CMPL);
CACHE_EVENT_ATTR(dTLB-load-misses, PM_DTLB_MISS);
CACHE_EVENT_ATTR(iTLB-load-misses, PM_ITLB_MISS);
@@ -137,7 +137,7 @@ static struct attribute *power9_events_attr[] = {
GENERIC_EVENT_PTR(PM_ICT_NOSLOT_CYC),
GENERIC_EVENT_PTR(PM_CMPLU_STALL),
GENERIC_EVENT_PTR(PM_INST_CMPL),
- GENERIC_EVENT_PTR(PM_BRU_CMPL),
+ GENERIC_EVENT_PTR(PM_BR_CMPL),
GENERIC_EVENT_PTR(PM_BR_MPRED_CMPL),
GENERIC_EVENT_PTR(PM_LD_REF_L1),
GENERIC_EVENT_PTR(PM_LD_MISS_L1_FIN),
@@ -154,7 +154,7 @@ static struct attribute *power9_events_attr[] = {
CACHE_EVENT_PTR(PM_L2_ST_MISS),
CACHE_EVENT_PTR(PM_L2_ST),
CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),
- CACHE_EVENT_PTR(PM_BRU_CMPL),
+ CACHE_EVENT_PTR(PM_BR_CMPL),
CACHE_EVENT_PTR(PM_DTLB_MISS),
CACHE_EVENT_PTR(PM_ITLB_MISS),
NULL
@@ -218,7 +218,7 @@ static int power9_generic_events[] = {
[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = PM_ICT_NOSLOT_CYC,
[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = PM_CMPLU_STALL,
[PERF_COUNT_HW_INSTRUCTIONS] = PM_INST_CMPL,
- [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = PM_BRU_CMPL,
+ [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = PM_BR_CMPL,
[PERF_COUNT_HW_BRANCH_MISSES] = PM_BR_MPRED_CMPL,
[PERF_COUNT_HW_CACHE_REFERENCES] = PM_LD_REF_L1,
[PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1_FIN,
@@ -344,7 +344,7 @@ static int power9_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
},
[ C(BPU) ] = {
[ C(OP_READ) ] = {
- [ C(RESULT_ACCESS) ] = PM_BRU_CMPL,
+ [ C(RESULT_ACCESS) ] = PM_BR_CMPL,
[ C(RESULT_MISS) ] = PM_BR_MPRED_CMPL,
},
[ C(OP_WRITE) ] = {
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-01-09 13:31 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-01-05 11:34 [PATCH 0/2] Cleanup and fix PM_BR_CMPL event code in power9 Madhavan Srinivasan
2017-01-05 11:34 ` [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list Madhavan Srinivasan
2017-01-06 20:41 ` kbuild test robot
2017-01-09 4:37 ` Madhavan Srinivasan
2017-01-06 21:18 ` kbuild test robot
2017-01-05 11:34 ` [PATCH 2/2] powerpc/perf: fix PM_BR_CMPL event code for power9 Madhavan Srinivasan
2017-01-09 13:30 [PATCH 1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list Madhavan Srinivasan
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