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From: Yi Sun <yi.y.sun@linux.intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: wei.liu2@citrix.com, he.chen@linux.intel.com,
	andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
	ian.jackson@eu.citrix.com, mengxu@cis.upenn.edu,
	xen-devel@lists.xenproject.org, chao.p.peng@linux.intel.com
Subject: Re: [PATCH v4 04/24] x86: refactor psr: implement CPU init and free flow.
Date: Thu, 12 Jan 2017 09:07:38 +0800	[thread overview]
Message-ID: <20170112010738.GK7435@yi.y.sun> (raw)
In-Reply-To: <587645BB020000780012F094@prv-mh.provo.novell.com>

On 17-01-11 06:48:27, Jan Beulich wrote:
> >>> On 11.01.17 at 04:14, <yi.y.sun@linux.intel.com> wrote:
> > On 17-01-10 04:45:05, Jan Beulich wrote:
> >> >>> On 14.12.16 at 05:07, <yi.y.sun@linux.intel.com> wrote:
> >> > +/* L3 CAT callback functions implementation. */
> >> > +static void l3_cat_init_feature(unsigned int eax, unsigned int ebx,
> >> > +                                unsigned int ecx, unsigned int edx,
> >> 
> >> This is rather unfortunate naming: How does the reader of this code
> >> know what these values represent, without having to first go look in
> >> the caller?
> >> 
> > Do you mean the 'eax'-'edx'?
> 
> Yes.
> 
> > How about 'eax_register'?
> 
> How would that be any better? Perhaps the best way of making the
> naming obvious would be to use the new cpuid_leaf structure here.
> 
Ok, will consider to assemble them into a structure.

> >> > +    if ( !cpu_has(c, X86_FEATURE_PQE) || c->cpuid_level < PSR_CPUID_LEVEL_CAT )
> >> > +        return;
> >> 
> >> Instead of such a double check, please consider clearing the PQE
> >> feature bit when the maximum CPUID level is too low (which
> >> shouldn't happen anyway).
> >> 
> > Is this the responsibility of psr.c? X86_FEATURE_PQE bit is set by HW. Even the
> > bit is set but CPUID level is low, I think SW would be better to keep it but
> > not clear it. Because it indicates the HW capability. How do you think? 
> 
> What use if keeping the flag if we can't use the feature? And to
> answer your first question - whether that's being done in psr.c,
> cpu/common.c, or cpu/intel.c I don't really care all that much; it
> would certainly feel most natural to go here.
> 
Ok, will consider it.

> >> > +    socket = cpu_to_socket(cpu);
> >> > +    info = socket_info + socket;
> >> > +    if ( info->feat_mask )
> >> > +        return;
> >> > +
> >> > +    spin_lock_init(&info->ref_lock);
> >> > +
> >> > +    cpuid_count(PSR_CPUID_LEVEL_CAT, 0, &eax, &ebx, &ecx, &edx);
> >> > +    if ( ebx & PSR_RESOURCE_TYPE_L3 )
> >> > +    {
> >> > +        cpuid_count(PSR_CPUID_LEVEL_CAT, 1, &eax, &ebx, &ecx, &edx);
> >> > +
> >> > +        feat_tmp = feat_l3_cat;
> >> > +        feat_l3_cat = NULL;
> >> > +        feat_tmp->ops = l3_cat_ops;
> >> > +
> >> > +        feat_tmp->ops.init_feature(eax, ebx, ecx, edx, feat_tmp, info);
> >> 
> >> What's the point of the indirect call here, when you know the
> >> function is l3_cat_init_feature()?
> >> 
> > Hmm, just want to keep the callback function calling style.
> 
> Please don't use indirect calls when you don't need them.
> 
Ok, thanks!

> >> > +static int psr_cpu_prepare(unsigned int cpu)
> >> > +{
> >> > +    return cpu_prepare_work(cpu);
> >> > +}
> >> 
> >> What is this wrapper good for?
> >> 
> > Just keep the old codes.
> 
> Well, you're overhauling the old code anyway (and you're actively
> adding this function here), so - please don't introduce pointless
> wrappers like this. They only complicate anyone following call flow,
> even if just slightly.
> 
Sure, thanks!

> Jan

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  reply	other threads:[~2017-01-12  1:07 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-14  4:07 [PATCH v4 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2016-12-14  4:07 ` [PATCH v4 01/24] docs: create L2 Cache Allocation Technology (CAT) feature document Yi Sun
2016-12-14  4:07 ` [PATCH v4 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2016-12-22 16:03   ` Jan Beulich
2016-12-26  2:28     ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 03/24] x86: refactor psr: implement main data structures Yi Sun
2016-12-22 16:13   ` Jan Beulich
2016-12-26  6:56     ` Yi Sun
2017-01-03  8:00       ` Jan Beulich
2017-01-03  8:49         ` Yi Sun
2017-01-03  9:12           ` Jan Beulich
2017-01-03 10:28             ` Yi Sun
2017-01-03 11:23               ` Jan Beulich
2016-12-14  4:07 ` [PATCH v4 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-01-10 11:45   ` Jan Beulich
2017-01-11  3:14     ` Yi Sun
2017-01-11 13:48       ` Jan Beulich
2017-01-12  1:07         ` Yi Sun [this message]
2016-12-14  4:07 ` [PATCH v4 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-01-10 13:34   ` Jan Beulich
2017-01-11  3:17     ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-01-10 13:46   ` Jan Beulich
2017-01-11  5:13     ` Yi Sun
2017-01-11 13:53       ` Jan Beulich
2017-01-12  1:08         ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-01-10 13:50   ` Jan Beulich
2017-01-11  5:16     ` Yi Sun
2017-01-11 13:54       ` Jan Beulich
2017-01-12  1:09         ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-01-10 14:17   ` Jan Beulich
2017-01-11  5:57     ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-01-10 14:34   ` Jan Beulich
2017-01-11  6:07     ` Yi Sun
2017-01-11 13:57       ` Jan Beulich
2017-01-12  1:17         ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-01-10 14:53   ` Jan Beulich
2017-01-11  6:10     ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 11/24] x86: refactor psr: set value: implement cos id allocation flow Yi Sun
2017-01-10 15:08   ` Jan Beulich
2017-01-11  6:16     ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-01-10 15:15   ` Jan Beulich
2017-01-11  6:22     ` Yi Sun
2017-01-11 14:01       ` Jan Beulich
2017-01-12  1:22         ` Yi Sun
2017-01-12  9:40           ` Jan Beulich
2017-01-12 10:22             ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2016-12-14  4:07 ` [PATCH v4 14/24] x86: refactor psr: implement get hw info " Yi Sun
2016-12-14  4:07 ` [PATCH v4 15/24] x86: refactor psr: implement get value " Yi Sun
2016-12-14  4:07 ` [PATCH v4 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2016-12-14  4:07 ` [PATCH v4 17/24] x86: L2 CAT: implement CPU init and free flow Yi Sun
2016-12-14  4:07 ` [PATCH v4 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2016-12-14  4:07 ` [PATCH v4 19/24] x86: L2 CAT: implement get value flow Yi Sun
2016-12-14  4:08 ` [PATCH v4 20/24] x86: L2 CAT: implement set " Yi Sun
2016-12-14  4:08 ` [PATCH v4 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-01-06 12:04   ` Wei Liu
2017-01-09  1:19     ` Yi Sun
2017-01-09  8:31       ` Jan Beulich
2017-01-09  9:26         ` Wei Liu
2017-01-10  8:00           ` Yi Sun
2017-01-10  8:46             ` Jan Beulich
2017-01-10  9:01               ` Yi Sun
2016-12-14  4:08 ` [PATCH v4 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-01-06 12:04   ` Wei Liu
2017-01-09  1:24     ` Yi Sun
2017-01-09 10:08       ` Wei Liu
2017-01-10  7:47         ` Yi Sun
2016-12-14  4:08 ` [PATCH v4 23/24] tools: L2 CAT: support set " Yi Sun
2017-01-06 12:04   ` Wei Liu
2017-01-09  1:14     ` Yi Sun
2016-12-14  4:08 ` [PATCH v4 24/24] docs: add L2 CAT description in docs Yi Sun
2017-01-06 12:04   ` Wei Liu
2017-01-09  1:25     ` Yi Sun

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