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From: "Jan Beulich" <JBeulich@suse.com>
To: Yi Sun <yi.y.sun@linux.intel.com>
Cc: wei.liu2@citrix.com, he.chen@linux.intel.com,
	andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
	ian.jackson@eu.citrix.com, mengxu@cis.upenn.edu,
	xen-devel@lists.xenproject.org, chao.p.peng@linux.intel.com
Subject: Re: [PATCH v4 09/24] x86: refactor psr: set value: assemble features value array.
Date: Tue, 10 Jan 2017 07:34:00 -0700	[thread overview]
Message-ID: <5874FEE8020000780012EBFA@prv-mh.provo.novell.com> (raw)
In-Reply-To: <1481688484-5093-10-git-send-email-yi.y.sun@linux.intel.com>

>>> On 14.12.16 at 05:07, <yi.y.sun@linux.intel.com> wrote:
> --- a/xen/arch/x86/psr.c
> +++ b/xen/arch/x86/psr.c
> @@ -121,6 +121,35 @@ struct feat_ops {
>      /* get_val is used to get feature COS register value. */
>      bool (*get_val)(const struct feat_node *feat, unsigned int cos,
>                     enum cbm_type type, uint64_t *val);
> +    /*
> +     * get_cos_num is used to get the COS registers amount used by the
> +     * feature for one setting, e.g. CDP uses 2 COSs but CAT uses 1.
> +     */
> +    unsigned int (*get_cos_num)(const struct feat_node *feat);
> +    /*
> +     * get_old_val and set_new_val are a pair of functions called together.
> +     * The caller will traverse all features in the list and call both
> +     * functions for every feature to do below two things:
> +     * 1. get old_cos register value of all supported features and
> +     * 2. set the new value for the feature.
> +     *
> +     * All the values are set into value array according the traversal order,
> +     * meaning the same order of feature list members.
> +     *
> +     * The return value is the amount of entries to skip in the value array
> +     * or error.
> +     * 1 - one entry in value array.
> +     * 2 - two entries in value array, e.g. CDP uses two entries.

Doesn't this match the get_cos_num() return value? Would be nice to
be spelled out (and, where possible, ASSERT()ed).

> @@ -186,6 +215,29 @@ static void free_feature(struct psr_socket_info *info)
>      }
>  }
>  
> +static bool_t psr_check_cbm(unsigned int cbm_len, uint64_t cbm)

bool (and then true/false in the function body)

> +static int l3_cat_set_new_val(uint64_t val[],
> +                              const struct feat_node *feat,
> +                              unsigned int old_cos,
> +                              enum cbm_type type,
> +                              uint64_t m)
> +{
> +    if ( type != PSR_CBM_TYPE_L3 )
> +        /* L3 CAT uses one COS. Skip it. */
> +        return 1;

If this is the wrong type, how can you return 1 (or any positive
value) here? This basically suggests that, as recommended for an
earlier operation already, that you want the type check done in
the caller. Or wait - isn't type not matching an error here, as you
iterate the same list twice in the same order? Which then gets us
back to me mentioning that the set-new-value should really be
done in common code, not in the callbacks; it would really only be
the check (psr_check_cbm() in the L3 case above) which would
require a callback.

Jan


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  reply	other threads:[~2017-01-10 14:34 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-14  4:07 [PATCH v4 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2016-12-14  4:07 ` [PATCH v4 01/24] docs: create L2 Cache Allocation Technology (CAT) feature document Yi Sun
2016-12-14  4:07 ` [PATCH v4 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2016-12-22 16:03   ` Jan Beulich
2016-12-26  2:28     ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 03/24] x86: refactor psr: implement main data structures Yi Sun
2016-12-22 16:13   ` Jan Beulich
2016-12-26  6:56     ` Yi Sun
2017-01-03  8:00       ` Jan Beulich
2017-01-03  8:49         ` Yi Sun
2017-01-03  9:12           ` Jan Beulich
2017-01-03 10:28             ` Yi Sun
2017-01-03 11:23               ` Jan Beulich
2016-12-14  4:07 ` [PATCH v4 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-01-10 11:45   ` Jan Beulich
2017-01-11  3:14     ` Yi Sun
2017-01-11 13:48       ` Jan Beulich
2017-01-12  1:07         ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-01-10 13:34   ` Jan Beulich
2017-01-11  3:17     ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-01-10 13:46   ` Jan Beulich
2017-01-11  5:13     ` Yi Sun
2017-01-11 13:53       ` Jan Beulich
2017-01-12  1:08         ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-01-10 13:50   ` Jan Beulich
2017-01-11  5:16     ` Yi Sun
2017-01-11 13:54       ` Jan Beulich
2017-01-12  1:09         ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-01-10 14:17   ` Jan Beulich
2017-01-11  5:57     ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-01-10 14:34   ` Jan Beulich [this message]
2017-01-11  6:07     ` Yi Sun
2017-01-11 13:57       ` Jan Beulich
2017-01-12  1:17         ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-01-10 14:53   ` Jan Beulich
2017-01-11  6:10     ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 11/24] x86: refactor psr: set value: implement cos id allocation flow Yi Sun
2017-01-10 15:08   ` Jan Beulich
2017-01-11  6:16     ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-01-10 15:15   ` Jan Beulich
2017-01-11  6:22     ` Yi Sun
2017-01-11 14:01       ` Jan Beulich
2017-01-12  1:22         ` Yi Sun
2017-01-12  9:40           ` Jan Beulich
2017-01-12 10:22             ` Yi Sun
2016-12-14  4:07 ` [PATCH v4 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2016-12-14  4:07 ` [PATCH v4 14/24] x86: refactor psr: implement get hw info " Yi Sun
2016-12-14  4:07 ` [PATCH v4 15/24] x86: refactor psr: implement get value " Yi Sun
2016-12-14  4:07 ` [PATCH v4 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2016-12-14  4:07 ` [PATCH v4 17/24] x86: L2 CAT: implement CPU init and free flow Yi Sun
2016-12-14  4:07 ` [PATCH v4 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2016-12-14  4:07 ` [PATCH v4 19/24] x86: L2 CAT: implement get value flow Yi Sun
2016-12-14  4:08 ` [PATCH v4 20/24] x86: L2 CAT: implement set " Yi Sun
2016-12-14  4:08 ` [PATCH v4 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-01-06 12:04   ` Wei Liu
2017-01-09  1:19     ` Yi Sun
2017-01-09  8:31       ` Jan Beulich
2017-01-09  9:26         ` Wei Liu
2017-01-10  8:00           ` Yi Sun
2017-01-10  8:46             ` Jan Beulich
2017-01-10  9:01               ` Yi Sun
2016-12-14  4:08 ` [PATCH v4 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-01-06 12:04   ` Wei Liu
2017-01-09  1:24     ` Yi Sun
2017-01-09 10:08       ` Wei Liu
2017-01-10  7:47         ` Yi Sun
2016-12-14  4:08 ` [PATCH v4 23/24] tools: L2 CAT: support set " Yi Sun
2017-01-06 12:04   ` Wei Liu
2017-01-09  1:14     ` Yi Sun
2016-12-14  4:08 ` [PATCH v4 24/24] docs: add L2 CAT description in docs Yi Sun
2017-01-06 12:04   ` Wei Liu
2017-01-09  1:25     ` Yi Sun

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