All of lore.kernel.org
 help / color / mirror / Atom feed
* [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.11
@ 2017-01-26 10:11 ` Simon Horman
  0 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2017-01-26 10:11 UTC (permalink / raw)
  To: arm
  Cc: linux-renesas-soc, Olof Johansson, Kevin Hilman, Arnd Bergmann,
	linux-arm-kernel, Magnus Damm, Simon Horman

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these second round of Renesas ARM based SoC updates for v4.11.

This pull request is based on the previous round of
such requests, tagged as renesas-soc-for-v4.11,
which you have already pulled.


The following changes since commit 70def3e53694a65c5583fb5f411491a5074bab18:

  ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins() (2017-01-03 10:50:45 +0100)

are available in the git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc2-for-v4.11

for you to fetch changes up to aa7f39d51e33555fc45645c08bc74a74e22b166f:

  ARM: shmobile: rcar-gen2: Add more register documentation (2017-01-25 11:28:28 +0100)

----------------------------------------------------------------
Second Round of Renesas ARM Based SoC Updates for v4.11

* Add more register documentation to R-Car Gen2 PM

----------------------------------------------------------------
Geert Uytterhoeven (1):
      ARM: shmobile: rcar-gen2: Add more register documentation

 arch/arm/mach-shmobile/pm-rcar-gen2.c | 40 +++++++++++++++++++++++++----------
 1 file changed, 29 insertions(+), 11 deletions(-)

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.11
@ 2017-01-26 10:11 ` Simon Horman
  0 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2017-01-26 10:11 UTC (permalink / raw)
  To: linux-arm-kernel

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these second round of Renesas ARM based SoC updates for v4.11.

This pull request is based on the previous round of
such requests, tagged as renesas-soc-for-v4.11,
which you have already pulled.


The following changes since commit 70def3e53694a65c5583fb5f411491a5074bab18:

  ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins() (2017-01-03 10:50:45 +0100)

are available in the git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc2-for-v4.11

for you to fetch changes up to aa7f39d51e33555fc45645c08bc74a74e22b166f:

  ARM: shmobile: rcar-gen2: Add more register documentation (2017-01-25 11:28:28 +0100)

----------------------------------------------------------------
Second Round of Renesas ARM Based SoC Updates for v4.11

* Add more register documentation to R-Car Gen2 PM

----------------------------------------------------------------
Geert Uytterhoeven (1):
      ARM: shmobile: rcar-gen2: Add more register documentation

 arch/arm/mach-shmobile/pm-rcar-gen2.c | 40 +++++++++++++++++++++++++----------
 1 file changed, 29 insertions(+), 11 deletions(-)

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH] ARM: shmobile: rcar-gen2: Add more register documentation
  2017-01-26 10:11 ` Simon Horman
@ 2017-01-26 10:11   ` Simon Horman
  -1 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2017-01-26 10:11 UTC (permalink / raw)
  To: linux-renesas-soc
  Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman

From: Geert Uytterhoeven <geert+renesas@glider.be>

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/pm-rcar-gen2.c | 40 +++++++++++++++++++++++++----------
 1 file changed, 29 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c
index dd9ac366868f..0178da7ace82 100644
--- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -20,14 +20,30 @@
 
 /* RST */
 #define RST		0xe6160000
-#define CA15BAR		0x0020
-#define CA7BAR		0x0030
-#define CA15RESCNT	0x0040
-#define CA7RESCNT	0x0044
+
+#define CA15BAR		0x0020		/* CA15 Boot Address Register */
+#define CA7BAR		0x0030		/* CA7 Boot Address Register */
+#define CA15RESCNT	0x0040		/* CA15 Reset Control Register */
+#define CA7RESCNT	0x0044		/* CA7 Reset Control Register */
+
+/* SYS Boot Address Register */
+#define SBAR_BAREN	BIT(4)		/* SBAR is valid */
+
+/* Reset Control Registers */
+#define CA15RESCNT_CODE	0xa5a50000
+#define CA15RESCNT_CPUS	0xf		/* CPU0-3 */
+#define CA7RESCNT_CODE	0x5a5a0000
+#define CA7RESCNT_CPUS	0xf		/* CPU0-3 */
+
 
 /* On-chip RAM */
 #define ICRAM1		0xe63c0000	/* Inter Connect RAM1 (4 KiB) */
 
+static inline u32 phys_to_sbar(phys_addr_t addr)
+{
+	return (addr >> 8) & 0xfffffc00;
+}
+
 /* SYSC */
 #define SYSCIER 0x0c
 #define SYSCIMR 0x10
@@ -82,22 +98,24 @@ void __init rcar_gen2_pm_init(void)
 
 	/* setup reset vectors */
 	p = ioremap_nocache(RST, 0x63);
-	bar = (boot_vector_addr >> 8) & 0xfffffc00;
+	bar = phys_to_sbar(boot_vector_addr);
 	if (has_a15) {
 		writel_relaxed(bar, p + CA15BAR);
-		writel_relaxed(bar | 0x10, p + CA15BAR);
+		writel_relaxed(bar | SBAR_BAREN, p + CA15BAR);
 
 		/* de-assert reset for CA15 CPUs */
-		writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) |
-				0xa5a50000, p + CA15RESCNT);
+		writel_relaxed((readl_relaxed(p + CA15RESCNT) &
+				~CA15RESCNT_CPUS) | CA15RESCNT_CODE,
+			       p + CA15RESCNT);
 	}
 	if (has_a7) {
 		writel_relaxed(bar, p + CA7BAR);
-		writel_relaxed(bar | 0x10, p + CA7BAR);
+		writel_relaxed(bar | SBAR_BAREN, p + CA7BAR);
 
 		/* de-assert reset for CA7 CPUs */
-		writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) |
-				0x5a5a0000, p + CA7RESCNT);
+		writel_relaxed((readl_relaxed(p + CA7RESCNT) &
+				~CA7RESCNT_CPUS) | CA7RESCNT_CODE,
+			       p + CA7RESCNT);
 	}
 	iounmap(p);
 
-- 
2.7.0.rc3.207.g0ac5344

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH] ARM: shmobile: rcar-gen2: Add more register documentation
@ 2017-01-26 10:11   ` Simon Horman
  0 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2017-01-26 10:11 UTC (permalink / raw)
  To: linux-arm-kernel

From: Geert Uytterhoeven <geert+renesas@glider.be>

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/pm-rcar-gen2.c | 40 +++++++++++++++++++++++++----------
 1 file changed, 29 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c
index dd9ac366868f..0178da7ace82 100644
--- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -20,14 +20,30 @@
 
 /* RST */
 #define RST		0xe6160000
-#define CA15BAR		0x0020
-#define CA7BAR		0x0030
-#define CA15RESCNT	0x0040
-#define CA7RESCNT	0x0044
+
+#define CA15BAR		0x0020		/* CA15 Boot Address Register */
+#define CA7BAR		0x0030		/* CA7 Boot Address Register */
+#define CA15RESCNT	0x0040		/* CA15 Reset Control Register */
+#define CA7RESCNT	0x0044		/* CA7 Reset Control Register */
+
+/* SYS Boot Address Register */
+#define SBAR_BAREN	BIT(4)		/* SBAR is valid */
+
+/* Reset Control Registers */
+#define CA15RESCNT_CODE	0xa5a50000
+#define CA15RESCNT_CPUS	0xf		/* CPU0-3 */
+#define CA7RESCNT_CODE	0x5a5a0000
+#define CA7RESCNT_CPUS	0xf		/* CPU0-3 */
+
 
 /* On-chip RAM */
 #define ICRAM1		0xe63c0000	/* Inter Connect RAM1 (4 KiB) */
 
+static inline u32 phys_to_sbar(phys_addr_t addr)
+{
+	return (addr >> 8) & 0xfffffc00;
+}
+
 /* SYSC */
 #define SYSCIER 0x0c
 #define SYSCIMR 0x10
@@ -82,22 +98,24 @@ void __init rcar_gen2_pm_init(void)
 
 	/* setup reset vectors */
 	p = ioremap_nocache(RST, 0x63);
-	bar = (boot_vector_addr >> 8) & 0xfffffc00;
+	bar = phys_to_sbar(boot_vector_addr);
 	if (has_a15) {
 		writel_relaxed(bar, p + CA15BAR);
-		writel_relaxed(bar | 0x10, p + CA15BAR);
+		writel_relaxed(bar | SBAR_BAREN, p + CA15BAR);
 
 		/* de-assert reset for CA15 CPUs */
-		writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) |
-				0xa5a50000, p + CA15RESCNT);
+		writel_relaxed((readl_relaxed(p + CA15RESCNT) &
+				~CA15RESCNT_CPUS) | CA15RESCNT_CODE,
+			       p + CA15RESCNT);
 	}
 	if (has_a7) {
 		writel_relaxed(bar, p + CA7BAR);
-		writel_relaxed(bar | 0x10, p + CA7BAR);
+		writel_relaxed(bar | SBAR_BAREN, p + CA7BAR);
 
 		/* de-assert reset for CA7 CPUs */
-		writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) |
-				0x5a5a0000, p + CA7RESCNT);
+		writel_relaxed((readl_relaxed(p + CA7RESCNT) &
+				~CA7RESCNT_CPUS) | CA7RESCNT_CODE,
+			       p + CA7RESCNT);
 	}
 	iounmap(p);
 
-- 
2.7.0.rc3.207.g0ac5344

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.11
  2017-01-26 10:11 ` Simon Horman
@ 2017-01-30  4:55   ` Olof Johansson
  -1 siblings, 0 replies; 6+ messages in thread
From: Olof Johansson @ 2017-01-30  4:55 UTC (permalink / raw)
  To: Simon Horman
  Cc: arm, linux-renesas-soc, Kevin Hilman, Arnd Bergmann,
	linux-arm-kernel, Magnus Damm

On Thu, Jan 26, 2017 at 11:11:18AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
> 
> Please consider these second round of Renesas ARM based SoC updates for v4.11.
> 
> This pull request is based on the previous round of
> such requests, tagged as renesas-soc-for-v4.11,
> which you have already pulled.
> 
> 
> The following changes since commit 70def3e53694a65c5583fb5f411491a5074bab18:
> 
>   ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins() (2017-01-03 10:50:45 +0100)
> 
> are available in the git repository at:
> 
>   https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc2-for-v4.11
> 
> for you to fetch changes up to aa7f39d51e33555fc45645c08bc74a74e22b166f:
> 
>   ARM: shmobile: rcar-gen2: Add more register documentation (2017-01-25 11:28:28 +0100)
> 
> ----------------------------------------------------------------
> Second Round of Renesas ARM Based SoC Updates for v4.11
> 
> * Add more register documentation to R-Car Gen2 PM
> 
> ----------------------------------------------------------------
> Geert Uytterhoeven (1):
>       ARM: shmobile: rcar-gen2: Add more register documentation
> 
>  arch/arm/mach-shmobile/pm-rcar-gen2.c | 40 +++++++++++++++++++++++++----------
>  1 file changed, 29 insertions(+), 11 deletions(-)

Merged, thanks!


-Olof

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.11
@ 2017-01-30  4:55   ` Olof Johansson
  0 siblings, 0 replies; 6+ messages in thread
From: Olof Johansson @ 2017-01-30  4:55 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Jan 26, 2017 at 11:11:18AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
> 
> Please consider these second round of Renesas ARM based SoC updates for v4.11.
> 
> This pull request is based on the previous round of
> such requests, tagged as renesas-soc-for-v4.11,
> which you have already pulled.
> 
> 
> The following changes since commit 70def3e53694a65c5583fb5f411491a5074bab18:
> 
>   ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins() (2017-01-03 10:50:45 +0100)
> 
> are available in the git repository at:
> 
>   https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc2-for-v4.11
> 
> for you to fetch changes up to aa7f39d51e33555fc45645c08bc74a74e22b166f:
> 
>   ARM: shmobile: rcar-gen2: Add more register documentation (2017-01-25 11:28:28 +0100)
> 
> ----------------------------------------------------------------
> Second Round of Renesas ARM Based SoC Updates for v4.11
> 
> * Add more register documentation to R-Car Gen2 PM
> 
> ----------------------------------------------------------------
> Geert Uytterhoeven (1):
>       ARM: shmobile: rcar-gen2: Add more register documentation
> 
>  arch/arm/mach-shmobile/pm-rcar-gen2.c | 40 +++++++++++++++++++++++++----------
>  1 file changed, 29 insertions(+), 11 deletions(-)

Merged, thanks!


-Olof

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2017-01-30  5:35 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-01-26 10:11 [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.11 Simon Horman
2017-01-26 10:11 ` Simon Horman
2017-01-26 10:11 ` [PATCH] ARM: shmobile: rcar-gen2: Add more register documentation Simon Horman
2017-01-26 10:11   ` Simon Horman
2017-01-30  4:55 ` [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.11 Olof Johansson
2017-01-30  4:55   ` Olof Johansson

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.