* [PATCH 12/22 v2] ARM: dts: add top-level DT bindings for Cortina Gemini
@ 2017-02-01 19:46 ` Linus Walleij
0 siblings, 0 replies; 6+ messages in thread
From: Linus Walleij @ 2017-02-01 19:46 UTC (permalink / raw)
To: Hans Ulli Kroll, Florian Fainelli,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Rob Herring
Cc: Janos Laube, Paulius Zaleckas,
openwrt-devel-p3rKhJxN3npAfugRpC6u6w, Linus Walleij,
devicetree-u79uwXL29TY76Z2rM5mHXA
This adds the top level SoC bindings for Cortina systems Gemini
platforms.
Cc: Janos Laube <janos.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Paulius Zaleckas <paulius.zaleckas-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Hans Ulli Kroll <ulli.kroll-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
Cc: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Signed-off-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
ChangeLog v1->v2:
- Rename required property "intcon" to "interrupt-controller"
- Elaborate a bit on the SoC origins
- Put the example DTS SoC nodes in a soc {} node
---
Documentation/devicetree/bindings/arm/gemini.txt | 81 ++++++++++++++++++++++++
1 file changed, 81 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/gemini.txt
diff --git a/Documentation/devicetree/bindings/arm/gemini.txt b/Documentation/devicetree/bindings/arm/gemini.txt
new file mode 100644
index 000000000000..eb788302d3e9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/gemini.txt
@@ -0,0 +1,81 @@
+Cortina systems Gemini platforms
+
+The Gemini SoC is the project name for an ARMv4 FA525-based SoC originally
+produced by Storlink Semiconductor around 2005. The company was renamed
+later renamed Storm Semiconductor. The chip product name is Storlink SL3516.
+It was derived from earlier products from Storm named SL3316 (Centroid) and
+SL3512.
+
+Storm Semiconductor was acquired by Cortina Systems in 2008 and the SoC was
+produced and used for NAS and similar usecases. In 2014 Cortina Systems was
+in turn acquired by Inphi, who seem to have discontinued this product family.
+
+Required properties (in root node):
+ compatible = "cortina,gemini";
+
+Required nodes:
+
+- syscon: the root node must have a system controller node pointing to the
+ global control registers, with the compatible string
+ "cortina,gemini-syscon", "syscon";
+
+- timer: the root node must have a timer node pointing to the SoC timer
+ block, with the compatible string "cortina,gemini-timer"
+ See: clocksource/cortina,gemini-timer.txt
+
+- interrup-controller: the root node must have an interrupt controller
+ node pointing to the SoC interrupt controller block, with the compatible
+ string "cortina,gemini-interrupt-controller"
+ See interrupt-controller/cortina,gemini-interrupt-controller.txt
+
+Example:
+
+/ {
+ model = "Foo Gemini Machine";
+ compatible = "cortina,gemini";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x8000000>;
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&intcon>;
+
+ syscon: syscon@40000000 {
+ compatible = "cortina,gemini-syscon", "syscon";
+ reg = <0x40000000 0x1000>;
+ };
+
+ uart0: serial@42000000 {
+ compatible = "ns16550a";
+ reg = <0x42000000 0x100>;
+ clock-frequency = <48000000>;
+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ };
+
+ timer@43000000 {
+ compatible = "cortina,gemini-timer";
+ reg = <0x43000000 0x1000>;
+ interrupt-parent = <&intcon>;
+ interrupts = <14 IRQ_TYPE_EDGE_RISING>, /* Timer 1 */
+ <15 IRQ_TYPE_EDGE_RISING>, /* Timer 2 */
+ <16 IRQ_TYPE_EDGE_RISING>; /* Timer 3 */
+ syscon = <&syscon>;
+ };
+
+ intcon: interrupt-controller@48000000 {
+ compatible = "cortina,gemini-interrupt-controller";
+ reg = <0x48000000 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+};
--
2.9.3
--
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 12/22 v2] ARM: dts: add top-level DT bindings for Cortina Gemini
@ 2017-02-01 19:46 ` Linus Walleij
0 siblings, 0 replies; 6+ messages in thread
From: Linus Walleij @ 2017-02-01 19:46 UTC (permalink / raw)
To: linux-arm-kernel
This adds the top level SoC bindings for Cortina systems Gemini
platforms.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: devicetree at vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Rename required property "intcon" to "interrupt-controller"
- Elaborate a bit on the SoC origins
- Put the example DTS SoC nodes in a soc {} node
---
Documentation/devicetree/bindings/arm/gemini.txt | 81 ++++++++++++++++++++++++
1 file changed, 81 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/gemini.txt
diff --git a/Documentation/devicetree/bindings/arm/gemini.txt b/Documentation/devicetree/bindings/arm/gemini.txt
new file mode 100644
index 000000000000..eb788302d3e9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/gemini.txt
@@ -0,0 +1,81 @@
+Cortina systems Gemini platforms
+
+The Gemini SoC is the project name for an ARMv4 FA525-based SoC originally
+produced by Storlink Semiconductor around 2005. The company was renamed
+later renamed Storm Semiconductor. The chip product name is Storlink SL3516.
+It was derived from earlier products from Storm named SL3316 (Centroid) and
+SL3512.
+
+Storm Semiconductor was acquired by Cortina Systems in 2008 and the SoC was
+produced and used for NAS and similar usecases. In 2014 Cortina Systems was
+in turn acquired by Inphi, who seem to have discontinued this product family.
+
+Required properties (in root node):
+ compatible = "cortina,gemini";
+
+Required nodes:
+
+- syscon: the root node must have a system controller node pointing to the
+ global control registers, with the compatible string
+ "cortina,gemini-syscon", "syscon";
+
+- timer: the root node must have a timer node pointing to the SoC timer
+ block, with the compatible string "cortina,gemini-timer"
+ See: clocksource/cortina,gemini-timer.txt
+
+- interrup-controller: the root node must have an interrupt controller
+ node pointing to the SoC interrupt controller block, with the compatible
+ string "cortina,gemini-interrupt-controller"
+ See interrupt-controller/cortina,gemini-interrupt-controller.txt
+
+Example:
+
+/ {
+ model = "Foo Gemini Machine";
+ compatible = "cortina,gemini";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x8000000>;
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&intcon>;
+
+ syscon: syscon at 40000000 {
+ compatible = "cortina,gemini-syscon", "syscon";
+ reg = <0x40000000 0x1000>;
+ };
+
+ uart0: serial at 42000000 {
+ compatible = "ns16550a";
+ reg = <0x42000000 0x100>;
+ clock-frequency = <48000000>;
+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ };
+
+ timer at 43000000 {
+ compatible = "cortina,gemini-timer";
+ reg = <0x43000000 0x1000>;
+ interrupt-parent = <&intcon>;
+ interrupts = <14 IRQ_TYPE_EDGE_RISING>, /* Timer 1 */
+ <15 IRQ_TYPE_EDGE_RISING>, /* Timer 2 */
+ <16 IRQ_TYPE_EDGE_RISING>; /* Timer 3 */
+ syscon = <&syscon>;
+ };
+
+ intcon: interrupt-controller at 48000000 {
+ compatible = "cortina,gemini-interrupt-controller";
+ reg = <0x48000000 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+};
--
2.9.3
^ permalink raw reply related [flat|nested] 6+ messages in thread[parent not found: <20170201194632.18455-1-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>]
* Re: [PATCH 12/22 v2] ARM: dts: add top-level DT bindings for Cortina Gemini
2017-02-01 19:46 ` Linus Walleij
@ 2017-02-01 20:04 ` Alexandre Belloni
-1 siblings, 0 replies; 6+ messages in thread
From: Alexandre Belloni @ 2017-02-01 20:04 UTC (permalink / raw)
To: Linus Walleij
Cc: Hans Ulli Kroll, Florian Fainelli,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Rob Herring,
openwrt-devel-p3rKhJxN3npAfugRpC6u6w,
devicetree-u79uwXL29TY76Z2rM5mHXA, Janos Laube, Paulius Zaleckas
On 01/02/2017 at 20:46:32 +0100, Linus Walleij wrote:
> This adds the top level SoC bindings for Cortina systems Gemini
> platforms.
>
> Cc: Janos Laube <janos.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Cc: Paulius Zaleckas <paulius.zaleckas-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Cc: Hans Ulli Kroll <ulli.kroll-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
> Cc: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> ---
> ChangeLog v1->v2:
> - Rename required property "intcon" to "interrupt-controller"
> - Elaborate a bit on the SoC origins
> - Put the example DTS SoC nodes in a soc {} node
> ---
> Documentation/devicetree/bindings/arm/gemini.txt | 81 ++++++++++++++++++++++++
> 1 file changed, 81 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/gemini.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/gemini.txt b/Documentation/devicetree/bindings/arm/gemini.txt
> new file mode 100644
> index 000000000000..eb788302d3e9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/gemini.txt
> @@ -0,0 +1,81 @@
> +Cortina systems Gemini platforms
> +
> +The Gemini SoC is the project name for an ARMv4 FA525-based SoC originally
> +produced by Storlink Semiconductor around 2005. The company was renamed
> +later renamed Storm Semiconductor. The chip product name is Storlink SL3516.
> +It was derived from earlier products from Storm named SL3316 (Centroid) and
> +SL3512.
> +
> +Storm Semiconductor was acquired by Cortina Systems in 2008 and the SoC was
> +produced and used for NAS and similar usecases. In 2014 Cortina Systems was
> +in turn acquired by Inphi, who seem to have discontinued this product family.
> +
> +Required properties (in root node):
> + compatible = "cortina,gemini";
> +
> +Required nodes:
> +
> +- syscon: the root node must have a system controller node pointing to the
> + global control registers, with the compatible string
> + "cortina,gemini-syscon", "syscon";
> +
> +- timer: the root node must have a timer node pointing to the SoC timer
> + block, with the compatible string "cortina,gemini-timer"
> + See: clocksource/cortina,gemini-timer.txt
> +
> +- interrup-controller: the root node must have an interrupt controller
interrupt-controller maybe ? ;)
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 12/22 v2] ARM: dts: add top-level DT bindings for Cortina Gemini
@ 2017-02-01 20:04 ` Alexandre Belloni
0 siblings, 0 replies; 6+ messages in thread
From: Alexandre Belloni @ 2017-02-01 20:04 UTC (permalink / raw)
To: linux-arm-kernel
On 01/02/2017 at 20:46:32 +0100, Linus Walleij wrote:
> This adds the top level SoC bindings for Cortina systems Gemini
> platforms.
>
> Cc: Janos Laube <janos.dev@gmail.com>
> Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Cc: devicetree at vger.kernel.org
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ChangeLog v1->v2:
> - Rename required property "intcon" to "interrupt-controller"
> - Elaborate a bit on the SoC origins
> - Put the example DTS SoC nodes in a soc {} node
> ---
> Documentation/devicetree/bindings/arm/gemini.txt | 81 ++++++++++++++++++++++++
> 1 file changed, 81 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/gemini.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/gemini.txt b/Documentation/devicetree/bindings/arm/gemini.txt
> new file mode 100644
> index 000000000000..eb788302d3e9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/gemini.txt
> @@ -0,0 +1,81 @@
> +Cortina systems Gemini platforms
> +
> +The Gemini SoC is the project name for an ARMv4 FA525-based SoC originally
> +produced by Storlink Semiconductor around 2005. The company was renamed
> +later renamed Storm Semiconductor. The chip product name is Storlink SL3516.
> +It was derived from earlier products from Storm named SL3316 (Centroid) and
> +SL3512.
> +
> +Storm Semiconductor was acquired by Cortina Systems in 2008 and the SoC was
> +produced and used for NAS and similar usecases. In 2014 Cortina Systems was
> +in turn acquired by Inphi, who seem to have discontinued this product family.
> +
> +Required properties (in root node):
> + compatible = "cortina,gemini";
> +
> +Required nodes:
> +
> +- syscon: the root node must have a system controller node pointing to the
> + global control registers, with the compatible string
> + "cortina,gemini-syscon", "syscon";
> +
> +- timer: the root node must have a timer node pointing to the SoC timer
> + block, with the compatible string "cortina,gemini-timer"
> + See: clocksource/cortina,gemini-timer.txt
> +
> +- interrup-controller: the root node must have an interrupt controller
interrupt-controller maybe ? ;)
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 12/22 v2] ARM: dts: add top-level DT bindings for Cortina Gemini
2017-02-01 19:46 ` Linus Walleij
@ 2017-02-07 18:40 ` Rob Herring
-1 siblings, 0 replies; 6+ messages in thread
From: Rob Herring @ 2017-02-07 18:40 UTC (permalink / raw)
To: Linus Walleij
Cc: openwrt-devel, devicetree, Florian Fainelli, Paulius Zaleckas,
Hans Ulli Kroll, Janos Laube, linux-arm-kernel
On Wed, Feb 01, 2017 at 08:46:32PM +0100, Linus Walleij wrote:
> This adds the top level SoC bindings for Cortina systems Gemini
> platforms.
>
> Cc: Janos Laube <janos.dev@gmail.com>
> Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ChangeLog v1->v2:
> - Rename required property "intcon" to "interrupt-controller"
> - Elaborate a bit on the SoC origins
> - Put the example DTS SoC nodes in a soc {} node
> ---
> Documentation/devicetree/bindings/arm/gemini.txt | 81 ++++++++++++++++++++++++
> 1 file changed, 81 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/gemini.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/gemini.txt b/Documentation/devicetree/bindings/arm/gemini.txt
> new file mode 100644
> index 000000000000..eb788302d3e9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/gemini.txt
> @@ -0,0 +1,81 @@
> +Cortina systems Gemini platforms
> +
> +The Gemini SoC is the project name for an ARMv4 FA525-based SoC originally
> +produced by Storlink Semiconductor around 2005. The company was renamed
> +later renamed Storm Semiconductor. The chip product name is Storlink SL3516.
> +It was derived from earlier products from Storm named SL3316 (Centroid) and
> +SL3512.
> +
> +Storm Semiconductor was acquired by Cortina Systems in 2008 and the SoC was
> +produced and used for NAS and similar usecases. In 2014 Cortina Systems was
> +in turn acquired by Inphi, who seem to have discontinued this product family.
> +
> +Required properties (in root node):
> + compatible = "cortina,gemini";
> +
> +Required nodes:
> +
> +- syscon: the root node must have a system controller node pointing to the
the soc bus node...
> + global control registers, with the compatible string
> + "cortina,gemini-syscon", "syscon";
> +
> +- timer: the root node must have a timer node pointing to the SoC timer
ditto
> + block, with the compatible string "cortina,gemini-timer"
> + See: clocksource/cortina,gemini-timer.txt
> +
> +- interrup-controller: the root node must have an interrupt controller
> + node pointing to the SoC interrupt controller block, with the compatible
> + string "cortina,gemini-interrupt-controller"
> + See interrupt-controller/cortina,gemini-interrupt-controller.txt
> +
> +Example:
> +
> +/ {
> + model = "Foo Gemini Machine";
> + compatible = "cortina,gemini";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x8000000>;
> + };
> +
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + compatible = "simple-bus";
> + interrupt-parent = <&intcon>;
> +
> + syscon: syscon@40000000 {
> + compatible = "cortina,gemini-syscon", "syscon";
> + reg = <0x40000000 0x1000>;
> + };
> +
> + uart0: serial@42000000 {
> + compatible = "ns16550a";
> + reg = <0x42000000 0x100>;
> + clock-frequency = <48000000>;
> + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
> + reg-shift = <2>;
> + };
> +
> + timer@43000000 {
> + compatible = "cortina,gemini-timer";
> + reg = <0x43000000 0x1000>;
> + interrupt-parent = <&intcon>;
> + interrupts = <14 IRQ_TYPE_EDGE_RISING>, /* Timer 1 */
> + <15 IRQ_TYPE_EDGE_RISING>, /* Timer 2 */
> + <16 IRQ_TYPE_EDGE_RISING>; /* Timer 3 */
> + syscon = <&syscon>;
> + };
> +
> + intcon: interrupt-controller@48000000 {
> + compatible = "cortina,gemini-interrupt-controller";
> + reg = <0x48000000 0x1000>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +};
> --
> 2.9.3
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 12/22 v2] ARM: dts: add top-level DT bindings for Cortina Gemini
@ 2017-02-07 18:40 ` Rob Herring
0 siblings, 0 replies; 6+ messages in thread
From: Rob Herring @ 2017-02-07 18:40 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Feb 01, 2017 at 08:46:32PM +0100, Linus Walleij wrote:
> This adds the top level SoC bindings for Cortina systems Gemini
> platforms.
>
> Cc: Janos Laube <janos.dev@gmail.com>
> Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Cc: devicetree at vger.kernel.org
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ChangeLog v1->v2:
> - Rename required property "intcon" to "interrupt-controller"
> - Elaborate a bit on the SoC origins
> - Put the example DTS SoC nodes in a soc {} node
> ---
> Documentation/devicetree/bindings/arm/gemini.txt | 81 ++++++++++++++++++++++++
> 1 file changed, 81 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/gemini.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/gemini.txt b/Documentation/devicetree/bindings/arm/gemini.txt
> new file mode 100644
> index 000000000000..eb788302d3e9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/gemini.txt
> @@ -0,0 +1,81 @@
> +Cortina systems Gemini platforms
> +
> +The Gemini SoC is the project name for an ARMv4 FA525-based SoC originally
> +produced by Storlink Semiconductor around 2005. The company was renamed
> +later renamed Storm Semiconductor. The chip product name is Storlink SL3516.
> +It was derived from earlier products from Storm named SL3316 (Centroid) and
> +SL3512.
> +
> +Storm Semiconductor was acquired by Cortina Systems in 2008 and the SoC was
> +produced and used for NAS and similar usecases. In 2014 Cortina Systems was
> +in turn acquired by Inphi, who seem to have discontinued this product family.
> +
> +Required properties (in root node):
> + compatible = "cortina,gemini";
> +
> +Required nodes:
> +
> +- syscon: the root node must have a system controller node pointing to the
the soc bus node...
> + global control registers, with the compatible string
> + "cortina,gemini-syscon", "syscon";
> +
> +- timer: the root node must have a timer node pointing to the SoC timer
ditto
> + block, with the compatible string "cortina,gemini-timer"
> + See: clocksource/cortina,gemini-timer.txt
> +
> +- interrup-controller: the root node must have an interrupt controller
> + node pointing to the SoC interrupt controller block, with the compatible
> + string "cortina,gemini-interrupt-controller"
> + See interrupt-controller/cortina,gemini-interrupt-controller.txt
> +
> +Example:
> +
> +/ {
> + model = "Foo Gemini Machine";
> + compatible = "cortina,gemini";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x8000000>;
> + };
> +
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + compatible = "simple-bus";
> + interrupt-parent = <&intcon>;
> +
> + syscon: syscon at 40000000 {
> + compatible = "cortina,gemini-syscon", "syscon";
> + reg = <0x40000000 0x1000>;
> + };
> +
> + uart0: serial at 42000000 {
> + compatible = "ns16550a";
> + reg = <0x42000000 0x100>;
> + clock-frequency = <48000000>;
> + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
> + reg-shift = <2>;
> + };
> +
> + timer at 43000000 {
> + compatible = "cortina,gemini-timer";
> + reg = <0x43000000 0x1000>;
> + interrupt-parent = <&intcon>;
> + interrupts = <14 IRQ_TYPE_EDGE_RISING>, /* Timer 1 */
> + <15 IRQ_TYPE_EDGE_RISING>, /* Timer 2 */
> + <16 IRQ_TYPE_EDGE_RISING>; /* Timer 3 */
> + syscon = <&syscon>;
> + };
> +
> + intcon: interrupt-controller at 48000000 {
> + compatible = "cortina,gemini-interrupt-controller";
> + reg = <0x48000000 0x1000>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +};
> --
> 2.9.3
>
> --
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-02-07 18:40 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-02-01 19:46 [PATCH 12/22 v2] ARM: dts: add top-level DT bindings for Cortina Gemini Linus Walleij
2017-02-01 19:46 ` Linus Walleij
[not found] ` <20170201194632.18455-1-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-02-01 20:04 ` Alexandre Belloni
2017-02-01 20:04 ` Alexandre Belloni
2017-02-07 18:40 ` Rob Herring
2017-02-07 18:40 ` Rob Herring
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