[PATCH 12/12] MIPS: PCI: Fix IP27 for the PCI_PROBE_ONLY case

[Joshua Kinard <kumba@gentoo.org>]

From: Joshua Kinard <kumba@gentoo.org>

Commit 046136170a56 changed things such that setting PCI_PROBE_ONLY
will now explicitly claim PCI resources instead of skipping the sizing
of the bridges and assigning resources.  This is okay for IP30's PCI
code, which doesn't use physical address space to access I/O resources.

However, IP27 is completely different in this regard.  Instead of using
ioremapped addresses for I/O, IP27 has a dedicated address range,
0x92xxxxxxxxxxxxxx, that is used for all I/O access.  Since this is
uncached physical address space, the generic MIPS PCI code will not
probe it correctly and thus, the original behavior of PCI_PROBE_ONLY
needs to be restored only for the IP27 platform to bypass this logic
and have working PCI, at least for the IO6/IO6G board that houses the
base devices, until a better solution is found.

Fixes: 046136170a56 ("MIPS/PCI: Claim bus resources on PCI_PROBE_ONLY set-ups")
Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 arch/mips/pci/pci-bridge.c | 15 +++++++++++++++
 arch/mips/pci/pci-legacy.c | 15 +++++++++++++++
 2 files changed, 30 insertions(+)

diff --git a/arch/mips/pci/pci-bridge.c b/arch/mips/pci/pci-bridge.c
index 9df13ce313b5..af7073dba36b 100644
--- a/arch/mips/pci/pci-bridge.c
+++ b/arch/mips/pci/pci-bridge.c
@@ -62,6 +62,21 @@ bridge_probe(nasid_t nasid, int widget_id, int masterwid)
 	unsigned long offset = NODE_OFFSET(nasid);
 	struct bridge_controller *bc;
 
+#ifdef CONFIG_SGI_IP27
+	/*
+	 * Commit 046136170a56 changed things such that setting PCI_PROBE_ONLY
+	 * will now explicitly claim PCI resources instead of skipping the
+	 * sizing of the bridges and assigning resources.  This is okay for
+	 * the IP30's PCI code, which uses normal, ioremapped addresses to
+	 * do I/O.  IP27, however, is different and uses a hardware-specific
+	 * address range of 0x92xxxxxxxxxxxxxx for all I/O access.  As such,
+	 * the generic MIPS PCI code will not probe correctly and thus make
+	 * PCI on IP27 completely unusable.  Thus, we must restore the
+	 * original logic only for IP27 until a better solution can be found.
+	 */
+	pci_set_flags(PCI_PROBE_ONLY);
+#endif
+
 	/* XXX: Temporary until the IP27 "mega update". */
 	bc = &bridges[num_bridges];
 	if (!num_bridges)
diff --git a/arch/mips/pci/pci-legacy.c b/arch/mips/pci/pci-legacy.c
index 68268bbb15b8..5590af4f367f 100644
--- a/arch/mips/pci/pci-legacy.c
+++ b/arch/mips/pci/pci-legacy.c
@@ -107,6 +107,20 @@ static void pcibios_scanbus(struct pci_controller *hose)
 		need_domain_info = 1;
 	}
 
+#ifdef CONFIG_SGI_IP27
+	/*
+	 * Commit 046136170a56 changed things such that setting PCI_PROBE_ONLY
+	 * will now explicitly claim PCI resources instead of skipping the
+	 * sizing of the bridges and assigning resources.  This is okay for
+	 * the IP30's PCI code, which uses normal, ioremapped addresses to
+	 * do I/O.  IP27, however, is different and uses a hardware-specific
+	 * address range of 0x92xxxxxxxxxxxxxx for all I/O access.  As such,
+	 * the generic MIPS PCI code will not probe correctly and thus make
+	 * PCI on IP27 completely unusable.  Thus, we must restore the
+	 * original logic only for IP27 until a better solution can be found.
+	 */
+	if (!pci_has_flag(PCI_PROBE_ONLY)) {
+#else
 	/*
 	 * We insert PCI resources into the iomem_resource and
 	 * ioport_resource trees in either pci_bus_claim_resources()
@@ -115,6 +129,7 @@ static void pcibios_scanbus(struct pci_controller *hose)
 	if (pci_has_flag(PCI_PROBE_ONLY)) {
 		pci_bus_claim_resources(bus);
 	} else {
+#endif
 		pci_bus_size_bridges(bus);
 		pci_bus_assign_resources(bus);
 	}
-- 
2.11.1