* [PATCH] drm/i915/dp: Reset the link params on HPD/connected boot/resume
@ 2017-02-08 0:54 Manasi Navare
2017-02-08 1:23 ` ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Manasi Navare @ 2017-02-08 0:54 UTC (permalink / raw)
To: intel-gfx
The max link parameters should be set/reset only on HPD or
connected boot case or on system resume.
Add a flag reset_link_params to intel_dp to decide when
to reset the max link parameters. This prevents the parameters
from getting reset/overwritten through all other
connector->funcs->detect() calls. This is important when link
training fails and the max link params are modified to the
lower fallback values.
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 16 ++++++++++++----
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 21924cf..ed28788b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4624,11 +4624,15 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)
yesno(intel_dp_source_supports_hbr2(intel_dp)),
yesno(drm_dp_tps3_supported(intel_dp->dpcd)));
- /* Set the max lane count for sink */
- intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
+ if (intel_dp->reset_link_params) {
+ /* Set the max lane count for sink */
+ intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
- /* Set the max link BW for sink */
- intel_dp->max_sink_link_bw = intel_dp_max_link_bw(intel_dp);
+ /* Set the max link BW for sink */
+ intel_dp->max_sink_link_bw = intel_dp_max_link_bw(intel_dp);
+
+ intel_dp->reset_link_params = false;
+ }
intel_dp_print_rates(intel_dp);
@@ -5010,6 +5014,8 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
if (lspcon->active)
lspcon_resume(lspcon);
+ intel_dp->reset_link_params = true;
+
pps_lock(intel_dp);
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
@@ -5079,6 +5085,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
long_hpd ? "long" : "short");
if (long_hpd) {
+ intel_dp->reset_link_params = true;
intel_dp->detect_done = false;
return IRQ_NONE;
}
@@ -5920,6 +5927,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
intel_dig_port->max_lanes, port_name(port)))
return false;
+ intel_dp->reset_link_params = true;
intel_dp->pps_pipe = INVALID_PIPE;
intel_dp->active_pipe = INVALID_PIPE;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index fbe5c72..f579776 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -923,6 +923,7 @@ struct intel_dp {
bool has_audio;
bool detect_done;
bool channel_eq_status;
+ bool reset_link_params;
enum hdmi_force_audio force_audio;
bool limited_color_range;
bool color_range_auto;
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/dp: Reset the link params on HPD/connected boot/resume
2017-02-08 0:54 [PATCH] drm/i915/dp: Reset the link params on HPD/connected boot/resume Manasi Navare
@ 2017-02-08 1:23 ` Patchwork
2017-02-13 18:06 ` [PATCH] " Manasi Navare
2017-02-14 19:08 ` Ville Syrjälä
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-02-08 1:23 UTC (permalink / raw)
To: Navare, Manasi D; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp: Reset the link params on HPD/connected boot/resume
URL : https://patchwork.freedesktop.org/series/19277/
State : success
== Summary ==
Series 19277v1 drm/i915/dp: Reset the link params on HPD/connected boot/resume
https://patchwork.freedesktop.org/api/1.0/series/19277/revisions/1/mbox/
fi-bdw-5557u total:252 pass:238 dwarn:0 dfail:0 fail:0 skip:14
fi-bsw-n3050 total:252 pass:213 dwarn:0 dfail:0 fail:0 skip:39
fi-bxt-j4205 total:252 pass:230 dwarn:0 dfail:0 fail:0 skip:22
fi-bxt-t5700 total:83 pass:70 dwarn:0 dfail:0 fail:0 skip:12
fi-byt-j1900 total:252 pass:225 dwarn:0 dfail:0 fail:0 skip:27
fi-byt-n2820 total:252 pass:221 dwarn:0 dfail:0 fail:0 skip:31
fi-hsw-4770 total:252 pass:233 dwarn:0 dfail:0 fail:0 skip:19
fi-hsw-4770r total:252 pass:233 dwarn:0 dfail:0 fail:0 skip:19
fi-ilk-650 total:252 pass:199 dwarn:0 dfail:0 fail:0 skip:53
fi-ivb-3520m total:252 pass:231 dwarn:0 dfail:0 fail:0 skip:21
fi-ivb-3770 total:252 pass:231 dwarn:0 dfail:0 fail:0 skip:21
fi-kbl-7500u total:252 pass:229 dwarn:0 dfail:0 fail:2 skip:21
fi-skl-6260u total:252 pass:239 dwarn:0 dfail:0 fail:0 skip:13
fi-skl-6700hq total:252 pass:232 dwarn:0 dfail:0 fail:0 skip:20
fi-skl-6700k total:252 pass:227 dwarn:4 dfail:0 fail:0 skip:21
fi-skl-6770hq total:252 pass:239 dwarn:0 dfail:0 fail:0 skip:13
fi-snb-2520m total:252 pass:221 dwarn:0 dfail:0 fail:0 skip:31
fi-snb-2600 total:252 pass:220 dwarn:0 dfail:0 fail:0 skip:32
7f1b128ee8d8cdd07a558d77e914dd99cc641b0f drm-tip: 2017y-02m-07d-21h-44m-07s UTC integration manifest
24e13a9 drm/i915/dp: Reset the link params on HPD/connected boot/resume
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3732/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/dp: Reset the link params on HPD/connected boot/resume
2017-02-08 0:54 [PATCH] drm/i915/dp: Reset the link params on HPD/connected boot/resume Manasi Navare
2017-02-08 1:23 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-02-13 18:06 ` Manasi Navare
2017-02-14 19:08 ` Ville Syrjälä
2 siblings, 0 replies; 6+ messages in thread
From: Manasi Navare @ 2017-02-13 18:06 UTC (permalink / raw)
To: intel-gfx, ville.syrjala
Hi Ville,
I implemented this based on our IRC discussion on resetting the link params
only on HPD and not on every long pulse function call. This will
avoid them getting reset during the fill_modes call which is exactly what
is required duirng the link training fallback tow ork correctly.
Could you please take a look at this when you get a chance and let me know
if anything else is required.
Regards
Manasi
On Tue, Feb 07, 2017 at 04:54:11PM -0800, Manasi Navare wrote:
> The max link parameters should be set/reset only on HPD or
> connected boot case or on system resume.
>
> Add a flag reset_link_params to intel_dp to decide when
> to reset the max link parameters. This prevents the parameters
> from getting reset/overwritten through all other
> connector->funcs->detect() calls. This is important when link
> training fails and the max link params are modified to the
> lower fallback values.
>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 16 ++++++++++++----
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 2 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 21924cf..ed28788b 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4624,11 +4624,15 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)
> yesno(intel_dp_source_supports_hbr2(intel_dp)),
> yesno(drm_dp_tps3_supported(intel_dp->dpcd)));
>
> - /* Set the max lane count for sink */
> - intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
> + if (intel_dp->reset_link_params) {
> + /* Set the max lane count for sink */
> + intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
>
> - /* Set the max link BW for sink */
> - intel_dp->max_sink_link_bw = intel_dp_max_link_bw(intel_dp);
> + /* Set the max link BW for sink */
> + intel_dp->max_sink_link_bw = intel_dp_max_link_bw(intel_dp);
> +
> + intel_dp->reset_link_params = false;
> + }
>
> intel_dp_print_rates(intel_dp);
>
> @@ -5010,6 +5014,8 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
> if (lspcon->active)
> lspcon_resume(lspcon);
>
> + intel_dp->reset_link_params = true;
> +
> pps_lock(intel_dp);
>
> if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> @@ -5079,6 +5085,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
> long_hpd ? "long" : "short");
>
> if (long_hpd) {
> + intel_dp->reset_link_params = true;
> intel_dp->detect_done = false;
> return IRQ_NONE;
> }
> @@ -5920,6 +5927,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> intel_dig_port->max_lanes, port_name(port)))
> return false;
>
> + intel_dp->reset_link_params = true;
> intel_dp->pps_pipe = INVALID_PIPE;
> intel_dp->active_pipe = INVALID_PIPE;
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index fbe5c72..f579776 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -923,6 +923,7 @@ struct intel_dp {
> bool has_audio;
> bool detect_done;
> bool channel_eq_status;
> + bool reset_link_params;
> enum hdmi_force_audio force_audio;
> bool limited_color_range;
> bool color_range_auto;
> --
> 2.1.4
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/dp: Reset the link params on HPD/connected boot/resume
2017-02-08 0:54 [PATCH] drm/i915/dp: Reset the link params on HPD/connected boot/resume Manasi Navare
2017-02-08 1:23 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-02-13 18:06 ` [PATCH] " Manasi Navare
@ 2017-02-14 19:08 ` Ville Syrjälä
2017-02-14 19:25 ` Manasi Navare
2 siblings, 1 reply; 6+ messages in thread
From: Ville Syrjälä @ 2017-02-14 19:08 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
On Tue, Feb 07, 2017 at 04:54:11PM -0800, Manasi Navare wrote:
> The max link parameters should be set/reset only on HPD or
> connected boot case or on system resume.
>
> Add a flag reset_link_params to intel_dp to decide when
> to reset the max link parameters. This prevents the parameters
> from getting reset/overwritten through all other
> connector->funcs->detect() calls. This is important when link
> training fails and the max link params are modified to the
> lower fallback values.
>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Looks all right to me. Though I suppose this conflicts with Jani's
changes?
Anyways
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 16 ++++++++++++----
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 2 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 21924cf..ed28788b 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4624,11 +4624,15 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)
> yesno(intel_dp_source_supports_hbr2(intel_dp)),
> yesno(drm_dp_tps3_supported(intel_dp->dpcd)));
>
> - /* Set the max lane count for sink */
> - intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
> + if (intel_dp->reset_link_params) {
> + /* Set the max lane count for sink */
> + intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
>
> - /* Set the max link BW for sink */
> - intel_dp->max_sink_link_bw = intel_dp_max_link_bw(intel_dp);
> + /* Set the max link BW for sink */
> + intel_dp->max_sink_link_bw = intel_dp_max_link_bw(intel_dp);
> +
> + intel_dp->reset_link_params = false;
> + }
>
> intel_dp_print_rates(intel_dp);
>
> @@ -5010,6 +5014,8 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
> if (lspcon->active)
> lspcon_resume(lspcon);
>
> + intel_dp->reset_link_params = true;
> +
> pps_lock(intel_dp);
>
> if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> @@ -5079,6 +5085,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
> long_hpd ? "long" : "short");
>
> if (long_hpd) {
> + intel_dp->reset_link_params = true;
> intel_dp->detect_done = false;
> return IRQ_NONE;
> }
> @@ -5920,6 +5927,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> intel_dig_port->max_lanes, port_name(port)))
> return false;
>
> + intel_dp->reset_link_params = true;
> intel_dp->pps_pipe = INVALID_PIPE;
> intel_dp->active_pipe = INVALID_PIPE;
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index fbe5c72..f579776 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -923,6 +923,7 @@ struct intel_dp {
> bool has_audio;
> bool detect_done;
> bool channel_eq_status;
> + bool reset_link_params;
> enum hdmi_force_audio force_audio;
> bool limited_color_range;
> bool color_range_auto;
> --
> 2.1.4
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/dp: Reset the link params on HPD/connected boot/resume
2017-02-14 19:08 ` Ville Syrjälä
@ 2017-02-14 19:25 ` Manasi Navare
2017-02-15 15:27 ` Jani Nikula
0 siblings, 1 reply; 6+ messages in thread
From: Manasi Navare @ 2017-02-14 19:25 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Tue, Feb 14, 2017 at 09:08:25PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 07, 2017 at 04:54:11PM -0800, Manasi Navare wrote:
> > The max link parameters should be set/reset only on HPD or
> > connected boot case or on system resume.
> >
> > Add a flag reset_link_params to intel_dp to decide when
> > to reset the max link parameters. This prevents the parameters
> > from getting reset/overwritten through all other
> > connector->funcs->detect() calls. This is important when link
> > training fails and the max link params are modified to the
> > lower fallback values.
> >
> > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
>
> Looks all right to me. Though I suppose this conflicts with Jani's
> changes?
>
> Anyways
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
Thanks for the review.
With Jani's changes only the name changes to max_link_rate and max_link_lane_count.
But the logic remains the same.
I have tested this on top of Jani's patches and it works great.
If this gets merged, Jani's patch will have to be rebased on top of this else
vice versa if Jani's patches get merged first.
Regards
Manasi
> > ---
> > drivers/gpu/drm/i915/intel_dp.c | 16 ++++++++++++----
> > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > 2 files changed, 13 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 21924cf..ed28788b 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -4624,11 +4624,15 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)
> > yesno(intel_dp_source_supports_hbr2(intel_dp)),
> > yesno(drm_dp_tps3_supported(intel_dp->dpcd)));
> >
> > - /* Set the max lane count for sink */
> > - intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
> > + if (intel_dp->reset_link_params) {
> > + /* Set the max lane count for sink */
> > + intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
> >
> > - /* Set the max link BW for sink */
> > - intel_dp->max_sink_link_bw = intel_dp_max_link_bw(intel_dp);
> > + /* Set the max link BW for sink */
> > + intel_dp->max_sink_link_bw = intel_dp_max_link_bw(intel_dp);
> > +
> > + intel_dp->reset_link_params = false;
> > + }
> >
> > intel_dp_print_rates(intel_dp);
> >
> > @@ -5010,6 +5014,8 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
> > if (lspcon->active)
> > lspcon_resume(lspcon);
> >
> > + intel_dp->reset_link_params = true;
> > +
> > pps_lock(intel_dp);
> >
> > if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> > @@ -5079,6 +5085,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
> > long_hpd ? "long" : "short");
> >
> > if (long_hpd) {
> > + intel_dp->reset_link_params = true;
> > intel_dp->detect_done = false;
> > return IRQ_NONE;
> > }
> > @@ -5920,6 +5927,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> > intel_dig_port->max_lanes, port_name(port)))
> > return false;
> >
> > + intel_dp->reset_link_params = true;
> > intel_dp->pps_pipe = INVALID_PIPE;
> > intel_dp->active_pipe = INVALID_PIPE;
> >
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index fbe5c72..f579776 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -923,6 +923,7 @@ struct intel_dp {
> > bool has_audio;
> > bool detect_done;
> > bool channel_eq_status;
> > + bool reset_link_params;
> > enum hdmi_force_audio force_audio;
> > bool limited_color_range;
> > bool color_range_auto;
> > --
> > 2.1.4
>
> --
> Ville Syrjälä
> Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/dp: Reset the link params on HPD/connected boot/resume
2017-02-14 19:25 ` Manasi Navare
@ 2017-02-15 15:27 ` Jani Nikula
0 siblings, 0 replies; 6+ messages in thread
From: Jani Nikula @ 2017-02-15 15:27 UTC (permalink / raw)
To: Manasi Navare, Ville Syrjälä; +Cc: intel-gfx
On Tue, 14 Feb 2017, Manasi Navare <manasi.d.navare@intel.com> wrote:
> On Tue, Feb 14, 2017 at 09:08:25PM +0200, Ville Syrjälä wrote:
>> On Tue, Feb 07, 2017 at 04:54:11PM -0800, Manasi Navare wrote:
>> > The max link parameters should be set/reset only on HPD or
>> > connected boot case or on system resume.
>> >
>> > Add a flag reset_link_params to intel_dp to decide when
>> > to reset the max link parameters. This prevents the parameters
>> > from getting reset/overwritten through all other
>> > connector->funcs->detect() calls. This is important when link
>> > training fails and the max link params are modified to the
>> > lower fallback values.
>> >
>> > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
>>
>> Looks all right to me. Though I suppose this conflicts with Jani's
>> changes?
>>
>> Anyways
>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>
> Thanks for the review.
> With Jani's changes only the name changes to max_link_rate and max_link_lane_count.
> But the logic remains the same.
> I have tested this on top of Jani's patches and it works great.
> If this gets merged, Jani's patch will have to be rebased on top of this else
> vice versa if Jani's patches get merged first.
Pushed to drm-intel-next-queued, thanks for the patch and review. I'll
need to rebase my stuff on top.
BR,
Jani.
>
> Regards
> Manasi
>> > ---
>> > drivers/gpu/drm/i915/intel_dp.c | 16 ++++++++++++----
>> > drivers/gpu/drm/i915/intel_drv.h | 1 +
>> > 2 files changed, 13 insertions(+), 4 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> > index 21924cf..ed28788b 100644
>> > --- a/drivers/gpu/drm/i915/intel_dp.c
>> > +++ b/drivers/gpu/drm/i915/intel_dp.c
>> > @@ -4624,11 +4624,15 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)
>> > yesno(intel_dp_source_supports_hbr2(intel_dp)),
>> > yesno(drm_dp_tps3_supported(intel_dp->dpcd)));
>> >
>> > - /* Set the max lane count for sink */
>> > - intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
>> > + if (intel_dp->reset_link_params) {
>> > + /* Set the max lane count for sink */
>> > + intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
>> >
>> > - /* Set the max link BW for sink */
>> > - intel_dp->max_sink_link_bw = intel_dp_max_link_bw(intel_dp);
>> > + /* Set the max link BW for sink */
>> > + intel_dp->max_sink_link_bw = intel_dp_max_link_bw(intel_dp);
>> > +
>> > + intel_dp->reset_link_params = false;
>> > + }
>> >
>> > intel_dp_print_rates(intel_dp);
>> >
>> > @@ -5010,6 +5014,8 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
>> > if (lspcon->active)
>> > lspcon_resume(lspcon);
>> >
>> > + intel_dp->reset_link_params = true;
>> > +
>> > pps_lock(intel_dp);
>> >
>> > if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>> > @@ -5079,6 +5085,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
>> > long_hpd ? "long" : "short");
>> >
>> > if (long_hpd) {
>> > + intel_dp->reset_link_params = true;
>> > intel_dp->detect_done = false;
>> > return IRQ_NONE;
>> > }
>> > @@ -5920,6 +5927,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
>> > intel_dig_port->max_lanes, port_name(port)))
>> > return false;
>> >
>> > + intel_dp->reset_link_params = true;
>> > intel_dp->pps_pipe = INVALID_PIPE;
>> > intel_dp->active_pipe = INVALID_PIPE;
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>> > index fbe5c72..f579776 100644
>> > --- a/drivers/gpu/drm/i915/intel_drv.h
>> > +++ b/drivers/gpu/drm/i915/intel_drv.h
>> > @@ -923,6 +923,7 @@ struct intel_dp {
>> > bool has_audio;
>> > bool detect_done;
>> > bool channel_eq_status;
>> > + bool reset_link_params;
>> > enum hdmi_force_audio force_audio;
>> > bool limited_color_range;
>> > bool color_range_auto;
>> > --
>> > 2.1.4
>>
>> --
>> Ville Syrjälä
>> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-02-15 15:27 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-02-08 0:54 [PATCH] drm/i915/dp: Reset the link params on HPD/connected boot/resume Manasi Navare
2017-02-08 1:23 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-02-13 18:06 ` [PATCH] " Manasi Navare
2017-02-14 19:08 ` Ville Syrjälä
2017-02-14 19:25 ` Manasi Navare
2017-02-15 15:27 ` Jani Nikula
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.