* [PATCH v2] MIPS: Fix protected_cache(e)_op() for microMIPS
@ 2017-02-09 14:04 ` James Hogan
0 siblings, 0 replies; 6+ messages in thread
From: James Hogan @ 2017-02-09 14:04 UTC (permalink / raw)
To: Ralf Baechle; +Cc: Paul Burton, James Hogan, linux-mips, Maciej W. Rozycki
From: Paul Burton <paul.burton@imgtec.com>
When building for microMIPS we need to ensure that the assembler always
knows that there is code at the target of a branch or jump. Commit
7170bdc77755 ("MIPS: Add return errors to protected cache ops")
introduced a fixup path to protected_cache(e)_op() which does not meet
this requirement. The fixup path jumps to the "2" label but the .section
pseudo-op immediately following it causes the label to be marked as
data. Linking then fails with:
mips-img-linux-gnu-ld: arch/mips/mm/c-r4k.o: .fixup+0x0: Unsupported
jump between ISA modes; consider recompiling with interlinking
enabled.
Fix this by declaring that "2" labels code using the .insn directive.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Fixes: 7170bdc77755 ("MIPS: Add return errors to protected cache ops")
Cc: linux-mips@linux-mips.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: "Maciej W. Rozycki" <macro@imgtec.com>
---
Ralf: This fixes microMIPS build since a patch that is already merged
into kvm/next. I was going to send you a pull request for those patches
anyway, so it probably makes sense if I just append to that branch first
and let the fix get upstream via the MIPS tree.
Changes in v2:
- Correct description, its the .section, not any following assembly
which triggers the issue (Maciej)
---
arch/mips/include/asm/r4kcache.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index 7227c158cbf8..55fd94e6cd0b 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -154,7 +154,8 @@ static inline void flush_scache_line(unsigned long addr)
" .set noreorder \n" \
" .set "MIPS_ISA_ARCH_LEVEL" \n" \
"1: cache %1, (%2) \n" \
- "2: .set pop \n" \
+ "2: .insn \n" \
+ " .set pop \n" \
" .section .fixup,\"ax\" \n" \
"3: li %0, %3 \n" \
" j 2b \n" \
@@ -177,7 +178,8 @@ static inline void flush_scache_line(unsigned long addr)
" .set mips0 \n" \
" .set eva \n" \
"1: cachee %1, (%2) \n" \
- "2: .set pop \n" \
+ "2: .insn \n" \
+ " .set pop \n" \
" .section .fixup,\"ax\" \n" \
"3: li %0, %3 \n" \
" j 2b \n" \
--
2.11.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2] MIPS: Fix protected_cache(e)_op() for microMIPS
@ 2017-02-09 14:04 ` James Hogan
0 siblings, 0 replies; 6+ messages in thread
From: James Hogan @ 2017-02-09 14:04 UTC (permalink / raw)
To: Ralf Baechle; +Cc: Paul Burton, James Hogan, linux-mips, Maciej W. Rozycki
From: Paul Burton <paul.burton@imgtec.com>
When building for microMIPS we need to ensure that the assembler always
knows that there is code at the target of a branch or jump. Commit
7170bdc77755 ("MIPS: Add return errors to protected cache ops")
introduced a fixup path to protected_cache(e)_op() which does not meet
this requirement. The fixup path jumps to the "2" label but the .section
pseudo-op immediately following it causes the label to be marked as
data. Linking then fails with:
mips-img-linux-gnu-ld: arch/mips/mm/c-r4k.o: .fixup+0x0: Unsupported
jump between ISA modes; consider recompiling with interlinking
enabled.
Fix this by declaring that "2" labels code using the .insn directive.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Fixes: 7170bdc77755 ("MIPS: Add return errors to protected cache ops")
Cc: linux-mips@linux-mips.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: "Maciej W. Rozycki" <macro@imgtec.com>
---
Ralf: This fixes microMIPS build since a patch that is already merged
into kvm/next. I was going to send you a pull request for those patches
anyway, so it probably makes sense if I just append to that branch first
and let the fix get upstream via the MIPS tree.
Changes in v2:
- Correct description, its the .section, not any following assembly
which triggers the issue (Maciej)
---
arch/mips/include/asm/r4kcache.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index 7227c158cbf8..55fd94e6cd0b 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -154,7 +154,8 @@ static inline void flush_scache_line(unsigned long addr)
" .set noreorder \n" \
" .set "MIPS_ISA_ARCH_LEVEL" \n" \
"1: cache %1, (%2) \n" \
- "2: .set pop \n" \
+ "2: .insn \n" \
+ " .set pop \n" \
" .section .fixup,\"ax\" \n" \
"3: li %0, %3 \n" \
" j 2b \n" \
@@ -177,7 +178,8 @@ static inline void flush_scache_line(unsigned long addr)
" .set mips0 \n" \
" .set eva \n" \
"1: cachee %1, (%2) \n" \
- "2: .set pop \n" \
+ "2: .insn \n" \
+ " .set pop \n" \
" .section .fixup,\"ax\" \n" \
"3: li %0, %3 \n" \
" j 2b \n" \
--
2.11.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2] MIPS: Fix protected_cache(e)_op() for microMIPS
@ 2017-02-09 17:28 ` Maciej W. Rozycki
0 siblings, 0 replies; 6+ messages in thread
From: Maciej W. Rozycki @ 2017-02-09 17:28 UTC (permalink / raw)
To: James Hogan; +Cc: Ralf Baechle, Paul Burton, linux-mips
On Thu, 9 Feb 2017, James Hogan wrote:
> Ralf: This fixes microMIPS build since a patch that is already merged
> into kvm/next. I was going to send you a pull request for those patches
> anyway, so it probably makes sense if I just append to that branch first
> and let the fix get upstream via the MIPS tree.
>
> Changes in v2:
> - Correct description, its the .section, not any following assembly
> which triggers the issue (Maciej)
Reviewed-by: Maciej W. Rozycki <macro@imgtec.com>
Maciej
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] MIPS: Fix protected_cache(e)_op() for microMIPS
@ 2017-02-09 17:28 ` Maciej W. Rozycki
0 siblings, 0 replies; 6+ messages in thread
From: Maciej W. Rozycki @ 2017-02-09 17:28 UTC (permalink / raw)
To: James Hogan; +Cc: Ralf Baechle, Paul Burton, linux-mips
On Thu, 9 Feb 2017, James Hogan wrote:
> Ralf: This fixes microMIPS build since a patch that is already merged
> into kvm/next. I was going to send you a pull request for those patches
> anyway, so it probably makes sense if I just append to that branch first
> and let the fix get upstream via the MIPS tree.
>
> Changes in v2:
> - Correct description, its the .section, not any following assembly
> which triggers the issue (Maciej)
Reviewed-by: Maciej W. Rozycki <macro@imgtec.com>
Maciej
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] MIPS: Fix protected_cache(e)_op() for microMIPS
@ 2017-02-09 18:34 ` James Hogan
0 siblings, 0 replies; 6+ messages in thread
From: James Hogan @ 2017-02-09 18:34 UTC (permalink / raw)
To: Maciej W. Rozycki; +Cc: Ralf Baechle, Paul Burton, linux-mips
[-- Attachment #1: Type: text/plain, Size: 629 bytes --]
On Thu, Feb 09, 2017 at 05:28:39PM +0000, Maciej W. Rozycki wrote:
> On Thu, 9 Feb 2017, James Hogan wrote:
>
> > Ralf: This fixes microMIPS build since a patch that is already merged
> > into kvm/next. I was going to send you a pull request for those patches
> > anyway, so it probably makes sense if I just append to that branch first
> > and let the fix get upstream via the MIPS tree.
> >
> > Changes in v2:
> > - Correct description, its the .section, not any following assembly
> > which triggers the issue (Maciej)
>
> Reviewed-by: Maciej W. Rozycki <macro@imgtec.com>
Thanks Maciej,
Cheers
James
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] MIPS: Fix protected_cache(e)_op() for microMIPS
@ 2017-02-09 18:34 ` James Hogan
0 siblings, 0 replies; 6+ messages in thread
From: James Hogan @ 2017-02-09 18:34 UTC (permalink / raw)
To: Maciej W. Rozycki; +Cc: Ralf Baechle, Paul Burton, linux-mips
[-- Attachment #1: Type: text/plain, Size: 629 bytes --]
On Thu, Feb 09, 2017 at 05:28:39PM +0000, Maciej W. Rozycki wrote:
> On Thu, 9 Feb 2017, James Hogan wrote:
>
> > Ralf: This fixes microMIPS build since a patch that is already merged
> > into kvm/next. I was going to send you a pull request for those patches
> > anyway, so it probably makes sense if I just append to that branch first
> > and let the fix get upstream via the MIPS tree.
> >
> > Changes in v2:
> > - Correct description, its the .section, not any following assembly
> > which triggers the issue (Maciej)
>
> Reviewed-by: Maciej W. Rozycki <macro@imgtec.com>
Thanks Maciej,
Cheers
James
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-02-09 18:34 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2017-02-09 14:04 [PATCH v2] MIPS: Fix protected_cache(e)_op() for microMIPS James Hogan
2017-02-09 14:04 ` James Hogan
2017-02-09 17:28 ` Maciej W. Rozycki
2017-02-09 17:28 ` Maciej W. Rozycki
2017-02-09 18:34 ` James Hogan
2017-02-09 18:34 ` James Hogan
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