From: Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> To: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: "arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" <arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>, Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>, "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> Subject: Re: [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation Date: Sat, 11 Feb 2017 16:05:02 +0000 [thread overview] Message-ID: <20170211160501.GA2794@localhost> (raw) In-Reply-To: <CAL_JsqLaLnzFzQbGVpxGRFjkjSEM7mmGMd+xJ_urwcX5Jq9L+w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> On Fri, Feb 10, 2017 at 11:32:29AM -0600, Rob Herring wrote: > On Fri, Feb 10, 2017 at 9:07 AM, Jayachandran C > <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> wrote: > > On Fri, Feb 10, 2017 at 08:55:31AM -0600, Rob Herring wrote: > >> On Thu, Feb 9, 2017 at 1:13 PM, Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> wrote: > >> > Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family. > >> > The the SoC will use the ID "cavium,thunderx2-cn9900". > >> > > >> > Add documentation entry for the "cavium,thunder2" cpu core as well. > >> > > >> > Signed-off-by: Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> > >> > --- > >> > > >> > v3->v4 > >> > Documentation updates to reflect changes in device tree. > >> > > >> > Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++ > >> > Documentation/devicetree/bindings/arm/cpus.txt | 1 + > >> > 2 files changed, 9 insertions(+) > >> > create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt > >> > > >> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt > >> > new file mode 100644 > >> > index 0000000..dc5dd65 > >> > --- /dev/null > >> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt > >> > @@ -0,0 +1,8 @@ > >> > +Cavium ThunderX2 CN99XX platform tree bindings > >> > +---------------------------------------------- > >> > + > >> > +Boards with Cavium ThunderX2 CN99XX SoC shall have the root property: > >> > + compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc"; > >> > + > >> > +These SoC uses the "cavium,thunder2" core which will be compatible > >> > +with "brcm,vulcan". > >> > diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt > >> > index a1bcfee..74f0b23 100644 > >> > --- a/Documentation/devicetree/bindings/arm/cpus.txt > >> > +++ b/Documentation/devicetree/bindings/arm/cpus.txt > >> > @@ -169,6 +169,7 @@ nodes to be present and contain the properties described below. > >> > "brcm,brahma-b15" > >> > "brcm,vulcan" > >> > "cavium,thunder" > >> > + "cavium,thunder2" > >> > >> Is this the same as brcm,vulcan? > > > > It will have a different CPU ID, with different implementer and part num, > > but compatible with "brcm,vulcan". In the ThunderX2 dtsi file (once > > ARCH_VULCAN goes away), we want to be compatable = "cavium,thunder2", with > > maybe "brcm,vulcan" after that. > > Okay, new ID registers is good enough reason. I'd just let brcm,vulcan > die though I have no idea how many Broadcom systems there are out in > the wild (and ones that you care about DT on). This is not an issue. Broadcom did not take the chip into production, and the eval systems are at the new habitat :) > Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Thanks, JC. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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From: jnair@caviumnetworks.com (Jayachandran C) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation Date: Sat, 11 Feb 2017 16:05:02 +0000 [thread overview] Message-ID: <20170211160501.GA2794@localhost> (raw) In-Reply-To: <CAL_JsqLaLnzFzQbGVpxGRFjkjSEM7mmGMd+xJ_urwcX5Jq9L+w@mail.gmail.com> On Fri, Feb 10, 2017 at 11:32:29AM -0600, Rob Herring wrote: > On Fri, Feb 10, 2017 at 9:07 AM, Jayachandran C > <jnair@caviumnetworks.com> wrote: > > On Fri, Feb 10, 2017 at 08:55:31AM -0600, Rob Herring wrote: > >> On Thu, Feb 9, 2017 at 1:13 PM, Jayachandran C <jnair@caviumnetworks.com> wrote: > >> > Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family. > >> > The the SoC will use the ID "cavium,thunderx2-cn9900". > >> > > >> > Add documentation entry for the "cavium,thunder2" cpu core as well. > >> > > >> > Signed-off-by: Jayachandran C <jnair@caviumnetworks.com> > >> > --- > >> > > >> > v3->v4 > >> > Documentation updates to reflect changes in device tree. > >> > > >> > Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++ > >> > Documentation/devicetree/bindings/arm/cpus.txt | 1 + > >> > 2 files changed, 9 insertions(+) > >> > create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt > >> > > >> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt > >> > new file mode 100644 > >> > index 0000000..dc5dd65 > >> > --- /dev/null > >> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt > >> > @@ -0,0 +1,8 @@ > >> > +Cavium ThunderX2 CN99XX platform tree bindings > >> > +---------------------------------------------- > >> > + > >> > +Boards with Cavium ThunderX2 CN99XX SoC shall have the root property: > >> > + compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc"; > >> > + > >> > +These SoC uses the "cavium,thunder2" core which will be compatible > >> > +with "brcm,vulcan". > >> > diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt > >> > index a1bcfee..74f0b23 100644 > >> > --- a/Documentation/devicetree/bindings/arm/cpus.txt > >> > +++ b/Documentation/devicetree/bindings/arm/cpus.txt > >> > @@ -169,6 +169,7 @@ nodes to be present and contain the properties described below. > >> > "brcm,brahma-b15" > >> > "brcm,vulcan" > >> > "cavium,thunder" > >> > + "cavium,thunder2" > >> > >> Is this the same as brcm,vulcan? > > > > It will have a different CPU ID, with different implementer and part num, > > but compatible with "brcm,vulcan". In the ThunderX2 dtsi file (once > > ARCH_VULCAN goes away), we want to be compatable = "cavium,thunder2", with > > maybe "brcm,vulcan" after that. > > Okay, new ID registers is good enough reason. I'd just let brcm,vulcan > die though I have no idea how many Broadcom systems there are out in > the wild (and ones that you care about DT on). This is not an issue. Broadcom did not take the chip into production, and the eval systems are at the new habitat :) > Acked-by: Rob Herring <robh@kernel.org> Thanks, JC.
next prev parent reply other threads:[~2017-02-11 16:05 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-02-07 21:19 [PATCH v3 0/5] Add Cavium ARCH_THUNDER2 platform Jayachandran C 2017-02-07 21:19 ` Jayachandran C 2017-02-07 21:19 ` [PATCH v3 1/5] arm64: add THUNDER2 processor family Jayachandran C 2017-02-07 21:19 ` Jayachandran C 2017-02-07 21:19 ` [PATCH v3 2/5] MAINTAINERS: Add Cavium ThunderX2 entry Jayachandran C 2017-02-07 21:19 ` Jayachandran C 2017-02-07 21:19 ` [PATCH v3 3/5] arm64: dts: add device tree for ARCH_THUNDER2 Jayachandran C 2017-02-07 21:19 ` Jayachandran C [not found] ` <1486502399-2950-1-git-send-email-jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> 2017-02-07 21:19 ` [PATCH v3 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation Jayachandran C 2017-02-07 21:19 ` Jayachandran C [not found] ` <1486502399-2950-5-git-send-email-jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> 2017-02-07 22:35 ` Rob Herring 2017-02-07 22:35 ` Rob Herring [not found] ` <CAL_Jsq+i2evzVnQKf3qYMYJVZ=ecdSQObGy8CMn7aMoxBi_PTg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2017-02-08 5:32 ` Jayachandran C 2017-02-08 5:32 ` Jayachandran C 2017-02-08 8:42 ` Arnd Bergmann 2017-02-08 8:42 ` Arnd Bergmann [not found] ` <CAK8P3a07eo0htv_y6H_aHvAaeo5two3vQTaySuFXpG+dzYguUQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2017-02-09 19:05 ` Jayachandran C 2017-02-09 19:05 ` Jayachandran C 2017-02-09 19:12 ` [PATCH v4 3/5] arm64: dts: add device tree for ARCH_THUNDER2 Jayachandran C 2017-02-09 19:12 ` Jayachandran C 2017-02-09 19:13 ` [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation Jayachandran C 2017-02-09 19:13 ` Jayachandran C 2017-02-10 14:55 ` Rob Herring 2017-02-10 14:55 ` Rob Herring [not found] ` <CAL_JsqKm-c6D_fki_TsRYKH3aGoC5GE7n0DazNi7P268aj-93g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2017-02-10 15:07 ` Jayachandran C 2017-02-10 15:07 ` Jayachandran C 2017-02-10 17:32 ` Rob Herring 2017-02-10 17:32 ` Rob Herring [not found] ` <CAL_JsqLaLnzFzQbGVpxGRFjkjSEM7mmGMd+xJ_urwcX5Jq9L+w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2017-02-11 16:05 ` Jayachandran C [this message] 2017-02-11 16:05 ` Jayachandran C 2017-02-07 21:19 ` [PATCH v3 5/5] arm64: add ARCH_THUNDER2 to defconfig Jayachandran C 2017-02-07 21:19 ` Jayachandran C
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