[CI 1/4] drm/i915: Assert all sg are initialised in fake_dma_object for selftests

[CI 1/4] drm/i915: Assert all sg are initialised in fake_dma_object for selftests

[Chris Wilson]

Double check that we allocated the right amount of scatterlist elements
for our obj->size.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
---
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index e23753181720..2b7a108f7745 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -62,12 +62,14 @@ fake_get_pages(struct drm_i915_gem_object *obj)
 	for (sg = pages->sgl; sg; sg = sg_next(sg)) {
 		unsigned long len = min_t(typeof(rem), rem, BIT(31));
 
+		GEM_BUG_ON(!len);
 		sg_set_page(sg, pfn_to_page(PFN_BIAS), len, 0);
 		sg_dma_address(sg) = page_to_phys(sg_page(sg));
 		sg_dma_len(sg) = len;
 
 		rem -= len;
 	}
+	GEM_BUG_ON(rem);
 
 	obj->mm.madv = I915_MADV_DONTNEED;
 	return pages;
-- 
2.11.0

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[CI 2/4] drm/i915: Assert we do not overflow 4lvl page directories

[Chris Wilson]

Before looking up the page directory entry, check we are still within
bounds.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index c0e1ece6be77..3fb5ff421a52 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -831,6 +831,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
 	gen8_pte_t *vaddr;
 	bool ret;
 
+	GEM_BUG_ON(pdpe >= I915_PDPES_PER_PDP(vm));
 	pd = pdp->page_directory[pdpe];
 	vaddr = kmap_atomic_px(pd->page_table[pde]);
 	do {
@@ -855,8 +856,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
 					break;
 				}
 
-				GEM_BUG_ON(!i915_vm_is_48bit(&ppgtt->base) &&
-					   pdpe >= GEN8_LEGACY_PDPES);
+				GEM_BUG_ON(pdpe >= I915_PDPES_PER_PDP(vm));
 				pd = pdp->page_directory[pdpe];
 				pde = 0;
 			}
@@ -905,7 +905,7 @@ static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
 
 	while (gen8_ppgtt_insert_pte_entries(ppgtt, pdps[pml4e++], &iter,
 					     start, cache_level))
-		;
+		GEM_BUG_ON(pml4e >= GEN8_PML4ES_PER_PML4);
 }
 
 static void gen8_free_page_tables(struct i915_address_space *vm,
-- 
2.11.0

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[CI 3/4] drm/i915: Sanity check the vma->node prior to binding into the GTT

[Chris Wilson]

We rely on the VMA being allocated inside the drm_mm and for its allotted
node being large enough to accommodate all the vma->pages.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
---
 drivers/gpu/drm/i915/i915_vma.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index c1abfe7b48ea..6e9eade304b8 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -241,7 +241,15 @@ int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level,
 	u32 vma_flags;
 	int ret;
 
-	if (WARN_ON(flags == 0))
+	GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
+	GEM_BUG_ON(vma->size > vma->node.size);
+
+	if (GEM_WARN_ON(range_overflows(vma->node.start,
+					vma->node.size,
+					vma->vm->total)))
+		return -ENODEV;
+
+	if (GEM_WARN_ON(!flags))
 		return -EINVAL;
 
 	bind_flags = 0;
@@ -258,11 +266,6 @@ int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level,
 	if (bind_flags == 0)
 		return 0;
 
-	if (GEM_WARN_ON(range_overflows(vma->node.start,
-					vma->node.size,
-					vma->vm->total)))
-		return -ENODEV;
-
 	trace_i915_vma_bind(vma, bind_flags);
 	ret = vma->vm->bind_vma(vma, cache_level, bind_flags);
 	if (ret)
-- 
2.11.0

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[CI 4/4] drm/i915: Advance start address on crossing PML (48b ppgtt) boundary

[Chris Wilson]

When advancing onto the next 4th level page table entry, we need to
reset our indices to 0. Currently we restart from the original address
which means we start with an offset into the next PML table.

Fixes: 894ccebee2b0 ("drm/i915: Micro-optimise gen8_ppgtt_insert_entries()")
Reported-by: Matthew Auld <matthew.william.auld@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99948
Testcase: igt/drv_selftest/live_gtt
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Tested-by: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 63 ++++++++++++++++++++++++-------------
 1 file changed, 41 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 3fb5ff421a52..401d134254f3 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -816,26 +816,41 @@ struct sgt_dma {
 	dma_addr_t dma, max;
 };
 
+struct gen8_insert_pte {
+	u16 pml4e;
+	u16 pdpe;
+	u16 pde;
+	u16 pte;
+};
+
+static __always_inline struct gen8_insert_pte gen8_insert_pte(u64 start)
+{
+	return (struct gen8_insert_pte) {
+		 gen8_pml4e_index(start),
+		 gen8_pdpe_index(start),
+		 gen8_pde_index(start),
+		 gen8_pte_index(start),
+	};
+}
+
 static __always_inline bool
 gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
 			      struct i915_page_directory_pointer *pdp,
 			      struct sgt_dma *iter,
-			      u64 start,
+			      struct gen8_insert_pte *idx,
 			      enum i915_cache_level cache_level)
 {
-	unsigned int pdpe = gen8_pdpe_index(start);
-	unsigned int pde = gen8_pde_index(start);
-	unsigned int pte = gen8_pte_index(start);
 	struct i915_page_directory *pd;
 	const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level);
 	gen8_pte_t *vaddr;
 	bool ret;
 
-	GEM_BUG_ON(pdpe >= I915_PDPES_PER_PDP(vm));
-	pd = pdp->page_directory[pdpe];
-	vaddr = kmap_atomic_px(pd->page_table[pde]);
+	GEM_BUG_ON(idx->pdpe >= I915_PDPES_PER_PDP(vm));
+	pd = pdp->page_directory[idx->pdpe];
+	vaddr = kmap_atomic_px(pd->page_table[idx->pde]);
 	do {
-		vaddr[pte] = pte_encode | iter->dma;
+		vaddr[idx->pte] = pte_encode | iter->dma;
+
 		iter->dma += PAGE_SIZE;
 		if (iter->dma >= iter->max) {
 			iter->sg = __sg_next(iter->sg);
@@ -848,22 +863,25 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
 			iter->max = iter->dma + iter->sg->length;
 		}
 
-		if (++pte == GEN8_PTES) {
-			if (++pde == I915_PDES) {
+		if (++idx->pte == GEN8_PTES) {
+			idx->pte = 0;
+
+			if (++idx->pde == I915_PDES) {
+				idx->pde = 0;
+
 				/* Limited by sg length for 3lvl */
-				if (++pdpe == GEN8_PML4ES_PER_PML4) {
+				if (++idx->pdpe == GEN8_PML4ES_PER_PML4) {
+					idx->pdpe = 0;
 					ret = true;
 					break;
 				}
 
-				GEM_BUG_ON(pdpe >= I915_PDPES_PER_PDP(vm));
-				pd = pdp->page_directory[pdpe];
-				pde = 0;
+				GEM_BUG_ON(idx->pdpe >= I915_PDPES_PER_PDP(vm));
+				pd = pdp->page_directory[idx->pdpe];
 			}
 
 			kunmap_atomic(vaddr);
-			vaddr = kmap_atomic_px(pd->page_table[pde]);
-			pte = 0;
+			vaddr = kmap_atomic_px(pd->page_table[idx->pde]);
 		}
 	} while (1);
 	kunmap_atomic(vaddr);
@@ -883,9 +901,10 @@ static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm,
 		.dma = sg_dma_address(iter.sg),
 		.max = iter.dma + iter.sg->length,
 	};
+	struct gen8_insert_pte idx = gen8_insert_pte(start);
 
-	gen8_ppgtt_insert_pte_entries(ppgtt, &ppgtt->pdp, &iter,
-				      start, cache_level);
+	gen8_ppgtt_insert_pte_entries(ppgtt, &ppgtt->pdp, &iter, &idx,
+				      cache_level);
 }
 
 static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
@@ -901,11 +920,11 @@ static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
 		.max = iter.dma + iter.sg->length,
 	};
 	struct i915_page_directory_pointer **pdps = ppgtt->pml4.pdps;
-	unsigned int pml4e = gen8_pml4e_index(start);
+	struct gen8_insert_pte idx = gen8_insert_pte(start);
 
-	while (gen8_ppgtt_insert_pte_entries(ppgtt, pdps[pml4e++], &iter,
-					     start, cache_level))
-		GEM_BUG_ON(pml4e >= GEN8_PML4ES_PER_PML4);
+	while (gen8_ppgtt_insert_pte_entries(ppgtt, pdps[idx.pml4e++], &iter,
+					     &idx, cache_level))
+		GEM_BUG_ON(idx.pml4e >= GEN8_PML4ES_PER_PML4);
 }
 
 static void gen8_free_page_tables(struct i915_address_space *vm,
-- 
2.11.0

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✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Assert all sg are initialised in fake_dma_object for selftests

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/4] drm/i915: Assert all sg are initialised in fake_dma_object for selftests
URL   : https://patchwork.freedesktop.org/series/20251/
State : success

== Summary ==

Series 20251v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/20251/revisions/1/mbox/

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11 
fi-bsw-n3050     total:278  pass:239  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19 
fi-bxt-t5700     total:108  pass:95   dwarn:0   dfail:0   fail:0   skip:12 
fi-byt-j1900     total:278  pass:251  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:278  pass:247  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50 
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17 
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18 
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28 
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29 

9243ada504db810aa40b0e8f5e00d46871c78149 drm-tip: 2017y-02m-24d-17h-52m-18s UTC integration manifest
0c925f5 drm/i915: Advance start address on crossing PML (48b ppgtt) boundary
f47ed38 drm/i915: Sanity check the vma->node prior to binding into the GTT
b727161 drm/i915: Assert we do not overflow 4lvl page directories
836f380 drm/i915: Assert all sg are initialised in fake_dma_object for selftests

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3974/
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Re: ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Assert all sg are initialised in fake_dma_object for selftests

[Chris Wilson]

On Sat, Feb 25, 2017 at 06:52:24PM -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [CI,1/4] drm/i915: Assert all sg are initialised in fake_dma_object for selftests
> URL   : https://patchwork.freedesktop.org/series/20251/
> State : success
> 
> == Summary ==
> 
> Series 20251v1 Series without cover letter
> https://patchwork.freedesktop.org/api/1.0/series/20251/revisions/1/mbox/

Thanks Matthew for finding this almighty mistake.

To detect such errors without hitting the oops, we need to tweak the
context exec selftest to straddle pgtable bonudaries.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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